CN201656969U - Data transmission module based on radio frequency chip - Google Patents
Data transmission module based on radio frequency chip Download PDFInfo
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- CN201656969U CN201656969U CN201020137865XU CN201020137865U CN201656969U CN 201656969 U CN201656969 U CN 201656969U CN 201020137865X U CN201020137865X U CN 201020137865XU CN 201020137865 U CN201020137865 U CN 201020137865U CN 201656969 U CN201656969 U CN 201656969U
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Abstract
The utility model relates to a data transmission module based on a radio frequency chip, which comprises two parts, i.e. a hardware structure and a software design. The hardware structure comprises an ARM7 chip LPC2148, a radio frequency chip XE1205, a serial port chip MAX3232 and a radio frequency transceiving link; the connection relationship is as follows: the ARM7 LPC2148 is connected with the radio frequency chip XE1205 through a data bus, configures parameters for the chip and controls the data transceiving of the chip, and carries out data interaction with external equipment through a serial port; the radio frequency chip XE1205 is connected with an SPDT RF switch AS213-92 through a transmitting link and a receiving link; and the radio frequency switch receives the control signals of the ARM7 LPC2148 through a transceiving control line, and an antenna transmits and receives the data. The software design comprises radio frequency chip XE1205 register reading and writing programming, radio frequency chip XE1205 data transceiving programming and data transmission module control programming. The data transmission module based on the radio frequency chip is significantly characterized by simple structure, flexible configuration, reliable transmission, strong universality and low cost, and has wide practical value and application prospect in the technical field of wireless communication modules.
Description
One, technical field:
The utility model relates to a kind of data transmission module based on radio frequency chip, and it is relevant with radio-frequency technique, integrated circuit technique, belongs to the wireless communication module technical field.
Two, background technology:
Along with the development of radio-frequency technique, integrated circuit technique, the realization of radio communication function is more and more easier, and data transmission bauds is also more and more faster, and reaches gradually and can transmit the level that compares favourably with cable data.The wireless communication transmission technology have cost low, need not communication cable, be not subjected to applied environment restriction, configuration flexibly, advantage such as reconstruct is strong, thereby increasing application is arranged at aspects such as industrial production, medical electronics, Smart Home, community's safety.
Three, summary of the invention:
1, purpose:
The purpose of this utility model provides novel a kind of data transmission module based on radio frequency chip, and that this module has is simple in structure, flexible configuration, transmission are reliable, highly versatile, distinguishing feature that cost is low.
2, technical scheme:
(1) principle of work and power:
The novel radio digital transmission module is by embedded-type ARM 7 (ARM-Advanced RISC Machines, the common name of one class microprocessor) chip LPC2148 is configured and reads and writes control to radio frequency chip XE1205, use simple impedance matching circuit, clock oscillation circuit, radio-frequency switch circuit, realized the wireless data transceiving function.
(2) technical scheme:
A kind of data transmission module based on radio frequency chip of the utility model, it is made up of hardware configuration and software design two parts.
1) hardware configuration:
The hardware configuration of a kind of data transmission module based on radio frequency chip of the utility model is that ARM7 chip, radio frequency chip, serial port chip and radio-frequency receiving-transmitting chain constitute by microprocessor chip.Position annexation between them is as shown in Figure 1: the ARM7 chip connects radio frequency chip by data/address bus, it is carried out parameter configuration and data transmit-receive control, and carry out data interaction with external device (computer or other main control devices) by serial ports: radio frequency chip by transmitting chain with receive link and link to each other with single-pole double throw RF switch (selecting the AS213-92 type for use): radio-frequency (RF) switch is by receiving and dispatching control line reception ARM7 chip controls signal, via the antenna receiving-sending data.
Described ARM7 chip, its model is LPC2148, be Philip (Philip) company release (T-supports 16 compression instruction sets based on ARM7 TDMI; Debug on the D-supporting pieces; The embedded hardware multiplier of M-; The embedded ICE in-circuit emulator of I-, assistant adjustment on the supporting pieces) 32 high speed processors of the reduced instruction set of kernel.Chip integration is very high, the static RAM (SRAM) of embedded 40Kb (kilobit) (Random Access Memory, random access memory) and the Flash of 512KbkB (flash) memory, chip integration becomes ADC (Analog to Digital Converter, analog/digital converter), DAC (Digital to Analog Converter, digital/analog converter), house dog, real-time clock RTC (Real TimeClock), 2 UART (Universal Asynchronous Receiver/Transmitter, universal asynchronous reception/dispensing device), 2 I
2C (Inter-Integrated Circuit bus, the twin wire universal serial bus) also has SPI (Serial Peripheral interface, Serial Peripheral Interface) a plurality of bus interface such as, and USB2.0 (Universal Serial Bus 2.0, USB 2.0) are interface at full speed; The memory interface of 128 bit widths and unique accelerating structure can move 32 codes under maximum clock speed, realize the operating frequency of the highest 60MHz (megahertz); Realize in-system programming/by Boot in the sheet (guiding) load module at application programming (ISP/IAP); Its operating voltage is 3.3V, and core operational voltage is 2.5V only, greatly reduces the power consumption of chip; Have 2 kinds of low-power consumption modes: free time and power down, therefore different working methods can be set as required, reduce system power dissipation.In addition, chip adopts extra small LQFP64 encapsulation, make the microminiaturization of system be guaranteed, and circuit is simple relatively, has reduced exploitation and production cost.
It is responsible for radio frequency chip is carried out parameter configuration and data transmit-receive control, and carries out data interaction by serial ports and external device (computer or other main control devices).Radio frequency chip links to each other with single-pole double throw RF switch AS213-92 with the reception link by transmitting chain, realizes semiduplex radiofrequency signal transmitting-receiving.This transmitting chain is the passage of emission wireless signal; This reception link is the passage that receives wireless signal; Radio frequency chip and AMR7 chip are realized data passes by 5 pin lines, and its pin numbering, title and corresponding function are as shown in table 1.
Described radio frequency chip, its model is XE1205, it is the half duplex wireless transceiver of U.S. SEMTECH company, it works in 433MHz, 915MHz (megahertz) etc. need not the ISM (industry of licence plate, science and technology, medical treatment) frequency range, and can be by changing peripheral match circuit and internal configuration registers, working frequency range is extended to 180MHz to 1GMHz (1G=1024M), operating frequency is reliable and stable, meet European ETSI (ETSI European Telecommunications Standards Institute) (EN300-220-1 and EN301-439-3) and FCC (FCC) 15.247 and 15.249 authentication specifications, satisfy wireless control requirement, need not the demand frequency occupancy permit.In broadband application, its data transfer rate can reach 304Kbps (kilobits/second), and in the arrowband of 25KHz bandwidth was used, its data transfer rate also can reach 4.8Kbps.What the signal modulation technique in the chip adopted is continuous phase secondary frequency shift keying (CPFSK) modulation, and antijamming capability is strong.In addition, it has that volume is little, excellent performance, peripheral cell are few, ultra low power, easy to use and be convenient to characteristics such as design production.The chip canonical parameter is as shown in table 2.
The built-in bit synchronizer of radio frequency chip XE1205 and a mode discriminator can realize detecting the function that receives the particular data sequence in the data.After receiving the data designated sequence, mode discriminator output mode identification and matching success interrupt signal, this data sequence measuring ability has greatly alleviated the load of Peripheral Controller.
The control chip of radio frequency chip XE1205 outside is configured reading and writing data and transceive data read-write by SPI (Serial Peripheral Interface (SPI)) bus to radio frequency chip XE1205, and interface is simple.This chip internal register controlled important parameters such as operating frequency, bandwidth, frequency resolution, bit rate, transmitting power, and the operating state of real time altering chip guarantees design flexibility as required.This chip also provides IRQ0 (0 interrupts), two interrupt signal lines of IRQ1 (1 interrupts), under different working modes, can be according to chip internal register configuration parameter, corresponding interrupt signal is provided, as reception/transmission FIFO (first-in first-out register) full/spacing wave, pattern recognition the match is successful signal, detect and exceed threshold intensity signal etc., make things convenient for the ancillary equipment response; In addition, ancillary equipment also can pass through the configuration register spi bus, reads the register of relevant position and inquires about the chip operation state.
The transceive data of radio frequency chip XE1205 and configuration data have used two cover spi bus, wherein MISO (main frame input slave output), MOSI (input of main frame output slave), SCK (bus synchronous clock) are shared, and distinguishing MISO and MOSI by different chip selection signals, to go up data be the chip data (NSS_DATA) of receiving and dispatching or the data (NSS_CONFIG) of configuring chip register.
In the utility model, radio frequency chip XE1205 is configured to receive and dispatch buffer mode.Two paths of data I road and Q road are through FSK (Frequency Shift Keying, the frequency shift keying modulation) demodulation, after bit synchronous and the pattern recognition, automatically go here and there and change, and write successively among chip internal 16BYTE (byte) FIFO, simultaneously corresponding interrupt source is assigned to IRQ_0 (PATTERN/WRITE_BYTE/FIFOEMPTY) (pattern/write _ byte/fifo registers sky) and IRQ_1 (FIFO FULL) (fifo registers is full) respectively, utilize these interrupt signals, cooperate the transceive data spi bus, just the data that can transmit are sent into chip, or from chip the data that receive are read.Made full use of the internal resource of radio frequency chip XE1205 like this,, realized the transmitting-receiving of high speed accurate data with the simplest peripheral circuit and control logic.
Transmitting-receiving control circuit and radio frequency matching network:
Radio frequency chip XE1205 can be operated in 433MHz, 868MHz and 915MHz frequency range, the peripheral match circuit that different frequency ranges is corresponding different.That the utility model uses is 915MHz, and its match circuit as shown in Figure 2.
As shown in Figure 2, AS213-92 is a single-pole double throw RF switch, SW0 is connected the GPIO pin of ARM7 chip LPC2148 with SW1, by the height of SW0 and SW1 is set, make the RFO pin of single-pole double throw RF switch AS213-92 connect RF1 or RF2, realized the half-duplex transmission-receiving function of radio circuit.
Described serial port chip, its model is MAX3232, is the Transistor-Transistor Logic level and the RS-232 level transferring chip of a top grade, has two-way and receives and sendaisle, and supply power voltage is 3.0～5.5V, and message transmission rate is 250Kbps.It is low in energy consumption, and the integrated level height realizes that circuit is simple, and the reliability height is realized the conversion between ARM serial ports Transistor-Transistor Logic level and the RS-232 level.
Described radio-frequency receiving-transmitting chain is meant the signalling channel between less radio-frequency switch and the radio frequency chip, comprises receiving the wireless signal passage and sending the wireless signal passage.
2) software design:
Radio frequency chip (model is XE1205) register read-write programming:
Radio frequency chip (XE1205 type) has 31 registers, wherein has only preceding 17 registers to use always.Its classification is as shown in table 3 with the address.
Read-write to radio frequency chip (XE1205 type) configuration register is all undertaken by spi bus, the sequential that needs during programming to provide on adhere rigidly to radio frequency chip (XE1205 type) databook is programmed: at first be to enable chip, sending parameter again after sending the address, is to send chip enable the finish command at last.Any one group of register of read-write radio frequency chip XE1205 all can be undertaken by the general purpose function that table 4 provides.It is the same with configuration register that radio frequency chip (XE1205 type) receives data write, and all by spi bus, its implementation is similar.
The programming of radio frequency chip (XE1205 type) transceive data:
After finishing the internal register configuration, just can carry out the transmitting-receiving of data.
Radio frequency chip XE1205 receives flow process as shown in Figure 3:
(1) write address 5 registers, it is full for receiving FIFO that IRQ_1 interrupt source is set;
(2) write address 0 register, it is receiving mode that mode of operation is set;
(3) cycle criterion IRQ_1 pin status interrupts if receive IRQ_1, then reads the SPI data/address bus continuously 16 times.Data are transmitted by LPC2148, are sent by serial ports.
Radio frequency chip XE1205 launches flow process as shown in Figure 4:
(1) write address 5 registers, it is full for sending FIFO that IRQ_1 interrupt source is set;
(2) write address 0 register, it is emission mode that mode of operation is set;
(3) judge the IRQ_1 state,, then write the SPI data/address bus,, wait for that then this circulation sends the 0X55 data of 24bit (bit) altogether as previous video frames if receive interruption if do not receive interruption;
(4) judge the IRQ_1 state, if do not receive interruption, then write the SPI data/address bus, if receive interruption, wait for that then this circulation sends 4 byte data: 0X69 successively, 0X81,0X7E, 0X96 is as pattern recognition sign indicating number (number of pattern recognition sign indicating number, numerical value and sending order should be consistent with the PATTERN parameter in the receiver configuration register, otherwise receiver can not be discerned);
(5) judge the IRQ_1 state, if do not receive interruption, then write the SPI data/address bus, if receive interruption, then wait for, this circulation sends intraframe data;
(6) write address 5 registers are provided with IRQ_1 interrupt source and stop for sending;
(7) judge the IRQ_1 state, circular wait stops interrupt signal to receiving to send.
The digital transmission module control programming is as shown in Figure 5:
In actual applications, can communicate with one another between the digital transmission module, constitute digital transmitting network.According to the characteristics of radio frequency chip XE1205, the data of wireless module are that unit transmits with the frame, and mentality of designing is as follows:
(1) intiating radio radio frequency chip XE1205 parameter, configuring chip is a receiving mode;
(2) serial ports receives the data that will send, and triggers to interrupt, and enters transmit status.It is emission mode that radio frequency chip XE1205 is set, and sends previous video frames, pattern recognition sign indicating number, sends data content, returns receiving mode;
(3) when sending wireless data, continue to receive the data that serial ports receives and be stored in communication buffer by interrupt routine.Because when initialization, configuration radio frequency chip XE1205 transceive data bit rate is not higher than the serial ports bit rate, just can not allow communication buffer overflow so when programming a less belt data buffer zone is set;
(4) data pointer of wireless transmission is identical with the data pointer that serial ports receives, and shows that whole transmission of the data that receive by serial ports finishes, and stop wireless transmission this moment, forwards receiving mode to;
(5) when receiving wireless data also with deposit data to an onesize belt data buffer zone that receives, and start the serial ports interrupt service routine wireless data that receives sent to external equipment.
In sum, the reception and the sending mode of digital transmission module control radio frequency chip.
3, advantage and effect:
The utility model has made full use of the internal resource of radio frequency chip XE1205, has simplified circuit, has reduced cost, has shortened the research and development time, can promote and be transplanted in most of short distance wireless communications application, and big practical value is arranged.Be applied at present in certain type avionics testing equipment, reliable operation, operation conditions is good.
The utility model thought and specific implementation also have certain directive significance and reference value to design, exploitation and the realization of similar products from now on.
Four, description of drawings
Fig. 1 the utility model hardware configuration schematic diagram
Fig. 2 receives and dispatches control circuit and radio frequency matching network schematic diagram
Fig. 3 radio frequency chip XE1205 receives flow chart
Fig. 4 radio frequency chip XE1205 transmission flow figure
Fig. 5 digital transmission module control flow chart
Fig. 6 sensitivity measure schematic diagram
Symbol description is as follows among the figure:
The ARM7 microprocessor chip;
The MMCX-KWHD socket; The AS213-92 single-pole double throw RF switch.
Five, embodiment:
A kind of data transmission module based on radio frequency chip of the utility model, it is made of ARM7 chip LPC2148, radio frequency chip XE1205, serial port chip MAX3232 and radio-frequency receiving-transmitting chain.Position annexation between them as shown in Figure 1.
Described ARM7 chip LPC2148, be Philip (Philip) company release (T-supports 16 compression instruction sets based on ARM7TDMI; Debug on the D-supporting pieces; The embedded hardware multiplier of M-; The embedded ICE in-circuit emulator of I-, assistant adjustment on the supporting pieces) 32 high speed processors of the reduced instruction set of kernel.Chip integration is very high, the static RAM (SRAM) of embedded 40Kb (kilobit) (Random Access Memory, random access memory) and the Flash of 512Kb (flash) memory, chip integration becomes ADC (Analog-to-Digital Converter, analog/digital converter), DAC (Digital-to-Analog Converter, digital/analog converter), house dog, real-time clock RTC (Real Time Clock), 2 UART (Universal Asynchronous Receiver/Transmitter, universal asynchronous reception/dispensing device), 2 I
2C (Inter-Integrated Circuit bus, the twin wire universal serial bus) also has SPI (Serial Peripheral interface, Serial Peripheral Interface) a plurality of bus interface such as, and USB2.0 (Universal Serial Bus 2.0, USB 2.0) are interface at full speed; The memory interface of 128 bit widths and unique accelerating structure can move 32 codes under maximum clock speed, realize the operating frequency of the highest 60MHz (megahertz); Realize in-system programming/by Boot in the sheet (guiding) load module at application programming (ISP/IAP); Its operating voltage is 3.3V, and core operational voltage is 2.5V only, greatly reduces the power consumption of chip; Have 2 kinds of low-power consumption modes: free time and power down, therefore different working methods can be set as required, reduce system power dissipation.In addition, chip adopts extra small LQFP64 encapsulation, make the microminiaturization of system be guaranteed, and circuit is simple relatively, has reduced exploitation and production cost.
It is responsible for radio frequency chip XE1205 is carried out parameter configuration and data transmit-receive control, and carries out data interaction by serial ports and external device (computer or other main control devices).Radio frequency chip XE1205 links to each other with single-pole double throw RF switch AS213-92 with the reception link by transmitting chain, realizes semiduplex radiofrequency signal transmitting-receiving.This transmitting chain is the passage of emission wireless signal; This reception link is the passage that receives wireless signal; Radio frequency chip XE1205 and AMR7 chip LPC2148 realize data passes by 5 pin lines, and its pin numbering, title and corresponding function are shown in back tabulation 1.
Described radio frequency chip XE1205, it is the half duplex wireless transceiver of U.S. SEMTECH company, it works in 433MHz, 915MHz (megahertz) etc. need not the ISM (industry of licence plate, science and technology, medical treatment) frequency range, and can be by changing peripheral match circuit and internal configuration registers, working frequency range is extended to 180MHz to 1GMHz (1G=1024M), operating frequency is reliable and stable, meet European ETSI (ETSI European Telecommunications Standards Institute) (EN300-220-1 and EN301-439-3) and FCC (FCC) 15.247 and 15.249 authentication specifications, satisfy wireless control requirement, need not the demand frequency occupancy permit.In broadband application, its data transfer rate can reach 304Kbps (kilobits/second), and in the arrowband of 25KHz bandwidth was used, its data transfer rate also can reach 4.8Kbps.What the signal modulation technique in the chip adopted is continuous phase secondary frequency shift keying (CPFSK) modulation, and antijamming capability is strong.In addition, it has that volume is little, excellent performance, peripheral cell are few, ultra low power, easy to use and be convenient to characteristics such as design production.The chip canonical parameter is shown in back tabulation 2.
The built-in bit synchronizer of radio frequency chip XE1205 and a mode discriminator can realize detecting the function that receives the particular data sequence in the data.After receiving the data designated sequence, mode discriminator output mode identification and matching success interrupt signal, this data sequence measuring ability has greatly alleviated the load of Peripheral Controller.
The control chip of radio frequency chip XE1205 outside is configured reading and writing data and transceive data read-write by SPI (Serial Peripheral Interface (SPI)) bus to radio frequency chip XE1205, and interface is simple.This chip internal register controlled important parameters such as operating frequency, bandwidth, frequency resolution, bit rate, transmitting power, and the operating state of real time altering chip guarantees design flexibility as required.This chip also provides IRQ0 (0 interrupts), two interrupt signal lines of IRQ1 (1 interrupts), under different working modes, can be according to chip internal register configuration parameter, corresponding interrupt signal is provided, as reception/transmission FIFO (first-in first-out register) full/spacing wave, pattern recognition the match is successful signal, detect and exceed threshold intensity signal etc., make things convenient for the ancillary equipment response; In addition, ancillary equipment also can pass through the configuration register spi bus, reads the register of relevant position and inquires about the chip operation state.
The transceive data of radio frequency chip XE1205 and configuration data have used two cover spi bus, wherein MISO (main frame input slave output), MOSI (input of main frame output slave), SCK (bus synchronous clock) are shared, and distinguishing MISO and MOSI by different chip selection signals, to go up data be the chip data (NSS_DATA) of receiving and dispatching or the data (NSS_CONFIG) of configuring chip register.
In the utility model, radio frequency chip XE1205 is configured to receive and dispatch buffer mode.Two paths of data I road and Q road are through FSK (Frequency Shift Keying, the frequency shift keying modulation) demodulation, after bit synchronous and the pattern recognition, automatically go here and there and change, and write successively among chip internal 16BYTE (byte) FIFO, simultaneously corresponding interrupt source is assigned to IRQ_0 (PATTERN/WRITE_BYTE/FIFOEMPTY) (pattern/write _ byte/fifo registers sky) and IRQ_1 (FIFO FULL) (fifo registers is full) respectively, utilize these interrupt signals, cooperate the transceive data spi bus, just the data that can transmit are sent into chip, or from chip the data that receive are read.Made full use of the internal resource of radio frequency chip XE1205 like this,, realized the transmitting-receiving of high speed accurate data with the simplest peripheral circuit and control logic.
Transmitting-receiving control circuit and radio frequency matching network:
Radio frequency chip XE1205 can be operated in 433MHz, 868MHz and 915MHz frequency range, the peripheral match circuit that different frequency ranges is corresponding different.That the utility model uses is 915MHz, and its match circuit as shown in Figure 2.
As shown in Figure 2, AS213-92 is a single-pole double throw RF switch, SW0 is connected the GPIO pin of ARM7 chip LPC2148 with SW1, by the height of SW0 and SW1 is set, make the RFO pin of single-pole double throw RF switch AS213-92 connect RF1 or RF2, realized the half-duplex transmission-receiving function of radio circuit.
Described serial port chip MAX3232 is the Transistor-Transistor Logic level and the RS-232 level transferring chip of a top grade, has two-way and receives and sendaisle, and supply power voltage is 3.0～5.5V, and message transmission rate is 250Kbps.It is low in energy consumption, and the integrated level height realizes that circuit is simple, and the reliability height is realized the conversion between ARM serial ports Transistor-Transistor Logic level and the RS-232 level.
Described radio-frequency receiving-transmitting chain is meant the signalling channel between less radio-frequency switch and the radio frequency chip, comprises receiving the wireless signal passage and sending the wireless signal passage.
2) software design:
Radio frequency chip XE1205 register read-write programming:
Radio frequency chip XE1205 has 31 registers, wherein has only preceding 17 registers to use always.Its classification is with shown in the following tabulation 3 in address.
Read-write to radio frequency chip XE1205 configuration register is all undertaken by spi bus, the sequential that needs during programming to provide on the adhere rigidly to radio frequency chip XE1205 databook is programmed: at first be to enable chip, sending parameter again after sending the address, is to send chip enable the finish command at last.Any one group of register of read-write radio frequency chip XE1205 all can be undertaken by 4 general purpose functions that provide of tabulating down.It is the same with configuration register that radio frequency chip XE1205 receives data write, and all by spi bus, its implementation is similar.
The programming of radio frequency chip XE1205 transceive data:
After finishing the internal register configuration, just can carry out the transmitting-receiving of data.
Radio frequency chip XE1205 receives flow process as shown in Figure 3:
(1) write address 5 registers, it is full for receiving FIFO that IRQ_1 interrupt source is set;
(2) write address 0 register, it is receiving mode that mode of operation is set;
(3) cycle criterion IRQ_1 pin status interrupts if receive IRQ_1, then reads the SPI data/address bus continuously 16 times.Data are transmitted by LPC2148, are sent by serial ports.
Radio frequency chip XE1205 launches flow process as shown in Figure 4:
(1) write address 5 registers, it is full for sending FIFO that IRQ_1 interrupt source is set;
(2) write address 0 register, it is emission mode that mode of operation is set;
(3) judge the IRQ_1 state,, then write the SPI data/address bus,, wait for that then this circulation sends the 0X55 data of 24bit (bit) altogether as previous video frames if receive interruption if do not receive interruption;
(4) judge the IRQ_1 state, if do not receive interruption, then write the SPI data/address bus, if receive interruption, wait for that then this circulation sends 4 byte data: 0X69 successively, 0X81,0X7E, 0X96 is as pattern recognition sign indicating number (number of pattern recognition sign indicating number, numerical value and sending order should be consistent with the PATTERN parameter in the receiver configuration register, otherwise receiver can not be discerned);
(5) judge the IRQ_1 state, if do not receive interruption, then write the SPI data/address bus, if receive interruption, then wait for, this circulation sends intraframe data;
(6) write address 5 registers are provided with IRQ_1 interrupt source and stop for sending;
(7) judge the IRQ_1 state, circular wait stops interrupt signal to receiving to send.
The digital transmission module control programming is as shown in Figure 5:
In actual applications, can communicate with one another between the digital transmission module, constitute digital transmitting network.According to the characteristics of radio frequency chip XE1205, the data of wireless module are that unit transmits with the frame, and mentality of designing is as follows:
(1) intiating radio radio frequency chip XE1205 parameter, configuring chip is a receiving mode;
(2) serial ports receives the data that will send, and triggers to interrupt, and enters transmit status.It is emission mode that radio frequency chip XE1205 is set, and sends previous video frames, pattern recognition sign indicating number, sends data content, returns receiving mode;
(3) when sending wireless data, continue to receive the data that serial ports receives and be stored in communication buffer by interrupt routine.Because when initialization, configuration radio frequency chip XE1205 transceive data bit rate is not higher than the serial ports bit rate, just can not allow communication buffer overflow so when programming a less belt data buffer zone is set;
(4) data pointer of wireless transmission is identical with the data pointer that serial ports receives, and shows that whole transmission of the data that receive by serial ports finishes, and stop wireless transmission this moment, forwards receiving mode to;
(5) when receiving wireless data also with deposit data to an onesize belt data buffer zone that receives, and start the serial ports interrupt service routine wireless data that receives sent to external equipment.
In sum, the reception and the sending mode of digital transmission module control radio frequency chip.
See Fig. 6, system's receiving sensitivity is measured:
The wireless data transmission module receiving sensitivity is tested, can estimate under ideal state the communication distance between the digital transmission module.Measure line as shown in Figure 3.
The radio frequency cable needs long, and modules A and module B had better not be placed in the same room, in order to avoid because radiofrequency signal is revealed, influence is measured by the space conduction.
In actual measurement, the known fixed attenuator is 80dB (the relative size units of two amounts of expression) decay, radio frequency cable decay-21dBm (value of expression power absolute value).The parameter of two modules all is set to:
◆ work under the 915MHz frequency
◆ the 0dBm power emission
◆ the A pattern receives
◆ the 1.2Kbps data rate
◆ receive bandwidth 10K (thousand)
◆ frequency resolution 5K
When adjustable attenuator transfers to 10dB, receive data and more mistake (surpassing 30%) occurs, can calculate sensitivity this moment is 10+80+21=111dBm.
And the sensitivity of XE1205 nominal is-121dBm@1.2Kbps, differs more.
After measure module radio frequency socket place the average power of launching be about-8dBm, than the value of setting low 8dBm, reason is that radio-frequency (RF) switch, match circuit are lossy.If this part loss is counted, then the sensitivity of digital transmission module is-119dBm, is more or less the same with nominal value.
Receiving sensitivity and transmission range relation formula are:
Lfs(dB)＝32.44+20Log?d(Km)+20Log?f(MHz)
111dBm brings formula into measured value, calculates under its perfect condition the reliable communicating distance and is 9.25Km (km).
Show that more than the utility model has been realized simple and reliable wireless data transmission module design based on high sensitivity radio frequency chip XE1205, is a outstanding wireless data transmission module.
Table 1
Table 2
Table 3
Table 4
/*****************************************
* function name: XE1205_CNFG ()
* function performance: XE1205 configuration register read-write program
The * suction parameter:
* 1) cnfg_add reads and writes configuration address
* 2) cnfg_reg writes fashionable for configuration data
Should be made as 0x00 during * retaking of a year or grade configuration register
* 3) rw read-write direction indicating bit, write the fashionable WRITE (0) that is
Should be made as READ (1) during * retaking of a year or grade configuration register
* outlet parameter: the configuration register value that the cnfg_data retaking of a year or grade goes out
*****************************************/
uint8XE1205_CNFG(uint8?cnfg_add，uint8?cnfg_reg，uint8rw)
{
uint8?uCnfg_Data；
Uint8 cnfg_send_add=0＜＜7| // start bit 1bit
Rw＜＜6 // read-write direction 1bit
Cnfg_add＜＜1| // configuration address 5bit
0X01; // position of rest
IO0CLR=CNFG_CS; // control NSS_CONFIG pin is a low level
MSP1_SendData (cnfg_send_add); // write address byte
UCnfg_Data=MSPI_SendData (cnfg_reg); // write (reading) data b yte
IO0SET=CNFG_CS; // control NSS_CONFIG pin is a high level
Return u Cnfg_Data; // return sense data byte result
}
Claims (5)
1. data transmission module based on radio frequency chip, it is made up of hardware configuration and software design two parts; It is characterized in that: this hardware configuration is made of ARM7 chip, radio frequency chip, serial port chip and radio-frequency receiving-transmitting chain; Position annexation between them is that the ARM7 chip connects radio frequency chip by data/address bus, and it is carried out parameter configuration and data transmit-receive control, and carries out data interaction by serial ports and external device; Radio frequency chip links to each other with single-pole double throw RF switch with the reception link by transmitting chain; Radio-frequency (RF) switch receives ARM7 chip controls signal by the transmitting-receiving control line, via the antenna receiving-sending data.
2. a kind of data transmission module based on radio frequency chip according to claim 1 is characterized in that: described ARM7 chip is the LPC2148 cake core.
3. a kind of data transmission module based on radio frequency chip according to claim 1 is characterized in that: described radio frequency chip is the XE1205 cake core.
4. a kind of data transmission module based on radio frequency chip according to claim 1 is characterized in that: described serial port chip is the MAX3232 cake core.
5. a kind of data transmission module based on radio frequency chip according to claim 1 is characterized in that: described single-pole double throw RF switch is the AS213-92 type.
Priority Applications (1)
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103702400A (en) * | 2012-09-28 | 2014-04-02 | 中国石油天然气股份有限公司 | Cathode protection data automatic acquisition system based on wireless sensor network |
| CN104217562A (en) * | 2013-06-05 | 2014-12-17 | 中国石油天然气股份有限公司 | Cathode protection data automatic acquisition method based on wireless sensor network |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103702400A (en) * | 2012-09-28 | 2014-04-02 | 中国石油天然气股份有限公司 | Cathode protection data automatic acquisition system based on wireless sensor network |
| CN103702400B (en) * | 2012-09-28 | 2017-09-01 | 中国石油天然气股份有限公司 | Cathode protection data automatic acquisition system based on wireless sensor network |
| CN104217562A (en) * | 2013-06-05 | 2014-12-17 | 中国石油天然气股份有限公司 | Cathode protection data automatic acquisition method based on wireless sensor network |
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