CN201654492U - Wireless primary and secondary clock - Google Patents
Wireless primary and secondary clock Download PDFInfo
- Publication number
- CN201654492U CN201654492U CN 201020132397 CN201020132397U CN201654492U CN 201654492 U CN201654492 U CN 201654492U CN 201020132397 CN201020132397 CN 201020132397 CN 201020132397 U CN201020132397 U CN 201020132397U CN 201654492 U CN201654492 U CN 201654492U
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- clock
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- microprocessor
- wireless
- secondary clock
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Abstract
The utility model relates to a wireless primary and secondary clock, mainly comprising a primary clock and a plurality of secondary clocks, wherein the primary clock and the secondary clocks are internally provided with a wireless transceiving circuit capable of receiving and forwarding signals; when one secondary clock receives the signals transmitted by the primary clock, on one hand, a microprocessor of the secondary clock carries out processing on the signals and carries out synchronous time display by a display circuit, and on the other hand, the secondary clock forwards the signals immediately to lead the other secondary clocks to receive, thus being capable of leading the secondary clocks with longer distance to carry out synchronous time display, achieving the effect of low-power long-distance synchronous transmission and time display and having larger practicability.
Description
Technical field
The utility model relates to a kind of wireless type synchronized clocks.
Background technology
In building or place, if simultaneously need be when the diverse location in this buildings be installed clock, give the correct time synchronously and cost-effective purpose for reaching, adopt a kind of time set of whistle master clock, the method of synchronization of synchronized clocks adopts wire transmission or wireless transmission at present, as adopt Wireless transmission mode, high-power wireless launcher is set in master clock, the installing receiver is to receive the wireless signal that master clock was sent in secondary clock, the shortcoming of this kind time set is that the secondary clock of distance possibly can't receive the signal of master clock, thereby influenced the synchronous of secondary clock and master clock timing, in order to overcome the problems referred to above, the mode of strengthening master clock wireless signal output power that adopts is arranged, thus in the prior art, not only increase use cost, also increased the difficulty of production management.
The utility model content
The utility model purpose is that a kind of wireless type synchronized clocks that can miniwatt length shows apart from synchronous transmission and time is provided in order to overcome the deficiencies in the prior art.
For achieving the above object, the technical solution adopted in the utility model is: a kind of wireless type synchronized clocks, comprise a master clock and a plurality of secondary clock, described master clock is provided with microprocessor, the timing circuit that output terminal and microprocessor are electrically connected, display circuit and the wireless transmission circuit that is electrically connected with output end of microprocessor respectively, be used to provide the power circuit of working power, the time signal that described microprocessor produces timing circuit handle with conversion after one the tunnel export display circuit to and carry out time showing, one the tunnel exports wireless transmission circuit to, by wireless transmission circuit with lock in time signal send;
Each described secondary clock also is provided with microprocessor, be used to receive wireless transmission circuit, display circuit and the power circuit of the synchronizing clock signals of master clock emission, the microprocessor of secondary clock receives signal lock in time of its wireless transmission circuit output, demonstrates the time of the timing circuit institute timing of master clock after treatment synchronously by display circuit;
The wireless transmission circuit of described master clock and each secondary clock is for receiving the wireless transceiver circuit of forward signal again, when the wireless transmission circuit of corresponding secondary clock receives lock in time of being sent by master clock behind the signal, it on the one hand carries out synchronous processing with the microprocessor that lock in time, signal sent to this secondary clock, on the other hand should lock in time signal forwarding penetrate to other secondary clock.
Further, described master clock and each secondary clock all are respectively arranged with the adjusting operating key, and described adjusting operating key is used for the time of corresponding master clock or secondary clock is finely tuned and proofreaies and correct.
The wireless transceiver circuit of described master clock and each secondary clock is a ZigBee wireless receiving and dispatching transmission system.
Because technique scheme utilization, the utility model compared with prior art has following advantage: the utility model has the synchronous received signal wireless transceiver circuit of forwarding capability again by being provided with in secondary clock, it can be forwarded the signal that receives again, make other secondary clock that does not receive the master clock signal can receive the signal of transmitting by aforementioned secondary clock, reach the synchronous transmission effect of no distance limit, no matter and the quantity of secondary clock and distance, secondary clock and master clock can adopt same transmission standard to make and use, to simplify processing procedure and to reduce production costs, has bigger practicality.
Description of drawings
Accompanying drawing 1 is the circuit block diagram of the utility model master clock and secondary clock;
Accompanying drawing 2 is the utility model user mode synoptic diagram;
Wherein: 1, master clock; 11, microprocessor; 12, timing circuit; 13, display circuit; 14, wireless transmission circuit; 15, regulate operating key; 16, power circuit;
2, secondary clock; 21, microprocessor; 22, wireless transmission circuit; 23, display circuit; 25, regulate operating key; 26, power circuit;
Embodiment
Below in conjunction with accompanying drawing the utility model preferred embodiment is elaborated:
As shown in Figure 1, the wireless type synchronized clocks of present embodiment mainly is made up of a master clock 1 and several secondary clocks 2, wherein, master clock 1 is provided with a microprocessor 11, timing circuit 12, display circuit 13, wireless transmission circuit 14, and provides power supply by a power circuit 16 (for civil power or battery) for master clock.Timing circuit 12 is used for the generation time signal, microprocessor 11 receives the time signal of timing circuit 12 transmissions and handles and change, microprocessor 11 is sent to signal respectively in display circuit 13 and the wireless transmission circuit 14 more then, display circuit 13 mainly is made up of led drive circuit and display, its time with 12 timing of timing circuit shows, wireless transmission circuit 14 launches time signal for secondary clock 2 receptions;
Each secondary clock 2 mainly is made up of microprocessor 21, wireless transmission circuit 22, display circuit 23, and simultaneously, each secondary clock 2 also is provided with a power circuit 26 and is used to provide this secondary clock 2 needed electric power.The wireless transmission circuit 22 of secondary clock 2 receives by master clock 1 and passes the time signal of coming, and handles via its microprocessor 21 again, is demonstrated the time of 12 timing of timing circuit of master clock 1 synchronously by display circuit 23.In the present embodiment, the wireless transmission circuit 14 in the master clock 1 and the wireless transmission circuit 22 of each secondary clock 2 are has the wireless transceiver circuit realization that receives again forward signal, after the wireless transmission circuit 22 of one of them secondary clock 2 receives the signal that is sent by master clock 1, it passes on this signal Synchronization on the one hand to launch for other secondary clock 2 and receives, on the other hand signal is passed to the microprocessor 21 that is connected with this wireless transmission circuit 22, exported to the synchronous demonstration of display circuit 23 after the signal of 21 pairs of receptions of microprocessor is handled and changed with the time of carrying out.Above-mentioned master clock 1 is the wireless transmitting system of ZigBee transceiver with the wireless transceiver circuit of secondary clock 2, and its frequency that adopts is 2.4GHz.
In the present embodiment, the input end with its microprocessor 11 on the master clock 1 also is electrically connected with adjusting operating key 15, utilizes this adjusting operating key 15 to finely tune and to proofread and correct the time signal of master clock 1.Equally, also be respectively equipped with on each secondary clock 2 and regulate operating key 25, the microprocessor 21 of regulating operating key 25 and secondary clock 2 is electrically connected, and is used for corresponding secondary clock 2 is carried out the fine setting and the correction work of time signal.
In use, can master clock 1 transmission less than the place by being transferred to other apart from master clock 1 longer-distance secondary clock near the secondary clock in the transmission range of master clock 12, display circuit by separately shows temporal information synchronously simultaneously, and each secondary clock 2 all can be transmitted temporal information again to farther secondary clock 2, form a netted connection form, as shown in Figure 2, and then can reach with miniwatt and do the effect that the synchronous transmission of long distance and time show, no matter and the quantity and the distance of secondary clock 2 installings, master clock wherein and secondary clock can be same specification make, thereby simplify processing procedure and reduce production costs.
The foregoing description only is explanation technical conceive of the present utility model and characteristics; its purpose is to allow the personage who is familiar with this technology can understand content of the present utility model and enforcement according to this; can not limit protection domain of the present utility model with this; as timing circuit also can in be located in the microprocessor; all equivalences of being done according to the utility model spirit change or modify, and all should be encompassed within the protection domain of the present utility model.
Claims (3)
1. wireless type synchronized clocks, comprise a master clock (1) and a plurality of secondary clock (2), described master clock (1) is provided with microprocessor (11), the timing circuit (12) that output terminal and microprocessor (11) are electrically connected, display circuit (13) and the wireless transmission circuit (14) that is electrically connected with microprocessor (11) output terminal respectively, be used to provide the power circuit (16) of working power, the time signal that described microprocessor (11) produces timing circuit (12) handle with conversion after one the tunnel export display circuit (13) to and carry out time showing, one the tunnel exports wireless transmission circuit (14) to, by wireless transmission circuit (14) with lock in time signal send;
Each described secondary clock (2) also is provided with microprocessor (21), be used to receive wireless transmission circuit (22), display circuit (23) and the power circuit (26) of the synchronizing clock signals of master clock (1) emission, the microprocessor (21) of secondary clock (2) receives signal lock in time of its wireless transmission circuit (22) output, and is identical with the time that master clock (1) shows by display circuit (23) after treatment;
It is characterized in that: described master clock (1) is the wireless transceiver circuit that can receive again forward signal with the wireless transmission circuit (14,22) of each secondary clock (2), when the wireless transmission circuit (22) of corresponding secondary clock (2) receives lock in time of being sent by master clock (1) behind the signal, it on the one hand carries out synchronous processing with the microprocessor that lock in time, signal sent to this secondary clock, on the other hand should lock in time signal forwarding penetrate to other secondary clock.
2. wireless type synchronized clocks according to claim 1, it is characterized in that: described master clock (1) and each secondary clock (2) all are respectively arranged with regulates operating key (15,25), and described adjusting operating key (15,25) is used for the time of corresponding master clock (1) or secondary clock (2) is finely tuned and proofreaies and correct.
3. wireless type synchronized clocks according to claim 1 is characterized in that: described master clock (1) is a ZigBee wireless receiving and dispatching transmission system with the wireless transceiver circuit of each secondary clock (2).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201020132397 CN201654492U (en) | 2010-03-12 | 2010-03-12 | Wireless primary and secondary clock |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201020132397 CN201654492U (en) | 2010-03-12 | 2010-03-12 | Wireless primary and secondary clock |
Publications (1)
Publication Number | Publication Date |
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CN201654492U true CN201654492U (en) | 2010-11-24 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN 201020132397 Expired - Fee Related CN201654492U (en) | 2010-03-12 | 2010-03-12 | Wireless primary and secondary clock |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102323745A (en) * | 2011-08-28 | 2012-01-18 | 吴红委 | Wireless synchronization timing system |
CN104281050A (en) * | 2014-09-24 | 2015-01-14 | 得利时钟表(深圳)有限公司 | Timing device of electronic watch |
-
2010
- 2010-03-12 CN CN 201020132397 patent/CN201654492U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102323745A (en) * | 2011-08-28 | 2012-01-18 | 吴红委 | Wireless synchronization timing system |
CN104281050A (en) * | 2014-09-24 | 2015-01-14 | 得利时钟表(深圳)有限公司 | Timing device of electronic watch |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20101124 Termination date: 20180312 |
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CF01 | Termination of patent right due to non-payment of annual fee |