CN201577163U - High-low code stream audio-video file processing device adopting 1394 - Google Patents

Abstract

The utility model provides a high-low code stream audio-video file processing device adopting 1394, which extracts time and video frame information synchronously while acquiring original DV video streams and codes and stores the information as high code stream files and low code stream files with completely corresponding time. The processing device comprises a DSP chip, a 1394 interface card, a data processing module and an encoder, wherein the data processing module comprises an FPGA chip, two SRAMs and a CPIC interface; the 1394 interface card is connected with an FPGA port in the data processing module and used for providing video stream data; an SRAM I and an SRAM II in the data processing module are both connected with the FPGA to conduct data reading and writing; the FPGA is connected with the encoder through the CPCI interface, directly outputs video frame information and frame synchronization information to the encoder, and simultaneously outputs time stream information to the encoder; and the encoder generates low code stream files synchronous with time streams. The processing device can be applied to a media assets management system to achieve fast extraction of high-low code stream audio-video files, so as to reduce the hardware cost and improve the running speed of the overall system.

Description

A kind of processing unit that passes through 1394 realization high-low code flow audio-video documents

Technical field

The utility model relates to a kind of processing unit that 1394 interface cards are realized the high-low code flow audio-video document that passes through, when gathering raw digitized video (DV) stream, synchronous extraction time and frame of video information, code storage is corresponding fully high code stream and a low code stream material file of time respectively.

Background technology

Along with the development that video digitizer storage and video digitizer are handled, in links such as editing, storage administration, broadcast issues, the collaborative computing of more and more dependence high code stream files and low code stream file goes to realize work of treatment efficiently.But processing method in the past will rely on expensive specialized hardware, perhaps waits source code flow to create to finish and converts low code stream material again to.

In the practical operation, because it is expensive that the special-purpose hardware of employing brings, and encoder can't be upgraded, and 1394 interfaces that adopt standard can only wait when gathering video flowing gather finish after, be converted to the low code stream file again, not only to spend the double time, also can produce the frame synchronization error, become the bottleneck that video resource is created so the length consuming time of working at present, efficient are low.

The utility model content

The purpose of this utility model has been to provide a kind of processing unit that 1394 interface cards are realized the high-low code flow audio-video document that passes through, be specially: by the interface of 1394 hardware, when gathering original DV video flowing, by data processing module based on field programmable gate array (FPGA) and compact bus interface (CPCI) interface composition, accurately extraction time frame information and frame of video information, through encoder stores be and the complete corresponding low code stream material file of time frame.

The utility model is a kind of processing unit, and this device can be realized the extraction of high-low code flow audio-video document by 1394 interface cards, and hardware cost is low, can in real time, accurately create high code stream (source code flow) and low code stream efficiently.

To achieve these goals, the utility model has been taked following technical scheme.This device comprises general purpose signal processor (DSP) chip, 1394 interface cards, data processing module and encoder, and described data processing module comprises fpga chip, two SRAM and a CPIC interface; Described two internal memories (SRAM) with static access facility are respectively SRAM1 and SRAM2.Wherein:

Pending video flowing inputs to 1394 interface cards, and 1394 interface cards link to each other with dsp chip, and dsp chip provides driver and update algorithm for 1394 interface cards; 1394 interface cards are directly output nothing compression source code flow also;

FPGA port in 1394 interface cards and the data processing module is connected, for data processing module provides video stream data; SRAM1 in the data processing module all is connected with FPGA with SRAM2, carries out data write;

FPGA links to each other with encoder by the CPCI interface, and frame of video information is exported to encoder, and FPGA also directly links to each other with encoder simultaneously, and time frame information is exported to encoder, and encoder links to each other and generates and the synchronous low code stream file of time frame.

The utility model can be applied in media asset management system and the nonlinear editing system, realizes the rapid extraction to the high-low code flow audio-video document of DV video flowing, reduces hardware cost, improves the speed of service of whole system.

Description of drawings

Fig. 1 principle schematic of the present utility model

Fig. 2 main chip connection layout of the present utility model

Embodiment

The utility model is described in further detail below in conjunction with Fig. 1～2:

Present embodiment obtains source code flow by 1394 interfaces, providing synchronous time frame information and frame of video information through data processing module, advance encoder and obtain the low code stream file, concrete structure as shown in Figure 1, comprise dsp chip, 1394 interface cards, data processing module, encoder, source code flow output interface and low code stream output interface, data processing module comprises fpga chip, two SRAM and CPIC interface.Pending video flowing inputs to 1394 interface cards, and 1394 interface cards link to each other with dsp chip, and dsp chip provides driver and update algorithm for 1394 interface cards, and 1394 interface cards are the source code flow of directly output nothing compression also.FPGA port in 1394 interface cards and the data processing module is connected, and the SRAM1 in the data processing module all is connected with FPGA with SRAM2, carries out data write.FPGA links to each other with encoder by the CPCI interface, and frame of video information is exported to encoder, and FPGA also directly links to each other with encoder simultaneously, and time frame information is exported to encoder, and encoder generates and the synchronous low code stream file of time frame.

Describe present embodiment in detail in conjunction with Fig. 2:

What 1) dsp chip in the present embodiment was selected for use is DSP BF532 chip, and BF532 is connected with 1394 interface cards, realizes the renewal of 1394 drivers, and 1394 interface cards mainly adopt the TSB43AA82A of TI.Realize the selection of MCU mouth and DMA mouth multiplex data line, reading writing signal line with the chip selection signal AMS1 of BF532 and AMS2, the DMA mouth provides the window that is connected with high-speed peripheral.Data among the reading DMA of having no progeny during DSP the enters FIFO, that detects FIFO reads the sky flag bit, finishes in DSP the initialization of TSB43AA82A and the preliminary treatment of signal.

2) 1394 clampings at first enter physical layer after receiving data flow, are packaged as 1394 isochronal data packet formats by physical layer, enter FPGA through link layer.FPGA detects data packet head according to isochronal data bag things Code Number, isolate simple view data and deposit SRAM in, SRAM1 and SRAM2 read and write " ping-pong operation " to FPGA, guarantee the real-time of image data transmission, can uninterruptedly carry out transfer of data, extract frame synchronizing signal simultaneously, send to the CPCI interface, carry out next step image processing operations with view data.

3) composition of the method for sampling, sample frequency and the luminance signal of DV standard (DVCAM/DVPRO) record format of the DV standard/Panasonic of the DV record format of recording of video component signal, Sony in the FPGA, by reading the content of 1394 buffering areas, determine the coded format of transport stream by the data of analysis buffers, and be sent to the encoder input.

4) encoder is according to the time frame and the frame of video information of aforementioned process processing, and the coding rise time is the low code stream file of correspondence fully.

The utility model can be with tape library in the media asset management system, upload work station links to each other with the catalogue work station, realizes the rapid extraction to the high-low code flow audio-video document of DV video flowing, reduces hardware cost, the speed of service of raising whole system.

Claims (1)

1. one kind is passed through the processing unit that 1394 interface cards are realized the high-low code flow audio-video document, it is characterized in that: comprise dsp chip, 1394 interface cards, data processing module and encoder, described data processing module comprises fpga chip, two SRAM and a CPIC interface; Described two SRAM are respectively SRAM1 and SRAM2; Wherein:

Pending video flowing inputs to 1394 interface cards, and 1394 interface cards link to each other with dsp chip, and dsp chip provides driver for 1394 interface cards; 1394 interface cards are also directly exported source code flow;

FPGA port in 1394 interface cards and the data processing module is connected, for data processing module provides video stream data; SRAM1 in the data processing module all is connected with FPGA with SRAM2, carries out data write;

FPGA links to each other with encoder by the CPCI interface, and frame of video information is exported to encoder, and FPGA also directly links to each other with encoder simultaneously, and time frame information is exported to encoder, and encoder generates and the synchronous low code stream file of time frame.

Images