CN201570906U - Bus external-extension anti-interference encryption device - Google Patents

Bus external-extension anti-interference encryption device Download PDF

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Publication number
CN201570906U
CN201570906U CN2009202635475U CN200920263547U CN201570906U CN 201570906 U CN201570906 U CN 201570906U CN 2009202635475 U CN2009202635475 U CN 2009202635475U CN 200920263547 U CN200920263547 U CN 200920263547U CN 201570906 U CN201570906 U CN 201570906U
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CN
China
Prior art keywords
bus
circuit
electromagnetic shielding
driving circuits
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2009202635475U
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Chinese (zh)
Inventor
刘海龙
魏东东
郭上华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZHUHAI JINGWEI ELECTRIC CO Ltd
Zhuhai XJ Electric Co Ltd
Original Assignee
ZHUHAI JINGWEI ELECTRIC CO Ltd
Zhuhai XJ Electric Co Ltd
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Publication date
Application filed by ZHUHAI JINGWEI ELECTRIC CO Ltd, Zhuhai XJ Electric Co Ltd filed Critical ZHUHAI JINGWEI ELECTRIC CO Ltd
Priority to CN2009202635475U priority Critical patent/CN201570906U/en
Application granted granted Critical
Publication of CN201570906U publication Critical patent/CN201570906U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S10/00Systems supporting electrical power generation, transmission or distribution
    • Y04S10/16Electric power substations

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  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

The utility model discloses a bus external-extension anti-interference encryption device, aiming to provide the bus external-extension anti-interference encryption device with strong anti-interference ability, improved driving force and matched impedance. The device comprises a bus hardware electromagnetic shielding case (1), a multilayer bus circuit board (2) and a circuitry (3); the circuitry (3) is installed on the multilayer bus circuit board (2); the multilayer bus circuit board (2) is installed in the bus hardware electromagnetic shielding case (1); the circuitry (3) comprises a CPU bus system (31), a bus driving circuit (32), a bus impedance matching and anti-interference circuit (33); and the CPU bus system (31), the bus driving circuit (32) and the bus impedance matching and anti-interference circuit (33) are all connected through copper foil wires installed on the multilayer bus circuit board (2). The device can be widely applied to the field of terminal device in power distribution network.

Description

A kind of anti-interference encryption in bus expansion device
Technical field
The utility model relates to power equipment and line monitoring equipment, relates in particular to a kind of multifunctional integrated novel distribution network automated terminal.
Background technology
Power distribution network terminal " WPZD-144 power distribution network integrated test control terminal " (hereinafter to be referred as detection and control terminal), this detection and control terminal are that functions such as integrated DTU, TTU and communication equipment management, configuration configuration, WEB issue are in the novel distribution network automated terminal of one.Electric power places such as station, ring main unit, switchgear house, case change be can be applied to open and close, the operation such as voltage, electric current, high-tension apparatus running status to 10kV power distribution network circuit and the monitoring of fault message realized.Can satisfy voltage, electric current to low pressure 380V distribution transformer when finishing high-pressure side remote signalling, remote measurement, remote control three distant functions, functions such as Data Management Analysis, storage, statistics, low-pressure reactive compensation are finished in monitorings such as the running status of transformer.Communication function possesses multiple communication interface and multiple standards communication protocol, removes to possess the terminal inner data management function, externally also can transmit switchgear house or open and close data such as electric energy meter, PLC and direct current cabinet in the station, finishes and main station system communications function.
In the said equipment development process, consider and accurately, reliably to satisfy the hardware unit that proposition is adopted a cover high reliability, possessed high anti-jamming capacity the application of data bus.In the design of CPU conventional system, the application of data/address parallel bus was very extensive in the past, but mainly was confined to short-distance transmission in the plate, and not only data transmission bauds is fast, efficient is high because of this application mode, and is difficult for makeing mistakes.But because the speed height of parallel bus own, a little less than the antijamming capability, reason such as actuating force can be limited, impedance is low is used for it at present and often is confined to single board design, for also not being very ripe in the application of many plug-in units of complete machine, has a lot of technological difficulties.
In sum, exist because of a little less than the parallel bus antijamming capability in the multifunctional integrated novel distribution network automated terminal in the prior art at present, defective such as actuating force can be limited, impedance is low is difficult in the design be applied on the complete machine of many plug-in units.
The utility model content
Technical problem to be solved in the utility model is to overcome the deficiencies in the prior art, provides that a kind of antijamming capability is strong, actuating force can improve, the anti-interference encryption in bus expansion device of impedance matching.By electromagnetic shielding, strengthen bus driver ability, bus impedance coupling, hardware corresponding measure such as anti-interference has solved above-mentioned design difficulty problem, opened up the new mode that parallel bus is used, for system design provides the more design of high speed, high reliability.
The technical scheme that the utility model adopted is: the utility model comprises bus hardware electromagnetic shielding cabinet, multiple field bus circuit plate, circuitry, described circuitry device is on described multiple field bus circuit plate, described multiple field bus circuit panel assembly is in described bus hardware electromagnetic shielding cabinet, described circuitry comprises the cpu bus system, bus driving circuits, bus impedance coupling and anti-jamming circuit, described cpu bus system, bus driving circuits, the bus impedance coupling is connected by the Copper Foil lead that installs on the described multiple field bus circuit plate with anti-jamming circuit, the CS end of described cpu bus system is held with the OE of described bus driving circuits and is connected, the W/R of described cpu bus system, D0 to D15, A0 to A6, / W, each end of R is connected with the end of the same name of described bus driving circuits, the XD0 to XD15 of described bus driving circuits, XA0 to XA6, X/W, each end of XR is connected respectively each adaptive connection of bus top corresponding end of input resistance and described bus impedance coupling and anti-jamming circuit, and described bus impedance is mated with each terminal bus of anti-jamming circuit pull-up resistor of connecting respectively and is connected with power supply VCC.
Described multiple field bus circuit plate is taked four laminate schemes on the board design of bus backplane, bus signal line is distributed in interior bus plane, bus plane takes to apply copper and good earth up and down, in bus design, the core bus outer peripheral areas is taked to apply the copper design and with the copper-clad good earth, is weakened the influence of interference signal to bus.
Described bus hardware electromagnetic shielding cabinet adopts totally-enclosed metal cabinet, expansion bus is positioned at cabinet inside, separating between separation, each expansion slot, power supply, CPU between each circuit board all adopts the metallic plate totally-enclosed to cut off described bus hardware electromagnetic shielding cabinet housing good earth.
The beneficial effects of the utility model are: because the utility model comprises bus hardware electromagnetic shielding cabinet, multiple field bus circuit plate, circuitry, described circuitry device is on described multiple field bus circuit plate, described multiple field bus circuit panel assembly is in described bus hardware electromagnetic shielding cabinet, described circuitry comprises the cpu bus system, bus driving circuits, bus impedance coupling and anti-jamming circuit, described cpu bus system, bus driving circuits, the bus impedance coupling is connected by the Copper Foil lead that installs on the described multiple field bus circuit plate with anti-jamming circuit, the CS end of described cpu bus system is held with the OE of described bus driving circuits and is connected, the W/R of described cpu bus system, D0 to D15, A0 to A6, / W, R, each end is connected with the end of the same name of described bus driving circuits, the XD0 to XD15 of described bus driving circuits, XA0 to XA6, X/W, each end of XR is connected respectively each adaptive connection of bus top corresponding end of input resistance and described bus impedance coupling and anti-jamming circuit, and described bus impedance is mated with each terminal bus of anti-jamming circuit pull-up resistor of connecting respectively and is connected with power supply VCC.So that the utility model is a kind of antijamming capability is strong, actuating force can improve, the anti-interference encryption in bus expansion device of impedance matching.
Description of drawings
Fig. 1 is the utility model electrical block diagram;
Fig. 2 is the utility model multiple field bus circuit plate structure schematic diagram;
Fig. 3 is the utility model bus hardware electromagnetic shielding casing structure schematic diagram.
Embodiment
As Fig. 1, Fig. 2, shown in Figure 3, the utility model comprises bus hardware electromagnetic shielding cabinet 1, multiple field bus circuit plate 2, circuitry 3, described circuitry 3 devices are on described multiple field bus circuit plate 2, described multiple field bus circuit plate 2 devices are in described bus hardware electromagnetic shielding cabinet 1, described circuitry 3 comprises cpu bus system 31, bus driving circuits 32, bus impedance coupling and anti-jamming circuit 33, described cpu bus system 31, bus driving circuits 32, the bus impedance coupling is connected with the Copper Foil lead of anti-jamming circuit 33 by device on the described multiple field bus circuit plate 2, the CS end of described cpu bus system 31 is held with the OE of described bus driving circuits 32 and is connected, the W/R of described cpu bus system 31, D0 to D15, A0 to A6, / W, each end of R is connected with the end of the same name of described bus driving circuits 32, the XD0 of described bus driving circuits 32, XD1 to XD15, XA0 to XA6, X/W, each end of XR is connected respectively each adaptive connection of bus top corresponding end of input resistance and described bus impedance coupling and anti-jamming circuit 33, and described bus impedance is mated with each terminal bus of anti-jamming circuit 33 pull-up resistor of connecting respectively and is connected with power supply VCC.
Described multiple field bus circuit plate 2 is taked four laminate schemes on the board design of bus backplane, bus signal line is distributed in interior bus plane 22, the external power layer 21 of upper and lower surface takes to apply copper and good earth, in bus design, the core bus outer peripheral areas is taked to apply the copper design and with the copper-clad good earth, is weakened the influence of interference signal to bus.
Described bus hardware electromagnetic shielding cabinet 1 adopts totally-enclosed metal cabinet, expansion bus is positioned at cabinet inside, separating between separation, each expansion slot, power supply, CPU between each circuit board all adopts the metallic plate totally-enclosed to cut off described bus hardware electromagnetic shielding cabinet 1 housing good earth.
In the present embodiment, design principle and thinking are as follows:
One, bus hardware design of Electromagnetic Shielding
1, in the bus design of Electromagnetic Shielding, at first consider to adopt totally-enclosed metal cabinet from complete machine, expansion bus is positioned at cabinet inside, and metal shell can disturb good shield effectiveness to external world.
2, take 4 laminate schemes on the board design of bus backplane, bus signal line is distributed in interior bus plane, bus plane takes to spread copper and good earth up and down.
3, in bus design, the core bus outer peripheral areas is taked to spread the copper design and will be spread copper layer good earth, weakens the influence of interference signal to bus.
Two, bus driver, impedance matching and Anti-interference Design
In the present embodiment design, adopted the COMS bus driver chip that driving force is strong, reaction speed is fast for improving the bus driver ability; Secondly because bus expansion, line impedance does not match and tends to cause signal reflex, and then the imperfect phenomenon of initiation bus signals, cause device erroneous judgement or malfunction, this case has been connected in series circuit build-out resistor (33 ohm) at the bus driver chip port of export for this reason, simultaneously terminal and connect (6.8k ohm) pull-up resistor and the more intense TVS pipe (TVS employing ± 15kV bubble-discharge of antijamming capability at parallel bus, ± 8kV contact discharge protection specification, work peak-inverse voltage 7.0V, puncture crest voltage: 7.78~8.60V, maximum instantaneous impulse current 26A, Maximum Reverse Leakage Current 200uA), experimental results show that this impedance matching combination and Anti-interference Design have improved the reliability of bus greatly.

Claims (3)

1. anti-interference encryption in bus expansion device, it comprises bus hardware electromagnetic shielding cabinet (1), multiple field bus circuit plate (2), circuitry (3), described circuitry (3) device is on described multiple field bus circuit plate (2), described multiple field bus circuit plate (2) device is in described bus hardware electromagnetic shielding cabinet (1), it is characterized in that: described circuitry (3) comprises cpu bus system (31), bus driving circuits (32), bus impedance coupling and anti-jamming circuit (33), described cpu bus system (31), bus driving circuits (32), the bus impedance coupling is connected with the Copper Foil lead that anti-jamming circuit (33) is gone up device by described multiple field bus circuit plate (2), the CS end of described cpu bus system (31) is connected with the OE end of described bus driving circuits (32), the W/R of described cpu bus system (31), D0 to D15, A0 to A6, / W, each end of R is connected with the end of the same name of described bus driving circuits (32), the XD0 to XD15 of described bus driving circuits (32), XA0 to XA6, X/W, each end of XR is connected respectively each adaptive connection of bus top corresponding end of input resistance and described bus impedance coupling and anti-jamming circuit (33), and described bus impedance is mated with each terminal bus of anti-jamming circuit (33) pull-up resistor of connecting respectively and is connected with power supply VCC.
2. anti-interference encryption in bus expansion device according to claim 1, it is characterized in that: the circuit board of the bus backplane of described multiple field bus circuit plate (2) is taked four-sheet structure, bus signal line is distributed in middle two-layer interior bus plane (22), bilevel external power layer (21) adopt to apply copper and good earth, and the core bus outer peripheral areas adopts applies copper and with the copper-clad good earth.
3. anti-interference encryption in bus expansion device according to claim 1 and 2, it is characterized in that: described bus hardware electromagnetic shielding cabinet (1) adopts totally-enclosed metal cabinet, expansion bus is positioned at cabinet inside, separating between separation, each expansion slot, power supply, CPU between each circuit board all adopts the metallic plate totally-enclosed to cut off described bus hardware electromagnetic shielding cabinet (1) housing good earth.
CN2009202635475U 2009-11-27 2009-11-27 Bus external-extension anti-interference encryption device Expired - Fee Related CN201570906U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2009202635475U CN201570906U (en) 2009-11-27 2009-11-27 Bus external-extension anti-interference encryption device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2009202635475U CN201570906U (en) 2009-11-27 2009-11-27 Bus external-extension anti-interference encryption device

Publications (1)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103499997A (en) * 2013-09-13 2014-01-08 中国科学院近代物理研究所 Backboard for NIM case and manufacturing method thereof
CN108476274A (en) * 2015-12-22 2018-08-31 瑞维士蒂普股份有限公司 Collision avoids sensor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103499997A (en) * 2013-09-13 2014-01-08 中国科学院近代物理研究所 Backboard for NIM case and manufacturing method thereof
CN108476274A (en) * 2015-12-22 2018-08-31 瑞维士蒂普股份有限公司 Collision avoids sensor device

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100901

Termination date: 20181127

CF01 Termination of patent right due to non-payment of annual fee