CN201557104U - RS232 communication isolation circuit - Google Patents
RS232 communication isolation circuit Download PDFInfo
- Publication number
- CN201557104U CN201557104U CN2009202830919U CN200920283091U CN201557104U CN 201557104 U CN201557104 U CN 201557104U CN 2009202830919 U CN2009202830919 U CN 2009202830919U CN 200920283091 U CN200920283091 U CN 200920283091U CN 201557104 U CN201557104 U CN 201557104U
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- photoelectrical coupler
- resistance
- connects
- isolation circuit
- output
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Abstract
The utility model provides an RS232 communication isolation circuit that is connected between a connector and a serial interface female connector. The RS232 communication isolation circuit comprises a data sending signal isolation circuit and a data receiving signal isolation circuit; the data sending signal isolation circuit comprises a first photoelectric coupler, a first resistor, a second resistor, a first capacitor and a first diode; and the data receiving signal isolation circuit comprises a second photoelectric coupler, a third resistor, a fourth resistor and a second capacitor. In the utility model, the high-speed photoelectric coupler is used for isolation, the transmission speed is fast; 5V TTL potential is supported; furthermore, the isolation circuit is also applied to 3.3V potential after the resistance is adjusted; the external power supply is not needed for supplying power independently and the power is obtained from the serial port of a computer; and the circuit is simple, the PCB can be extremely small, the cost is low and the electrical characteristic is stable.
Description
Technical field
The utility model relates to realizes the circuit that the RS232 communication is isolated between single-chip microcomputer and the PC.
Background technology
For realizing the intercommunication mutually between single-chip microcomputer and the PC, between the serial ports female of the connector of single-chip microcomputer and PC, often can use RS232 communication interface circuit.RS232 communication interface circuit commonly used substantially all is to adopt 232 interface chips, is that the MAX232 chip is 232 the most frequently used interface chips at present as model.Though adopt 232 interface chips can satisfy functional requirement, cost is very high, the cost of 232 the most cheap interface chips is also more than several units; If consider the needs that communication is isolated, carry out the photoelectricity isolation processing respectively to holding wire in addition, make connector part and serial ports female partly realize electrical isolation, then cost can be higher, also needs independent power supply support on the circuit, and circuit is complicated more.
The content of utility model
Adopt the deficiency of 232 interface chips, applicant to carry out improving research at prior art, a kind of RS232 communication buffer circuit is provided, its circuit is simple, and is with low cost, adopts high speed photo coupling to isolate, and transmission speed is fast, and need not outside power supply separately.
The technical solution of the utility model is as follows:
A kind of RS232 communication buffer circuit is connected between connector and the serial ports female, comprises that data send signal isolation circuit and data reception signal buffer circuit;
Described data send signal isolation circuit and comprise first photoelectrical coupler, first resistance, second resistance, first electric capacity and first diode, be connected to the negative input of first photoelectrical coupler through first resistance from the signal of the data-signal transmitting terminal of connector, the electrode input end of first photoelectrical coupler connects power supply, the collector output of first photoelectrical coupler connects the receiving terminal of serial ports female, the emitter output of first photoelectrical coupler connects the ground of PC, the base stage output of first photoelectrical coupler connects the negative pole of first diode, the positive pole of first diode connects the Enable Pin of serial ports female, be connected with first electric capacity between the collector output of first photoelectrical coupler and the emitter output, be connected with second resistance between the collector output of first photoelectrical coupler and the base stage output;
Described data reception signal buffer circuit comprises second photoelectrical coupler, the 3rd resistance, the 4th resistance and second electric capacity, be connected to the electrode input end of second photoelectrical coupler through the 4th resistance from the signal of the transmitting terminal of serial ports female, the negative input of second photoelectrical coupler connects the ground of PC, the collector output of second photoelectrical coupler is connected power supply with the base stage output, the emitter output of second photoelectrical coupler respectively with the data-signal receiving terminal and second electric capacity of connector, one end of the 3rd resistance connects, second electric capacity, the other end of the 3rd resistance connects the ground of single-chip microcomputer.
Useful technique effect of the present utility model is:
The utility model adopts high-speed photoelectric coupler to do isolation, and transmission speed is fast; Support the Transistor-Transistor Logic level of 5V, and also go for the 3.3V level after regulating resistance again; Need not outside power supply separately, but stealing from the computer serial ports; Circuit is simple, and pcb board can be accomplished very little, and is with low cost, and electrical characteristic is stable.
Description of drawings
Fig. 1 is a circuit diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing embodiment of the present utility model is described further.
Fig. 1 is a theory diagram of the present utility model.See Fig. 1, also comprised the connector CN1 and the serial ports female J1 that are connected with the utility model among the figure.The utility model is connected between above-mentioned connector CN1 and the serial ports female J1, and it comprises that data send signal isolation circuit and data reception signal buffer circuit.
Described data send signal isolation circuit and comprise the first photoelectrical coupler PH1, first resistance R 1, second resistance R 2, first capacitor C 1 and the first diode D1.Be connected to the negative input of the first photoelectrical coupler PH1 after through first resistance R, 1 current limliting from the signal of the data-signal transmitting terminal TXD0 of connector CN1, the electrode input end of the first photoelectrical coupler PH1 connects power supply VCC, the collector output of the first photoelectrical coupler PH1 connects the receiving terminal RX of serial ports female J1, the emitter output of the first photoelectrical coupler PH1 connects the ground GND1 of PC, the base stage output of the first photoelectrical coupler PH1 connects the negative pole of the first diode D1, the positive pole of the first diode D1 connects the Enable Pin RTS of serial ports female J1, when RTS end circuit turn-on during for high level, when the RTS end during for low level circuit by.Be connected with between the collector output of the first photoelectrical coupler PH1 and the emitter output between the collector output of first capacitor C, 1, the first photoelectrical coupler PH1 and the base stage output and be connected with second resistance R 2.
Described data reception signal buffer circuit comprises the second photoelectrical coupler PH2, the 3rd resistance R 3, the 4th resistance R 4 and second capacitor C 2, be connected to the electrode input end of the second photoelectrical coupler PH2 after through the 4th resistance R 4 current limlitings from the signal of the transmitting terminal TX of serial ports female J1, the negative input of the second photoelectrical coupler PH2 connects the ground GND1 of PC, the collector output of the second photoelectrical coupler PH2 is connected power supply VCC with the base stage output, the emitter output of the second photoelectrical coupler PH2 respectively with the data-signal receiving terminal RXD0 and second capacitor C 2 of connector CN1, one end of the 3rd resistance R 3 connects, second capacitor C 2, the other end of the 3rd resistance R 3 connects the ground GND of single-chip microcomputer.Second capacitor C 2, the 3rd resistance R 3 are respectively as drop-down electric capacity and pull down resistor.
Above-described components and parts are the commercial goods, and its marque can see table.
Main components and parts table among Fig. 2:
| Sequence number | The components and parts code name | The components and parts type | Component parameter or |
|
| 1 | | Resistance | 390 Ω or 270 |
|
| 2 | R2 | Resistance | 3.3 |
|
| 3 | | Resistance | 2KΩ | |
| 4 | R4 | Resistance | 560Ω | |
| 5 | C1 | | 1000pF | |
| 6 | C2 | Electric capacity | 1000pF | |
| 7 | D1 | Diode | IN4148 |
| Sequence number | The components and parts code name | The components and parts type | Component parameter or model |
| 8 | PH1 | Photoelectrical coupler | PC457 |
| 9 | PH2 | Photoelectrical coupler | PC457 |
When the resistance of first resistance R 1 is 390 Ω, can be operated under the Transistor-Transistor Logic level of 5V; When the resistance of first resistance R 1 is 270 Ω, can be operated under the 3.3V level.Therefore by regulating the resistance of resistance R 1, the utility model is applicable in the single-chip microcomputer environment of different voltages.
Above-described only is preferred implementation of the present utility model, and the utility model is not limited to above embodiment.Be appreciated that those skilled in the art under the prerequisite that does not break away from spirit of the present utility model and design, can make other improvement and variation.
Claims (1)
1. a RS232 communication buffer circuit is connected between connector (CN1) and the serial ports female (J1), it is characterized in that, comprises that data send signal isolation circuit and data reception signal buffer circuit;
Described data send signal isolation circuit and comprise first photoelectrical coupler (PH1), first resistance (R1), second resistance (R2), first electric capacity (C1) and first diode (D1), be connected to the negative input of first photoelectrical coupler (PH1) through first resistance (R1) from the signal of the data-signal transmitting terminal (TXD0) of connector (CN1), the electrode input end of first photoelectrical coupler (PH1) connects power supply (VCC), the collector output of first photoelectrical coupler (PH1) connects the receiving terminal (RX) of serial ports female (J1), the emitter output of first photoelectrical coupler (PH1) connects the ground (GND1) of PC, the base stage output of first photoelectrical coupler (PH1) connects the negative pole of first diode (D1), the positive pole of first diode (D1) connects the Enable Pin (RTS) of serial ports female (J1), be connected with first electric capacity (C1) between the collector output of first photoelectrical coupler (PH1) and the emitter output, be connected with second resistance (R2) between the collector output of first photoelectrical coupler (PH1) and the base stage output;
Described data reception signal buffer circuit comprises second photoelectrical coupler (PH2), the 3rd resistance (R3), the 4th resistance (R4) and second electric capacity (C2), be connected to the electrode input end of second photoelectrical coupler (PH2) through the 4th resistance (R4) from the signal of the transmitting terminal (TX) of serial ports female (J1), the negative input of second photoelectrical coupler (PH2) connects the ground (GND1) of PC, the collector output of second photoelectrical coupler (PH2) is connected power supply (VCC) with the base stage output, the emitter output of second photoelectrical coupler (PH2) respectively with the data-signal receiving terminal (RXD0) and second electric capacity (C2) of connector (CN1), one end of the 3rd resistance (R3) connects, second electric capacity (C2), the other end of the 3rd resistance (R3) connects the ground (GND) of single-chip microcomputer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202830919U CN201557104U (en) | 2009-12-16 | 2009-12-16 | RS232 communication isolation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202830919U CN201557104U (en) | 2009-12-16 | 2009-12-16 | RS232 communication isolation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201557104U true CN201557104U (en) | 2010-08-18 |
Family
ID=42616793
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009202830919U Expired - Fee Related CN201557104U (en) | 2009-12-16 | 2009-12-16 | RS232 communication isolation circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201557104U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110515875A (en) * | 2019-08-19 | 2019-11-29 | 京信通信系统（中国）有限公司 | A kind of Power supply circuit and method |
| CN117641654A (en) * | 2024-01-25 | 2024-03-01 | 深圳市鸿远微思电子有限公司 | Intelligent dimming control circuit and method |
-
2009
- 2009-12-16 CN CN2009202830919U patent/CN201557104U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110515875A (en) * | 2019-08-19 | 2019-11-29 | 京信通信系统（中国）有限公司 | A kind of Power supply circuit and method |
| CN117641654A (en) * | 2024-01-25 | 2024-03-01 | 深圳市鸿远微思电子有限公司 | Intelligent dimming control circuit and method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100818 Termination date: 20171216 |