CN201500378U - Low-frequency therapeutic instrument with double independent modes - Google Patents

Low-frequency therapeutic instrument with double independent modes Download PDF

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Publication number
CN201500378U
CN201500378U CN2009202035673U CN200920203567U CN201500378U CN 201500378 U CN201500378 U CN 201500378U CN 2009202035673 U CN2009202035673 U CN 2009202035673U CN 200920203567 U CN200920203567 U CN 200920203567U CN 201500378 U CN201500378 U CN 201500378U
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刘汉业
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Abstract

The utility model relates to the field of medical electronic equipment, in particular to a low-frequency therapeutic instrument with double independent modes, which mainly comprises a power supply circuit, a control switch circuit, an intelligent controller CPU, an LCD display and polar control drive circuits. The low-frequency therapeutic instrument with double independent modes is characterized in that the polar control drive circuits are provided with a passage A and a passage B, a back light circuit is arranged in the LCD display, the power supply circuit and the control switch circuit are respectively connected with the CPU, the polar control drive circuit of the passage A, the polar control drive circuit of the passage B and the back light circuit, and the CPU is respectively connected with the LCD display, the back light circuit and the polar control drive circuits of the passage A and the passage B. The polar control drive circuit of the passage A and the polar control drive circuit of the passage B can respectively carry out independent output and have adjustable strength. The utility model has the advantages that the LCD liquid crystal display with back light can control the passage A/B to carry out output simultaneously or respectively, the strength is adjustable, a plurality of affected parts can be treated simultaneously, and the use is especially convenient.

Description

The low-frequency therapy apparatus of double-independent mode
Technical field
This utility model relates to the medical treatment electronic equipment field, relates in particular to a kind of low-frequency therapy apparatus of double-independent mode.
Background technology
Mostly the low-frequency therapy apparatus of Xiao Shouing is to adopt low-frequency oscillation in the market, the adjust blood pressure frequency multiplication, output intensity control or employing low-frequency oscillation, signal amplifies, technology such as transformator boosts produce adjustable HVDC electric pulse, the pulse bioelectric current of its generation produces human body to stimulate, utilize the Chinese medicine acupuncture acupuncture point, to cervical vertebra syndrome, muscle contraction, rheumatalgia etc. have certain curative effect and pain are alleviated to some extent, also can waking up and acupuncture point meridian mediation or human body played beauty treatment and health-care effect to treatment patient human body pore, electricity irritation can be dredged acupuncture point meridian and be waken up and suspend the pore cell, promote the recovery of neurocyte, but because the muscle of being arranged behind the peripheral nerve injury is in paralyzed state, behind athletic injury, the consciousness of its muscle out of hand, utilize this therapeutic instrument to carry out electricity irritation and dredging the meridian the tangible curative effect of raising is arranged, but generally all be single channel output on the market, can not treat the affected part, many places simultaneously, its application is restricted.
Summary of the invention
The purpose of this utility model provides a kind of low-frequency therapy apparatus of double-independent mode, can realize exporting simultaneously two different frequency mode pulse and adjustable respectively.
For solving the problems of the technologies described above, the technical solution of the utility model is:
The low-frequency therapy apparatus of double-independent mode, mainly comprise power circuit, the gauge tap circuit, intelligent controller CPU, LCD display and Polarity Control drive circuit, it is characterized in that, the Polarity Control drive circuit is A, the B dual pathways, be provided with backlight circuit in the LCD display, power supply, gauge tap respectively with intelligent controller CPU and A channel Polarity Control drive circuit, B passage Polarity Control drive circuit, backlight circuit connects, intelligent controller CPU respectively with LCD display, backlight circuit, A channel Polarity Control drive circuit, B passage Polarity Control drive circuit connects.
The concrete structure of described power circuit, gauge tap circuit, intelligent controller CPU, LCD display, A channel Polarity Control drive circuit, B passage Polarity Control drive circuit, backlight circuit is described below:
The circuit structure of power circuit is: D.C. regulated power supply interface VDD one end links to each other with the Vin port of mu balanced circuit U1, the GND port of one end and mu balanced circuit U1, capacitor C 4 negative poles, capacitor C 5, capacitor C 1, C2, cpu port 10 altogether, the other end of capacitor C 1, C2 is connected to the two ends of crystal oscillator X1, capacitor C 1 is connected with cpu port 12, capacitor C 2 is connected with cpu port 11, and alternating current power supply VCC directly is connected with Vout port, capacitor C 4 positive poles, capacitor C 5, the cpu port 9 of mu balanced circuit U1;
The circuit structure of gauge tap circuit is: K switch 7, K switch 8 are connected with VCC respectively, K switch 8 other ends are connected with cpu port 13, K switch 7 other ends are connected with capacitor C 3, capacitor C 3 other ends respectively with K switch 2, K switch 1, K switch 3 common grounds, K switch 2 other ends are connected with K switch 4, K switch 5, cpu port 30, K switch 1 other end is connected with K switch 4 other ends, cpu port 31, and K switch 3 other ends are connected with cpu port 32 with the K5 other end;
The circuit structure of intelligent controller CPU and LCD display is: cpu port 17, port one 8, port one 9, the corresponding respectively output PB0 of port 20, PB1, PB2, the PB3 pulse signal, cpu port 28 output pwm pulse signals, cpu port 29 output PC4 pulse signals, cpu port 34, port 35, port 36, the corresponding respectively output PD1 of port 37, PD2, PD3, the PD4 pulse signal, cpu port GND ground connection, the port one of CPU links to each other with the COM1 of LCD, the port 2 of CPU links to each other with the COM2 of LCD, the port 3 of CPU links to each other with the COM3 of LCD, the port 4 of CPU links to each other with the COM4 of LCD, the port SEG6 of CPU links to each other with the SEG1 of LCD, the port SEG7 of CPU links to each other with the SEG2 of LCD, the port SEG8 of CPU links to each other with the SEG3 of LCD, the port SEG9 of CPU links to each other with the SEG4 of LCD, the port SEG10 of CPU links to each other with the SEG5 of LCD, the port SEG11 of CPU links to each other with the SEG6 of LCD, the port SEG12 of CPU links to each other with the SEG7 of LCD, the port SEG13 of CPU links to each other with the SEG8 of LCD, the port SEG14 of CPU links to each other with the SEG9 of LCD, the port SEG15 of CPU links to each other with the SEG10 of LCD, the port SEG16 of CPU links to each other with the SEG11 of LCD, the port SEG17 of CPU links to each other with the SEG12 of LCD, the port SEG18 of CPU links to each other with the SEG13 of LCD, and the port SEG19 of CPU links to each other with the SEG14 of LCD;
The circuit structure of A channel Polarity Control drive circuit is: the PB0 pulse signal links to each other with audion Q3 base stage by resistance R 7, audion Q3 emitter stage links to each other with pwm pulse signal, audion Q3 colelctor electrode respectively with resistance R 8, capacitor C 8, resistance R 9 links to each other, resistance R 8 other end ground connection, capacitor C 8, the other end of resistance R 9 links to each other with audion Q4 base stage, audion Q4 colelctor electrode respectively with inductance L 2, diode D1 positive pole is connected, inductance L 2 other ends are connected with power vd D, audion Q4 emitter stage and capacitor C 9, resistance R 10 is connected commonly, capacitor C 9, resistance R 10 other ends and diode D1 negative pole, resistance R 22 is connected, the other end of resistance R 22 and resistance R 12, audion Q7 emitter stage, audion Q5 emitter stage, resistance R 15 is connected, Q7 base stage and resistance R 12, resistance R 16 is connected, Q5 base stage and resistance R 15, resistance R 14 is connected, audion Q7 colelctor electrode, audion Q6 emitter stage, socket CN1 pin one is connected, audion Q5 colelctor electrode, audion Q8 emitter stage, socket CN1 pin two is connected, audion Q6 base stage is by resistance R 13 and audion Q11 colelctor electrode, resistance R 14 other ends are connected, resistance R 16 other ends, resistance R 17 other ends are connected with audion Q12 colelctor electrode, audion Q12 base stage is connected with the PB2 pulse signal that CPU sends by resistance R 24, audion Q11 base stage is connected with the PB1 pulse signal that CPU sends by resistance R 23, the PB3 pulse signal that CPU sends is imported on the link node of audion Q6 colelctor electrode and audion Q8 colelctor electrode, this node also is connected with resistance R 25 and Zener diode ZD1 negative pole, resistance R 25 and Zener diode ZD1 positive pole, audion Q11 emitter stage, audion Q12 emitter stage links to each other and ground connection;
The circuit structure of B passage Polarity Control drive circuit is: the PD1 pulse signal links to each other with audion Q9 base stage by resistance R 11, audion Q9 emitter stage links to each other with pwm pulse signal, audion Q9 colelctor electrode respectively with resistance R 18, capacitor C 10, resistance R 20 links to each other, resistance R 20 other end ground connection, capacitor C 10, the other end of resistance R 18 links to each other with audion Q10 base stage, audion Q10 colelctor electrode respectively with inductance L 1, diode D2 positive pole is connected, inductance L 1 other end is connected with power vd D, audion Q10 emitter stage and capacitor C 11, resistance R 19 is connected commonly, capacitor C 11, resistance R 19 other ends and diode D2 negative pole, resistance R 21 is connected, the other end of resistance R 21 and resistance R 28, audion Q17 emitter stage, audion Q15 emitter stage, resistance R 27 is connected, audion Q17 base stage and resistance R 28, resistance R 33 is connected, Q15 base stage and resistance R 27, resistance R 29 is connected, audion Q17 colelctor electrode, audion Q16 emitter stage, socket CN2 pin one is connected, audion Q15 colelctor electrode, audion Q18 emitter stage, socket CN2 pin two is connected, audion Q16 base stage is by resistance R 30 and audion Q13 colelctor electrode, resistance R 29 other ends are connected, resistance R 33 other ends, resistance R 34 other ends are connected with audion Q14 colelctor electrode, audion Q14 base stage is connected with the PD3 pulse signal that CPU sends by resistance R 32, audion Q13 base stage is connected with the PD2 pulse signal that CPU sends by resistance R 31, the PD4 pulse signal that CPU sends is imported on the link node of audion Q16 colelctor electrode and audion Q18 colelctor electrode, this node also is connected with resistance R 26 and Zener diode ZD2 negative pole, resistance R 26 and Zener diode ZD2 positive pole, audion Q13 emitter stage, audion Q14 emitter stage links to each other and ground connection;
The circuit structure of backlight circuit is: backlight LAMP is connected with transformator T1 secondary coil one end, coil other end ground connection, transformator T1 primary coil one end is connected with electrochemical capacitor C6 positive pole, the other end is connected with audion Q2 emitter stage, electrochemical capacitor C6 negative pole and resistance R 3, resistance R 4 is connected, resistance R 4 other ends link to each other with audion Q2 base stage respectively with capacitor C 7, capacitor C 7 other ends and resistance R 3, audion Q2 colelctor electrode, audion Q1 colelctor electrode is connected, audion Q1 emitter stage links to each other with resistance R 5 and meets VDD jointly, and audion Q1 base stage links to each other with resistance R 5 other ends and is connected with the Pc4 pulse signal that CPU sends by resistance R 6.
A channel Polarity Control drive circuit and B passage Polarity Control drive circuit can distinguish independent output and intensity adjustable.
Compared with prior art, the beneficial effects of the utility model are: the LCD liquid crystal display of giant-screen backlight clearly, the different output mode that can adjust at any time, running time, pulse strength, and A/B passage two pass output, operating function shows, can have at fingertips to treatment ruuning situation, the output that the A/B passage can use simultaneously or difference is different is adjustable, simultaneously the affected part, many places is treated, and is in use especially convenient.
Description of drawings
Fig. 1 is this utility model embodiment circuit theory diagrams.
1-power circuit 2-gauge tap circuit 3-CPU 4-LCD display 5-backlight circuit 6-A passage Polarity Control drive circuit 7-B passage Polarity Control drive circuit among the figure
The specific embodiment
Below in conjunction with accompanying drawing the specific embodiment of the present utility model is described further:
See Fig. 1, the low-frequency therapy apparatus of double-independent mode, mainly comprise power circuit 1, gauge tap circuit 2, CPU3, LCD display 4 and Polarity Control drive circuit, the Polarity Control drive circuit is A, the B dual pathways, be provided with backlight circuit 5 in the LCD display 4, power circuit 1, gauge tap circuit 2 are connected with A channel Polarity Control drive circuit 6, B passage Polarity Control drive circuit 7, backlight circuit 5 with CPU3 respectively, and CPU3 is connected with LCD display 4, backlight circuit 5, A channel Polarity Control drive circuit 6, B passage Polarity Control drive circuit 7 respectively.
In the power circuit 1, U1, C4, C5 forms linear voltage-stabilizing circuit, D.C. regulated power supply interface VDD one end links to each other with the Vin port of mu balanced circuit U1, the GND port of one end and mu balanced circuit U1, capacitor C 4 negative electrodes, capacitor C 5, capacitor C 1, C2, cpu port 10 altogether, the other end of capacitor C 1, C2 is connected to the two ends of crystal oscillator X1, capacitor C 1 is connected with cpu port 12, capacitor C 2 is connected with cpu port 11, and alternating current power supply VCC directly is connected with Vout port, capacitor C 4 anodes, capacitor C 5, the cpu port 9 of mu balanced circuit U1;
In the gauge tap circuit 2, K switch 7, K switch 8 is connected with VCC respectively, K switch 8 other ends are connected with cpu port 13, K switch 7 other ends are connected with capacitor C 3, capacitor C 3 other ends respectively with K switch 2, K switch 1, K switch 3 common grounds, K switch 2 other ends and K switch 4, K switch 5, cpu port 30 is connected, K switch 1 other end and K switch 4 other ends, cpu port 31 is connected, and K switch 3 other ends are connected with cpu port 32 with the K5 other end, and K1 is a main frame ON/OFF key, K2 is the brain connection pattern key, K3 is the synthesized modeling key, and K4 is for weakening key, and K5 is for strengthening key, K6 is a heart mode key, K7 is an A/B independent regulation output intensity key, and K8 is the treatment time options button, and the CPU starting-up signal is by the ON/OFF on-off control, when clicking the ON/OFF switch, X1, C1, C2, constitute the vibration starting-up signal and enter the start of CPU31 foot formation low level from the CPU31 foot, main frame drives into into running status;
In intelligent controller CPU3 and the LCD display 4, cpu port 17, port one 8, port one 9, the corresponding respectively output PB0 of port 20, PB1, PB2, the PB3 pulse signal, cpu port 28 output pwm pulse signals, cpu port 29 output PC4 pulse signals, cpu port 34, port 35, port 36, the corresponding respectively output PD1 of port 37, PD2, PD3, the PD4 pulse signal, cpu port GND ground connection, the port one of CPU links to each other with the COM1 of LCD, the port 2 of CPU links to each other with the COM2 of LCD, the port 3 of CPU links to each other with the COM3 of LCD, the port 4 of CPU links to each other with the COM4 of LCD, the port SEG6 of CPU links to each other with the SEG1 of LCD, the port SEG7 of CPU links to each other with the SEG2 of LCD, the port SEG8 of CPU links to each other with the SEG3 of LCD, the port SEG9 of CPU links to each other with the SEG4 of LCD, the port SEG10 of CPU links to each other with the SEG5 of LCD, the port SEG11 of CPU links to each other with the SEG6 of LCD, the port SEG12 of CPU links to each other with the SEG7 of LCD, the port SEG13 of CPU links to each other with the SEG8 of LCD, the port SEG14 of CPU links to each other with the SEG9 of LCD, the port SEG15 of CPU links to each other with the SEG10 of LCD, the port SEG16 of CPU links to each other with the SEG11 of LCD, the port SEG17 of CPU links to each other with the SEG12 of LCD, the port SEG18 of CPU links to each other with the SEG13 of LCD, and the port SEG19 of CPU links to each other with the SEG14 of LCD;
The PB0 pulse signal links to each other with audion Q3 base stage by resistance R 7 in the A channel Polarity Control drive circuit, audion Q3 emitter stage links to each other with pwm pulse signal, audion Q3 colelctor electrode respectively with resistance R 8, capacitor C 8, resistance R 9 links to each other, resistance R 8 other end ground connection, capacitor C 8, the other end of resistance R 9 links to each other with audion Q4 base stage, audion Q4 colelctor electrode respectively with inductance L 2, diode D1 positive pole is connected, inductance L 2 other ends are connected with power vd D, audion Q4 emitter stage and capacitor C 9, resistance R 10 is connected commonly, capacitor C 9, resistance R 10 other ends and diode D1 negative pole, resistance R 22 is connected, the other end of resistance R 22 and resistance R 12, audion Q7 emitter stage, audion Q5 emitter stage, resistance R 15 is connected, Q7 base stage and resistance R 12, resistance R 16 is connected, Q5 base stage and resistance R 15, resistance R 14 is connected, audion Q7 colelctor electrode, audion Q6 emitter stage, socket CN1 pin one is connected, audion Q5 colelctor electrode, audion Q8 emitter stage, socket CN1 pin two is connected, audion Q6 base stage is by resistance R 13 and audion Q11 colelctor electrode, resistance R 14 other ends are connected, resistance R 16 other ends, resistance R 17 other ends are connected with audion Q12 colelctor electrode, audion Q12 base stage is connected with the PB2 pulse signal that CPU sends by resistance R 24, audion Q11 base stage is connected with the PB1 pulse signal that CPU sends by resistance R 23, the PB3 pulse signal that CPU sends is imported on the link node of audion Q6 colelctor electrode and audion Q8 colelctor electrode, this node also is connected with resistance R 25 and Zener diode ZD1 negative pole, resistance R 25 and Zener diode ZD1 positive pole, audion Q11 emitter stage, audion Q12 emitter stage links to each other and ground connection;
The PD1 pulse signal links to each other with audion Q9 base stage by resistance R 11 in the B passage Polarity Control drive circuit, audion Q9 emitter stage links to each other with pwm pulse signal, audion Q9 colelctor electrode respectively with resistance R 18, capacitor C 10, resistance R 20 links to each other, resistance R 20 other end ground connection, capacitor C 10, the other end of resistance R 18 links to each other with audion Q10 base stage, audion Q10 colelctor electrode respectively with inductance L 1, diode D2 positive pole is connected, inductance L 1 other end is connected with power vd D, audion Q10 emitter stage and capacitor C 11, resistance R 19 is connected commonly, capacitor C 11, resistance R 19 other ends and diode D2 negative pole, resistance R 21 is connected, the other end of resistance R 21 and resistance R 28, audion Q17 emitter stage, audion Q15 emitter stage, resistance R 27 is connected, audion Q17 base stage and resistance R 28, resistance R 33 is connected, Q15 base stage and resistance R 27, resistance R 29 is connected, audion Q17 colelctor electrode, audion Q16 emitter stage, socket CN2 pin one is connected, audion Q15 colelctor electrode, audion Q18 emitter stage, socket CN2 pin two is connected, audion Q16 base stage is by resistance R 30 and audion Q13 colelctor electrode, resistance R 29 other ends are connected, resistance R 33 other ends, resistance R 34 other ends are connected with audion Q14 colelctor electrode, audion Q12 base stage is connected with the PD3 pulse signal that CPU sends by resistance R 32, audion Q13 base stage is connected with the PD2 pulse signal that CPU sends by resistance R 31, the PD4 pulse signal that CPU sends is imported on the link node of audion Q16 colelctor electrode and audion Q18 colelctor electrode, this node also is connected with resistance R 26 and Zener diode ZD2 negative pole, resistance R 26 and Zener diode ZD2 positive pole, audion Q13 emitter stage, audion Q14 emitter stage links to each other and ground connection, socket CN1, CN2 is connected to the relevant meridian point of human body respectively with through connecting lead and electrode slice;
In the backlight circuit, by Q2, C7, C6, R3, it is backlight that R4 formation oscillation circuit is lighted LCD, backlight LAMP is connected with transformator T1 secondary coil one end, coil other end ground connection, transformator T1 primary coil one end is connected with electrochemical capacitor C6 positive pole, the other end is connected with audion Q2 emitter stage, electrochemical capacitor C6 negative pole and resistance R 3, resistance R 4 is connected, resistance R 4 other ends link to each other with audion Q2 base stage respectively with capacitor C 7, capacitor C 7 other ends and resistance R 3, audion Q2 colelctor electrode, audion Q1 colelctor electrode is connected, and audion Q1 emitter stage links to each other with resistance R 5 and meets VDD jointly, and audion Q1 base stage links to each other with resistance R 5 other ends and is connected with the Pc4 pulse signal that CPU sends by resistance R 6.
A channel Polarity Control drive circuit and B passage Polarity Control drive circuit can distinguish independent output and intensity adjustable, transistor A channel Q3, Q4 and B passage Q9, Q10 constitutes output driving circuit, the Q4 of A channel, L2, D1, R10, C9, R9, C8, R8, the Q10 on B road, L1, D2, C11, R19, R18, C10, the R20 composition boosts and the store electrical energy circuit.When CPU reception arrival K2 or K6 request signal, CPU internal storage written program is exported two groups of different pulse signals from PB0 and PD1 respectively.
This utility model is treated human body sufferer district by pair of electrodes paster or handle, the panel of therapeutic instrument is provided with and opening that computer chip (CPU) links to each other, shutdown, operation, linear potentiometer RP intensity increases (UP), intensity reduces (DOWN), model selection (Mode), list/dual pathways conversion (A/B), through internal storage (CPU) written program software, can select single or two with the patient, the A/B passage is exported treatment simultaneously and is suffered from the district, therapeutic instrument not only has the effect of good treatment to commonly encountered diseases, to waking the mediation of pore and acupuncture point meridian up the excellent curative effect is arranged more.

Claims (3)

1. the low-frequency therapy apparatus of double-independent mode, mainly comprise power circuit, the gauge tap circuit, intelligent controller CPU, LCD display and Polarity Control drive circuit, it is characterized in that, the Polarity Control drive circuit is A, the B dual pathways, be provided with backlight circuit in the LCD display, power supply, gauge tap respectively with intelligent controller CPU and A channel Polarity Control drive circuit, B passage Polarity Control drive circuit, backlight circuit connects, intelligent controller CPU respectively with LCD display, backlight circuit, A channel Polarity Control drive circuit, B passage Polarity Control drive circuit connects.
2. the low-frequency therapy apparatus of double-independent mode according to claim 1, it is characterized in that the concrete structure of described power circuit, gauge tap circuit, intelligent controller CPU, LCD display, A channel Polarity Control drive circuit, B passage Polarity Control drive circuit, backlight circuit is described below:
The circuit structure of power circuit is: D.C. regulated power supply interface VDD one end links to each other with the Vin port of mu balanced circuit U1, the GND port of one end and mu balanced circuit U1, capacitor C 4 negative poles, capacitor C 5, capacitor C 1, C2, cpu port 10 altogether, the other end of capacitor C 1, C2 is connected to the two ends of crystal oscillator X1, capacitor C 1 is connected with cpu port 12, capacitor C 2 is connected with cpu port 11, and alternating current power supply VCC directly is connected with Vout port, capacitor C 4 positive poles, capacitor C 5, the cpu port 9 of mu balanced circuit U1;
The circuit structure of gauge tap circuit is: K switch 7, K switch 8 are connected with VCC respectively, K switch 8 other ends are connected with cpu port 13, K switch 7 other ends are connected with capacitor C 3, capacitor C 3 other ends respectively with K switch 2, K switch 1, K switch 3 common grounds, K switch 2 other ends are connected with K switch 4, K switch 5, cpu port 30, K switch 1 other end is connected with K switch 4 other ends, cpu port 31, and K switch 3 other ends are connected with cpu port 32 with the K5 other end;
The circuit structure of intelligent controller CPU and LCD display is: cpu port 17, port one 8, port one 9, the corresponding respectively output PB0 of port 20, PB1, PB2, the PB3 pulse signal, cpu port 28 output pwm pulse signals, cpu port 29 output PC4 pulse signals, cpu port 34, port 35, port 36, the corresponding respectively output PD1 of port 37, PD2, PD3, the PD4 pulse signal, cpu port GND ground connection, the port one of CPU links to each other with the COM1 of LCD, the port 2 of CPU links to each other with the COM2 of LCD, the port 3 of CPU links to each other with the COM3 of LCD, the port 4 of CPU links to each other with the COM4 of LCD, the port SEG6 of CPU links to each other with the SEG1 of LCD, the port SEG7 of CPU links to each other with the SEG2 of LCD, the port SEG8 of CPU links to each other with the SEG3 of LCD, the port SEG9 of CPU links to each other with the SEG4 of LCD, the port SEG10 of CPU links to each other with the SEG5 of LCD, the port SEG11 of CPU links to each other with the SEG6 of LCD, the port SEG12 of CPU links to each other with the SEG7 of LCD, the port SEG13 of CPU links to each other with the SEG8 of LCD, the port SEG14 of CPU links to each other with the SEG9 of LCD, the port SEG15 of CPU links to each other with the SEG10 of LCD, the port SEG16 of CPU links to each other with the SEG11 of LCD, the port SEG17 of CPU links to each other with the SEG12 of LCD, the port SEG18 of CPU links to each other with the SEG13 of LCD, and the port SEG19 of CPU links to each other with the SEG14 of LCD;
The circuit structure of A channel Polarity Control drive circuit is: the PB0 pulse signal links to each other with audion Q3 base stage by resistance R 7, audion Q3 emitter stage links to each other with pwm pulse signal, audion Q3 colelctor electrode respectively with resistance R 8, capacitor C 8, resistance R 9 links to each other, resistance R 8 other end ground connection, capacitor C 8, the other end of resistance R 9 links to each other with audion Q4 base stage, audion Q4 colelctor electrode respectively with inductance L 2, diode D1 positive pole is connected, inductance L 2 other ends are connected with power vd D, audion Q4 emitter stage and capacitor C 9, resistance R 10 is connected commonly, capacitor C 9, resistance R 10 other ends and diode D1 negative pole, resistance R 22 is connected, the other end of resistance R 22 and resistance R 12, audion Q7 emitter stage, audion Q5 emitter stage, resistance R 15 is connected, Q7 base stage and resistance R 12, resistance R 16 is connected, Q5 base stage and resistance R 15, resistance R 14 is connected, audion Q7 colelctor electrode, audion Q6 emitter stage, socket CN1 pin one is connected, audion Q5 colelctor electrode, audion Q8 emitter stage, socket CN1 pin two is connected, audion Q6 base stage is by resistance R 13 and audion Q11 colelctor electrode, resistance R 14 other ends are connected, resistance R 16 other ends, resistance R 17 other ends are connected with audion Q12 colelctor electrode, audion Q12 base stage is connected with the PB2 pulse signal that CPU sends by resistance R 24, audion Q11 base stage is connected with the PB1 pulse signal that CPU sends by resistance R 23, the PB3 pulse signal that CPU sends is imported on the link node of audion Q6 colelctor electrode and audion Q8 colelctor electrode, this node also is connected with resistance R 25 and Zener diode ZD1 negative pole, resistance R 25 and Zener diode ZD1 positive pole, audion Q11 emitter stage, audion Q12 emitter stage links to each other and ground connection;
The circuit structure of B passage Polarity Control drive circuit is: the PD1 pulse signal links to each other with audion Q9 base stage by resistance R 11, audion Q9 emitter stage links to each other with pwm pulse signal, audion Q9 colelctor electrode respectively with resistance R 18, capacitor C 10, resistance R 20 links to each other, resistance R 20 other end ground connection, capacitor C 10, the other end of resistance R 18 links to each other with audion Q10 base stage, audion Q10 colelctor electrode respectively with inductance L 1, diode D2 positive pole is connected, inductance L 1 other end is connected with power vd D, audion Q10 emitter stage and capacitor C 11, resistance R 19 is connected commonly, capacitor C 11, resistance R 19 other ends and diode D2 negative pole, resistance R 21 is connected, the other end of resistance R 21 and resistance R 28, audion Q17 emitter stage, audion Q15 emitter stage, resistance R 27 is connected, audion Q17 base stage and resistance R 28, resistance R 33 is connected, Q15 base stage and resistance R 27, resistance R 29 is connected, audion Q17 colelctor electrode, audion Q16 emitter stage, socket CN2 pin one is connected, audion Q15 colelctor electrode, audion Q18 emitter stage, socket CN2 pin two is connected, audion Q16 base stage is by resistance R 30 and audion Q13 colelctor electrode, resistance R 29 other ends are connected, resistance R 33 other ends, resistance R 34 other ends are connected with audion Q14 colelctor electrode, audion Q14 base stage is connected with the PD3 pulse signal that CPU sends by resistance R 32, audion Q13 base stage is connected with the PD2 pulse signal that CPU sends by resistance R 31, the PD4 pulse signal that CPU sends is imported on the link node of audion Q16 colelctor electrode and audion Q18 colelctor electrode, this node also is connected with resistance R 26 and Zener diode ZD2 negative pole, resistance R 26 and Zener diode ZD2 positive pole, audion Q13 emitter stage, audion Q14 emitter stage links to each other and ground connection;
The circuit structure of backlight circuit is: backlight LAMP is connected with transformator T1 secondary coil one end, coil other end ground connection, transformator T1 primary coil one end is connected with electrochemical capacitor C6 positive pole, the other end is connected with audion Q2 emitter stage, electrochemical capacitor C6 negative pole and resistance R 3, resistance R 4 is connected, resistance R 4 other ends link to each other with audion Q2 base stage respectively with capacitor C 7, capacitor C 7 other ends and resistance R 3, audion Q2 colelctor electrode, audion Q1 colelctor electrode is connected, audion Q1 emitter stage links to each other with resistance R 5 and meets VDD jointly, and audion Q1 base stage links to each other with resistance R 5 other ends and is connected with the Pc4 pulse signal that CPU sends by resistance R 6.
3. the low-frequency therapy apparatus of double-independent mode according to claim 1 and 2 is characterized in that, A channel Polarity Control drive circuit and B passage Polarity Control drive circuit can distinguish independent output and intensity adjustable.
CN2009202035673U 2009-09-24 2009-09-24 Low-frequency therapeutic instrument with double independent modes Expired - Fee Related CN201500378U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105852849A (en) * 2016-04-27 2016-08-17 深圳市佳域顺芯科技有限公司 Electrocardiograph detection and physiotherapy device and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105852849A (en) * 2016-04-27 2016-08-17 深圳市佳域顺芯科技有限公司 Electrocardiograph detection and physiotherapy device and method

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