CN201397122Y - Linear displacement difference transformer signal modulate circuit - Google Patents

Abstract

The utility model relates to a linear displacement difference transformer signal modulate circuit, which is applicable to the half-axle differential annular-ring oil quantity control sliding sleeve position sensor and a differential transformer position sensor. A sine excitation signal generating unit is electrically connected with a difference amplifier. A sine excitation signal is inputted to asensor, and a detection signal which is outputted by the sensor is introduced into an inductive impedance voltage-dividing signal in-phase ratio circuit (102); a voltage-dividing signal which is leadout from R19 and R20 is introduced into a resistance voltage-dividing signal in-phase ratio circuit (101). The difference value between the inductive impendence voltage-dividing signal and the resistance voltage-dividing signal forms a proportional ratio with a sensor mechanical displacement quantity, so that the mechanical displacement quantity of the sensor is indirectly detected by amplifying and detecting the difference value between the inductive impedance voltage-dividing signal and the resistance voltage-dividing signal, and the structure of the prior difference transformer signal modulate structure is simplified, and the cost is reduced.

Description

Linear displacement differential transformers signal conditioning circuit

Technical field

The utility model relates to a kind of linear displacement differential transformers signal conditioning circuit, be suitable for the differential annulus fuel-flow control of distribute type high-pressure diesel injection pump half-bridge sliding sleeve position transducer interface circuit in the automotive engine control field, also be fit to other application scenario semibridge system differential transformer position transducer.

Background technology

The linear differential transformer is a pickoff, the magnetic core mechanical displacement of input can be converted to one group and the proportional ac voltage signal output of magnetic core displacement.This sensor is by elementary winding, and two secondary winding of series connection and the magnetic core that can slide in winding coil constitute.Primary coil is by the sine wave signal source forcing, movable magnetic core move the coupling magnetic flux that can change between the primary coil, thereby change the amplitude of the induction electromotive force that the secondary coil two ends produce.Can examine the mechanical displacement of magnetic core indirectly by the difference that detects two ac voltage signals.Present known linear displacement differential transformers signal conditioning circuit mainly is made up of oscillator, amplifier, phase sensitive detection and low-pass filter four parts, adopts the alternating current bridge energisation mode to drive.But the amplitude of sinusoidal excitation signal can produce drift with the variation of working temperature, causes the output gain mistake.Existing linear differential transformer modulate circuit changes the variation that the scale-up factor that changes (induction electromotive force difference/induction electromotive force with) is eliminated the driving source amplitude by detecting not with the sinusoidal signal amplitude, and the shortcoming of this solution is complexity and the cost that has increased testing circuit.

Summary of the invention

In order to overcome existing linear displacement differential transformers signal conditioning circuit complex structure and the higher deficiency of cost, the utility model patent provides a kind of linear displacement differential transformers signal conditioning circuit, the sine wave exciting signal amplitude forms the shift register switching value by totalizer in the addition of dividing potential drop ratio, guarantee the stability of sinusoidal excitation signal amplitude, simultaneously, the direct current signal of MCU receiving conditioning circuit output carries out the A/D conversion, the sine-wave generator clock signal only needs to introduce from same MCU, abbreviation has differential transformers signal conditioning circuit structure now, reduces the cost of differential transformers signal conditioning circuit.

The technical scheme that its technical matters that solves the utility model adopts is:

Sinusoidal excitation signal is introduced the linear displacement differential transformers primary coil that is electrically connected with it, and linear displacement differential transformers secondary coil is electrically connected with the differential amplifier unit.

The sinusoidal excitation signal generation unit comprises: 8 bit shift register most significant digit output terminal logics are electrically connected with the lowest order input end through the logic reverse circuit, constitute 8 twisted ring counters, are used to produce the logic voltage serial data identical with the sinusoidal signal waveform symmetry; Connect with the parallel circuit of forming by resistance and electric capacity, signal ground after the resistance other end parallel connection that each carry-out bit of shift register is electrically connected respectively, constitute analog adder, be used for each output voltage of shift register is added and also filtering; From the clock signal (002) of MCU introducing shift register, be used to determine that analog adder output level (001) constitutes the frequency of sinusoidal excitation signal (100).

The differential amplifier unit comprises: electric resistance partial pressure signal in-phase proportion circuit (101) is used for receiving and amplifying the electric resistance partial pressure signal; Emotional resistance voltage division signal in-phase proportion circuit (102) is used for receiving and amplifying the emotional resistance voltage division signal; Differential ratio circuit (103) is used to amplify the emotional resistance voltage division signal of introducing normal phase input end and the difference signal of introducing the electric resistance partial pressure signal of inverting input.

Differential ratio circuit inverting input (005), Temperature Feedback resistance, diode cathode, diode cathode, the temperature compensation backfeed loop (104) that final stage in-phase proportion circuit load voltage output end (004) is electrically connected in turn is used to reduce the influence of temperature variation to final stage in-phase proportion load voltage signal.

Sinusoidal excitation signal (100), electric resistance partial pressure signal and/or emotional resistance voltage division signal and difference signal are voltage signal.

Adopt diode anti-phase in the temperature compensation backfeed loop (104) by the forward conduction of characteristic blocking-up electric resistance partial pressure signal in-phase proportion circuit (101) to output stage.

Sinusoidal excitation signal is Vo ', and the electric resistance partial pressure signal is Vo '/2.

The resistance proportionate relationship that each carry-out bit of shift register is electrically connected respectively by sin (θ+180 °/n)/sin θ, n is the shift register figure place, θ is 360 °/n.

The beneficial effects of the utility model are, have simplified existing linear displacement differential amplifier circuit structure, have reduced existing linear displacement differential amplifier circuit cost.

Description of drawings

Fig. 1 is the utility model linear displacement differential transformers signal conditioning circuit sinusoidal excitation signal generator schematic diagram.

001 is the analog adder output level,

002 is the clock signal of introducing shift register from MCU.

Fig. 2 is the sinusoidal excitation signal output waveform figure that the utility model adopts.

Fig. 3 is the utility model linear displacement differential transformers signal conditioning circuit schematic diagram.

003 is the differential ratio circuit output signal after the dividing potential drop,

004 is final stage in-phase proportion circuit load voltage output end,

005 is differential ratio circuit inverting input,

100 sinusoidal excitation signals,

101 is electric resistance partial pressure signal in-phase proportion circuit,

102 is emotional resistance voltage division signal in-phase proportion circuit,

103 is differential ratio circuit,

104 are the temperature compensation backfeed loop,

105 is final stage signal in-phase proportion circuit.

Embodiment

MC14015 is the integrated chip of two group of 4 bit shift register formation among Fig. 1, and MC14070 is the integrated chip that four groups of XOR gate constitute, and has only used wherein two groups of NOR gate circuits in this specific embodiment.The Q3a pin of MC14015 is electrically connected with the Db pin, constitutes 8 bit shift register.The minimum carry-out bit of shift register to the highest carry-out bit is followed successively by: Q0a, Q1a, Q2a, Q3a, Q0b, Q1b, Q2b, Q3b, the resistance that is electrically connected is respectively R16, R14, R12, R4, R17, R15, R13, R3, common port is connected with R18 after the above resistance parallel connection, constitutes analog adder.Resistance common port in parallel is introduced the amplifier normal phase input end, amplifier out is electrically connected with itself inverting input, constitute follower, improve the load capacity of analog adder output level (001), the sinusoidal excitation signal of exporting through follower is Vo ' (100).Ca, Cb pin are the work clock signal input pin of two 4 bit shift register, all introduce the work clock signal from MCU.Among the MC14070 among OUTA pin and the MC14015 Ra, Rb pin be electrically connected.The last one group of XOR gate of VCC, R21, C9 series circuit and MC14070 constitutes electrify restoration circuit.The IN1A pin of MC14070 is electrically connected with VCC, and being equivalent to this pin incoming level logical value permanent is " 1 ", and the common port of R21 and C9 is electrically connected with IN2A, and the C9 other end is electrically connected with Q3b pin among the MC14015.The circuit powered on moment, capacitor C 9 two-plate current potentials are identical, are equal to Q3b pin level value among the MC14015, and the IN2A pin is equivalent to input logic level " 0 " among the MC14070 at this moment, and OUTA output logic " 1 " resets to MC14015.Q3b is electrically connected with IN2D, and IN1D is electrically connected with VCC, and OUTD is electrically connected with Da.Then after overturning, import Da, constitute twisted ring counter from the logic level signal of Q3b output.Under the effect of work clock, the outputs level signals of twisted ring counter progressively is converted to " 1 " signal entirely from complete " 0 " signal, and be the center with complete " 1 " signal, the numerical value of the logic level that the state that is comprised in the signal that the forward and backward work period of its correspondence exports is identical equates that the position is symmetric relation.Therefore, analog adder output level (001) is a maximum level when complete " 1 ", is not the center with the highest output level again when complete " 1 ", the output level value symmetry of corresponding work period of front and back.It is symmetry equivalent to choose weighting resistor thus, that is: R3=R4, R12=R13, R14=R15, R16=R17.Eight bit register can be done 16 five equilibriums to standard sine wave, whenever be divided into 22 ° 30 '.And the quantization level of every five equilibrium should be corresponding one by one with the output level of totalizer proportional.By sine function can calculate 22 ° 30 at interval of adjacent quantization level ' functional value; Functional value can calculate proportionate relationship between them thus again:

Because the waveform that requires totalizer output is for sinusoidal wave, so the output waveform of sinusoidal excitation signal as shown in Figure 2, wherein smooth curve is that ladder sine wave is passed through the filtered waveform of C4.

Wherein:

$\left\{\begin{array}{c}{V}_{01}=\frac{R_{18}}{2}\left(\frac{1}{R_3}\right)\\ V_{02}=\frac{R_{18}}{2}(\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3}+\frac{1}{R_{12}})\\ V_{03}=\frac{R_{18}}{2}(\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3}+\frac{1}{{\mathrm{<figure-callout\; id="12"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_{12}}+\frac{1}{R_{14}})\\ V_{04}=\frac{R_{18}}{2}(\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3}+\frac{1}{{\mathrm{<figure-callout\; id="12"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_{12}}+\frac{1}{{\mathrm{<figure-callout\; id="14"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_{14}}+\frac{1}{R_{16}})\\ V_{05}=\frac{R_{18}}{2}(\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3}+\frac{1}{{\mathrm{<figure-callout\; id="12"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_{12}}+\frac{1}{{\mathrm{<figure-callout\; id="14"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_{14}}+\frac{1}{R_{16}}+\frac{1}{R_{17}})\\ V_{06}=\frac{R_{18}}{2}(\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3}+\frac{1}{{\mathrm{<figure-callout\; id="12"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_{12}}+\frac{1}{{\mathrm{<figure-callout\; id="14"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_{14}}+\frac{1}{R_{16}}+\frac{1}{R_{17}}+\frac{1}{R_{15}})\\ V_{07}=\frac{R_{18}}{2}(\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3}+\frac{1}{R_{12}}+\frac{1}{R_{14}}+\frac{1}{R_{16}}+\frac{1}{R_{17}}+\frac{1}{R_{15}}+\frac{1}{R_{13}})\\ V_{08}=\frac{R_{18}}{2}(\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3}+\frac{1}{{\mathrm{<figure-callout\; id="12"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_{12}}+\frac{1}{R_{14}}+\frac{1}{R_{16}}+\frac{1}{R_{17}}+\frac{1}{R_{15}}+\frac{1}{R_{13}}+\frac{1}{R_4})\end{array}\right.---\left(2\right)$

Calculate the proportionate relationship of totalizer output voltage according to formula (2):

$K=\frac{V_{o(n+1)}}{V_{\mathrm{on}}},$

Wherein n=(0,1 ..., 7) and (3)

Formula (1), formula (3) two proportionate relationship formulas are united find the solution, just can obtain the proportionate relationship between R3, R12, R14, the R16:

$\left\{\begin{array}{c}{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3=2.9R_{12}\\ {\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3=4.3R_{14}\\ {\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="Y2009200026100008H1.png"\; state="\{\{state\}\}">R</figure-callout>}}_3=5.1R_{16}\end{array}\right.---\left(4\right)$

Can get fixed wherein any resistance according to formula (4) and calculate other resistance value again.According to formula

R18＝R3//R4//R12//R13//R14//R15//R16//R17。

In the specific embodiment shown in Figure 3, sinusoidal excitation signal Vo ' (100) introduces two subcircuits behind capacitance C5.One and resistance R 19, R20, signal ground is electrically connected in turn, the voltage division signal that the connection public connecting end of R19, R20 is drawn is introduced electric resistance partial pressure signal in-phase proportion circuit (101), and R22 and R6 determine the voltage amplification factor of electric resistance partial pressure signal in-phase proportion circuit (101).Introduce the differential annulus fuel-flow control of half-bridge sliding sleeve position sensor signal input interface through another branch road of sinusoidal excitation signal Vo ' (100) after straight, the signal of drawing from the differential annulus fuel-flow control of half-bridge sliding sleeve position sensor signal output interface inserts emotional resistance voltage division signal in-phase proportion circuit (102), and R23 and R7 determine the voltage amplification factor of emotional resistance voltage division signal in-phase proportion circuit (102).Electric resistance partial pressure signal in-phase proportion circuit (101) and emotional resistance voltage division signal in-phase proportion circuit (102) are single power supply, only amplify the forward voltage signal of introducing signal.Electric resistance partial pressure signal after the amplification and emotional resistance voltage division signal are introduced differential ratio circuit (103), and the voltage signal after differential ratio circuit (103) amplifies is electrically connected in turn with R61, R62, signal ground.By R61, differential ratio circuit output signal (003) after the R62 dividing potential drop becomes the smooth direct current signal after the capacitor C in parallel with R62 14 filtering, again through final stage signal in-phase proportion circuit (105), obtaining output voltage range at final stage in-phase proportion circuit load voltage output end (004) is 0 to 5V DC load output voltage signal.MCU can learn the change in displacement situation of the differential annulus fuel-flow control of half-bridge sliding sleeve indirectly by detecting the DC load output voltage signal.R60 and R49 determine the final stage voltage amplification factor of ratio circuit in the same way.Be connected with diode D6 positive electrical at final stage in-phase proportion circuit load voltage output end (004), diode D6 negative pole is connected with R49, and the R49 other end is electrically connected with differential ratio circuit inverting input (005).R49 and D6 constitute temperature compensation backfeed loop (104), increase circuit stability, reduce the influence of circuit working variation of ambient temperature to the dc load voltage signal of modulate circuit output.Because the crest voltage of differential ratio circuit inverting input (005) might be higher than final stage signal amplification circuit load voltage, therefore utilize diode D6 oppositely to prevent the positive feedback effect of differential in the case ratio circuit inverting input (005) crest voltage to final stage signal amplification circuit load voltage by characteristic.

Although described the present invention in the above, the invention is not restricted to these embodiment but can change according to many modes by preferred embodiment.

What in addition, the invention is not restricted to be mentioned may use.

Claims (5)

1. linear displacement differential transformers signal conditioning circuit, sinusoidal excitation signal is introduced the linear displacement differential transformers primary coil that is electrically connected with it, and linear displacement differential transformers secondary coil is electrically connected with the differential amplifier unit, it is characterized in that:

A) sinusoidal excitation signal generation unit comprises:

A1) 8 bit shift register most significant digit output terminal logics are electrically connected with the lowest order input end through the logic reverse circuit, constitute 8 twisted ring counters, are used to produce the logic voltage serial data identical with the sinusoidal signal waveform symmetry;

A2) connect with the parallel circuit of forming by resistance and electric capacity, signal ground after the resistance other end parallel connection that each carry-out bit of shift register is electrically connected respectively, constitute analog adder, be used for each output voltage of shift register is added and also filtering;

A3), be used to determine that analog adder output level (001) constitutes the frequency of sinusoidal excitation signal from the clock signal of MCU introducing shift register;

B) differential amplifier unit comprises:

B1) electric resistance partial pressure signal in-phase proportion circuit (101) is used for receiving and amplifying the electric resistance partial pressure signal;

B2) emotional resistance voltage division signal in-phase proportion circuit (102) is used for receiving and amplifying the emotional resistance voltage division signal;

B3) differential ratio circuit (103) is used to amplify the emotional resistance voltage division signal of introducing normal phase input end and the difference signal of introducing the electric resistance partial pressure signal of inverting input;

C) differential ratio circuit inverting input (005), Temperature Feedback resistance, diode cathode, diode cathode, the temperature compensation backfeed loop (104) that final stage in-phase proportion circuit load voltage output end (004) is electrically connected in turn is used to reduce the influence of temperature variation to final stage in-phase proportion load voltage signal.

2. linear displacement differential transformers signal conditioning circuit as claimed in claim 1 is characterized in that sinusoidal excitation signal, and electric resistance partial pressure signal and/or emotional resistance voltage division signal and difference signal are voltage signal.

3. linear displacement differential transformers signal conditioning circuit as claimed in claim 1 is characterized in that adopting in the temperature compensation backfeed loop (104) diode anti-phase by the forward conduction of characteristic blocking-up electric resistance partial pressure signal in-phase proportion circuit (101) to output stage.

4. linear displacement differential transformers signal conditioning circuit as claimed in claim 1 is characterized in that the electric resistance partial pressure signal is V _o'/2.

5. linear displacement differential transformers signal conditioning circuit as claimed in claim 1, it is characterized in that resistance proportionate relationship that each carry-out bit of shift register is electrically connected respectively is by sin (θ+180 °/n)/sin θ, n is the shift register figure place, and θ is 360 °/n.

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