CN201355852Y - Drive circuit of LCD TV - Google Patents

Drive circuit of LCD TV Download PDF

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Publication number
CN201355852Y
CN201355852Y CNU2009201298686U CN200920129868U CN201355852Y CN 201355852 Y CN201355852 Y CN 201355852Y CN U2009201298686 U CNU2009201298686 U CN U2009201298686U CN 200920129868 U CN200920129868 U CN 200920129868U CN 201355852 Y CN201355852 Y CN 201355852Y
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CN
China
Prior art keywords
signal
drive circuit
input
liquid crystal
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU2009201298686U
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Chinese (zh)
Inventor
余荣远
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Shenzhen Kente Science-Technology Development Co., Ltd.
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Shenzhen Kente Science & Technology Development Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Priority to CNU2009201298686U priority Critical patent/CN201355852Y/en
Application granted granted Critical
Publication of CN201355852Y publication Critical patent/CN201355852Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a drive circuit of an LCD TV, and aims to improve the image quality of the LCD TV and reduce the cost of the LCD TV. The drive circuit comprises a video control processor which receives the input of a mid-frequency external analog tuner signal, a luminance/chrominance separation signal, a composite signal and an audio-frequency change-over switch signal; a video output signal is input to a video signal switching circuit, an image display control chip and an LCD; and an audio output signal is input to a power amplifier processor. Compared with the prior art, the utility model links a driver IC with the drive circuit of an internal core single chip microcomputer by adopting an I2C bus so as to realize video reception processing function, PC input treatment function and image output function, process and control the drive circuit of a dual core single chip microcomputer independently, improve the running speed and the work efficiency of the drive circuit, reduce the cost, and obtain better video playback effect.

Description

The drive circuit of liquid crystal TV set
Technical field
The utility model relates to the drive circuit of a kind of liquid crystal TV set, particularly a kind of liquid crystal TV set.
Technical background
The medium and small liquid crystal TV set LCD-TV of prior art, the structure that drive circuit adopts microprocessor MCU, visual display controller SCALER and Video Decoder DECODER to become one, or the structure that MCU+SCALER is integrated.Though these structure costs are lower, image quality is poor.If select for use high-quality DECODER can increase the cost of liquid crystal TV set again, make product lack the market competitiveness.
Summary of the invention
The purpose of this utility model provides a kind of drive circuit of liquid crystal TV set, and the technical problem that solve is to improve the image quality of liquid crystal TV set, and reduces its cost.
The utility model is by the following technical solutions: a kind of drive circuit of liquid crystal TV set, the drive circuit of described liquid crystal TV set is provided with the video processor controls, the video processor controls receives intermediate-frequency external simulation tuner signal, light tone separation signal, composite signal, the input of audio frequency diverter switch signal, to LCDs, audio output signal is to the power amplifier processor through vision signal commutation circuit, visual display control chip for video output signals.
Vision signal commutation circuit described in the utility model is accepted the input of simulation R-G-B signals.
Visual display control chip described in the utility model is accepted the digital signal input.
Audio signal diverter switch received audio signal input described in the utility model.
The drive circuit of liquid crystal TV set of the present utility model described in the utility model is provided with power supply, output 12V, 5V, 3.3V DC power supply, be the video processor controls, simulation tuner signal, audio frequency diverter switch, vision signal commutation circuit, visual display control chip, LCDs, the power supply of power amplifier processor.
Intermediate-frequency external simulation tuner described in the utility model, light tone are separated, compound, audio frequency diverter switch employing UOC-TOP-80 general purpose signal processor.
Digital signal input described in the utility model and simulation R-G-B signals input signal control and treatment adopt the NT68665 chip for driving
NT68665 chip for driving described in the utility model is connected by the I2C bus with the UOC-TOP-80 general purpose signal processor.
The utility model compared with prior art, adopt the I2C bus with NT68665 chip for driving and UOC-TOP-80 general purpose signal processor, two independently 8051 kernel Micro Controller Unit (MCU) driving circuit connect, realize that video reception is handled, the PC input is handled and the picture output function, independent process control to two 8051 kernel Micro Controller Unit (MCU) driving circuit, improve the speed of service and the operating efficiency of drive circuit, reduced cost, obtained better video playback effect.
Description of drawings
Fig. 1 is the circuit block diagram of the utility model embodiment.
Fig. 2 is that commutation circuit figure is selected in the circuit rgb signal input of the utility model embodiment.
Fig. 3 is the frequency switch circuit figure of the utility model embodiment.
Fig. 4 is the video input circuit of the utility model embodiment.
Fig. 5 is the power amplifier figure of the utility model embodiment.
Fig. 6 is the tuner control circuit figure of the utility model embodiment.
Fig. 7 is UOC-TOP-80 and the NT68665 connecting circuit figure of the utility model embodiment.
Specific embodiments
Below in conjunction with drawings and Examples the utility model is described in further detail.As shown in Figure 1, the drive circuit of liquid crystal TV set of the present utility model is provided with the video processor controls, the video processor controls receives intermediate-frequency external simulation tuner signal, light tone is separated SV signal, compound AV signal, the input of audio frequency diverter switch signal, video output signals through vision signal commutation circuit, visual display control chip to LCDs, audio output signal is to the power amplifier processor, simulation RGB rgb signal incoming video signal commutation circuit, digital signal inputs to visual display control chip, the input of audio signal diverter switch received audio signal.The drive circuit of liquid crystal TV set of the present utility model is provided with power supply, output 12V, 5V, 3.3V DC power supply, be the video processor controls, intermediate-frequency external simulation tuner, audio frequency diverter switch, vision signal commutation circuit, visual display control chip, LCDs, the power supply of power amplifier processor.
The UOC-TOP-80 general purpose signal processor of PHILIPS company is adopted in AV, SV input, intermediate-frequency external simulation tuner and audio signal input, digital DVI input signal and analog rgb input signal control and treatment are adopted the NT68665 chip for driving of NOVATEK company, and two chips connect by iic bus.UOC-TOP-80 is used as video and Audio Processing, and TV TV intermediate-freuqncy signal is handled, and supports all kinds of television systems and sound standard, supports stereo.This processor includes the 80C51 microprocessor, and independently software program control Driver Circuit is arranged.The NT68665 chip for driving includes MCU and SCALER, to the control of image output control and treatment and whole drive circuit.
The demonstration of the drive circuit of liquid crystal TV set and Control work are finished by the NT68665 chip, and this chip internal is integrated with 8051 kernel single-chip microcomputers.As shown in Figure 2, the SCLAER of this chip partly is responsible for the analog rgb input of PC, the rgb signal of Video processing IC output, the rgb signal of analog rgb input, the output of video processor controls switches by high bandwidth analog switch PI5V330W, delivers to SCLAER again and handles.Numeral DVI signal is directly handled by the input of NT68665 digital interface.The SCLAER part also is responsible for LCDs PANEL image output control, provides graphic screen menu mode regulative mode OSD to show.8051 monolithic microcomputer kernel are responsible for controlling the graphic OSD display action, and receive the processing external signal, the work of control and responsible whole drive circuit.
As shown in Figure 2, the input of analog rgb signal is handled, because NT68665 has only one road RGB input port, handling to the RGB of PC with from the RGB two paths of signals of video decode IC UOC-TOP-80 general purpose signal processor output, drive circuit adopts high bandwidth analog switch PI5V330W to switch to 2 road rgb signals, carries out switching controls by control signal DATA_SWITCH.PI5V330W is the high bandwidth analog switch, has guaranteed the stable of signal.H/V SYNC synchronizing signal to 2 road RGB adopts common simulation diverter switch 74HC4052 to switch, and carries out switching controls by control signal DATA_SWITCH, and the synchronizing signal of output is directly sent SCLAER synchronizing signal input pin.
Video processing adopts the UOC-TOP-80 general purpose signal processor of PHILIPS company, and the integrated 8051 kernel single-chip microcomputers of this chip internal include video video decoder, and TV medium-frequency IF demodulator is supported global various television system and sound standard, supports stereo.Video frequency processing chip is responsible for video in drive circuit and the decoding of TV intermediate frequency, audio are handled.Shown in Fig. 3,4 and 5, because UOC-TOP-80 chip audio input port restricted number, drive circuit send the UOC-TOP-80 chip to handle after the audio frequency of PC and AV, SV must being switched selection by analog switch again.Audio frequency after PC related audio, video sound accompaniment and the TV demodulation switches by analog switch 74HC4052DT, inputs to the UOC-TOP-80 chip by UOC_IN_L, UOC_IN_R again and carries out the audio processing.Again audio signal is sent amplifier TDA1517 to amplify output after the Audio Processing.
As Fig. 4 and shown in Figure 6, the UOC-TOP-80 general purpose signal processor is built-in with the medium-frequency IF demodulator, so the tuner of band intermediate frequency demodulation only need be adopted in TV signal demodulation part, the IF signal of tuner IF1 output is coupled by sound table noise reduction coupler SF600 K7252M, generate VIF_IN1, VIF_IN2 two paths of signals, send UOC-TOP-80 IF input 45,46 pin, carry out intermediate frequency demodulation by IC and handle.Tuner carries out message transmission and control by iic bus (being connected with the UOC-TOP-80 chip with the NT68665 chip for driving), and control signal is by the input parameter output of UOC-TOP according to master control IC NT68665, and the control tuner carries out turntable, hunting action.
As shown in Figure 4, the UOC-TOP-80 chip is also directly accepted AV vision signal and the input of SV color difference signal.This chip outputs to high bandwidth analog switch PI5V330W with signal processing results by RGB+H/V SYNC aspect, passes through the control channel switching signal by the NT68665 main control MCU, the input signal of selecting during control of video output.
As shown in Figure 7, the utility model passes through the I2C bus mode will, NT68665 chip for driving and UOC-TOP-80 general purpose signal processor, two independently 8051 kernel Micro Controller Unit (MCU) driving circuit connect, realize that video reception is handled, the PC input is handled and the picture output function, the independent process control of two 8051 kernel Micro Controller Unit (MCU) driving circuit, the speed of service and the operating efficiency of raising drive circuit, the cost that has reduced scheme has obtained better video playback effect.

Claims (8)

1. the drive circuit of a liquid crystal TV set, it is characterized in that: the drive circuit of described liquid crystal TV set is provided with the video processor controls, the video processor controls receives intermediate-frequency external simulation tuner signal, light tone separation signal, composite signal, the input of audio frequency diverter switch signal, to LCDs, audio output signal is to the power amplifier processor through vision signal commutation circuit, visual display control chip for video output signals.
2. the drive circuit of liquid crystal TV set according to claim 1 is characterized in that: the input of described vision signal commutation circuit acceptance simulation R-G-B signals.
3. the drive circuit of liquid crystal TV set according to claim 2 is characterized in that: described visual display control chip is accepted the digital signal input.
4. the drive circuit of liquid crystal TV set according to claim 3 is characterized in that: described audio signal diverter switch received audio signal input.
5. the drive circuit of liquid crystal TV set according to claim 4, it is characterized in that: the drive circuit of described liquid crystal TV set of the present utility model is provided with power supply, output 12V, 5V, 3.3V DC power supply, be the video processor controls, simulation tuner signal, audio frequency diverter switch, vision signal commutation circuit, visual display control chip, LCDs, the power supply of power amplifier processor.
6. the drive circuit of liquid crystal TV set according to claim 5 is characterized in that: described intermediate-frequency external simulation tuner, light tone separation, compound, audio frequency diverter switch employing UOC-TOP-80 general purpose signal processor.
7. the drive circuit of liquid crystal TV set according to claim 6 is characterized in that: described digital signal input and simulation R-G-B signals input signal control and treatment employing NT68665 chip for driving
8. the drive circuit of liquid crystal TV set according to claim 7, it is characterized in that: described NT68665 chip for driving is connected by the I2C bus with the UOC-TOP-80 general purpose signal processor.
CNU2009201298686U 2009-02-12 2009-02-12 Drive circuit of LCD TV Expired - Fee Related CN201355852Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2009201298686U CN201355852Y (en) 2009-02-12 2009-02-12 Drive circuit of LCD TV

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Application Number Priority Date Filing Date Title
CNU2009201298686U CN201355852Y (en) 2009-02-12 2009-02-12 Drive circuit of LCD TV

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CN201355852Y true CN201355852Y (en) 2009-12-02

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101510408B (en) * 2009-04-23 2011-10-05 深圳市科特科技股份有限公司 Drive circuit of LCD TV

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101510408B (en) * 2009-04-23 2011-10-05 深圳市科特科技股份有限公司 Drive circuit of LCD TV

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee
CP03 Change of name, title or address

Address after: 518048 Guangdong city of Shenzhen province Futian District Che Kung Temple Tairan Industrial Park Cangsong Tairan six road building nine Room 903

Patentee after: Shenzhen Kente Science-Technology Development Co., Ltd.

Address before: 518048 Guangdong city of Shenzhen province Futian District Che Kung Temple Tairan Industrial Park Cangsong North Block Building Room 903

Patentee before: Shenzhen Kente Science & Technology Development Co., Ltd.

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20091202

Termination date: 20160212