CN201332400Y - Demultiplexer system based on D toggle circuit - Google Patents
Demultiplexer system based on D toggle circuit Download PDFInfo
- Publication number
- CN201332400Y CN201332400Y CNU200920031711XU CN200920031711U CN201332400Y CN 201332400 Y CN201332400 Y CN 201332400Y CN U200920031711X U CNU200920031711X U CN U200920031711XU CN 200920031711 U CN200920031711 U CN 200920031711U CN 201332400 Y CN201332400 Y CN 201332400Y
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- China
- Prior art keywords
- type flip
- flip flop
- signal
- demultiplexing
- photodetector
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Abstract
The utility model relates to a demultiplexer system based on D toggle circuit which has characteristics that the system includes a light-sensitive cell, a D toggle circuit and a phase shifter, the light-sensitive cell and the phase shifter are also accessed to the D toggle circuit. The system can complete whole compatible between the optical network and the electric network; the system has better flexibility and can obtain various decompression rate and high stabilizing ability which can improve signal quality; the system has simple structure and easy operation which can realize integration design of the circuit.
Description
Technical field
The utility model relates to a kind of signal processing system, specifically is a kind of demultiplexing system based on d type flip flop (Flip-Flop).
Background technology
In the high speed optical communication network, particularly in the OTDM system, low speed signal need be adopted the method for rate multiplication to obtain high speed multiplexed signal.But, also need multiplexing high speed signal is demultiplexed into the signal of low speed through after the transmission process.This just relates to the Optical Demultiplexing technology.The scheme of at present existing multiple demultiplexing, most of based on various nonlinear effects, for example four wave mixing in the semiconductor optical amplifier (SOA), the cross-gain modulation, nonlinear effects such as cross-phase modulation, cross-phase modulation in the nonlinear optical fiber, effects such as harmonic wave generation, and the electricity of electroabsorption modulator causes sink effect, intersection absorbs mudulation effect etc.But these decompression schemes are realized comparatively complicated, and stability is not high simultaneously, and a lot of scheme has certain requirement to the polarization direction of input signal light, and all these have limited the application of these decompression schemes in real system.In addition, in electric territory, electrical signal conversion at a high speed need be handled to the signal of telecommunication of low speed in some occasion equally, these all need a kind of simple, stable demultiplexing scheme.
The utility model content
In order to solve the technical problem described in the background technology, the invention provides a kind of demultiplexing system based on d type flip flop.
Technical solution of the present utility model is: a kind of system that realizes above-mentioned Optical Demultiplexing method based on d type flip flop, its special character is: this system comprises photodetector, d type flip flop, phase-shifter, and photodetector, phase-shifter all insert d type flip flop.
Said system also comprises optical delay line, and optical delay line inserts photodetector.
Said system also comprises electric amplifier, and photodetector inserts d type flip flop by electric amplifier.
Above-mentioned d type flip flop is to keep the obstruction d type flip flop
System of the present utility model does not require for the sign indicating number type of input signal, can both realize decompression operation to NRZ and nonreturn to zero code signal.This decompressor has the signal shaping function simultaneously, can improve quality of signals greatly by this system.This system configuration is simple, can realize the integrated design of circuit, and easy operating, good stability.
Description of drawings
Fig. 1 is the schematic diagram of system of the present invention;
Fig. 2 is that light signal to 40Gbit/s is at t
QThe time, frequency is the oscillogram of the clock signal of f demultiplexing when triggering d type flip flop;
Fig. 3 is light return-to-zero code (RZ) signal eye diagram for the treatment of the 40Gbit/s of demultiplexing;
Fig. 4 is the signal of telecommunication figure to the nonreturn to zero code (NRZ) of the light signal demultiplexing gained of 40Gbit/s;
Fig. 5 is the error performance resolution chart by each road demultiplexed signal of optical signal processing method 40Gbit/s light signal demultiplexing of the present utility model.
Embodiment
Referring to Fig. 1, system of the present utility model comprises optical delay line, photodetector, electric amplifier, d type flip flop, phase-shifter, optical delay line inserts photodetector, photodetector inserts d type flip flop by electric amplifier, phase-shifter inserts d type flip flop, in to the light signal demultiplexing, regulate the input time of light signal by optical delay line, perhaps by regulating the phase-shifter of input end of clock mouth, regulate the relation between input d type flip flop signal and the clock signal accurately, guarantee that promptly light signal is converted to the signal of telecommunication prior to clock signal through photodetector and inputs to d type flip flop, and guarantee when rising edge of clock signal arrives with the work of triggering d type flip flop, to make d type flip flop sampled point and that road signal of telecommunication eye opening maximum to be decompressed.Thereby make that trigger can be to the judgement of taking a sample of the signal of appointment, and then change the output state of trigger.D type flip flop is output as NRZ (nonreturn to zero code) signal of correspondence that road signal to be decompressed.This signal is exactly low speed NRZ (nonreturn to zero code) signal that decompresses out from light signal, decompresses than the input clock frequency that depends on d type flip flop.
The d type flip flop that uses in the utility model is to keep the obstruction d type flip flop, and the decompression ratio of desiring design system, parameters such as system transmissions speed are depended in the selection of its operating frequency.But its highest operating rate depends on the bandwidth of d type flip flop itself.
The photodetector that uses in the utility model is a kind of wide bandwidth electrooptical device, realizes the conversion of light signal to the signal of telecommunication; Electric amplifier is a kind of wide bandwidth electric signal amplifier, requires to have low-noise characteristic, to guarantee not influence quality of signals in the amplification that realizes light signal; This is all existing technological means, gets final product with the conversion and the amplification that can realize signal.
Claims (4)
1, a kind of demultiplexing system based on d type flip flop, it is characterized in that: this system comprises photodetector, d type flip flop, phase-shifter, described photodetector, phase-shifter all insert d type flip flop.
2, the demultiplexing system based on d type flip flop according to claim 1, it is characterized in that: described system also comprises optical delay line, described optical delay line inserts photodetector.
3, the demultiplexing system based on d type flip flop according to claim 2, it is characterized in that: described system also comprises electric amplifier, described photodetector inserts d type flip flop by electric amplifier.
4, according to claim 1 or 2 or 3 described demultiplexing systems based on d type flip flop, it is characterized in that: described d type flip flop is to keep the obstruction d type flip flop.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU200920031711XU CN201332400Y (en) | 2009-01-15 | 2009-01-15 | Demultiplexer system based on D toggle circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU200920031711XU CN201332400Y (en) | 2009-01-15 | 2009-01-15 | Demultiplexer system based on D toggle circuit |
Publications (1)
Publication Number | Publication Date |
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CN201332400Y true CN201332400Y (en) | 2009-10-21 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CNU200920031711XU Expired - Fee Related CN201332400Y (en) | 2009-01-15 | 2009-01-15 | Demultiplexer system based on D toggle circuit |
Country Status (1)
Country | Link |
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CN (1) | CN201332400Y (en) |
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2009
- 2009-01-15 CN CNU200920031711XU patent/CN201332400Y/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091021 Termination date: 20120115 |