CN201282457Y - Digital frequency shift discharging-directly station - Google Patents
Digital frequency shift discharging-directly station Download PDFInfo
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- CN201282457Y CN201282457Y CNU2008201033125U CN200820103312U CN201282457Y CN 201282457 Y CN201282457 Y CN 201282457Y CN U2008201033125 U CNU2008201033125 U CN U2008201033125U CN 200820103312 U CN200820103312 U CN 200820103312U CN 201282457 Y CN201282457 Y CN 201282457Y
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- 238000012544 monitoring process Methods 0.000 claims abstract description 12
- 230000008054 signal transmission Effects 0.000 claims abstract description 4
- 238000012163 sequencing technique Methods 0.000 claims description 3
- 230000003321 amplification Effects 0.000 abstract description 7
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 7
- 238000004891 communication Methods 0.000 abstract description 6
- 230000005540 biological transmission Effects 0.000 abstract description 5
- 230000008901 benefit Effects 0.000 abstract description 3
- 238000012806 monitoring device Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 5
- 230000005764 inhibitory process Effects 0.000 description 3
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- 238000010586 diagram Methods 0.000 description 2
- 230000009897 systematic effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
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- 238000010295 mobile communication Methods 0.000 description 1
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Abstract
The utility model provides a digital frequency shift direct amplification station which has the advantages of small space dimension, convenient control and strong out-band rejection capacity. The digital frequency shift direct amplification station comprises a downlink and an uplink, wherein, the downlink comprises a duplexer, of which the output terminal and the input terminal are connected in series in sequence, a low-noise amplifier, a digital signal processing device, a power amplifier and another duplexer; the uplink comprises a duplexer, of which the output terminal and the input terminal are connected in series in sequence, a low-noise amplifier, the digital signal processing device, a power amplifier and another duplexer; the downlink and the uplink share the same digital signal processing device; and the digital signal processing device is further provided with a monitoring device and a power supply device which are used for monitoring the signal transmission and providing a power supply. The utility model is mainly used for the relay transmission of communication signals.
Description
Technical field
The utility model relates to a kind of Wireless Telecom Equipment, particularly a kind of digital frequency-shift repeater.
Background technology
The repeater is a kind of radio transmission transferring equipment that plays signal enhancing or amplification in the wireless communication transmissions process, it is similar to a radiofrequency signal power intensifier, promptly the base station signal that donor antenna is received carries out carrying out power amplification again after low noise amplifies, issue travelling carriage by duplexer from retransmitting antenna again, and the travelling carriage upward signal that retransmitting antenna receives is after low noise amplification and power amplification processing, issue the base station by duplexer from revolving main antenna again, monitor and handle the stationary problem of uplink and downlink signals simultaneously by monitoring unit.Because it is very big that high-frequency signal is decayed in transmission course, and the ability of diffracting obstacles thing is also with respect to the medium and low frequency signal difference, so the repeater is the high-frequency signal frequency reducing that intermediate-freuqncy signal is transmitted generally, is high-frequency signal and restore at far-end.On March 19th, 2008, the Chinese patent CN201039170Y of bulletin disclosed a kind of frequency-shift repeater, this frequency-shift repeater is compressed to the bigger signal of communication of occupied bandwidth in the narrower low frequency frequency range of frequency band and carries out long-distance transmissions again, it at near-end the working frequency range Signal Compression to 1M frequency range outside the band of 4M bandwidth, at far-end the signal despreading is reduced to former frequency range, carries out covering behind the linear amplification.Its benefit is effectively to solve communicating by letter and network coverage problem of the comparatively nervous area of coverage of city frequency resource and areas such as hilliness, Duo Shan, forest, grassland, desert, offshore sea waters.But because the frequency-shift repeater structure that known this employing analog form is handled signal of communication is relatively large, carrying and installation very is inconvenience, the ability of the outer inhibition of band simultaneously, control to channel is accurate inadequately, when needs increase carrier wave, need change accordingly and be provided with hardware, actual use very inconvenient.
The utility model content
The purpose of this utility model provides that a kind of bulk is little, control is convenient, the strong digital frequency-shift repeater of the outer inhibition ability of band.
The technical scheme that the utility model adopted is such: a kind of digital frequency-shift repeater, comprise down link and up link, the duplexer that described down link is connected in series successively by output and input, low noise amplifier, digital signal processing device, power amplifier and duplexer are formed, the duplexer that described up link is connected in series successively by output and input, low noise amplifier, digital signal processing device, power amplifier and duplexer are formed, the shared digital signal processing device of down link and up link, and digital signal processing device also is provided with supervising device and supply unit is used for the pilot signal transmission and power supply is provided.
Above-mentioned digital frequency-shift repeater, described digital signal processing device comprises downstream signal processing unit and upward signal processing unit, the frequency converter that described downstream signal processing unit is connected in series successively by output and input, filter, digital gain controller, low pass filter, analog to digital converter, programmable controller, digital to analog converter, low pass filter, the IQ modulator, filter and frequency converter are formed, the frequency converter that described upward signal processing unit is connected in series successively by output and input, filter, digital gain controller, low pass filter, analog to digital converter, programmable controller, digital to analog converter, low pass filter, the IQ modulator, filter and frequency converter are formed, shared programmable controller of described downstream signal processing unit and upward signal processing unit and two ends are a shared frequency converter respectively, described digital signal processing device also is provided with monitoring unit, time quantum and power subsystem, described monitoring unit, time quantum and power subsystem are connected with programmable controller respectively and are used to carry out monitoring function, sequencing control and power supply is provided.
By adopting the aforementioned techniques scheme, the beneficial effects of the utility model are: the advantage of having inherited and having transplanted the simulation frequency-shift repeater on the one hand, while optimization system performance, reduce the volume of repeater, promote obtaining big spoke with outer inhibition ability, the control that letter is logical is more flexible, and need not to carry out hardware change when increasing carrier wave and only need carry out software setting and can realize.
Description of drawings
Fig. 1 is the systematic schematic diagram of embodiment;
Fig. 2 is the systematic schematic diagram of digital signal processing device among Fig. 1;
Fig. 3 is the on-site programmable gate array internal flow chart;
Fig. 4 is an on-site programmable gate array internal Channel Processing flow chart;
Embodiment
With reference to figure 1, embodiment discloses a kind of digital frequency-shift repeater, it is made up of down link and up link, the top duplexer that the down link of described signal of communication is connected in series successively by output and input, low noise amplifier, digital signal processing device, power amplifier and terminal duplexer are formed, the terminal duplexer that the up link of described signal of communication is connected in series successively by output and input, low noise amplifier, digital signal processing device, power amplifier and top duplexer are formed, the shared digital signal processing device of down link and up link, and shared top duplexer of down link and up link and terminal duplexer, digital signal processing device also are provided with supervising device and supply unit is used for the pilot signal transmission and power supply is provided.
With reference to figure 2, described digital signal processing device comprises downstream signal processing unit and upward signal processing unit, the frequency converter that described downstream signal processing unit is connected in series successively by output and input, filter, digital gain controller (DVGA), low pass filter, analog to digital converter (ADC), field programmable gate array (FPGA), digital to analog converter (DAC), low pass filter, the IQ modulator, filter and frequency converter are formed, the frequency converter that described upward signal processing unit is connected in series successively by output and input, filter, digital gain controller (DVGA), low pass filter, analog to digital converter (ADC), field programmable gate array (FPGA), digital to analog converter (DAC), low pass filter, the IQ modulator, filter and frequency converter are formed, shared field programmable gate array of described downstream signal processing unit and upward signal processing unit (FPGA) and two ends are a shared frequency converter respectively, described digital signal processing device also is provided with monitoring unit, time quantum and power subsystem, described monitoring unit, time quantum and power subsystem are connected with field programmable gate array (FPGA) respectively and are used to carry out monitoring function, sequencing control and power supply is provided.
When using, descending mobile communication radio frequency signal (DLRFin) enters digital signal processing device, at first use phase-locked loop low phase noise VCO output high stability local oscillation signal, radiofrequency signal is carried out down-conversion, the intermediate-freuqncy signal of output expected frequency, intermediate-freuqncy signal is after the low pass filter filters out local oscillator is revealed, carry out prime AGC control by digital gain controller (DVGA), the differential signal output of secondary out-phase such as be converted to simultaneously, respectively behind low pass filter, carrying out high-speed ADC samples, be converted to and send into field programmable gate array (FPGA) behind the IQ signal and carry out Digital Signal Processing, field programmable gate array (FPGA) carries out the uplink and downlink Digital Signal Processing of 8 passages or 12 passages to the intermediate-freuqncy signal of input, and the handling process of each passage is similar, just has different digital controlled oscillator (NCO) frequency.
With reference to figure 3, field programmable gate array (FPGA) at first the gain controller in analog to digital converter, digital to analog converter, the monitoring unit, channel allocation etc. are carried out the initialization setting after electric, carry out DDC, the DUC program of 8 channels simultaneously.
With reference to figure 4, the signal inter-process flow process of each channel is: the signal after the sampling is down-converted to base band by digital controlled oscillator (NCO), be drawn into lower speed to reduce the total system power consumption by the CIC decimation filter again, allow signal handle through CFIR and PFIR successively, the outer signal of filtering expectation; Handle the signal rate that obtains setting through PFIR and CIC decimation filter conversely again, after carrying out automatic gain control (AGC) control, carry out channel compression and decompression respective handling by digital controlled oscillator (NCO) again, final output IQ data are finished the processing capacity of field programmable gate array (FPGA) part to high speed digital to analog converter (DAC).
Claims (2)
1, a kind of digital frequency-shift repeater, it is characterized in that: comprise down link and up link, the duplexer that described down link is connected in series successively by output and input, low noise amplifier, digital signal processing device, power amplifier and duplexer are formed, the duplexer that described up link is connected in series successively by output and input, low noise amplifier, digital signal processing device, power amplifier and duplexer are formed, the shared digital signal processing device of down link and up link, and digital signal processing device also is provided with supervising device and supply unit is used for the pilot signal transmission and power supply is provided.
2, digital frequency-shift repeater according to claim 1, it is characterized in that: described digital signal processing device comprises downstream signal processing unit and upward signal processing unit, the frequency converter that described downstream signal processing unit is connected in series successively by output and input, filter, digital gain controller, low pass filter, analog to digital converter, programmable controller, digital to analog converter, low pass filter, the IQ modulator, filter and frequency converter are formed, the frequency converter that described upward signal processing unit is connected in series successively by output and input, filter, digital gain controller, low pass filter, analog to digital converter, programmable controller, digital to analog converter, low pass filter, the IQ modulator, filter and frequency converter are formed, shared programmable controller of described downstream signal processing unit and upward signal processing unit and two ends are a shared frequency converter respectively, described digital signal processing device also is provided with monitoring unit, time quantum and power subsystem, described monitoring unit, time quantum and power subsystem are connected with programmable controller respectively and are used to carry out monitoring function, sequencing control and power supply is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201033125U CN201282457Y (en) | 2008-08-04 | 2008-08-04 | Digital frequency shift discharging-directly station |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201033125U CN201282457Y (en) | 2008-08-04 | 2008-08-04 | Digital frequency shift discharging-directly station |
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| Publication Number | Publication Date |
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| CN201282457Y true CN201282457Y (en) | 2009-07-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNU2008201033125U Expired - Lifetime CN201282457Y (en) | 2008-08-04 | 2008-08-04 | Digital frequency shift discharging-directly station |
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| CN (1) | CN201282457Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105471490A (en) * | 2014-09-05 | 2016-04-06 | 中国移动通信集团公司 | Repeater and signal processing method thereof |
-
2008
- 2008-08-04 CN CNU2008201033125U patent/CN201282457Y/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105471490A (en) * | 2014-09-05 | 2016-04-06 | 中国移动通信集团公司 | Repeater and signal processing method thereof |
| CN105471490B (en) * | 2014-09-05 | 2020-05-12 | 中国移动通信集团有限公司 | Repeater and signal processing method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Assignee: Quanzhou Z-Stone Technology Co., Ltd. Assignor: Lin Zhihua Contract record no.: 2011350000119 Denomination of utility model: Digital frequency shift discharging-directly station Granted publication date: 20090729 License type: Exclusive License Record date: 20110621 |
|
| ASS | Succession or assignment of patent right |
Owner name: QUANZHOU Z-STONE TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: LIN ZHIHUA Effective date: 20120224 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20120224 Address after: 362000 Licheng, Fujian District, South Ring Road, No. 1145, No. Patentee after: Quanzhou Z-Stone Technology Co., Ltd. Address before: 362000 Quanzhou Jiangnan high tech electronic information Park, Fujian, 25, Quanzhou Ze Tong Tong Technology Co., Ltd. Patentee before: Lin Zhihua |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20090729 |