CN201266990Y - Device for encoding MPEG-4 video based on FPGA - Google Patents
Device for encoding MPEG-4 video based on FPGA Download PDFInfo
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- CN201266990Y CN201266990Y CN 200820221705 CN200820221705U CN201266990Y CN 201266990 Y CN201266990 Y CN 201266990Y CN 200820221705 CN200820221705 CN 200820221705 CN 200820221705 U CN200820221705 U CN 200820221705U CN 201266990 Y CN201266990 Y CN 201266990Y
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Abstract
The utility model discloses an MPEG-4 video coding device based on site programmable gate array, which is respectively connected with video source equipment, a power module and a clock module which are externally arranged. The device comprises an on-chip peripheral bus which is respectively connected with a control processor module, a driving module, an MPEG-4 coding module and a macroblock format conversion module, wherein, the control processor module is connected with a video receiving module by a fast single connection bus, the video receiving module is connected with the macroblock format conversion module, and the MPEG-4 coding module is connected with the macroblock format conversion module. The video coding device realizes the hardware realization of MPEG-4 coding and decoding algorithm in an FPGA system, adopts parallel processing and high-speed dynamic pipelining design to the coding imaging of video signals, reduces the time and power consumption of the coding imaging, improves the speed, and can meet the related technical requirements of complex environmental scenes.
Description
Technical field
The utility model belongs to multimedia technology field, relates to a kind of video coding apparatus, is specifically related to a kind of MPEG-4 video coding apparatus based on field programmable gate array.
Background technology
The key of multimedia technology practicability is the contradiction that solves between mass data that video, audio signal digitizing produce and digital signal medium, the communication network capacity.
In order to support the low-bit rate video transport service, the dynamic MPEG of expert group of image (MovingPicture Experts Group) has released the MPEG-4 international standard.This international standard is suitable for video, the transmission of audio signals of low transfer rate, pays attention to the interactivity and the flexibility of multimedia system.The MPEG-4 video compression standard provides a kind of high flexible, based on the coding method of " content ", decoding end can " decoding as required ", can also add object and information.This flexibility makes MPEG-4 have code efficiency efficiently, content-based extensibility and in the robustness that is subject under the interference environment.
MPEG-4 is one of of paramount importance compression standard in the present Video Applications, is widely used.According to the video coding apparatus that the MPEG-4 standard design is made, the ubiquity power consumption is big, coded imaging speed is slow, and the problem of application flexibility deficiency can't satisfy the correlation technique requirement at complex environment scene.
Summary of the invention
The purpose of this utility model provides a kind of MPEG-4 video coding apparatus based on field programmable gate array, and power consumption is less, and coded imaging speed is fast, and applying flexible can satisfy the correlation technique requirement at complex environment scene.
The technical scheme that the utility model adopted is, a kind of MPEG-4 video coding apparatus based on field programmable gate array, respectively with the video source device of outer setting, power module is connected with clock module, this device comprises peripheral bus on the sheet, on the sheet peripheral bus respectively with the processor controls module, driver module, the MPEG-4 coding module is connected with the macro block format converting module, the processor controls module is connected with the video reception module by quick single connecting bus, the video reception module is connected with the macro block format converting module, and the MPEG-4 coding module is connected with the macro block format converting module.
Feature of the present utility model also is,
Driver module is connected with memory device, display device and wireless transport module respectively.
The macro block format converting module comprises filter unit, color space converting unit, sampling unit and macro block converting unit.
Video coding apparatus of the present utility model has following advantage:
Computer technology, digital image processing techniques and modern on-site programmable gate array FPGA technology are combined, realize MPEG-4 code decode algorithm hardwareization at the scene in the programmable gate array FPGA system, adopt highly dynamic The pipeline design and parallel processing mechanism, coded imaging speed more in real time, accurately; Have the advantages that power consumption is little, speed is fast, volume is little and efficient is high, can satisfy the correlation technique requirement at complex environment scene, and can customize different IP kernels according to different needs, and has a wireless transmission function, the encoded imaging of vision signal can be transferred to distal displayed equipment by wireless transmission function.
Description of drawings
Fig. 1 is the structural representation of a kind of embodiment of the utility model code device.
Among the figure, 1. processor controls module, 2. driver module, 3. the outer peripheral bus of sheet, 4.MPEG-4 coding module, 5. macro block format converting module, 6. video module, 7. quick single connecting bus, 8. clock module, 9. power module, 10. video source device, 11. memory device, 12. display devices, 2-3. wireless transport module.
Wherein, 5-1. filter unit, 5-2. color space converting unit, 5-3. sampling unit, 5-4. macro block converting unit.
Embodiment
Below in conjunction with the drawings and specific embodiments the utility model is elaborated.
The structure of a kind of embodiment of the utility model code device, as shown in Figure 1.Comprise peripheral bus 3 on the sheet, peripheral bus 3 is connected with processor controls module 1, driver module 2, MPEG-4 coding module 4 and macro block format converting module 5 respectively on the sheet, processor controls module 1 is connected with video reception module 6 by quick single connecting bus 7, and video reception module 6 is connected with macro block format converting module 5; MPEG-4 coding module 4 is connected with macro block format converting module 5.
Driver module 2 is connected with memory device 11, display device 12 and wireless transport module 13 respectively.
Macro block format converting module 5 comprises filter unit 5-1, color space converting unit 5-2, sampling unit 5-3 and macro block converting unit 5-4.
The utility model code device is connected with clock module 8, power module 9 and video source device 10 respectively.
Video reception module 6 is accepted the vision signal that external video source device 10 transmits, to the processing of classifying of this vision signal; Required format conversion before 5 pairs of encoding video signals of macro block format converting module from video reception module 6; Clock module 8 provides clock signal for this code device, the mode of operation of processor controls module 1 control MPEG-4 coding module 4, and vision signal handled, the processed video signal carries out system interaction by X86 system interface transducer and PC computer, or carry out the live preview of treatment effect by the display device 12 of driver module 2, also can be saved in memory device 11 and realize collection of video signal, and can be transferred to remote display device by wireless transport module 13 with document form.
The course of work of the utility model code device:
Video source device 10 outputting video signals, video reception module 6 receives this vision signal, vision signal as reception is an analog video signal, video reception module 6 converts this analog video signal to digital video signal, and this digital video signal is sent into macro block format converting module 5 change, vision signal as reception is a digital video signal, directly send into macro block format converting module 5 and carry out format conversion, macro block format converting module 5 is converted to YUV (4:2:0) video signal format with the digital video signal that receives, and input MPEG-4 coding module 4, MPEG-4 coding module 4 is with the video reference frame of the Memory Controller Hub storage condition as coding, encoding video signal to YUV (4:2:0) form received, and with the coding vision signal be delivered to driver module 2 by peripheral bus on the sheet 3, vision signal after driver module 2 will be encoded selectively according to condition is delivered to memory device 11, display device 12 or wireless transport module 13, also can be simultaneously with video signal transmission to above-mentioned three equipment.Can also finish and the interworking of PC system for computer by X86 system interface transducer.
The utility model code device, in the FPGA system, realized the hardwareization of MPEG-4 code decode algorithm, coded imaging to vision signal adopts parallel processing and at a high speed dynamic The pipeline design, can handle multiple signals simultaneously, reduce the time and the power consumption of coded imaging, improve the speed of coded imaging.
Claims (3)
1. MPEG-4 video coding apparatus based on field programmable gate array, respectively with the video source device (10) of outer setting, power module (9) is connected with clock module (8), it is characterized in that, this device comprises peripheral bus on the sheet (3), peripheral bus on the sheet (3) respectively with processor controls module (1), driver module (2), MPEG-4 coding module (4) is connected with macro block format converting module (5), processor controls module (1) is connected with video reception module (6) by quick single connecting bus (7), video reception module (6) is connected with macro block format converting module (5), and MPEG-4 coding module (4) is connected with macro block format converting module (5).
2. code device according to claim 1 is characterized in that, described driver module (2) is connected with memory device (11), display device (12) and wireless transport module (13) respectively.
3. code device according to claim 1 is characterized in that, described macro block format converting module (5) comprises filter unit (5-1), color space converting unit (5-2), sampling unit (5-3) and macro block converting unit (5-4).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200820221705 CN201266990Y (en) | 2008-09-28 | 2008-09-28 | Device for encoding MPEG-4 video based on FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200820221705 CN201266990Y (en) | 2008-09-28 | 2008-09-28 | Device for encoding MPEG-4 video based on FPGA |
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| CN201266990Y true CN201266990Y (en) | 2009-07-01 |
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| CN 200820221705 Expired - Fee Related CN201266990Y (en) | 2008-09-28 | 2008-09-28 | Device for encoding MPEG-4 video based on FPGA |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103873878A (en) * | 2012-12-14 | 2014-06-18 | 京东方科技集团股份有限公司 | Video decoding method and corresponding video decoding device thereof |
| CN109246331A (en) * | 2018-09-19 | 2019-01-18 | 郑州云海信息技术有限公司 | A kind of method for processing video frequency and system |
-
2008
- 2008-09-28 CN CN 200820221705 patent/CN201266990Y/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103873878A (en) * | 2012-12-14 | 2014-06-18 | 京东方科技集团股份有限公司 | Video decoding method and corresponding video decoding device thereof |
| CN109246331A (en) * | 2018-09-19 | 2019-01-18 | 郑州云海信息技术有限公司 | A kind of method for processing video frequency and system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090701 Termination date: 20110928 |