The model utility content
The technical problems to be solved in the utility model is: at the problem that existing control mode exists, provide a kind of liquefied petroleum gas (LPG) LPG engine control system that can control motor in real time according to Environmental Conditions, service condition, operational condition etc.
The technological scheme that its technical problem that solves the utility model adopts is: this liquefied petroleum gas (LPG) LPG engine control system, comprise microprocessor, signal input conditioning circuit, the LPG analogue signal, the signal condition buffer circuit, the LPG digital signal, cerebellum joint control CMAC, ferroelectric memory, power supply detects and mu balanced circuit, power supply, CAN, the LIN communication circuit, CAN, the LIN interface, high-power drive circuit, gas handling system drives, jet driving, ignition module, step motor drive, the switching value drive circuit, control each switch and valve, the indication of OBD system mode, the LPG analogue signal is connected with microprocessor by signal input conditioning circuit, the LPG digital signal is connected with microprocessor by the signal condition buffer circuit, ferroelectric memory and cerebellum joint control CMAC interconnection, cerebellum joint control CMAC and microprocessor interconnection, CAN, LIN interface and CAN, the interconnection of LIN communication circuit, CAN, LIN communication circuit and microprocessor interconnection, power supply is connected with microprocessor by power supply detection and mu balanced circuit, microprocessor drives with gas handling system respectively by high-power drive circuit, jet driving, ignition module links to each other, microprocessor links to each other with step motor drive, microprocessor by the switching value drive circuit respectively with control each switch and valve, the indication of OBD system mode links to each other.
The LPG analogue signal mainly comprises suction pressure/charge flow rate, atmospheric pressure signal, intake air temperature signals, cooling water temperature signal, oxygen sensor signal, ambient temperature signal, detonation signal, LPG temperature signal, LPG pressure signal, LPG liquid level signal, supercharger pressure sensor (the band supercharged engine is used), throttle position switch.
The LPG digital signal mainly comprises crankshaft-position signal, fuel injection pulsewidth signal, vehicle speed signal, air-conditioning demand signal, direction power-assisted demand signal, neutral signal, Der StandlichtScheinwerfer und Parkleuchtenschalter signal.
The LPG control signal is input microprocessor after anti-shake and filtering conditioning, and microprocessor enters the LPG control mode after accepting this signal.Under the LPG fuel mode, press control strategy, ignition advance angle during with respect to gasoline in advance; The air feed situation of LPG temperature signal and LPG pressure signal reflection liquefied petroleum gas (LPG) LPG, microprocessor will be adjusted density of the induced air and air inflow according to this signal.
Cerebellum joint control CMAC comprises microprocessor and dynamically flash memories/preparation increased flash memory device and LPG analogue signal, LPG digital signal acquiring conditioning circuit.
High-power drive circuit comprises that gas handling system driving, jet driving, ignition module drive.Wherein gas handling system drives and comprises that air inlet resonance control valve, jet driving comprise that snifting valve, ignition module driving comprise the LPG gas ignition.
Step motor drive comprises the adjustment of fuel air butterfly valve ratio, mixer is auxiliary adjusts (the outer premixed control of machine is used).
The switching value drive circuit comprises control switch and valve and the indication of 0BD system mode.Wherein control switch and valve comprise high low speed fan swicth, air-conditioning power switch, idle valve, main attack rate switch, indicating fault alarm switch, air inlet resonance ejector switch, control mixer switch, LPG air feed shut-off valve, VNT (variable cross section turbosupercharging adjustment), fluid power adjustment control (the band supercharged engine is used).
Microprocessor U1 and cerebellum joint control CMAC are that the competitive double-core of system is handled core, and existing division of labor difference has the principal and subordinate's transposition when open loop and closed loop control again in control procedure.
Cerebellum joint control CMAC in the control system working procedure by adaptive learning generate a series of that birds of the same feather flock together by different operating modes, corresponding to the dynamic arteries and veins spectrum MAP parameter of different control target.
Cerebellum joint control CMAC carries out adaptive learning to control procedure, and birdss of the same feather flock together learning parameter divided working status, branch condition temporary; Microprocessor U1 in control constantly by control strategy to same operating mode, carry out than declaring with solid-state substantially arteries and veins spectrum MAP parameter and temporary adaptive learning parameter under the condition, during temporary data fit defined terms, the dynamic arteries and veins spectrum MAP parameter that forms under this condition of this operating mode is stored, and constantly study in the control is afterwards carried out above process repeatedly and is also constantly refreshed.
When microprocessor U1 judged that dynamic arteries and veins spectrum MAP parameter under this condition of this operating mode is more suitable for control in motor, the solid-state substantially MAP parameter that the dynamic arteries and veins spectrum MAP parameter under this condition of this operating mode replaces under this condition of this operating mode was controlled motor.
Under same operating mode, when meeting the closed loop control condition by control strategy, cerebellum joint control CMAC declares according to the auto-adaptive parameter of various condition situations of change is carried out the data ratio with the demarcation control target of microprocessor U1 in the system, and the closed loop control target when selecting different condition under this operating mode is controlled; Simultaneously this closed loop control target is carried out adaptive learning, when meeting dynamic arteries and veins spectrum MAP parameter flush condition, this closed loop target data is refreshed; When meeting substitution condition, dynamic arteries and veins spectrum MAP parameter is used in this closed loop district shielding in the solid-state substantially arteries and veins spectrum MAP parameter; When judging that this dynamic arteries and veins spectrum MAP parameter is not suitable for this target control, the former solid-state substantially arteries and veins spectrum MAP parameter of breaking seal.
Cerebellum joint control CMAC becomes control system and handles core when control system is controlled the motor open loop, press control strategy divided ring target pointwise control.
In the circulation of n task, control target y is defined in (y-△ y, y+ △ y) interval; Engine load parameter, the rotating speed that show this moment are regarded as optimum condition, optimised the selecting of desired value under this condition becomes new control target, and control system will meet this control target that generates dynamic arteries and veins spectrum MAP parameter and in the course of the work the target pointwise be controlled as the pointwise control target.
Working principle:
More than control is finished by control system of the present utility model; Control system is made of microprocessor and cerebellum joint control CMAC and peripheral circuit thereof; Microprocessor and cerebellum joint control CMAC are that the competitive double-core of system is handled core, and existing division of labor difference has the principal and subordinate's transposition when the open and close ring is controlled again in control procedure.Promptly in system works, when microprocessor was the main control core, cerebellum joint control CMAC carried out adaptive learning to control procedure, and birdsed of the same feather flock together learning parameter divided working status, branch condition temporary; Microprocessor in control constantly by control strategy to same operating mode, carry out than declaring with solid-state substantially arteries and veins spectrum MAP parameter and temporary adaptive learning parameter under the condition, during temporary data fit defined terms, the dynamic arteries and veins spectrum MAP parameter that forms under this condition of this operating mode is stored, and constantly study in the control is afterwards carried out above process repeatedly and is also constantly refreshed.When microprocessor judged that dynamic arteries and veins spectrum MAP parameter under this condition of this operating mode is more suitable for control in motor, the solid-state substantially MAP parameter that the dynamic arteries and veins spectrum MAP parameter under this condition of this operating mode replaces under this condition of this operating mode was controlled motor.Under same operating mode, when meeting the closed loop control condition by control strategy, cerebellum joint control CMAC declares according to the auto-adaptive parameter of various condition situations of change is carried out the data ratio with the demarcation control target of microprocessor in the system, and the closed loop control target when selecting different condition under this operating mode is controlled; Simultaneously this closed loop control target is carried out adaptive learning, when meeting dynamic arteries and veins spectrum MAP parameter flush condition, this closed loop target data is refreshed; When meeting substitution condition, dynamic arteries and veins spectrum MAP parameter is used in this closed loop district shielding in the solid-state substantially arteries and veins spectrum MAP parameter; When judging that this dynamic arteries and veins spectrum MAP parameter is not suitable for this target control, the former solid-state substantially arteries and veins spectrum MAP parameter of breaking seal, cerebellum joint control CMAC continues adaptive learning.Open loop when control, adopt the compound control of feedforward of PID and cerebellum joint control CMAC, be master control with cerebellum joint control CMAC in this control, i.e. microprocessor and cerebellum joint control CMAC principal and subordinate transposition pressed the pointwise of control strategy divided ring target and controlled.
Compared with prior art, the beneficial effect that the utility model liquefied petroleum gas (LPG) LPG engine control system is had is: the feedback of utilizing motor self parameter, strategy with adaptive learning control, generate according to condition change, by working conditions change, by the dynamic arteries and veins spectrum of the self adaption of handling intention MAP, it combines the combination arteries and veins MAP of formation composite control with the solid-state arteries and veins spectrum MAP that demarcates by stand; This combination arteries and veins MAP can adapt to well that gas ingredients changes, the variation of aging, the motor service condition of fuel adjusting device etc., make motor face the condition energy smooth working of variation, improve control accuracy, improved power character, Economy and emission performance.
Control system is made of microprocessor and cerebellum joint control CMAC and peripheral circuit thereof; Microprocessor and cerebellum joint control CMAC are that the competitive double-core of system is handled core, and existing division of labor difference has the principal and subordinate's transposition when the open and close ring is controlled again in control procedure.Make motor be able to real-time control according to Environmental Conditions, service condition, operational condition etc.And liquefied petroleum gas (LPG) LPG engine control make full use of by the zoning arteries and veins spectrum MAP parameter of operating mode and the solid-state substantially arteries and veins spectrum MAP parameter that fixedly writes with birds of the same feather flock together the refreshable dynamic arteries and veins spectrum MAP parameter that forms through adaptive learning under the double-core of microprocessor and cerebellum joint control CMAC is controlled, or use separately, or applied in any combination, or alternately replacement, open loop and closed loop control in small area constantly; Strengthened the flexibility of engine control, reduced the time stickiness of control procedure, improved tracking degree control target; Thereby the power character of motor and Economy are improved, and it is more reasonable to control.The real control problem that has fundamentally solved motor realizes fuel-economizing.
Embodiment
Fig. 1-2 4 is most preferred embodiments of the present utility model, among Fig. 2-24: the U1 microprocessor, the U2 buffer storage, the U3 phaselocked loop, the U4 operational amplifier, the U5 logarithmic amplifier, the U6 operational amplifier, the U7F/V transducer, the U8 comparator, the U9 magnetic transformer, the U10 phase inverter, the U11 gate circuit, the U12 time base circuit, U13 Si schmitt trigger, the U14 phaselocked loop, U15 expands mouth, the U16 storage, the U17 microprocessor, the U18 latch, the U19 storage dynamic, U20 CAN communication sink, U21-U26 is the switching value driver, U27 high-power driving pipe, U28-U29 is the switching value driver, U30 asynchronous serial communication processor, the U31 electronic switch, the U32 register, the U33 phase inverter, U34, the U35 transport and placing device, the U36 distributor, the U37 Darlington transistor, the U380 power amplifier, U39, U40 is the switching value driver; DS8 section nixie tube; The DB9 port; The DJ1 solenoid valve; MG1, MG2 stepper motor; M1-M4, jet solenoid valve; The OP1-OP30 photo coupler; The T1-T4 booster; R1-R140, RX1, RN1, RN2 resistance; C1-C65 electric capacity, CN1-CN4 electric capacity; CX1, EN1, EN2 electrochemical capacitor; BT1-BT15 is the power drive pipe; The D1-D5 reference diode; DE1-DE6, DX1-DX3 voltage-stabiliser tube; Q1-Q8, QX1 transistor; The QE1-QE5 analog line driver; LED light; The VR1-VR4 adjustable resistance; The S1 switch; The Y1-Y2 crystal oscillator; QK LM7805.
Below in conjunction with accompanying drawing 1-24 the utility model liquefied petroleum gas (LPG) LPG engine control system is described in further detail:
Among Fig. 1: the LPG analogue signal of external sensor is input to microprocessor by the input conditioning circuit with signal; The input conditioning circuit divides two-part to the processing of LPG analogue signal: a part is that the LPG digital signal is through LPG digital signal passage input microprocessor by the input conditioning circuit with signal condition; Another part input conditioning circuit is directly imported little inner A/D port of handling through analog channel with signal.
This liquefied petroleum gas (LPG) LPG engine control system, comprise microprocessor, signal input conditioning circuit, the LPG analogue signal, the signal condition buffer circuit, the LPG digital signal, cerebellum joint control CMAC, ferroelectric memory, power supply detects and mu balanced circuit, power supply, CAN, the LIN communication circuit, CAN, the LIN interface, high-power drive circuit, gas handling system drives, jet driving, ignition module, step motor drive, the switching value drive circuit, control each switch and valve, the indication of OBD system mode, the LPG analogue signal is connected with microprocessor by signal input conditioning circuit, the LPG digital signal is connected with microprocessor by the signal condition buffer circuit, ferroelectric memory and cerebellum joint control CMAC interconnection, cerebellum joint control CMAC and microprocessor interconnection, CAN, LIN interface and CAN, the interconnection of LIN communication circuit, CAN, LIN communication circuit and microprocessor interconnection, power supply is connected with microprocessor by power supply detection and mu balanced circuit, microprocessor drives with gas handling system respectively by high-power drive circuit, jet driving, ignition module links to each other, microprocessor links to each other with step motor drive, microprocessor by the switching value drive circuit respectively with control each switch and valve, the indication of OBD system mode links to each other.
The LPG analogue signal mainly comprises suction pressure/charge flow rate, atmospheric pressure signal, intake air temperature signals, cooling water temperature signal, oxygen sensor signal, ambient temperature signal, detonation signal, LPG temperature signal, LPG pressure signal, LPG liquid level signal, supercharger pressure sensor (the band supercharged engine is used), throttle position switch.
The LPG digital signal of external sensor is converted to the input signal that microprocessor can receive by input conditioning buffer circuit; The effect of input conditioning buffer circuit is that amplitude, waveform and the interference of sensor LPG digital signal are handled, i.e. Shelving.
The LPG digital signal mainly comprises crankshaft-position signal, fuel injection pulsewidth signal, vehicle speed signal, air-conditioning demand signal, direction power-assisted demand signal, neutral signal, Der StandlichtScheinwerfer und Parkleuchtenschalter signal.
The LPG control signal is input microprocessor after anti-shake and filtering conditioning, and microprocessor enters the LPG control mode after accepting this signal.Under liquefied petroleum gas (LPG) LPG fuel mode, press control strategy, ignition advance angle during with respect to gasoline in advance; The air feed situation of LPG temperature signal and LPG pressure signal reflection LPG, microprocessor will be adjusted density of the induced air and air inflow according to this signal.
Battery voltage detects by power supply and mu balanced circuit is handled back access microprocessor.Power supply detects and the major function of mu balanced circuit is: stabilized power supply is provided, working power is provided and provides power supply to keep to RAM to external sensor for each chip of system.Power supply detects and mu balanced circuit is made up of DC/DC transducer, over-current overvoltage protector, voltage change signal transmitter and anti-jamming circuit.
Communication interface circuit comprises diagnostics interface and In-vehicle networking interface, and the In-vehicle networking interface comprises communication bus CAN-BUS and communication bus LIN-BUS, general fault diagnosis standard OBD-II/iso-9141, and communication bus SCI and communication bus SPI; These buses connect automobile anti-lock braking device ABS, electrical power steering, instrument and body control system etc. respectively.The signal of these systems is exchanging by the NC network controller maintenance information in network-bus and bus driver thereof and the microprocessor sheet respectively.
Microprocessor is by 32 CPU core, built-in control strategy and algorithm, all kinds of arteries and veins spectrum MAP parameter list and relevant control target data.
Cerebellum joint control CMAC is a kernel by 32-bit microprocessor, constitutes with external circuit; Its built-in adaptive learning algorithm and control strategy, with the common forming control system core of master microprocessor, accept external signal and change, in time make decisions according to strategy, carry out adaptive learning and birds of the same feather flock together and refresh dynamic arteries and veins spectrum MAP parameter, send command control outside actuator action and operation.
Microprocessor and cerebellum joint control CMAC displacement primary and secondary control when the divided working status open loop is controlled, during closed loop control based on microprocessor; In open loop when control, is based on cerebellum joint control CMAC.
Preparation increased flash memory device backs up system's solid-state substantially arteries and veins spectrum MAP parameter, after participating in operating mode control behind the adaptive learning, be judged as make system on request that part of dynamic arteries and veins spectrum MAP parameter of stable operation also can deposit in wherein as posterior infromation.Can automatically solid-state substantially arteries and veins spectrum MAP parameter be write the microprocessor from preparation increased flash memory device when the microprocessor decision-making system is out of control.
High-power drive circuit comprises that gas handling system driving, jet driving, ignition module drive.Wherein gas handling system drives and comprises that air inlet resonance control valve, jet driving comprise that snifting valve, ignition module driving comprise gas ignition.
Step motor drive comprises the adjustment of fuel air butterfly valve ratio, mixer is auxiliary adjusts (the outer premixed control of machine is used).
The switching value drive circuit comprises control switch and valve and the indication of OBD system mode, and wherein control switch and valve comprise high low speed fan swicth, air-conditioning power switch, idle valve, main attack rate switch, indicating fault alarm switch, air inlet resonance ejector switch, control mixer switch, LPG air feed shut-off valve, VNT (variable cross section turbosupercharging adjustment), fluid power adjustment control (the band supercharged engine is used).
Among Fig. 2: 40 pin of microprocessor U1 connect the VCC high level by resistance R 1, by capacitor C 1 ground connection, by switch S 1 ground connection; Be connected to crystal oscillator Y1 between 73,74 pin of microprocessor U1, and by capacitor C 2, C3 ground connection; 37,72,131, the 144 pin ground connection of microprocessor U1,143 pin of microprocessor U1 connect the VCC high level.
Among Fig. 3: suction pressure, atmospheric pressure and LPG pressure signal enter phaselocked loop U3 through buffer storage U2 and carry out the V/F conversion treatment, are input to A/D mouth P40, P41, the P42 pin of microprocessor U1, gather for microprocessor U1.
4 pin of phaselocked loop U3 connect the 1st pin of photo coupler OP1; The 5 pin ground connection of phaselocked loop U3 are connected with capacitor C 5 between 6 pin and 7 pin; 9 pin of phaselocked loop U3 are connected suction pressure, barometric pressure sensor by buffer storage U2 with resistance R 2, and 9 pin are also by capacitor C 4 ground connection; 11 pin are by resistance R 3 ground connection.2, the 4 pin ground connection of photo coupler OP1; The 3rd pin of photo coupler OP1 connects A/D mouth P40, P41, the P42 pin of microprocessor U1, and connects the VDD high level by resistance R 4.
Among Fig. 4: oxygen sensor signal is imported logarithmic amplifier U5 after operational amplifier U4 carries out 10 times of amplifications to current signal, after the 10 pin output of logarithmic amplifier U5, carry out I-V through operational amplifier U6 and be transformed to the A/D mouth P43 pin that the 5-0V voltage signal is input to microprocessor U1, air fuel ratio is judged.
2 pin of operational amplifier U4 connect oxygen sensor signal, link to each other with 6 pin by resistance R 5; 3 pin of operational amplifier U4 link to each other with 2 pin of logarithmic amplifier U5, link to each other with 6 pin of operational amplifier U4 by resistance R 6, and connect the VDD high level by resistance R 7.2 pin of logarithmic amplifier U5 link to each other with 7 pin of logarithmic amplifier U5 by capacitor C 7; 6 pin of logarithmic amplifier U5 are by resistance R 8, capacitor C 6 ground connection; 15 pin of logarithmic amplifier U5 are by resistance R 9, adjustable resistance VR2 ground connection; 16 pin of logarithmic amplifier U5 connect the VCC high level by resistance R 10, adjustable resistance VR1; 11 pin of logarithmic amplifier U5 connect the VCC high level.10 pin of logarithmic amplifier U5 link to each other with 2 pin of operational amplifier U6 by resistance R 11, and by resistance R 12 ground connection; 2 pin of operational amplifier U6 link to each other with 6 pin by resistance R 13; 6 pin of operational amplifier U6 connect the A/D mouth P43 pin of microprocessor U1; The 3 pin ground connection of operational amplifier U6.
Among Fig. 5: after the signal process step-down shaping of pinking, carry out conversion treatment among the input F/V transducer U7, be input to the A/D mouth P44 pin of microprocessor U1, gather for microprocessor U1.
Be input to the 1st pin of F/V transducer U7 after detonation signal is handled by resistance R 14 and capacitor C 9 step-downs, the input of VCC high level is by capacitor C 8 ground connection; The 2nd pin of F/V transducer U7 is by capacitor C 10 ground connection, and 3 pin are by capacitor C 11, resistance R 15 ground connection, and 4 pin link to each other with 7 pin and pass through resistance R 16 ground connection; The 6th pin of F/V transducer U7 connects the VCC high level, and by capacitor C 12 ground connection; The 8 pin ground connection of F/V transducer U7; 5 pin of F/V transducer U7 connect the A/D mouth P44 pin of microprocessor U1.
Among Fig. 6: cooling water temperature signal, intake air temperature signals, ambient temperature signal and LPG temperature signal are converted to analog voltage signal by the serial connection divider resistance declare for comparator U8 ratio, comparator U8 exports A/D mouth P50, P51, P52, the P53 pin that the LPG digital signal is input to microprocessor U1 successively, judges engine operating condition for microprocessor U1.
2 pin of comparator U8 connect cooling water temperature signal, intake air temperature signals, ambient temperature signal, LPG temperature signal successively, and 2 pin also connect the VDD high level by resistance R 17; 1 pin of comparator U8 connects A/D mouth P50, P51, P52, the P53 pin of microprocessor U1 successively; 3 pin of comparator U8 connect the VDD high level by resistance R 19 ground connection by resistance R 18; 8 pin connect the VDD high level and pass through capacitor C 13 ground connection
Among Fig. 7: crankshaft-position signal is input to after magnetic transformer U9 carries out conversion treatment, is input to the A/D mouth P45 pin of microprocessor U1, gathers for microprocessor U1.
Crankshaft-position signal is input to 2 pin of magnetic transformer U9; 3 pin of magnetic transformer U9 connect the VCC high level by resistance R 20, by resistance R 21 ground connection; 1, the 4 pin ground connection of magnetic transformer U9,8 pin connect the VCC high level; The input of VCC high level is through capacitor C 14 ground connection; 7 pin of magnetic transformer U9 are input to the A/D mouth P45 pin of microprocessor U1 by drawing output one voltage signal on the resistance R 22.
Among Fig. 8: phase inverter U10 and gate circuit U11 form jet signal pulse width discriminating circuit.
1 pin of phase inverter U10 connects the VDD high level by resistance R 24, connects jet signal by capacitor C 15, and capacitor C 16 and resistance R 23 series connections are between an end and ground of capacitor C 15; 2 pin of phase inverter U10 connect 1 pin of gate circuit U11.2 pin of gate circuit U11 are by resistance R 23 ground connection, and 3 pin connect the 1st pin of photo coupler OP2; 2, the 4 pin ground connection of photo coupler OP2, the 3rd pin of photo coupler OP2 connects the PO1 pin of microprocessor U1 successively.
Among Fig. 9: offer microprocessor U1 after tach signal is nursed one's health through time base circuit U12 and gather used.
The 1 pin ground connection of time base circuit U12,2 pin connect tach signal, and 3 pin connect the 1st pin of photo coupler OP3 by resistance R 26; 4 pin of time base circuit U12,8 pin connect the VDD high level, and 5 pin are by capacitor C 17 ground connection; 6 pin, 7 pin of time base circuit U12 connect the VDD high level by resistance R 25, and by capacitor C 18 ground connection.The 3rd pin of photo coupler OP3 connects the P20 pin of microprocessor U1, and connects the VDD high level by resistance R 27; 2, the 4 pin ground connection of photo coupler OP3.
Among Figure 10: Der StandlichtScheinwerfer und Parkleuchtenschalter signal, neutral position signal, direction power-assisted signal, air-conditioning demand signal and LPG liquid level signal are exported the LPG digital signal successively and are judged engine operating condition for microprocessor U1 after being converted to this schmitt trigger of analog voltage signal confession U13 shaping by the serial connection divider resistance.
3 pin of this schmitt trigger U13 connect Der StandlichtScheinwerfer und Parkleuchtenschalter signal, neutral position signal, direction power-assisted signal, air-conditioning demand signal, LPG liquid level signal successively by resistance R 30; 3 pin are also by capacitor C 20 ground connection; Resistance R 30 connects the VCC high level with signal connection end by resistance R 28, also by resistance R 29 ground connection; VCC high level input end is by capacitor C 19 ground connection.4 pin of this schmitt trigger U13 connect P21, P22, P23, P24, the P25 pin of microprocessor U1 successively by resistance R 31.
Among Figure 11: after power supply detects by power supply and the shaping of mu balanced circuit, filtering, anti-interference and voltage stabilizing handle, for system provides the reliability constant voltage dc source.
Power supply detects: 4 pin of phaselocked loop U14 connect the 4th pin of photo coupler OP4; Be connected with capacitor C 21 between 6 pin of phaselocked loop U14 and 7 pin; 9 pin of phaselocked loop U14 connect battery voltage by resistance R 32, and 9 pin are also by resistance R 33 ground connection; 11 pin of phaselocked loop U14 are by resistance R 34 ground connection.1, the 3 pin ground connection of photo coupler OP4, the 2nd pin of photo coupler OP4 connects the P16 pin of microprocessor U1.
Mu balanced circuit: high level input VBAT links to each other with 1 pin of transistor QX1 with resistance R X1 by reference diode DX1; The series connection node place of reference diode DX1 and resistance R X1 is by voltage-stabiliser tube DX2 and electrochemical capacitor CX1 ground connection; And be connected with 2 pin of transistor QX1.The 1 pin series connection node place of resistance R X1 and transistor QX1 is by voltage-stabiliser tube DX3 ground connection; The 3 pin output VCC high level of transistor QX1.
High level input 30A links to each other with 1 pin of LM 7805 QK by resistance R N1, and by capacitor C N1 ground connection; The 1 pin series connection node place of resistance R N1 and LM7805QK is by electrochemical capacitor EN1 ground connection; The 2 pin ground connection of LM7805QK; The 3 pin output VDD high level of LM7805QK, and by electrochemical capacitor EN2, capacitor C N2, capacitor C N2, capacitor C N2 and resistance R N2 serial connection tutorial light LED ground connection.
Among Figure 12: constitute preparation increased flash memory device by expansion mouthful U15 and storage U16, storage system arteries and veins spectrum MAP data.
The corresponding connection of P70-P77 order of the 2-9 pin of expansion mouthful U15 and microprocessor U1, and with the 13-21 pin corresponding connection in proper order of storage U16; The 12-19 pin of expansion mouthful U15 with the corresponding connection of 5-12 pin order; 20 pin of expansion mouthful U15 connect the VCC high level, and by capacitor C 22 ground connection.3,28,4,25,23,26,27 pin of storage U16 and the corresponding connection of the P90-P96 of microprocessor U1 order; 1,30,2,31 pin of storage U16 and the corresponding connection of the P60-P63 of microprocessor U1 order.
1 pin of expansion mouthful U15 and 22 pin of storage U16 link to each other, and with microprocessor U1 /the CS pin links to each other.24 pin of storage U16 link to each other with the P10 pin of the P26 pin of microprocessor U1, storage dynamic U17; 29 pin of storage U16 link to each other with the P11 pin of the P27 pin of microprocessor U1, storage dynamic U17; 32 pin of storage U16 connect the VCC high level, and by capacitor C 23 ground connection; The 16 pin ground connection of storage U16.
Among Figure 13: microprocessor U17, latch U18, storage dynamic U19 constitute cerebellum joint control CMAC, under the control of microprocessor U1, according to built-in control strategy adaptive learning, and approach regulated by the air fuel ratio desired value; Storage dynamic U19 is a flash memories, and its joint parameter of withering to birdsing of the same feather flock together refreshes storage, in the controller control that participates under the control of microprocessor U17 under the new operating mode.
1 pin of microprocessor U17,2 pin connect 22 pin, 29 pin of storage dynamic U19 respectively; 3 pin of microprocessor U17,4 pin connect 30 pin, 2 pin of storage dynamic U19 respectively; 5 pin of microprocessor U17 connect the P15 pin of microprocessor U1; 8 pin of microprocessor U17 connect the P17 pin of microprocessor U1; 38 pin of microprocessor U17 connect 2 pin of triode Q7, and by capacitor C 30 ground connection; 3 pin of triode Q7 connect the VCC high level and by capacitor C 29 ground connection, 1 pin of triode Q7 links to each other with the P03 pin of microprocessor U1 by resistance R 35; 24 pin of the 37 pin connected storage U16 of microprocessor U17; 29 pin of the 36 pin connected storage U16 of microprocessor U17; 34 pin of microprocessor U17 connect the TXD0 mouth P14 pin of microprocessor U1; 33 pin of microprocessor U17 connect the RXD0 mouth P13 pin of microprocessor U1; Connect crystal oscillator Y2 between 9 pin of microprocessor U17 and 10 pin, and 9 pin, 10 pin are respectively by capacitor C 24, capacitor C 25 ground connection.The 11 pin ground connection of microprocessor U17,13 pin connect the VCC high level and pass through capacitor C 26 ground connection; 14 pin-18 pin of microprocessor U17 connects 27 pin, 26 pin, 23 pin, 25 pin, 31 pin of storage dynamic U19 respectively; 19 pin-26 pin of microprocessor U17 connects 9 pin-2 pin of latch U18 respectively; 28 pin of microprocessor U17,29 pin, 48 pin, 49 pin connect 28 pin, 4 pin, 1 pin, 24 pin of storage dynamic U19 respectively; 52 pin of microprocessor U17 connect 11 pin of latch U18.
5 pin-12 pin of storage dynamic U19 connects 12 pin-19 pin of latch U18 respectively.2 pin-9 pin of latch U18 connects 13 pin-15 pin, 17 pin-20 pin of storage dynamic U19 respectively, and 20 pin of latch U18 connect the VCC high level and pass through capacitor C 27 ground connection; 32 pin of storage dynamic U19 connect the VCC high level and pass through capacitor C 28 ground connection; 13 pin of microprocessor U17 connect the VCC high level and pass through capacitor C 26 ground connection.
Among Figure 14: the receiving node unit of forming the CAN communication module by CAN communication sink U21.
1 pin of CAN communication sink U20 connects the CANRX1 mouth P115 pin of microprocessor U1, and 4 pin of CAN communication sink U20 connect the CANTX1 mouth P114 pin of microprocessor U1; The 2 pin VCC high level of CAN communication sink U20 also pass through capacitor C 31 ground connection, 3,8 pin ground connection; Be connected with resistance R 36 between 6,7 pin of CAN communication sink U20 and link to each other 2 pin ground connection of CAN communication interface with 1,3 pin of CAN communication interface.
Among Figure 15: the stepper motor of microprocessor U1 output and the drive signal of solenoid valve, after the anti-jamming circuit isolation through photo coupler OP5, OP6 composition, drive triode and H bridge circuit and analog line driver QE1 circuit respectively, charge flow rate control is carried out in drive stepping motor MG1 action and solenoid valve DJ1 action.
The P111 pin of microprocessor U1 connects photo coupler OP5 the 1st pin, the 2nd pin ground connection by resistance R 37; The 3rd pin of photo coupler OP5 connects the VDD high level by resistance R 39, and the 4th pin connects 1 pin of triode Q1.Be connected with resistance R 38 between 1 pin of triode Q1 and 2 pin; 3 pin of triode Q1 connect the VDD high level by resistance R 40, also connect 1 pin of triode Q2 by resistance R 41, also connect 1 pin of triode Q6 by resistance R 42.The 2 pin ground connection of triode Q2,3 pin of triode Q2 connect the negative pole of stepper motor MG1.1 pin of triode Q5 connects the VDD high level by resistance R 46; 1 pin of triode Q5 also connects 3 pin of triode Q6; The 2 pin ground connection of triode Q5,3 pin connect the positive pole of stepper motor MG1; 3 pin of triode Q5 also connect 1 pin of triode Q4 by resistance R 45; 3 pin of triode Q4 connect the negative pole of stepper motor MG1; 2 pin of triode Q4 connect VDD high level high level.3 pin of triode Q3 connect the positive pole of stepper motor MG1; 2 pin of triode Q3 connect the VDD high level, and 1 pin of triode Q3 connects the negative pole of stepper motor MG1 by resistance R 43.
Be connected with resistance R 44 and voltage-stabiliser tube DE2, the DE1 of series connection successively between the positive pole of stepper motor MG1 and the negative pole.
The P110 pin of microprocessor U1 connects photo coupler OP6 the 1st pin, the 2nd pin ground connection by resistance R 51; Photo coupler OP6 the 3rd pin connects the 12V high level; Photo coupler OP6 the 4th pin links to each other with 1 pin of power drive pipe QE1 by resistance R 48, by resistance R 49 ground connection.The 2 pin ground connection of power drive pipe QE1; 3 pin of power drive pipe QE1 connect 1 pin of solenoid valve DJ1, and by reference diode D1 the be connected in series parallel circuit formed by capacitor C 32 and resistance R 50 and 2 pin of solenoid valve DJ1.Be input to 2 pin of solenoid valve DJ1 behind 12V high level input process resistance R 47 step-downs and capacitor C 33 shaping filters.
Among Figure 16: microprocessor U1 carries out the IGNITION CONTROL of motor by to the ratio of declaring of input signal with feedback signal by the power drive pipe.
2,4,6, the 8 pin ground connection of switching value driver U21,10,12,14,16 pin connect the 5V high level by resistance R 52.1,3,5,7 pin link to each other with the 4th pin of power drive pipe BT1-BT4 respectively.
2,4,6, the 8 pin ground connection of switching value driver U22,10,12,14,16 pin connect+5V voltage, and by capacitor C 35 ground connection.9,11,13,15 pin link to each other with the 2nd pin of power drive pipe BT1-BT4 respectively.
9,11,13,15 pin of switching value driver U21 and 1,3,5,7 pin of U22 insert the P30-P37 pin of microprocessor U1.
The 1 pin ground connection of power drive pipe BT1-BT4, the 3rd pin of power drive pipe BT1-BT4 connects the 12V high level, and by capacitor C 34 ground connection; The 5th pin of power drive pipe BT1-BT4 joins 1,4 pin of booster T1-T4, another section ground connection of voltage-stabiliser tube DE3-DE6 with 1 pin of booster T1-T4, voltage-stabiliser tube DE3-DE6 one section respectively.
3 pin of booster T1-T4 connect spark plug 1-4 respectively.
Among Figure 17: microprocessor U1 carries out the oil spout control of motor by to the ratio of declaring of input signal with feedback signal by analog line driver QE2-QE5.
2,4,6, the 8 pin ground connection of switching value driver U24,10,12,14,16 pin connect the 5V high level and pass through capacitor C 37 ground connection.9,11,13,15 pin link to each other with the 1st pin of analog line driver QE2-QE5 respectively.
2,4,6, the 8 pin ground connection of switching value driver U23,10,12,14,16 pin connect the 5V high level by resistance R 53.9,11,13,15 pin insert microprocessor U1.1,3,5,7 pin link to each other with the 2nd pin of analog line driver QE2-QE5 respectively.
1,3,5,7 pin of switching value driver U24 and 9,11,13,15 pin of switching value driver U23 insert the P170-P177 pin of microprocessor U1.
The 3rd pin order of analog line driver QE5-QE2 links to each other the other end of oil sprayer M1-M4, diode D5-D2 diode the other end ground connection with an end, diode D5-D2 one end of oil sprayer M1-M4.
The 2nd pin of analog line driver QE2-QE5 connects the 12V high level by resistance R 54-R57 respectively, and by capacitor C 36 ground connection.
Among Figure 18,19: after the anti-jamming circuit that microprocessor U1 output control signal is formed through photo coupler OP7-OP22 was isolated, the drive circuit by power drive pipe, high-power driving pipe U29 form carried out the control of switching value.
2,4,6, the 8 pin ground connection of switching value driver U25; 10,12,14,16 pin connect the VCC high level, and by capacitor C 40 ground connection; 9,11,13,15 pin insert the 1st pin of photo coupler OP11-OP14, photo coupler OP11-OP14 the 2nd pin ground connection; The 3rd pin connects the VCC high level, and by capacitor C 38 ground connection; Switching value driver U25 1,3,5,4 pin of pin by resistance R 70-R72, the power drive that is linked in sequence pipe BT5, BT6, BT7; 7 pin connect 3,5 pin of high-power driving pipe U29 by resistance R 73.
2,4,6, the 8 pin ground connection of switching value driver U26; 10,12,14,16 pin connect the VCC high level, and by capacitor C 41 ground connection; 1,3,5,7 pin insert the 3rd pin of photo coupler OP7-OP10; The 4th pin of photo coupler OP7-OP10 connects the VCC high level, and by capacitor C 39 ground connection; The 2nd pin ground connection.9,11,15 pin of switching value driver U26 are by be linked in sequence successively 2 pin of power drive pipe BT5, BT6, BT7 of resistance R 666, R67, R68, and by resistance R 72, R73, R74 ground connection; 15 pin connect 2,6 pin of high-power driving pipe U27 by resistance R 69, and pass through resistance R 75 ground connection.
The 4th pin of photo coupler OP11-OP14 and the 1st pin of photo coupler OP7-OP10 insert the P100-P107 pin of microprocessor U1 respectively by resistance R 62-R65 and resistance R 58-R61.
1,7,8,11,14 pin of high-power driving pipe U27 connect the VCC high level, and by capacitor C 43 ground connection; 4 pin ground connection.
The 1 pin ground connection of power drive pipe BT5, BT6, BT7; 3 pin connect the VCC high level, and by capacitor C 42 ground connection, 5 pin order successively drive electric fan switch, air-conditioning power switch, idle valve; 12,13 pin of high-power driving pipe U27 drive master power switch.
2,4,6, the 8 pin ground connection of switching value driver U28; 10,12,14,16 pin connect the VCC high level, and by capacitor C 46 ground connection; 9,11,13,15 pin insert the 1st pin of photo coupler OP19-OP22, the 2nd pin ground connection of photo coupler OP19-OP22; The 3rd pin connects the VCC high level, and by capacitor C 44 ground connection; 1,3,5,7 pin of switching value driver U28 are by be linked in sequence successively 4 pin of power drive pipe BT8-BT11 of resistance R 88-R91.
2,4,6, the 8 pin ground connection of switching value driver U29; 10,12,14,16 pin connect the VCC high level, and by capacitor C 47 ground connection; 1,3,5,7 pin insert the 4th pin of photo coupler OP15-OP18; The 3rd pin connects the VCC high level, and by capacitor C 45 ground connection; The 2nd pin ground connection, switching value driver U31 9,11,15, pin is by be linked in sequence successively 2 pin of power drive pipe BT8-BT11 of resistance R 84-R87, and by resistance R 92-R95 ground connection.
The 4th pin of photo coupler OP19-OP22 and the 1st pin of photo coupler OP15-OP18 insert the P120-P127 pin of microprocessor U1 respectively by resistance R 80-R83 and resistance R 76-R79.
The 1 pin ground connection of power drive pipe BT8-BT11; 3 pin connect the VCC high level, and by capacitor C 48 ground connection, 5 pin are order driving malfunction indication alarm switch, air inlet resonance ejector switch, control mixer switch, LPG air feed shut-off valve successively.
Among Figure 20:: form system's write-in program communication circuit by asynchronous serial communication processor U30, port DB9 and electronic switch U31 etc.Form system failure code display circuit by register U32 and 8 sections nixie tube DS, to declare than system failure information.
Be connected with capacitor C 49,2 pin between 1 pin of asynchronous serial communication processor U30 and 3 pin and connect the VCC high level by capacitor C 52, VCC high level input end is by capacitor C 53 ground connection.Be connected with capacitor C 50 between 4 pin of asynchronous serial communication processor U30 and 5 pin; 6 pin of asynchronous serial communication processor U30 are by capacitor C 51 ground connection; 7 pin of asynchronous serial communication processor U30 and 8 pin are connected 2 pin and 3 pin of port DB9 respectively, and 9 pin of asynchronous serial communication processor U30 and 10 pin are connected 2 pin and 10 pin of electronic switch U31 respectively; The 15 pin ground connection of asynchronous serial communication processor U30,16 pin connect the VCC high level and pass through capacitor C 54 ground connection.
12 pin of electronic switch U31 are connected the P07 pin of microprocessor U1 with 13 pin; 1 pin of electronic switch U31 and 11 pin are connected P112 pin and the P113 pin of microprocessor U1 respectively.
1 pin of register U32 is connected the P112 pin of microprocessor U1 with 2 pin; 8 pin of register U32 connect the P113 pin of microprocessor U1.The be linked in sequence 1-8 pin of 8 sections nixie tube DS of the 3-6 pin of register 32,10-13 pin
Among Figure 21: the control signal of microprocessor U1 is after phase inverter U33 and photo coupler OP23 processing, be input among the transport and placing device U34C after transport and placing device U34D and slsllwwde circuit filtering thereof, computing amplification processing through signal that filtering that transport and placing device U34A, transport and placing device U34B and slsllwwde circuit thereof are formed and auto-cruising control processing of circuit are produced and the simulated oil gate signal formed by adjustable resistance VR4, produce a control signal and drive corresponding switching value.
Be input to first pin of photo coupler OP231 behind the P130 pin process phase inverter U33 of microprocessor U1,2, the 4 pin ground connection of photo coupler OP23.3 pin link to each other with 3 pin of transport and placing device U34 by resistance R 96, and by capacitor C 55 ground connection; 2 pin of transport and placing device U34 and resistance R 97 and adjustable resistance VR3 form signal filter circuit, through the 1 pin output of transport and placing device U34, pass through 5 pin of resistance R 98 connection transport and placing device U34 through 1 pin of transport and placing device U34, and pass through capacitor C 56 ground connection; 6 pin of transport and placing device U34,7 pin connect by resistance R 99, form signal auto-cruising control circuit, and the 7 pin output through transport and placing device U34 links to each other with 10 pin of transport and placing device U34 through resistance R 100, and 10 pin of transport and placing device U34,8 pin link to each other by resistance R 101.
The simulated oil gate signal of being made up of adjustable resistance VR4 is connected with 12 pin of transport and placing device U34 by resistance R 102, and 13 pin of transport and placing device U34,14 pin link to each other by resistance R 104; 12 pin of transport and placing device U34 are by resistance R 103 ground connection; The simulated oil gate signal connects 9 pin of transport and placing device U34 through 14 pin of transport and placing device U34 by resistance R 105, and passes through resistance R 106 ground connection.
Transport and placing device U34 after processing is amplified in computing, produces the 8 pin output driving switch amount of a control signal by transport and placing device U34 to its signal.
Among Figure 22: throttle position signal amplifies the P56 pin that is input to microprocessor U1 after handling through transport and placing device U35 and slsllwwde circuit filtering thereof, computing, and its aperture is declared ratio.
Throttle position signal is connected with 2 pin of transport and placing device U35 by resistance R 107, and 2 pin of transport and placing device U35,1 pin link to each other by resistance R 109; 3 pin of transport and placing device U35 are by resistance R 108 ground connection; Throttle position signal connects the P56 pin of microprocessor U1 through 1 pin of transport and placing device U35 by resistance R 110, and passes through resistance R 111 ground connection.
Among Figure 23: the four phase step motor drive circuit of forming by distributor U36, Darlington transistor U37, power amplifier U38 and peripheral circuit thereof, have characteristics such as anti-interference strong, stable performance, characteristic are good, efficient height, realize that by microprocessor U1 fuel air butterfly valve ratio is adjusted and the automatic control of the auxiliary adjustment of mixer.
The 3rd, 4,9 pin of distributor U36 link to each other with P131, P132, the P133 pin of microprocessor U1, by signal output the carrying out startup of stepper motor and the automatic control of speed of microprocessor U1.
16 pin of distributor U36 connect the VDD high level; High level VDD high level is by capacitor C 58 ground connection.5,6,7 pin of distributor U36 connect the VDD high level by resistance R 112; The 8 pin ground connection of distributor U36.
10,11,12,13 pin of distributor U36 link to each other successively with 1,2,3,4 pin of Darlington transistor U39; 13,14,15,16 pin of Darlington transistor U37 link to each other successively with 12,6,10,4 pin of power amplifier U38, and connect the VDD high level by resistance R 113-R116 respectively; 2 pin of power amplifier U38 link to each other with 3 pin of transistor Q8 by resistance R 118; 1 pin of transistor Q8 connects the VDD high level by resistance R 117, and it directly connects the VDD high level and passes through capacitor C 60 ground connection, to improve the output current of power amplifier U38.
18, the 16 pin ground connection of power amplifier U38,3,13 pin are respectively by resistance R 119, resistance R 120 ground connection; 14 pin of power amplifier U38 connect the VCC high level; 8 pin connect the VCC high level by voltage-stabiliser tube DE6; High level VCC high level is by capacitor C 59 ground connection.
11,9,17,7,5,15 pin of power amplifier U38 respectively with the corresponding successively connection of stepper motor MG2, controlling and driving stepper motor MG2.
Among Figure 24: after the anti-jamming circuit that microprocessor U1 output control signal is formed through photo coupler is isolated,, carry out the drive controlling of respective switch amount by the drive circuit of power drive pipe.
2,4,6, the 8 pin ground connection of switching value driver U39; 10,12,14,16 pin connect the VCC high level, and by capacitor C 63 ground connection; 9,11,13,15 pin insert the 1st pin of photo coupler OP27-OP30, the 2nd pin ground connection of photo coupler OP27-OP30; The 3rd pin connects the VCC high level, and by capacitor C 60 ground connection; 1,3,5,7 pin of switching value driver U38 are by be linked in sequence successively 4 pin of power drive pipe BT12-BT15 of resistance R 133-R136.
2,4,6, the 8 pin ground connection of switching value driver U40; 10,12,14,16 pin connect the VCC high level, and by capacitor C 64 ground connection; 1,3,5,7 pin insert the 4th pin of photo coupler OP23-OP26; The 3rd pin of electric coupler OP23-OP26 connects the VCC high level, and by capacitor C 62 ground connection; The 2nd pin ground connection, switching value driver U40 9,11,15, pin is by be linked in sequence successively 2 pin of power drive pipe BT12-BT15 of resistance R 129-R132, and by resistance R 137-R140 ground connection.
The 4th pin of photo coupler OP27-OP30 and the 1st pin of photo coupler OP23-OP26 insert the P140-P147 pin of microprocessor U1 respectively by resistance R 125-R128 and resistance R 121-R124.
The 1 pin ground connection of power drive pipe BT12-BT15; 3 pin connect the VCC high level, and pass through capacitor C 650 ground connection, and 5 pin adjust control valve along the VNT turbosupercharging successively and fluid power is adjusted control valve (the band supercharged engine is used), also have 2 tunnel standby driving ports.