The utility model content
In view of this, the utility model is to provide a kind of control circuit board of frequency converter, concentrates on single DSP, limitation functional development, the problem that arithmetic speed is slow to solve foregoing circuit plate controlled function.
For addressing the above problem, the utility model provides a kind of control circuit board of frequency converter, comprising:
A DSP who connects peripheral interface, the 2nd DSP of its main operational control, by connecting FPGA communication, FPGA handles the control word of the 2nd DSP and connects more than one at least pulse width modulation (PWM) interface between a DSP, the 2nd DSP.
Preferably, described peripheral interface is that CAN bus interface, RS485/RS232 interface, analog quantity input/output interface are or/and the digital quantity input/output interface.
Preferably, the quantity of described FPGA is one or two.
Preferably, a described DSP also connects in the PWM interface one.
Circuit board in the present embodiment, a DSP handles the control of peripheral interface circuit, and handles simple control signal and send by the PWM interface that connects; The 2nd DSP carries out the s operation control of algorithm and is connected with a DSP by FPGA, FPGA sends by the PWM that connects after with the control word computing of the 2nd DSP, owing to adopt two DSP and FPGA to handle computing respectively, the more single DSP of processing speed compares, speed improves a lot, and the expansion of the function on each chip does not influence other chip, is convenient to function upgrading.
Embodiment
For clearly demonstrating the technical scheme in the utility model, provide preferred embodiment below and be described with reference to the accompanying drawings.
Referring to Fig. 1, Fig. 1 is the structure chart among the embodiment, and control circuit board adopts 2 dsp chips (digital signal processor), a DSP (being DSP1) and the 2nd DSP (being DSP2) and fpga chip.DSP1, DSP2 connect by FPGA and communicate.
Wherein, DSP1 mainly is responsible for the operation logic processing of frequency converter, the processing of peripheral interface etc.; The processing of system when DSP2 mainly is responsible for core control algolithm, the fault of frequency converter, calculating that power device drives required drive controlling word and transmission etc.
FPGA mainly comprises 2 partial functions, can adopt a slice, also can adopt two, when adopting a slice, can logically be divided into 2 parts.Be divided into zone 1 and zone 2, the communication of DSP1 and DSP2 is realized in zone 1, and guarantees that communication can not conflict; Realize calculating and processing from the control word of DSP2 in zone 2.
The peripheral interface that DSP1 connects comprises CAN bus interface, RS485/RS232 interface, special-purpose AI (analog quantity input)/AO (output) interface, special-purpose DI (digital quantity input)/DO (output) interface, also can connect other serial line interface as required.
The drive signal special purpose interface quantity of circuit board can be provided with as required, comprises 4 in an embodiment, and promptly PWM interface 1, PWM interface 2, PWM interface 3, PWM interface 4 all can be used as the used PWM of motor-driven (pulse width modulation) output interface.Wherein, in the PWM interface 1 control signal from DSP1 or from FPGA; The interface signal of PWM interface 2, PWM interface 3, PWM interface 4 is all from FPGA.
When control signal is fairly simple, can be directly handle the back and send by PWM1 by DSP1, computing if desired, then DSP2 sends by PWM interface 2, PWM interface 3, the PWM interface 4 that connects after by FPGA calculation process control word.
Each chip and interface can raise in the position and put in order among Fig. 1, but do not influence the operate as normal of entire circuit plate.
Circuit board in the present embodiment, a DSP handles the control of peripheral interface circuit, and handles simple control signal and send by the PWM that connects; The 2nd DSP carries out the s operation control of algorithm and is connected with a DSP by FPGA, FPGA sends by the PWM that connects after with the control word computing of the 2nd DSP, owing to adopt two DSP and FPGA to handle computing respectively, the more single DSP of processing speed compares, speed improves a lot, and the expansion of the function on each chip does not influence other chip, is convenient to function upgrading.
For the control circuit board of institute's elaboration frequency converter among each embodiment of the utility model, all within spirit of the present utility model and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within the protection range of the present utility model.