CN201191369Y - High-speed electronic jacquard machine main controller capable of implementing multi-task parallel processing - Google Patents
High-speed electronic jacquard machine main controller capable of implementing multi-task parallel processing Download PDFInfo
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- CN201191369Y CN201191369Y CNU2008200870777U CN200820087077U CN201191369Y CN 201191369 Y CN201191369 Y CN 201191369Y CN U2008200870777 U CNU2008200870777 U CN U2008200870777U CN 200820087077 U CN200820087077 U CN 200820087077U CN 201191369 Y CN201191369 Y CN 201191369Y
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Abstract
The utility model discloses a high-speed electronic jacquard machine master controller capable of realizing multitask parallel processing, which uses a CPU chip AT91SAM9263 as a core, a CAN controller in the CPU chip AT91SAM9263 is connected with a CAN bus, an Ethernet controller is connected with an Ethernet, a JTAG port is connected with a portable computer, an output signal port is connected with output signals, an input signal port is connected with input signals, a USB equipment interface is connected with the portable computer, a USB main interface 2 is connected with an external USB flash disk, and a USB main interface 1 is connected with an internal USB flash disk. The utility model has higher capacity to process orders and data, and has simple structure and easy operation.
Description
Technical field
The utility model belongs to the jacquard technical field, relates to a kind of high-velocity electrons jacquard primary controller that can realize the multitask parallel processing.
Background technology
The ARM microprocessor is a kind of as the embedded system microprocessor, various product markets such as Industry Control, consumer electronics product, communication system, network system, wireless system have been spreaded all over, occupied the market share of 32 risc microcontrollers more than 75% approximately, the ARM technology is progressively penetrating into the various aspects of our life.ARM7, ARM9, ARM9E and ARM10 are 4 general processor series, and each series provides the relative particular performances of a cover to satisfy the demand in different application field.
Adopt the ARM9 microprocessor of RISC framework generally to have following characteristics: to support the DSP instruction set, be suitable for the occasion that needs high-speed digital signal to handle; 5 grades of integer streamlines, it is higher that efficient is carried out in instruction; Support 32 ARM instruction set and 16 Thumb instruction set; Support 32 high speed AMBA bus interface; Support the VFP9 floating-point to handle coprocessor; The MMU of full performance supports Windows CE, multiple main flow embedded OSs such as Linux, Palm OS; MPU supports real time operating system; Support Data Cache and instruction Cache, have higher instruction and data processing power; Dominant frequency reaches as high as 300MIPS.The ARM9 series microprocessor is mainly used in fields such as wireless device of future generation, digital consumer, imaging device, Industry Control, memory device and the network equipment.
If can adopt the process chip of the ARM9 microprocessor of RISC framework as high-velocity electrons jacquard primary controller, primary controller has higher instruction and data processing power.
The utility model content
At problems of the prior art, the utility model purpose is to design a kind of technical scheme that can realize the high-velocity electrons jacquard primary controller of multitask parallel processing is provided.
For achieving the above object, the technical scheme that the utility model is taked is: a kind of high-velocity electrons jacquard primary controller that can realize the multitask parallel processing, with central processing element AT91SAM9263 is core, CAN controller among the central processing element AT91SAM9263 is connected with the CAN bus, ethernet controller is connected with Ethernet, system debug and program download port jtag port are connected with portable machine, the output signal port is connected with output signal, the input signal port is connected with input signal, the USB device interface is connected with portable machine, USB main interface 2 is connected with outside flash disk, and USB main interface 1 is connected with inner flash disk.
Because the utility model adopts the process chip of central processing element AT91SAM9263 as high-velocity electrons jacquard primary controller, so primary controller has higher instruction and data processing power.And the utility model operation simple in structure, easy.
Description of drawings
Fig. 1 is the utility model principle schematic.
Embodiment
Below in conjunction with Figure of description the utility model is elaborated, and provides embodiment.
As shown in Figure 1, a kind of high-velocity electrons jacquard primary controller that can realize the multitask parallel processing, it is characterized in that, with central processing element AT91SAM9263 is core, CAN controller among the central processing element AT91SAM9263 is connected with the CAN bus, ethernet controller is connected with Ethernet, system debug and program download port JTAG are connected with portable machine, the output signal port is connected with output signal, the input signal port is connected with input signal, the USB device interface is connected with portable machine, and USB main interface 2 is connected with outside flash disk, and USB main interface 1 is connected with inner flash disk.
High-velocity electrons jacquard primary controller with touch-screen and 10 cun color LCD screen LCD as man-machine interface; CAN bus interface and Ethernet interface are provided; Inner flash disk places control box inside, is used for storing pattern data and various technological parameter; USB main interface 2 is used to connect external USB equipment, comprises the dapple flash disk of storage, USB mouse, USB keyboard etc.; The USB device interface is used for directly and the portable machine swap data; Input signal comprises the code device signal of indicating current main spindle's or near switching signal, emergent stop signal, loom astern signal etc.; Output signal is selected the latitude signal, is stopped prizing signal, empty latitude signal etc.; System debug and program download port JTAG are used for system debug and program is downloaded; Asynchronous serial port UART port is used for the connecting terminal display platform, is convenient to carry out degree of depth debugging.
The utility model is selected the central processing element of the AT91SAM9263 of ARM9 kernel as high-velocity electrons jacquard master controller for use, central processing element AT91SAM9263 has embedded an ARM926EJ-S based on 200MIPS (TM) microcontroller MCU, 27 direct memory access (DMA) DMA passages have been adopted, the peripheral direct memory access (DMA) controller PDC that comprises Atmel 18 passages, one 9 layers bus matrix and be used for two of data/indication close-coupled formula internal memory TCM other buses is so that strengthen cpu performance and provide up to message transmission rate on the sheet of 41.6Gbps.Two external bus interface EBI support the external memory that gigabyte is above.Man-machine interface peripherals comprises a camera interface, TFT/STN lcd controller, 6 channel audio front-end interface AC97, I2S and a 2D graphics coprocessor on the sheet, and this processor can alleviate setting-out, block transmission, the polygon of CPU and fill and montage function burden.Networking peripherals comprises usb host and equipment, 10/100 Ethernet media access controller Ethernet MAC and the 1Mbps controller local area network CAN of a 12Mbps.Also have four universal synchronous/asynchronism transceiver USART, two the synchronous parallel interface SPI of 50Mbps, CompactFlash (R), SDIO (MCI) and two-wire interface TWI in addition, this two-wire interface TWI can be connected to such as GPRS modulator-demodular unit and Wi-Fi (R) etc. Atmel on the wired and wireless communication module and keep in SRAM on the sheet that has disposed 11 buses and 96 kilobyte on the central processing element AT92SAM9263.Should can partly be set at close-coupled formula data and indication internal memory by temporary SRAM.Bus can provide transmission channel on many sheets arranged side by side and amount to bandwidth on the sheet of 41.6Gbps.
The utility model adopts μ C/OS-II embedded OS, it be one complete, the formula real-time multi-task kernel of taking the lead of portable, curing, cutting can carry out multi-task parallel and handle and collaborative work.The characteristics of the maximum of uC/OS-II are exactly its source code full disclosure, and this is that other expensive commercial operation system is incomparable.In addition, it only comprises a fraction of assembly language code relevant with microprocessor with ANSI C language compilation, and portability is very strong.On the basis of μ C/OS-II embedded OS, also need transplant the figure back-up system UCGUI in light-duty IP agreement LWIP and the Embedded Application, the former is that an ICP/IP protocol stack of increasing income realizes that this protocol stack is specially adapted to realize network function on the small-sized platform of resource-constrained; A kind of general embedded graphical interface of user software of the latter, it provides the effective graphical user interface that is independent of outside processor and the lcd controller for the application program of any use figure LCD, can be applied to the single task role environment, also can be applied in the multitask environment.The system software scheme need cooperate hardware module to finish every control requirement, and farthest guarantees the real-time and the reliability of system.
The every content that can associate or derive from the disclosed content of the utility model is all thought protection domain of the present utility model.
Claims (3)
1, a kind of high-velocity electrons jacquard primary controller that can realize the multitask parallel processing, it is characterized in that, with central processing element AT91SAM9263 is core, CAN controller among the central processing element AT91SAM9263 is connected with the CAN bus, ethernet controller is connected with Ethernet, system debug and program download port JTAG are connected with portable machine, the output signal port is connected with output signal, the input signal port is connected with input signal, the USB device interface is connected with portable machine, USB main interface 2 is connected with outside flash disk, and USB main interface 1 is connected with inner flash disk.
2, a kind of high-velocity electrons jacquard primary controller that can realize the multitask parallel processing according to claim 1, it is characterized in that, touch-screen control mouth among the described central processing element AT91SAM9263 is connected with touch-screen by touch screen interface ADS7843, and lcd controller is connected with LCD.
3, a kind of high-velocity electrons jacquard primary controller that can realize the multitask parallel processing according to claim 1 is characterized in that the asynchronous serial port among the described central processing element AT91SAM9263 is connected with display terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200870777U CN201191369Y (en) | 2008-05-09 | 2008-05-09 | High-speed electronic jacquard machine main controller capable of implementing multi-task parallel processing |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200870777U CN201191369Y (en) | 2008-05-09 | 2008-05-09 | High-speed electronic jacquard machine main controller capable of implementing multi-task parallel processing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201191369Y true CN201191369Y (en) | 2009-02-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008200870777U Expired - Fee Related CN201191369Y (en) | 2008-05-09 | 2008-05-09 | High-speed electronic jacquard machine main controller capable of implementing multi-task parallel processing |
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| Country | Link |
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| CN (1) | CN201191369Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102094278A (en) * | 2009-11-27 | 2011-06-15 | 施托布利法韦日公司 | System and method for controlling Jacquard mechanism, Jacquard mechanism and loom provided with such system |
| US20230271628A1 (en) * | 2022-02-25 | 2023-08-31 | Hitachi Astemo, Ltd. | Distributed processing of vehicle sensor data |
-
2008
- 2008-05-09 CN CNU2008200870777U patent/CN201191369Y/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102094278A (en) * | 2009-11-27 | 2011-06-15 | 施托布利法韦日公司 | System and method for controlling Jacquard mechanism, Jacquard mechanism and loom provided with such system |
| CN102094278B (en) * | 2009-11-27 | 2014-10-15 | 施托布利法韦日公司 | System and method for controlling Jacquard mechanism, Jacquard mechanism and loom provided with such system |
| US20230271628A1 (en) * | 2022-02-25 | 2023-08-31 | Hitachi Astemo, Ltd. | Distributed processing of vehicle sensor data |
| US11987266B2 (en) * | 2022-02-25 | 2024-05-21 | Hitachi Astemo, Ltd. | Distributed processing of vehicle sensor data |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090204 |