CN201156181Y - Nixie tube electronic clock circuit - Google Patents
Nixie tube electronic clock circuit Download PDFInfo
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- CN201156181Y CN201156181Y CNU200820101267XU CN200820101267U CN201156181Y CN 201156181 Y CN201156181 Y CN 201156181Y CN U200820101267X U CNU200820101267X U CN U200820101267XU CN 200820101267 U CN200820101267 U CN 200820101267U CN 201156181 Y CN201156181 Y CN 201156181Y
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Abstract
The utility model relates to a nixietube electronic clock circuit, which comprises a drive chip, co-anode nixietubes connected with the drive chip, a second dotter, a sound output circuit and buttons, and the control bits of the drive chip used by the buttons are part of the stroke segment control bits of the nixietubes. The P2.3 and the P2.4 pins of the drive chip are connected together through a switch (SW1). The P2.7 pin of the drive chip is connected with one end of a manual switch (K1), the other end of the manual switch (K1) is respectively connected with Vcc and the ground, and the manual switch (K1) has three states: grounding, Vcc connection and disconnection. The nixietube electronic clock circuit has the following advantages: while the performance of the nixietubes goes through a delivery test, the performance of the buttons is also tested, so the performance of each button does not need to be independently tested, thus greatly shortening the production period of products; the display of time, day and month is controlled by a port arranged inside the drive chip, and grounding, Vcc connection and disconnection realize three functions; the constant lightening of light-emitting diodes is controlled by the short-circuiting of two ports, and after the light-emitting diodes are switched off, the drive chip consumes extremely little electricity.
Description
[technical field]
The utility model is about a kind of charactron electronic clock, is meant a kind of charactron electronic clock circuit especially.
[background technology]
Existing charactron electronic clock circuit comprises that model is chip for driving, current-limiting resistance R1, R2, R3, R4, R5, R6, R7, four charactron LD1, LD2, LD3, LD4, second point, triode Q1, Q2, Q3, Q4, loudspeaker, button S1, S2, S3, S4, S5 that are total to anode of SG8200 as shown in Figure 1.Charactron LD1, LD2, LD3, LD4 are respectively a hour high position, hour low level, a minute high position, minute low level, and wherein second, point was between charactron LD2 and LD3.
The a of each charactron, b, c, d, e, f, the g pin is the negative electrode of eight sections light emitting diodes of charactron, this charactron comprises eight sections light emitting diodes, seven sections that promptly comprise " 8 " add a point, each pin is connected to chip for driving by current-limiting resistance respectively, the A pin of each charactron is connected to the P2.6 pin of chip for driving by current-limiting resistance R7, the B pin is connected to the P2.5 pin of chip for driving by current-limiting resistance R6, the C pin is connected to the P2.4 pin of chip for driving by current-limiting resistance R5, the D pin is connected to the P2.3 pin of chip for driving by current-limiting resistance R4, the E pin is connected to the P2.2 pin of chip for driving by current-limiting resistance R3, the F pin is connected to the P2.1 pin of chip for driving by current-limiting resistance R2, the G pin is connected to the P2.0 pin of chip for driving by current-limiting resistance R1, the P4.3 of chip for driving, P4.2, P4.1, the P4.0 pin is respectively by resistance R 8, R9, R10, R11 is connected to triode Q1, Q2, Q3, the base stage of Q4, triode Q1, Q2, Q3, the collector of Q4 is connected to the common anode of charactron, triode Q1, Q2, Q3, the emitter of Q4 is connected to power Vcc, the P2.7 pin of chip for driving is connected to a second point by a resistance R 12, second, the feeder ear of point was connected to Vcc, chip for driving is passed through the flicker of P2.7 foot control system point second, give each charactron power supply by P4.0～P4.3 pin, triode plays the effect that electric current is amplified, control each charactron and whether lighted, whether lighted by the pen section of each charactron of P2.0～P2.6 foot control system.
The common anode of charactron is connected respectively to the anode of diode D1, D2, D3, D4, and the negative electrode of diode D1, D2, D3, D4 is connected to the P1.0 pin of chip for driving by a resistance R 13.Thereby the morning, afternoon, the alarm clock of control charactron, and integral point gives the correct time.
The P1.1 pin of chip for driving is connected to one or two ends that select K switch 1, the other end of this K switch 1 is unsettled and ground connection respectively, two select K switch 1 hand-guided, when two select K switch 1 unsettled, the charactron time showing is bright always, when two selected K switch 1 ground connection, the charactron time showing was extinguished, and it is without disturbance in bed to be convenient to evening.
The P1.2 of chip for driving～P1.5 pin is connected with button respectively, concrete annexation is as described below: the P1.2 pin of chip for driving is connected respectively to first end of button S2 and button S5, the P1.3 pin of chip for driving is connected respectively to first end of button S1 and button S4, the P1.4 pin of chip for driving is connected respectively to second end of button S1 and button S2, be connected to first end of button S3 simultaneously, the second end ground connection of button S3, the P1.5 pin of chip for driving is connected respectively to second end of button S4 and button S5, button S1 is for being provided with key, with button S2 (to raising), it is right that S3 (to downward modulation) finishes the accent of clock time jointly, and button S4 is an ESC Escape, button S5 is the greedy key of sleeping.
The P1.6 pin of chip for driving is connected to the base stage of a triode Q5 by a resistance, the grounded emitter of triode Q5, the collector of triode Q5 is connected to an end of loudspeaker, another termination VCC of loudspeaker, one inductance is connected in parallel on the two ends of loudspeaker, connect by this, finish the voice output of clock.
The P1.7 pin of chip for driving is by a K switch 2 ground connection, and 2 nations decide ground connection when K switch, not Alternation Display time and life of clock then, and when K switch 2 is opened, then clock Alternation Display time and life.
The charactron clock of this structure, be adopt chip for driving inside independently 4 ports (P1.2～P1.5) controls the function of 5 buttons, test the time, not only needs the test pen section so clock dispatches from the factory, whether the function that also will test button separately is normal, increases the production cycle; Time and life show whether ground connection is controlled for a port (P1.7) by chip for driving inside, and therefore, display mode has only 2 kinds, i.e. single display time and time, month day Alternation Display; Charactron shows a separate port of employing (P1.1) whether control by ground connection, but after reality was closed, the chip for driving internal current also reached the mA rank, and current drain is bigger; In addition, the chip for driving inside of this structure itself does not possess acoustic control and vibration control function, need reach this function and must add that independently acoustic control and vibrating function control at the power port that charactron shows, in this case, even if the light emitting diode of charactron does not show, the port of chip for driving still is in opening, and current drain is bigger; In addition, the sound control mode adopts acoustic control time-delay display mode, response lag.
[summary of the invention]
Technical problem to be solved in the utility model is at the problems referred to above, provides a kind of and shortens the production cycle, the charactron electronic clock circuit of power saving.
The utility model solves the problems of the technologies described above by the following technical programs: a kind of charactron electronic clock circuit, comprise chip for driving, be connected to four charactrons, second point, the sound out-put circuit of the common anode of chip for driving, and button, the control bit of the chip for driving that described button uses is the part of a charactron segment control bit.
This utility model further is specially:
The a pin of each charactron is connected to the P1.6 pin of chip for driving by current-limiting resistance R7, the b pin is connected to the P1.5 pin of chip for driving by current-limiting resistance R6, the c pin is connected to the P1.4 pin of chip for driving by current-limiting resistance R5, the d pin is connected to the P1.3 pin of chip for driving by current-limiting resistance R4, the e pin is connected to the P1.2 pin of chip for driving by current-limiting resistance R3, the f pin is connected to the P1.1 pin of chip for driving by current-limiting resistance R2, the g pin is connected to the P1.0 pin of chip for driving by current-limiting resistance R1, the P4.1 of chip for driving, P4.2, P4.3, the P4.4 pin is respectively by resistance R 28, R29, R30, R31 is connected to triode Q4, Q3, Q2, the base stage of Q1, triode Q1, Q2, Q3, the collector of Q4 is connected to the common anode of charactron, triode Q1, Q2, Q3, the emitter of Q4 is connected to power Vcc, the P1.7 pin of chip for driving is connected to a second point by a resistance R 26, and second, the feeder ear of point was connected to Vcc.
Comprise 5 buttons, the P1.0 of described chip for driving～P1.4 pin is connected respectively to first end of each button, and first end of each button is received high level by resistance R 16, R15, R14, R13, R12 respectively, and second end of each button is respectively by resistance R 17, R18, R19, R20, R21 ground connection.
The resistance of described resistance R 16, R15, R14, R13, R12 is 68K Ω, and the resistance of resistance R 17, R18, R19, R20, R21 is 4.7K Ω.
Described sound out-put circuit comprises the first piezo U1, triode Q5 and inductance L 1, the P2.6 pin of described chip for driving is connected to the base stage of triode Q5 by a resistance R 8, the grounded emitter of triode Q5, the collector of triode Q5 is connected to the end of the first piezo U1, another termination VCC of the first piezo U1, inductance L 1 is connected in parallel on the two ends of this first piezo U1.
The P2.3 pin of described chip for driving is connected by a switch SW 1 with the P2.4 pin.
The P2.7 pin of described chip for driving is connected to an end of a manual K switch 1, and the other end of hand switch K1 is connected to Vcc by a resistance R 9 respectively and by a resistance R 11 ground connection, hand switch K1 has three kinds of states: ground connection, meet Vcc, and unsettled.
Described charactron electronic clock circuit also comprises the acoustic control pulsing circuit, described acoustic control pulsing circuit comprises one second piezo U2, triode Q6, Q7, resistance R 22, R23, R24, R25, and capacitor C 2, first end of the second piezo U2 is connected respectively to first end of resistance R 25 and capacitor C 2, second end of capacitor C 2 is connected respectively to the base stage of first end and the triode Q6 of resistance R 24, the collector of triode Q6 is connected respectively to the base stage of first end and the triode Q7 of resistance R 23, the grounded emitter of triode Q6, the collector of triode Q7 is connected respectively to first end of resistance R 22 and the P4.0 pin of chip for driving, the grounded emitter of triode Q7, resistance R 22, R23, R24, the second termination Vcc of R25.
The temperature of described charactron electronic clock circuit shows that P2.1 and two pins of P2.2 of dependence chip for driving drive, the P2.1 pin of chip for driving is connected to first end of a capacitor C 1 by a resistance R 10, the P2.2 pin of chip for driving is connected to first end of capacitor C 1, the second end ground connection of capacitor C 1 by a thermistor RT.
The common anode of described charactron is connected respectively to the anode of diode D1, D2, D3, D4, and the negative electrode of diode D1, D2, D3, D4 is connected to the P2.5 pin of chip for driving by a resistance R 27.
The advantage of the utility model charactron electronic clock circuit is:
1, button adopts shared charactron to show the port of control, when dispatching from the factory the performance of test charactron, has also measured the performance of button simultaneously, thereby the performance that need not test each button has separately shortened production cycle of product greatly;
2, time and life show and to be controlled by a port of chip for driving inside, ground connection, meet Vcc and do not fetch and realize 3 kinds of functions:
A, single time showing.
B, time, month day Alternation Display (time 4S shows that a month day 2S shows).
C, time, month day, temperature Alternation Display (temperature 2S shows for time 4S demonstration, month day 2S).
3, whether LED shows always or enters sound, vibration control by whether short circuit is controlled between 2 ports, after LED closes, chip for driving is in holding state, do not need the port Close All used, chip for driving is under the extremely low power consumption state, and the power consumption of chip for driving own reaches below the 20uA;
4, chip for driving inside has one to trigger port, when this port voltage changes, illustrates that the outside has vibration and sound to reach certain decibel, chip for driving begins to show, response time if show selection acoustic control state, will carry out according to different demonstration selection modes in 1 second:
A, single display time mode show and extinguish after 4 seconds,
B, time, month day Alternation Display show and extinguish after 6 seconds,
C, time, month day, the temperature Alternation Display, show and extinguish after 8 seconds that chip for driving is extinguished in back 2 seconds in demonstration and entered dormant state, this mode has significantly reduced the power consumption of IC inside to electric current.
5, the sound control mode adopts easier than the conventional acoustic control obvious mode of delaying time, the circuit that power consumption is lower, deducted the head of narrowing commonly used in the past, adopted the piezo control mode, conventional time-delay mode adopts the capacitor discharge mode, adopts single triggering mode in novel circuit, and time-delay is by the chip for driving internal control, significantly reduce the quiescent dissipation of sound control circuit like this, finally reached battery saving mode.
[description of drawings]
The utility model will be further described in conjunction with the embodiments with reference to the accompanying drawings.
Fig. 1 is existing charactron electronic clock circuit figure.
Fig. 2 is the utility model charactron electronic clock circuit figure.
[embodiment]
Please consult Fig. 2 simultaneously, the utility model charactron electronic clock circuit.
Existing charactron electronic clock circuit as shown in Figure 2, comprise chip for driving, current-limiting resistance R1, R2, R3, R4, R5, R6, R7, four charactron LD1, LD2, LD3, LD4, second point, triode Q1, Q2, Q3, Q4, piezo, button S1, S2, S3, S4, S5 that are total to anode.Charactron LD1, LD2, LD3, LD4 are respectively a hour high position, hour low level, a minute high position, minute low level, and wherein second, point was between charactron LD2 and LD3.
The a of each charactron, b, c, d, e, f, the g pin is the negative electrode of eight sections light emitting diodes of charactron, this charactron comprises eight sections light emitting diodes, seven sections that promptly comprise " 8 " add a point, each pin is connected to chip for driving by current-limiting resistance respectively, concrete annexation is as follows: a pin of each charactron is connected to the P1.6 pin of chip for driving by current-limiting resistance R7, the b pin is connected to the P1.5 pin of chip for driving by current-limiting resistance R6, the c pin is connected to the P1.4 pin of chip for driving by current-limiting resistance R5, the d pin is connected to the P1.3 pin of chip for driving by current-limiting resistance R4, the e pin is connected to the P1.2 pin of chip for driving by current-limiting resistance R3, the f pin is connected to the P1.1 pin of chip for driving by current-limiting resistance R2, the g pin is connected to the P1.0 pin of chip for driving by current-limiting resistance R1, the P4.1 of chip for driving, P4.2, P4.3, the P4.4 pin is respectively by resistance R 28, R29, R30, R31 is connected to triode Q4, Q3, Q2, the base stage of Q1, triode Q1, Q2, Q3, the collector of Q4 is connected to the common anode of charactron, triode Q1, Q2, Q3, the emitter of Q4 is connected to power Vcc, the P1.7 pin of chip for driving is connected to a second point by a resistance R 26, second, the feeder ear of point was connected to Vcc, chip for driving is passed through the flicker of P1.7 foot control system point second, give each charactron power supply by P4.1～P4.4 pin, triode plays the effect that electric current is amplified, control each charactron and whether lighted, whether lighted by the pen section of each charactron of P1.0～P1.6 foot control system.
The common anode of charactron is connected respectively to the anode of diode D1, D2, D3, D4, and the negative electrode of diode D1, D2, D3, D4 is connected to the P2.5 pin of chip for driving by a resistance R 27.Thereby the morning, afternoon, the alarm clock of control charactron, and integral point gives the correct time.
The P2.6 pin of chip for driving is connected to the base stage of a triode Q5 by a resistance R 8, the grounded emitter of triode Q5, the collector of triode Q5 is connected to the end of the first piezo U1, another termination VCC of first piezo, one inductance L 1 is connected in parallel on the two ends of this first piezo U1, connect by this, finish the voice output of clock.
Connect a crystal oscillating circuit between the LXin of chip for driving and the LXout, be used for the precision in control time.
The difference of the utility model and prior art is the annexation of following each parts.
The P2.3 pin of chip for driving is connected by a switch SW 1 with the P2.4 pin, when switch SW 1 closure, i.e. and the P2.3 pin of chip for driving and P2.4 pin short circuit, then electronic clock does not show, this electronic clock have an acoustic control function, when switch SW 1 is opened, then this electronic clock shows always, does not have the acoustic control function.
The P2.7 pin of chip for driving is connected to an end of a K switch 1, the other end of this K switch 1 is connected to Vcc by a resistance R 9 respectively and by a resistance R 11 ground connection, K switch 1 hand-guided has three kinds of states: ground connection, meet Vcc, and it is unsettled, when K switch 1 nation decided ground connection, charactron time, life, temperature cycles showed, when K switch 1 nation meets Vcc surely, charactron only shows the time, setting alarm clock and integral point jingle bell, when K switch 1 nation was fixed unsettled, time and month, day circulation showed.
The P1.0 of chip for driving～P1.4 pin is connected with button respectively, concrete annexation is as described below: the P1.0 of chip for driving～P1.4 pin is connected respectively to first end of button S1～S5, and first end of button S1～S5 is received Vcc by resistance R 16, R15, R14, R13, R12 respectively, second end of button S1～S5 is respectively by resistance R 17, R18, R19, R20, R21 ground connection, the resistance of resistance R 16, R15, R14, R13, R12 is 68K Ω, and the resistance of resistance R 17, R18, R19, R20, R21 is 4.7K Ω.When this electronic clock normally showed, each button was in open mode, thus chip for driving can to detect P1.0～P1.4 pin be high level, when button was closed, the pin level of corresponding chip for driving changed, thereby played the effect by key control.Button S5 is for being provided with key, and button S2 is that downward modulation/locking key, button S3 are the noisy key of rise/integral point, and button S1 is that ESC Escape, button S4 are the greedy key of sleeping.The control bit of the chip for driving that button S1～S5 uses (P1.0～P1.4 pin) is the part of a charactron segment control bit (P1.0～P1.6 pin).Therefore,, do not need in addition the function of test case separately, whether show normally whether promptly can draw keypress function normal as long as see light emitting diode when nation decides semi-manufacture when test.
This utility model charactron electronic clock circuit has also increased the acoustic control pulsing circuit, and this acoustic control pulsing circuit comprises one second piezo U2, triode Q6, Q7, resistance R 22, R23, R24, R25, and capacitor C 2.First end of the second piezo U2 is connected respectively to first end of resistance R 25 and capacitor C 2, second end of capacitor C 2 is connected respectively to the base stage of first end and the triode Q6 of resistance R 24, the collector of triode Q6 is connected respectively to the base stage of first end and the triode Q7 of resistance R 23, the grounded emitter of triode Q6, the collector of triode Q7 is connected respectively to first end of resistance R 22 and the P4.0 pin of chip for driving, the grounded emitter of triode Q7, the second termination Vcc of resistance R 22, R23, R24, R25.When above-mentioned switch SW 1 closure, just often, triode Q7 ends, the P4.0 pin of chip for driving detects high level, and then light emitting diode does not work, when sound, second piezo U2 vibration, at this moment, the base stage of triode Q6 is a low level, then triode Q6 ends, and the current collection of triode Q6 is high level very, and promptly the base stage of triode Q7 is a high level, thereby triode Q7 conducting, the collector of triode Q7 becomes low level, and it is low level that chip for driving captures the P4.0 pin, and then light emitting diode is at once bright.
The temperature demonstration of this charactron electronic clock circuit is to rely on the P2.1 of chip for driving and two pins of P2.2 to drive, the P2.1 pin of chip for driving is connected to first end of a capacitor C 1 by a resistance R 10, the P2.2 pin of chip for driving is connected to first end of capacitor C 1, the second end ground connection of capacitor C 1 by a thermistor RT.
Though more than described embodiment of the present utility model; but being familiar with those skilled in the art is to be understood that; our described specific embodiment is illustrative; rather than be used for qualification to scope of the present utility model; those of ordinary skill in the art are in the modification and the variation of the equivalence of doing according to spirit of the present utility model, all should be encompassed in the scope that claim of the present utility model protects.
Claims (10)
1. charactron electronic clock circuit, comprise chip for driving, be connected to four charactrons, second point, the sound out-put circuit of the common anode of chip for driving, and button, it is characterized in that: the control bit of the chip for driving that described button uses is the part of a charactron segment control bit.
2. charactron electronic clock circuit as claimed in claim 1, it is characterized in that: a pin of each charactron is connected to the P1.6 pin of chip for driving by current-limiting resistance R7, the b pin is connected to the P1.5 pin of chip for driving by current-limiting resistance R6, the c pin is connected to the P1.4 pin of chip for driving by current-limiting resistance R5, the d pin is connected to the P1.3 pin of chip for driving by current-limiting resistance R4, the e pin is connected to the P1.2 pin of chip for driving by current-limiting resistance R3, the f pin is connected to the P1.1 pin of chip for driving by current-limiting resistance R2, the g pin is connected to the P1.0 pin of chip for driving by current-limiting resistance R1, the P4.1 of chip for driving, P4.2, P4.3, the P4.4 pin is respectively by resistance R 28, R29, R30, R31 is connected to triode Q4, Q3, Q2, the base stage of Q1, triode Q1, Q2, Q3, the collector of Q4 is connected to the common anode of charactron, triode Q1, Q2, Q3, the emitter of Q4 is connected to power Vcc, the P1.7 pin of chip for driving is connected to a second point by a resistance R 26, and second, the feeder ear of point was connected to Vcc.
3. charactron electronic clock circuit as claimed in claim 2, it is characterized in that: comprise 5 buttons, the P1.0 of described chip for driving～P1.4 pin is connected respectively to first end of each button, and first end of each button is received high level by resistance R 16, R15, R14, R13, R12 respectively, and second end of each button is respectively by resistance R 17, R18, R19, R20, R21 ground connection.
4. charactron electronic clock circuit as claimed in claim 3 is characterized in that: the resistance of described resistance R 16, R15, R14, R13, R12 is 68K Ω, and the resistance of resistance R 17, R18, R19, R20, R21 is 4.7K Ω.
5. charactron electronic clock circuit as claimed in claim 3, it is characterized in that: described sound out-put circuit comprises the first piezo U1, triode Q5 and inductance L 1, the P2.6 pin of described chip for driving is connected to the base stage of triode Q5 by a resistance R 8, the grounded emitter of triode Q5, the collector of triode Q5 is connected to the end of the first piezo U1, another termination VCC of the first piezo U1, inductance L 1 is connected in parallel on the two ends of this first piezo U1.
6. charactron electronic clock circuit as claimed in claim 1 is characterized in that: the P2.3 pin of described chip for driving is connected by a switch SW 1 with the P2.4 pin.
7. charactron electronic clock circuit as claimed in claim 1, it is characterized in that: the P2.7 pin of described chip for driving is connected to an end of a manual K switch 1, the other end of hand switch K1 is connected to Vcc and passes through a resistance R 11 ground connection by a resistance R 9 respectively, hand switch K1 has three kinds of states: ground connection, meet Vcc, and unsettled.
8. charactron electronic clock circuit as claimed in claim 1, it is characterized in that: described charactron electronic clock circuit also comprises the acoustic control pulsing circuit, described acoustic control pulsing circuit comprises one second piezo U2, triode Q6, Q7, resistance R 22, R23, R24, R25, and capacitor C 2, first end of the second piezo U2 is connected respectively to first end of resistance R 25 and capacitor C 2, second end of capacitor C 2 is connected respectively to the base stage of first end and the triode Q6 of resistance R 24, the collector of triode Q6 is connected respectively to the base stage of first end and the triode Q7 of resistance R 23, the grounded emitter of triode Q6, the collector of triode Q7 is connected respectively to first end of resistance R 22 and the P4.0 pin of chip for driving, the grounded emitter of triode Q7, resistance R 22, R23, R24, the second termination Vcc of R25.
9. charactron electronic clock circuit as claimed in claim 1, it is characterized in that: the temperature of described charactron electronic clock circuit shows that P2.1 and two pins of P2.2 of dependence chip for driving drive, the P2.1 pin of chip for driving is connected to first end of a capacitor C 1 by a resistance R 10, the P2.2 pin of chip for driving is connected to first end of capacitor C 1, the second end ground connection of capacitor C 1 by a thermistor RT.
10. charactron electronic clock circuit as claimed in claim 9, it is characterized in that: the common anode of described charactron is connected respectively to the anode of diode D1, D2, D3, D4, and the negative electrode of diode D1, D2, D3, D4 is connected to the P2.5 pin of chip for driving by a resistance R 27.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU200820101267XU CN201156181Y (en) | 2008-01-25 | 2008-01-25 | Nixie tube electronic clock circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU200820101267XU CN201156181Y (en) | 2008-01-25 | 2008-01-25 | Nixie tube electronic clock circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201156181Y true CN201156181Y (en) | 2008-11-26 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU200820101267XU Expired - Fee Related CN201156181Y (en) | 2008-01-25 | 2008-01-25 | Nixie tube electronic clock circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201156181Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105405378A (en) * | 2015-12-03 | 2016-03-16 | 浙江宇视科技有限公司 | Nixie tube driving device and display equipment |
| CN108806569A (en) * | 2018-06-13 | 2018-11-13 | 任志广 | A kind of digital display module |
-
2008
- 2008-01-25 CN CNU200820101267XU patent/CN201156181Y/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105405378A (en) * | 2015-12-03 | 2016-03-16 | 浙江宇视科技有限公司 | Nixie tube driving device and display equipment |
| CN105405378B (en) * | 2015-12-03 | 2018-08-31 | 浙江宇视科技有限公司 | Digital tube drive device and display equipment |
| CN108806569A (en) * | 2018-06-13 | 2018-11-13 | 任志广 | A kind of digital display module |
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Granted publication date: 20081126 Termination date: 20110125 |