CN201134689Y - Circuit breaking time-delaying work circuit for mining high-voltage protector - Google Patents
Circuit breaking time-delaying work circuit for mining high-voltage protector Download PDFInfo
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- CN201134689Y CN201134689Y CNU2007201885915U CN200720188591U CN201134689Y CN 201134689 Y CN201134689 Y CN 201134689Y CN U2007201885915 U CNU2007201885915 U CN U2007201885915U CN 200720188591 U CN200720188591 U CN 200720188591U CN 201134689 Y CN201134689 Y CN 201134689Y
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Abstract
The utility model discloses a high-pressure protector circuit breaking time delay operating circuit for mining, which comprises a power supply circuit and a detection chip, wherein the power supply circuit obtains electrified wire netting sources, whose output end outputs safe current to supply electricity for the detection chip. The utility model is characterized in that the output end of the power supply circuit is further provided with a secondary battery circuit, when the power supply circuit is powered off, the secondary battery circuit replaces the power supply circuit to supply electricity for the detection chip, and the output end is also provided with a signal detection circuit, which can alarm after a power supply stops supplying electricity, and sends electricity signals to the detection chip, and the detection chip can timely store fault signals in an iron memory after the detection chip gets the information. An upper computer can timely expulses faults and restores normal work of a line after the fault signals are analyzed by the upper computer.
Description
Technical field
The utility model belongs to the reserve battery circuit, relates in particular to the mining high-voltage protector outage delay working circuit that a kind of back that cuts off the power supply is adopted powered battery to keep the testing circuit operate as normal and write down the disconnection fault signal.
Background technology
Supply at the colliery electrical network; in the high voltage protective device of power transformation system; be provided with power circuit and testing circuit; this power circuit obtains electric network source; its output output safety electricity is given described testing circuit power supply; testing circuit monitor between each branch road at any time and branch road and total monitoring system between signal intelligence; safe voltage by power-supply system output is powered to it; in case line failure causes power cut-off; testing circuit will quit work at once; communicating by letter between each branch road or between branch road and general control system also can be interrupted; many fault messages can't in time send host computer to; and fault message can not be preserved, and the staff need expend great amount of manpower; circuit could operate as normal after material resources were carefully got rid of each line fault.
The shortcoming of prior art is: cause after the power supply sudden power that testing circuit quits work, influenced between each branch road with branch road and total monitoring system between communicating by letter, and can not get fault message accurately, time-consuming, the effort of fixing a breakdown is unfavorable for that circuit recovers as early as possible.
The utility model content
The purpose of this utility model provide a kind of still can be behind power supply power-fail to the testing circuit continued power; guarantee that testing circuit can work on; keep between each branch road with branch road and total monitoring system between communicating by letter; so that detection chip is in time uploaded fault message; make things convenient for the backstage to analyze, get rid of the mining high-voltage protector outage delay working circuit of line fault as early as possible.
Concrete scheme of the present utility model is: a kind of mining high-voltage protector outage delay working circuit, comprise power circuit and detection chip, this power circuit obtains electric network source, its output output safety electricity is given described detection chip power supply, this detection chip is a microprocessor, it is characterized in that: the output at described power circuit also is provided with the reserve battery circuit, gives described detection chip power supply when this power circuit power down;
Described reserve battery circuit is made up of unilateral diode, voltage stabilizing didoe, first resistance, second resistance, the 3rd resistance, the 4th resistance, the 7th resistance, first comparator, relay, NPN type triode, reserve battery; Described unilateral diode anode links to each other with the positive pole of described power circuit, the negative electrode of this unilateral diode is connected with the power end of described detection chip, be connected in series described dividing potential drop first resistance and second resistance between the negative electrode of this unilateral diode and the ground, the common port of described first resistance and second resistance links to each other with the positive input of described first comparator, the negative input of this first comparator links to each other with the negative electrode of described unilateral diode after being connected in series described the 7th resistance, the negative input of described first comparator also is connected with the negative electrode of described voltage stabilizing didoe, the plus earth of this voltage stabilizing didoe, the output of described first comparator is connected in series the negative electrode that connects described unilateral diode behind described the 3rd resistance, the output of this first comparator also links to each other with the base stage of described NPN type triode, this NPN type transistor base is connected in series ground connection behind described the 4th resistance, described NPN type transistor emitter ground connection, collector electrode links to each other with described relay coil winding one end, the other end of this relay coil winding links to each other with described unilateral diode negative electrode, one end of described relay normally open switch links to each other with described unilateral diode negative electrode, the other end is connected with the positive pole of described reserve battery, this reserve battery minus earth.
When described power circuit operate as normal is the power supply of described detection chip, be the charging of the reserve battery in the described reserve battery circuit, in case described power circuit power down, it is described detection chip power supply that described reserve battery will replace described power circuit, guarantee that detection chip can work on, keep between each branch road with branch road and total monitoring system between communicating by letter, in time fault message is uploaded.
Described power circuit is made up of electric bridge, DC/DC control chip, electric capacity of voltage regulation, inductance; Two ac input ends of described electric bridge link to each other with AC power, the low level output head grounding of this electric bridge, the high level output connects the input of described DC/DC control chip, the output of described DC/DC control chip connects an end of described inductance, the other end out-put supply of this inductance, and link to each other this electric capacity of voltage regulation minus earth with the positive pole of described electric capacity of voltage regulation.
After described power circuit is converted to direct current with alternating current, under the acting in conjunction of described DC/DC control chip, electric capacity of voltage regulation and inductance, the safe direct current of backup battery voltage coupling in this direct current decompression transformation one-tenth and the described reserve battery circuit.
Described mining high-voltage protector outage delay working circuit also includes signal deteching circuit; Described signal deteching circuit is made up of the 5th resistance, the 6th resistance, second comparator, light-emitting diode, optocoupler; One termination of described the 5th resistance is received the power supply that described power circuit provides, the other end links to each other with an end of described the 6th resistance, the other end ground connection of the 6th resistance, described the 5th resistance is connected the negative input of described second comparator with the common port of the 6th resistance, the positive input of this second comparator connects the common port of described the 7th resistance and described voltage stabilizing didoe, the output of described second comparator is connected with the anode of described light-emitting diode, the negative electrode of this light-emitting diode connects the anode input of described optocoupler, the negative electrode input end grounding of this optocoupler, the collector output of described optocoupler connects the input P1.19AC/DC of described detection chip, the emitter output head grounding of this optocoupler.
During described power circuit operate as normal, the voltage of the second comparator negative input is higher than the voltage of this second comparator positive input in the described signal deteching circuit, is output as negatively, and described light-emitting diode ends, and this second comparator is not worked; During described power circuit power down, described reserve battery power supply, described unilateral diode ends, owing to the 5th resistance other end that links to each other with the described second comparator negative input is connected with this unilateral diode anode, so, this second comparator negative input voltage is 0, at this moment, the described second comparator positive input voltage is higher than negative input voltage, just is output as, luminous the warning of described light-emitting diode conducting, and to described detection chip transmission power-off signal.
Described detection chip is provided with input SCL and the SDA that output P0.2SCL and P0.3SDA are connected clock chip respectively, and this detection chip output P0.2SCL and P0.3SDA also are connected the input SCL and the SDA of iron memory respectively simultaneously.
Under the control of described clock chip, described iron memory receives the fault-signal in the described detection chip buffer memory after outage, even this iron memory can not lost the data of being preserved yet under power-down conditions.
Remarkable result of the present utility model is: can cause under the situation of the unexpected power down of power supply at line failure; continue to detection chip power supply certain hour; guarantee that detection chip can work on; keep between each branch road with branch road and total monitoring system between communicating by letter; and send and warn; in time fault message is uploaded; simultaneously; fault-signal can be stored in power down not in the iron memory of lossing signal; be convenient to the backstage and analyze, get rid of the mining high-voltage protector outage delay working circuit of line fault as early as possible.
Description of drawings
Fig. 1 is a structured flowchart of the present utility model;
Fig. 2 is the circuit diagram of reserve battery circuit and signal deteching circuit;
Fig. 3 is the power circuit schematic diagram;
Fig. 4 is the circuit theory diagrams of detection chip, clock chip and iron memory.
Embodiment
Below in conjunction with the drawings and specific embodiments the utility model is described in further detail.
As shown in Figure 1:
A kind of mining high-voltage protector outage delay working circuit comprises power circuit 1 and detection chip 2, and this power circuit 1 obtains electric network source, and its output output safety electricity is given described detection chip 2 power supplies, and this detection chip 2 is microprocessors; The model of detection chip is ARM7.
As depicted in figs. 1 and 2:
Output at described power circuit 1 also is provided with reserve battery circuit 3, gives described detection chip 2 power supplies when this power circuit 1 power down; Described reserve battery circuit 3 is made up of unilateral diode D1, voltage stabilizing didoe D2, first resistance R 1, second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 7th resistance R 7, the first comparator U1, relay J, NPN type triode T, reserve battery B; Described unilateral diode D1 anode links to each other with the positive pole of described power circuit 1, the negative electrode of this unilateral diode D1 is connected with the power end of described detection chip 2, be connected in series described dividing potential drop first resistance and second resistance R 1 between the negative electrode of this unilateral diode D1 and the ground, R2, described first resistance and second resistance R 1, the common port of R2 links to each other with the positive input of the described first comparator U1, the negative input of this first comparator U1 is connected in series described the 7th resistance R 7 backs and links to each other with the negative electrode of described unilateral diode D1, the negative input of the described first comparator U1 also is connected with the negative electrode of described voltage stabilizing didoe D2, the plus earth of this voltage stabilizing didoe D2, the output of the described first comparator U1 is connected in series the negative electrode that described the 3rd resistance R 3 backs connect described unilateral diode D1, the output of this first comparator U1 also links to each other with the base stage of described NPN type triode T, this NPN type triode T base stage is connected in series described the 4th resistance R 4 back ground connection, described NPN type triode T grounded emitter, collector electrode links to each other with described relay J coil windings one end, the other end of this relay J coil windings links to each other with described unilateral diode D1 negative electrode, one end of described relay J normal open switch links to each other with described unilateral diode D1 negative electrode, the other end is connected with the positive pole of described reserve battery B, this reserve battery B minus earth.
When described power circuit 1 operate as normal is 2 power supplies of described detection chip, be the charging of the reserve battery B in the described reserve battery circuit 3, in case described power circuit 1 power down, described reserve battery B will replace described power circuit 1 to be described detection chip 2 power supplies, guarantee that detection chip 2 can work on, keep between each branch road with branch road and total monitoring system between communicating by letter, in time fault message is uploaded.
As shown in Figure 3:
Described power circuit 1 is made up of electric bridge EB, DC/DC control chip DCC, electric capacity of voltage regulation C, inductance L; Two ac input ends of described electric bridge EB link to each other with AC power, the low level output head grounding of this electric bridge EB, the high level output connects the input of described DC/DC control chip DCC, the output of described DC/DC control chip DCC connects an end of described inductance L, the other end out-put supply of this inductance L, and link to each other this electric capacity of voltage regulation C minus earth with the positive pole of described electric capacity of voltage regulation C.
After described power circuit 1 is converted to direct current with alternating current, under the acting in conjunction of described DC/DC control chip DCC, electric capacity of voltage regulation C and inductance L, the safe direct current of reserve battery B voltage matches in this direct current decompression transformation one-tenth and the described reserve battery circuit 3.
As depicted in figs. 1 and 2:
Described mining high-voltage protector outage delay working circuit also includes signal deteching circuit 4; Described signal deteching circuit 4 is made up of the 5th resistance R 5, the 6th resistance R 6, the second comparator U2, light-emitting diode D3, optocoupler GC; One termination of described the 5th resistance R 5 is received the power supply that described power circuit 1 provides, the other end links to each other with an end of described the 6th resistance R 6, the other end ground connection of the 6th resistance R 6, described the 5th resistance and the 6th resistance R 5, the common port of R6 connects the negative input of the described second comparator U2, the positive input of this second comparator U2 connects the common port of described the 7th resistance R 7 and described voltage stabilizing didoe D2, the output of the described second comparator U2 is connected with the anode of described light-emitting diode D3, the negative electrode of this light-emitting diode D3 connects the anode input of described optocoupler GC, the negative electrode input end grounding of this optocoupler GC, the collector output of described optocoupler GC connects the input P1.19AC/DC of described detection chip 2, the emitter output head grounding of this optocoupler GC.
During described power circuit 1 operate as normal, the voltage of the second comparator U2 negative input is higher than the voltage of this second comparator U2 positive input in the described signal deteching circuit 4, is output as negatively, and described light-emitting diode D3 ends, and this second comparator U2 does not work; During described power circuit 1 power down, described reserve battery B power supply, described unilateral diode D1 ends, owing to the 5th resistance R 5 other ends that link to each other with the described second comparator U2 negative input are connected with this unilateral diode D1 anode, so, this second comparator U2 negative input voltage is 0, at this moment, the described second comparator U2 positive input voltage is higher than negative input voltage, just is output as, luminous the warning of described light-emitting diode D3 conducting, and to described detection chip 2 transmission power-off signals.
As shown in Figure 4:
Described detection chip 2 is provided with input SCL and the SDA that output P0.2SCL and P0.3SDA are connected clock chip U3 respectively, this detection chip 2 output P0.2SCL and P0.3SDA also are connected input SCL and the SDA of iron memory U4 respectively simultaneously, the model of the clock chip of selecting for use is PCF8563-T, and the model of the iron memory of selecting for use is FM24C256L.
Under the control of described clock chip U3, described iron memory U4 receives the fault-signal in described detection chip 2 buffer memorys after outage, even this iron memory U4 can not lose the data of being preserved yet under power-down conditions.
Operation principle of the present utility model is: under the power circuit normal operation, testing circuit is powered, simultaneously reserve battery is charged, in case break down behind the power supply power-fail, reserve battery replaces power supply to testing circuit continued power certain hour, and at this moment, system sends power down and warns, and power-off signal passed to detection chip by signal deteching circuit, detection chip can in time be kept at fault message in the iron memory.
Claims (4)
1, a kind of mining high-voltage protector outage delay working circuit, comprise power circuit (1) and detection chip (2), this power circuit (1) obtains electric network source, its output output safety electricity is given described detection chip (2) power supply, this detection chip (2) is a microprocessor, it is characterized in that: the output at described power circuit (1) also is provided with reserve battery circuit (3), gives described detection chip (2) power supply when this power circuit (1) power down;
Described reserve battery circuit (3) is made up of unilateral diode (D1), voltage stabilizing didoe (D2), first resistance (R1), second resistance (R2), the 3rd resistance (R3), the 4th resistance (R4), the 7th resistance (R7), first comparator (U1), relay (J), NPN type triode (T), reserve battery (B); Described unilateral diode (D1) anode links to each other with the positive pole of described power circuit (1), the negative electrode of this unilateral diode (D1) is connected with the power end of described detection chip (2), be connected in series described dividing potential drop first resistance and the second resistance (R1 between the negative electrode of this unilateral diode (D1) and the ground, R2), described first resistance and the second resistance (R1, R2) common port links to each other with the positive input of described first comparator (U1), the negative input of this first comparator (U1) is connected in series described the 7th resistance (R7) back and links to each other with the negative electrode of described unilateral diode (D1), the negative input of described first comparator (U1) also is connected with the negative electrode of described voltage stabilizing didoe (D2), the plus earth of this voltage stabilizing didoe (D2), the output of described first comparator (U1) is connected in series the negative electrode that described the 3rd resistance (R3) back connects described unilateral diode (D1), the output of this first comparator (U1) also links to each other with the base stage of described NPN type triode (T), this NPN type triode (T) base stage is connected in series described the 4th resistance (R4) back ground connection, described NPN type triode (T) grounded emitter, collector electrode links to each other with described relay (J) coil windings one end, the other end of this relay (J) coil windings links to each other with described unilateral diode (D1) negative electrode, one end of described relay (J) normal open switch links to each other with described unilateral diode (D1) negative electrode, the other end is connected with the positive pole of described reserve battery (B), this reserve battery (B) minus earth.
2, according to the described mining high-voltage protector outage of claim 1 delay working circuit, it is characterized in that: described power circuit (1) is made up of electric bridge (EB), DC/DC control chip (DCC), electric capacity of voltage regulation (C), inductance (L); Two ac input ends of described electric bridge (EB) link to each other with AC power, the low level output head grounding of this electric bridge (EB), the high level output connects the input of described DC/DC control chip (DCC), the output of described DC/DC control chip (DCC) connects an end of described inductance (L), the other end out-put supply of this inductance (L), and link to each other this electric capacity of voltage regulation (C) minus earth with the positive pole of described electric capacity of voltage regulation (C).
3, according to the described mining high-voltage protector outage of claim 1 delay working circuit, it is characterized in that: also include signal deteching circuit (4); Described signal deteching circuit (4) is made up of the 5th resistance (R5), the 6th resistance (R6), second comparator (U2), light-emitting diode (D3), optocoupler (GC); One termination of described the 5th resistance (R5) is received the power supply that described power circuit (1) provides, the other end links to each other with an end of described the 6th resistance (R6), the other end ground connection of the 6th resistance (R6), described the 5th resistance and the 6th resistance (R5, R6) common port connects the negative input of described second comparator (U2), the positive input of this second comparator (U2) connects the common port of described the 7th resistance (R7) and described voltage stabilizing didoe (D2), the output of described second comparator (U2) is connected with the anode of described light-emitting diode (D3), the negative electrode of this light-emitting diode (D3) connects the anode input of described optocoupler (GC), the negative electrode input end grounding of this optocoupler (GC), the collector output of described optocoupler (GC) connects the input P1.19AC/DC of described detection chip (2), the emitter output head grounding of this optocoupler (GC).
4, according to the described mining high-voltage protector outage of claim 3 delay working circuit; it is characterized in that: described detection chip (2) is provided with input SCL and the SDA that output P0.2SCL and P0.3SDA are connected clock chip (U3) respectively, and this detection chip (2) output P0.2SCL and P0.3SDA also are connected the input SCL and the SDA of iron memory (U4) respectively simultaneously.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007201885915U CN201134689Y (en) | 2007-12-20 | 2007-12-20 | Circuit breaking time-delaying work circuit for mining high-voltage protector |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007201885915U CN201134689Y (en) | 2007-12-20 | 2007-12-20 | Circuit breaking time-delaying work circuit for mining high-voltage protector |
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| CN201134689Y true CN201134689Y (en) | 2008-10-15 |
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| CNU2007201885915U Expired - Fee Related CN201134689Y (en) | 2007-12-20 | 2007-12-20 | Circuit breaking time-delaying work circuit for mining high-voltage protector |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101980592A (en) * | 2010-10-08 | 2011-02-23 | 徐州上若智能电器有限公司 | High-voltage integrated protector shell with double connected layers |
| CN102320275A (en) * | 2011-09-28 | 2012-01-18 | 重庆长安汽车股份有限公司 | Power-off delay circuit of hybrid control unit for electric automobile |
| CN107394841A (en) * | 2017-07-25 | 2017-11-24 | 郑州云海信息技术有限公司 | A kind of storage device and its standby electric method for charging batteries and control device |
| CN113224835A (en) * | 2021-06-10 | 2021-08-06 | 浙江亿邦通信科技有限公司 | Power failure protection system of 5G gateway |
-
2007
- 2007-12-20 CN CNU2007201885915U patent/CN201134689Y/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101980592A (en) * | 2010-10-08 | 2011-02-23 | 徐州上若智能电器有限公司 | High-voltage integrated protector shell with double connected layers |
| CN102320275A (en) * | 2011-09-28 | 2012-01-18 | 重庆长安汽车股份有限公司 | Power-off delay circuit of hybrid control unit for electric automobile |
| CN102320275B (en) * | 2011-09-28 | 2013-09-11 | 重庆长安汽车股份有限公司 | Power-off delay circuit of hybrid control unit for electric automobile |
| CN107394841A (en) * | 2017-07-25 | 2017-11-24 | 郑州云海信息技术有限公司 | A kind of storage device and its standby electric method for charging batteries and control device |
| CN113224835A (en) * | 2021-06-10 | 2021-08-06 | 浙江亿邦通信科技有限公司 | Power failure protection system of 5G gateway |
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Owner name: CHINA COAL TECHNOLOGY ENGINEERING GROUP CHONGQING Free format text: FORMER NAME: CHINA COAL SCIENCE AND INDUSTRY GROUP CHONGQING RESEARCH INSTITUTE Owner name: CHINA COAL SCIENCE AND INDUSTRY GROUP CHONGQING RE Free format text: FORMER NAME: COAL SCIENTIFIC RESEARCH INSTITUTE CHONGQING INSTITUTE |
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Address after: 400037, No. three village, 55 bridge, Shapingba District, Chongqing Patentee after: Chongqing Research Institute of China Coal Technology & Engineering Group Corp. Address before: 400037, No. three village, 55 bridge, Shapingba District, Chongqing Patentee before: Chongqing Institute of Coal Science Research Institute |
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Address after: 400039 Chongqing Jiulongpo Branch City Road No. 6 Patentee after: CHONGQING RESEARCH INSTITUTE CO., LTD. OF CHINA COAL TECHNOLOGY & ENGINEERING Group Address before: 400037, No. three village, 55 bridge, Shapingba District, Chongqing Patentee before: Chongqing Research Institute of China Coal Technology & Engineering Group Corp. |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081015 Termination date: 20151220 |
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| EXPY | Termination of patent right or utility model |