CN201130384Y - Apparatus for reading and displaying ID card information - Google Patents
Apparatus for reading and displaying ID card information Download PDFInfo
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- CN201130384Y CN201130384Y CNU2007201873123U CN200720187312U CN201130384Y CN 201130384 Y CN201130384 Y CN 201130384Y CN U2007201873123 U CNU2007201873123 U CN U2007201873123U CN 200720187312 U CN200720187312 U CN 200720187312U CN 201130384 Y CN201130384 Y CN 201130384Y
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- card reader
- card information
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Abstract
The utility model relates to an ID card information reading and displaying device, comprising a digital signal processing unit, a programmable logic unit connected with the CPU, a card reader interface unit, and an A/D converting unit; wherein, the digital signal processing unit comprises a CPU and a memory, and the CPU is used to send card reading instructions and the ID card information in the memory; the programmable logic unit is connected with the card reader interface unit and a VGA switching unit through an input/output; the interface unit is connected with the card reader and is used to send card reading information and send back the ID card information; the A/D converting unit is connected with a VGA display to convert the data sent by the CPU into analog signals which are then output to the VGA display. The utility model is characterized in that is the card reader is controlled by the digital signal processing unit through the programmable logic unit when reading the ID card information; the received data are converted into video signals by the digital signal processing unit and then output for displaying. The ID card information reading and displaying equipment has the advantages of being capable of working without a computer, and reading and displaying ID card information without influencing the computer.
Description
Technical field
The utility model relates to the equipment of reading identity card information, the equipment that is specifically related to a kind of reading identity card information and shows.
Background technology
Apply after the second generation I.D. that has the digital anti-counterfeiting system in China, thereby can use the numerical information on the I.D. that client identity is discerned.
Common I.D. card reader relies on computing machine, needs install driver software on computers, can discern and receive the ID (identity number) card information data that read of card reader., be easy to revise as driver with software, also be subjected to the influence of virus, electromagnetism etc. easily, there are hidden danger in security and accuracy.
Be not suitable under the computer application environment at some in addition, common I.D. card reader can't be accomplished data read, demonstration especially.
The utility model content
The embedded device that the purpose of this utility model provides a kind of reading identity card information and shows, utilize this equipment can divorced from computer, realize reading and showing of ID (identity number) card information, can realize that also the drawing array signal of computing machine and the alternative of ID (identity number) card information show, do not influence the use of computing machine.
For achieving the above object, the utility model adopts following technical scheme:
A kind of reading identity card information and the embedded device that shows, this equipment comprises:
Digital signal processing unit: comprise the core processing unit CPU that is used to send Card Reader instruction and control signal, ID (identity number) card information in the storer is sent to A/D converter, also comprise the storer that is used to store the ID (identity number) card information that card reader sends, core processing unit CPU is connected also mutual communication with described storer;
Programmable logic cells: be connected with digital signal processing unit by the peripheral hardware memory interface, and connect and card reader interface unit, video graphics array VGA signal switch unit by input/output end port, it is used to receive Card Reader instruction that core processing unit CPU sends and control signal and is forwarded to described card reader interface unit by input/output end port;
Card reader interface unit: be connected with card reader, be used for sending the Card Reader instruction, and the ID (identity number) card information of card reader passback is sent to digital signal processing unit by programmable logic cells to card reader;
A/D converter: be connected with video graphics array VGA display, be used for the ID (identity number) card information that core processing unit CPU sends is converted to analog video signal, described analog video signal is a video graphics array VGA signal, and outputs to video graphics array VGA switch unit;
Video graphics array VGA switch unit: be connected with peripheral hardware by video graphics array VGA interface, comprise two-path video pattern matrix VGA input signal, one the tunnel is the video graphics array VGA signal of A/D converter output, and one the tunnel be the video graphics array VGA signal that the peripheral hardware that is connected with pattern matrix VGA interface is exported;
Described video graphics array VGA switch unit is connected with programmable logic cells, controls wherein one road video graphics array VGA input signal of described pattern matrix VGA switch unit gating by the control signal that described CPU sends.
Described card reader interface unit comprises interconnective serial line interface subelement and string/conversion subelement, described serial line interface subelement connects card reader, and described serial is used for the data of transmitting between key control unit CPU and the card reader are carried out serial/parallel conversion.
Described digital signal processing unit also comprises program download subelement, and described program is downloaded subelement and is connected also download control program with computing machine.
This equipment also comprises: the resetting sub unit that is connected with programmable logic cells, described resetting sub unit receives the control signal that core processing unit CPU sends by programmable logic cells, sends Restart Signal to described core processing unit CPU when detecting less than control signal
This equipment also comprises the status indicator lamp that is connected with programmable logic cells, and programmable logic cells receives the control signal of core processing unit CPU transmission and controls the state of pilot lamp.
This equipment also comprises the hummer that is connected with the programmable logic device unit, and described programmable logic device unit receives the control signal that core processing unit CPU sends and controls the hummer prompting of sounding.
This equipment also comprises the housing with the sealing of described mainboard, has respectively with card reader interface unit, the interface that connects card reader that the printer interface unit is corresponding on the described housing, connects the interface of printer.
Described programmable logic cells is that the model of ALTERA company is the programmable logic chip of EPM3128A.
The serial interface circuit that is connected with card reader is the RS-232 interface circuit, and described serial is that TI company model is the serial/parallel conversion chip of TI16C752B.
The A/D converter that is connected with digital signal processor adopts the mould/number conversion chip ADV7125 of Analog Device company, and described video graphics array VGA switch unit adopts the VGA video switch chip AD8183 of Analog devices company.
Use the utility model reading identity card information to have the following advantages:
1. use embedded device of the present utility model, card reader can realize reading, showing of ID (identity number) card information by divorced from computer.
2. use embedded device of the present utility model, need not to use the software driver of card reader, improved security and accuracy that card reader is used.
3. use embedded device of the present utility model,, need not to install on computers any software, just can realize that the drawing array signal of computing machine and the alternative of ID (identity number) card information show, do not influence the use of computing machine if having under the situation of computing machine.
Description of drawings
Fig. 1 is the design concept synoptic diagram of the embedded device of the utility model reading identity card information and demonstration.
Fig. 2 is the serial/parallel change-over circuit on the utility model reading identity card information and the embedded device mainboard that shows;
Fig. 3 is the reset circuit on the utility model reading identity card information and the embedded device mainboard that shows;
Fig. 4 is the display interface circuit on the utility model reading identity card information and the embedded device mainboard that shows;
Fig. 5 is the video graphics array interface on the utility model reading identity card information and the embedded device mainboard that shows.
Embodiment
Following examples are used to illustrate the utility model, but are not used for limiting scope of the present utility model.
In the present embodiment, reading identity card information and the embedded device that shows comprise housing and circuit board, circuit on the circuit board is divided into key control unit CPU (Central ProcessingUnit) and meets the interface circuit two large divisions of peripheral hardware, housing seals circuit board and leave the interface of the connection peripheral hardware corresponding with interface circuit on the circuit board, the concrete structure of circuit board as shown in Figure 1, key control unit CPU is embedded in the digital signal processor DSP (Digital SignalProcessing), the interface circuit that connects peripheral hardware is realized by programmable logic device (CPLD) (Complex Programable Logic Device), programmable logic device (CPLD) is partly carried out the RS-232 serial interface circuit that Design of Digital Circuit realizes connecting card reader, the pilot lamp control circuit of display working condition, reset circuit when abnormal conditions appear in equipment, the sound control circuit of output sound prompting, the RS-232 serial ports that connects card reader with interface circuit is accordingly arranged on the housing, working station indicator, manual reset switch, the interface of acoustical generator partly carries out interface circuit that Design of Digital Circuit realizes to programmable logic device (CPLD) and is connected with key control unit CPU respectively and is controlled by CPU.The digital signal processor DSP part has also realized video graphics array (the Video Graphics Array by the outer CPU control of core processing unit, VGA) output interface circuit and VGA input interface circuit, program download circuit, house dog automatic reset circuit have the interface that connects the VGA display accordingly, the interface that connects the VGA input equipment, program download circuit interface on the housing.
This equipment connects the I.D. card reader by the RS-232 serial ports, connects corresponding apparatus at other interface on the housing, the following describes the course of work of this enforcement.
At first initialization after this device power, connect computing machine by the program download interface and download the Peripheral Interface working procedure from computing machine, this program downloads to the program download circuit of digital signal processor DSP part, core processing unit CPU carries out this Peripheral Interface working procedure and controls other peripheral hardware, concrete control procedure is: core processing unit CPU automatically performs the Card Reader instruction, send the Card Reader instruction by the RS-232 interface circuit to card reader, card reader is carried out Card Reader instruction reading identity card information, the data that read are handled after the RS-232 interface circuit is passed embedded device back by card reader, core processing unit CPU is again according to the specific requirement of different business, when showing this ID (identity number) card information if desired, core processing unit CPU cuts off the VGA signal by the input of VGA input interface circuit, ID (identity number) card information is shown on the VGA display by the VGA output interface circuit, after the time of setting, embedded device recovers the demonstration by the VGA signal of VGA input interface circuit input.
In addition, when carrying out this Peripheral Interface working procedure, core processing unit CPU controls the pilot lamp of acoustical generator, display working condition according to duty, when abnormal conditions appearred in equipment, equipment can reset by the house dog automatic reset circuit, thereby the idle situation of embedded device can not occur.The manual reset switch that this embedded device is provided with on housing can manually recover the reset circuit of open state.
CPU in the digital signal processor DSP in the present embodiment on this circuitry plate is as core processing unit, because digital signal processor itself has program download circuit and watchdog circuit in the prior art, connect downloaded Peripheral Interface working procedure by the program download circuit in the present embodiment, digital signal processor is connected with programmable logic device (CPLD) by peripheral hardware memory interface EMIF (ExternalMemory Interface), peripheral hardware memory interface EMIF comprises address wire, data line, reading writing signal line and chip select line, the model of programmable logic device (PLD) employing ALTERA company is the chip of EPM3128A in the present embodiment.
The work major part of programmable logic device (PLD) is finished on computers.Open integrated develop software be ALTERA company QUARTUS → picture schematic diagram, write hardware description language (VHDL, Verilog) → compile → provide the input signal of logical circuit, carry out emulation, check whether logic output result is correct → carry out the pin input, export locking (96 inputs, the output pins of EPM3128A can be set as required) → generating code → code is transmitted and is stored among the programmable logic device (PLD) EPM3128A by download cable.Each pin of this chip is drawn, respectively receive chip board on by lead status indicator lamp, hummer, the alternative output circuit and the automatic reset circuit that also connect serial/parallel change-over circuit, video graphics array VGA signal after each pin of this chip is drawn by lead, the card reader of reading identity card is connected with serial/parallel change-over circuit by the RS-232 interface circuit.
Because the I/O (I/O) of digital signal processor mouth is a parallel communications, the card reader of reading identity card is serial communication, the serial communication that realizes digital signal processor and card reader has two kinds of methods, a kind of general purpose I/O signal of digital signal processor that is to use sends and received signal as serial ports, transmit and receive data by turn with software, it is software asynchronous communication method, this method need take a lot of CPU call duration times, therefore, can only under the situation that CPU not too hurries, the real-time requirement is not too high, use; Second kind is to realize high-speed serial communication by expansion asynchronous communication chip, adopt the method to realize the serial communication of digital signal processor and card reader in the present embodiment, be illustrated in figure 2 as the serial port circuit part that connects card reader in the utility model embedded device, core processing unit CPU in the dsp chip is connected with programmable logic chip EPM3128A by the EMIF data bus, and each pin of EPM3128A is drawn the back and connected serial/parallel conversion chip TI16C752B by lead.
TI16C752B is novel UART (the Universal AsynchronousReceiver and Transmitter) transceiver that TI company releases, and the main pin function of TI16C752B is as follows among Fig. 3:
A0～A2: address wire, by this several pins and read-write
With
Can visit and set register in the TI16C752B sheet;
D0～D7: two-way 8 position datawires;
TXA/RXA, TXB/RXB: the expression FPDP that will send and receive respectively;
INTA/INTB: look-at-me;
RESET: chip reset signal;
XTAL1/XTAL2: clock input/output signal.
Shown in 2, two-way 8 position datawires of serial/parallel conversion chip TI16C752B are connected the data that are used for receiving the EPM3128A transmission with the input/output port I/O of EPM3128A, address wire A0～A2 is connected with the I/O mouth of EPM3128A and is used for receiving the destination address that EPM3128A will send data, read-write
With
The chip selection signal CSA of two cover UART is connected with the I/O mouth of EPM3128A respectively with CSB, reset signal RESET, EPM3128A is connected with digital signal processor DSP by data bus, carries out following design by DSP to becoming logical device EPM3128A pin:
After system powers on, the EPM3128A chip receives the address signal that DSP sends by data bus, and whether the address wire A0 by being connected with EPM3128A～A2 control uses serial ports, when this address wire is invalid, do not use serial ports, serial/parallel conversion chip TI16C752B does not work, when using serial ports in the time of effectively, and the chip selection signal CSA that sends according to DSP and CSB judge and use which serial ports, core processing unit CPU automatically performs the Card Reader instruction, Card Reader instruction sent to by data bus become logical device, become logical device and send it to TI16C752B by the pin that is connected with two-way 8 position datawires of TI16C752B, TI16C752B is kept at register in the sheet with the Card Reader instruction that receives, and sends by sending FPDP TXA or TXB after parallel data is changed the bit serial data.
After system transferred electricity, core processing unit sent reset signal to programmable logic device (PLD), and EPM3128A sends reset signal by the pin that is connected with RESET on the TI16C752B chip, and TI16C752B receives reset signal and automatically resets.
The read-write that programmable logic device (PLD) receiving digital signals processor sends
With
Signal is transmitted to again, serial/parallel conversion chip TI16C752B, and this chip judges that according to the read-write that receives the data to receiving are read operation or write operation.
In this circuit, serial/parallel conversion chip TI16C752B is connected with the RS-232 interface circuit by data transmit-receive pin RXA, TXA (or RXB, TXB), and card reader directly is connected with the RS-232 interface circuit.
Card reader receives Card Reader instruction back reading identity card information, and the I.D. that reads passed back to serial/parallel conversion chip TI16C752B through the RS-232 interface circuit, this chip is by the reception ID (identity number) card information data of pin RXA or RXB, and the ID (identity number) card information that receives is kept in the sheet in the register, the parallel transmission data passed back in the digital signal processor by 8 position datawires that are connected with FPGA (Field Programmable Gate Array) after carrying out serial/parallel conversion.
After the ID (identity number) card information that reads passed back to digital signal processor and be kept at storer, because ID (identity number) card information is a digital signal, the ID (identity number) card information that shows on display is a simulating signal, core processing unit CPU sends to A/D converter with the ID (identity number) card information in the storer, it is carried out mould/number conversion, A/D converter in the present embodiment adopts the mould/number conversion chip ADV7125 of AnalogDevice company, this chip is in order to finish video graphics array VGA Presentation Function, and other DAC (Digital Audio Compress) function, output be vision signal.The principal feature of this chip is:
(1) up to the handling capacity of 330M;
(2) 8 DA converters of three paths of independent;
(3) the TTL compatible input signal is convenient to circuit design;
(4) single supply 5V or 3.3V power supply is widely used in Digital Video System, high-resolution colour picture display system.
Mould/number conversion circuit on the embedded device mainboard that is illustrated in figure 4 as the utility model reading identity card information and shows.Among the figure in the RGB three primary colours data of the video output signals line of digital signal processing and mould/number conversion chip ADV7125 R be that red primary signal pin R3～R6 is connected, be used for the ID (identity number) card information of digital signal processor is transferred to mould/number conversion module as digital video signal (the red primary R signals in RGB three looks); RGB three chromatic numbers of the video output signals line of digital signal processing and mould/number conversion chip ADV7125 according in green primary G signal pins G2～G7 be connected, be used for the ID (identity number) card information of digital signal processor is transferred to mould/number conversion module as digital video signal (the green primary G signals in RGB three looks); RGB three chromatic numbers of the video output signals line of digital signal processing and mould/number conversion chip ADV7125 according in blue primary B signal pins B3～B7 be connected, be used for the ID (identity number) card information of digital signal processor is transferred to mould/number conversion module as digital video signal (the blue primary B signals in RGB three looks).
The clock signal pin CLOCK of mould/number conversion chip ADV7125 is connected with the clock signal pin of digital signal processor, and clock sync signal is provided; The composite blanking signal pin BLANK of mould/number conversion chip ADV7125 is connected with the composite blanking signal of digital signal processing, is used to transmit composite blanking signal; The synchronous pin SYNC of modulus conversion chip ADV7125 is connected with the ground wire of digital signal processor, and expression synchronously.Behind the digital video signal of the representative capacity card information of the synchronous receiving digital signals processor transmission of modulus conversion chip, in sheet, finish mould/number conversion, and the simulated data after will changing is direct video image displayed array VGA vision signal like this.Mould/number conversion chip ADV7125 is with analog video signal VGA video switch circuit by simulation red primary R, green primary G, blue primary B tristimulus signals output pin IOR, IOG, IOG as shown in Figure 4, the VGA video switch circuit is connected with display, by the control of programmable logic device (PLD), select whether described ID (identity number) card information to be outputed on the VGA display to show to the VGA video switch circuit.
The VGA video switch circuit adopts the VGA video switch chip AD8183 of Analog devices company in the present embodiment shown in Figure 4, this chip has two-way RGB tristimulus signals input pin, one the tunnel is pin IN0A～IN2A, another road is pin IN0B～IN2B, select the video analog signal of wherein one road RGB tristimulus signals input pin IN0A～IN2A reception representative capacity card information that mould/the number conversion chip sends in the present embodiment, the vision signal that receives is exported its R by output pin OUT0～OUT2, G, the B tristimulus signals, the chip selection signal OE of this chip is connected with the input/output end port of programmable logic device (PLD) EPM3128A, programmable logic device (PLD) EPM3128A is connected with digital signal processor, by CPU control whether startup AD8143 chip operation, the alternative pin SELA/B of this chip is connected with the input/output end port of programmable logic device (PLD) EPM3128A in the present embodiment, by the control of CPU to alternative pin SELA/B signal, gating is one tunnel control RGB tristimulus signals input pin wherein, and will export by the signal that this road RGB tristimulus signals input pin receives.
Figure 5 shows that video drawing array VGA interface in the present embodiment, the standard VGA interface has two synchronizing signal: HSYNC (horizontal-drive signal), VSYNC (vertical synchronizing signal), VGA interface in the present embodiment is 15 contact pins, the interface definition of using is as follows: pin one is red primary red, pin two is green primary green, pin 3 is blue primary blue, pin 5 is self-test, pin 6 is red ground, pin 7 is the greenery patches, pin 8 is blue ground, pin one 0 is for digitally, pin one 3 is a horizontal-drive signal, pin one 4 is a vertical synchronizing signal, present embodiment is welded on this contact pin on the mainboard, pin one, 2,3 respectively with Fig. 4 in the IN0B～IN2B pin of VGA video switch chip be connected by lead, connect other VGA output device by this interface, the RGB three primary colours vision signal that receives can be shown by outputing on the VGA display of alternative of CPU control.Be specially: when not having the ID (identity number) card information input, CPU will put sheet that VGA switches chip by programmable logic device (PLD), and to select pin OE and alternative pin SELA/B be low level, VGA signal input tube pin IN0B～IN2B pin is by gating, the VGA information input of the peripheral hardware output that is connected with this VGA video switch chip by the VGA interface outputs to it on display that is connected with VGA video switch chip and to show; When ID (identity number) card information is imported, CPU will put sheet that VGA switches chip by programmable logic device (PLD), and to select pin OE and alternative pin SELA/B be high level, VGA signal input tube pin IN0A～IN2A pin is by gating, and ID (identity number) card information is imported and outputed on the display that is connected with VGA video switch chip and shows.
Automatic reset circuit when abnormal conditions occurring for the utility model embedding equipment as Fig. 3, DSP connects programmable logic chip EPM3128A by data bus EMIF in the present embodiment, reset circuit is that the waveform by the MAX706S circuit receives pin WDI and is connected realization with the I/O of programmable logic device, MAX706 series watch-dog is the representative multi-functional microprocessor monitors circuit that Maxim company produces, and the ratio of performance to price is high.Except watchdog function, functions such as also having in addition powers on automatically resets, manual reset and low-voltage warning, very easy to use reliable.The process of being undertaken after system's power down by this chip is as follows:
When the digital signal processor DSP equipment work is undesired, after being power down, programmable logic device (PLD) EPMM3128A does not receive the specification signal that DSP sends, the chip MAX706 that resets does not receive the specification signal that EPMM3128A sends yet, and the chip that resets this moment sends Restart Signal to DSP restarts system.
In addition, the status indicator lamp in the present embodiment, hummer all are connected with the I/O of programmable logic device (PLD) EPM3128A, are transmitted control signal to it according to duty by core processing unit, and whether the state and the hummer of control pilot lamp sound a buzzer.
The utility model is reasonable in design, is not having under the situation of computing machine, can realize reading and showing of ID (identity number) card information, and it is accurately convenient to read mode, improves the security of ID (identity number) card information.
Though the utility model specifically illustrates and illustrates in conjunction with a preferred embodiment; but the personnel that are familiar with this technical field are appreciated that; wherein no matter still can make various changes in detail in form, this does not deviate from spirit of the present utility model and scope of patent protection.
Claims (10)
1, the embedded device of a kind of reading identity card information and demonstration is characterized in that having on the mainboard of this equipment:
Digital signal processing unit: comprise the core processing unit CPU that is used to send Card Reader instruction and control signal, ID (identity number) card information in the storer is sent to A/D converter, also comprise the storer that is used to store the ID (identity number) card information that card reader sends, core processing unit CPU is connected also mutual communication with described storer;
Programmable logic cells: be connected with digital signal processing unit by the peripheral hardware memory interface, and connecting card reader interface unit, video graphics array VGA signal switch unit respectively, it is used to receive the Card Reader instruction and the control signal of core processing unit CPU transmission and be forwarded to described card reader interface unit;
Card reader interface unit: be connected with card reader, be used for sending the Card Reader instruction, and the ID (identity number) card information of card reader passback is sent to digital signal processing unit by programmable logic cells to card reader;
A/D converter: be connected with video graphics array VGA display, be used for the ID (identity number) card information that core processing unit CPU sends is converted to analog video signal, described analog video signal is a video graphics array VGA signal, and outputs to video graphics array VGA switch unit;
Video graphics array VGA switch unit: be connected with peripheral hardware by video graphics array VGA interface, comprise two-path video pattern matrix VGA input signal, one the tunnel is the video graphics array VGA signal of A/D converter output, and one the tunnel be the video graphics array VGA signal that the peripheral hardware that is connected with pattern matrix VGA interface is exported;
Described video graphics array VGA switch unit is connected with programmable logic cells, controls wherein one road video graphics array VGA input signal of described pattern matrix VGA switch unit gating by the control signal that described CPU sends.
2, the equipment of reading identity card information as claimed in claim 1 and demonstration, it is characterized in that, described card reader interface unit comprises interconnective serial line interface subelement and serial/parallel conversion subelement, described serial line interface subelement connects card reader, and described serial is used for the data of transmitting between key control unit CPU and the card reader are carried out serial/parallel conversion.
3, the equipment of reading identity card information as claimed in claim 1 and demonstration is characterized in that, described digital signal processing unit also comprises program download subelement, and described program is downloaded subelement and is connected also download control program with computing machine.
4, the equipment of reading identity card information as claimed in claim 1 and demonstration, it is characterized in that, this equipment also comprises: the resetting sub unit that is connected with programmable logic cells, described resetting sub unit receives the control signal that core processing unit CPU sends by programmable logic cells, sends Restart Signal to described core processing unit CPU when detecting less than control signal
5, the embedded device of reading identity card information as claimed in claim 1 and demonstration, it is characterized in that, this equipment also comprises the status indicator lamp that is connected with programmable logic cells, and described programmable logic cells receives the control signal of core processing unit CPU transmission and controls the state of pilot lamp.
6, the equipment of reading identity card information as claimed in claim 1 and demonstration, it is characterized in that this equipment also comprises the hummer that is connected with the programmable logic device unit, described programmable logic device unit receives the control signal that core processing unit CPU sends and controls the hummer prompting of sounding.
7, the equipment of reading identity card information as claimed in claim 1 and demonstration, it is characterized in that, this equipment also comprises the housing with the sealing of described mainboard, has respectively with card reader interface unit, the interface that connects card reader that the printer interface unit is corresponding on the described housing, connects the interface of printer.
8, the equipment of reading identity card information as claimed in claim 1 and demonstration is characterized in that described programmable logic cells is that the model of ALTERA company is the programmable logic chip of EPM3128A.
9, the equipment of reading identity card information as claimed in claim 1 and demonstration is characterized in that the serial interface circuit that is connected with card reader is the RS-232 interface circuit, and described serial is that TI company model is the serial/parallel conversion chip of TI16C752B.
10, the equipment of reading identity card information as claimed in claim 1 and demonstration, it is characterized in that, the A/D converter that is connected with digital signal processor adopts the mould/number conversion chip ADV7125 of Analog Device company, and described video graphics array VGA switch unit adopts the VGA video switch chip AD8183 of Analog devices company.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007201873123U CN201130384Y (en) | 2007-12-20 | 2007-12-20 | Apparatus for reading and displaying ID card information |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007201873123U CN201130384Y (en) | 2007-12-20 | 2007-12-20 | Apparatus for reading and displaying ID card information |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201130384Y true CN201130384Y (en) | 2008-10-08 |
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ID=40018248
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2007201873123U Expired - Lifetime CN201130384Y (en) | 2007-12-20 | 2007-12-20 | Apparatus for reading and displaying ID card information |
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| Country | Link |
|---|---|
| CN (1) | CN201130384Y (en) |
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2007
- 2007-12-20 CN CNU2007201873123U patent/CN201130384Y/en not_active Expired - Lifetime
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