CN201117146Y - Circuit experimental instrument without splicing wire - Google Patents

Circuit experimental instrument without splicing wire Download PDF

Info

Publication number
CN201117146Y
CN201117146Y CNU2007200946184U CN200720094618U CN201117146Y CN 201117146 Y CN201117146 Y CN 201117146Y CN U2007200946184 U CNU2007200946184 U CN U2007200946184U CN 200720094618 U CN200720094618 U CN 200720094618U CN 201117146 Y CN201117146 Y CN 201117146Y
Authority
CN
China
Prior art keywords
circuit
socket
instrument
switch
experimental
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU2007200946184U
Other languages
Chinese (zh)
Inventor
高春甫
贺新升
朱喜林
鄂世举
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang Normal University CJNU
Original Assignee
Zhejiang Normal University CJNU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhejiang Normal University CJNU filed Critical Zhejiang Normal University CJNU
Priority to CNU2007200946184U priority Critical patent/CN201117146Y/en
Application granted granted Critical
Publication of CN201117146Y publication Critical patent/CN201117146Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Coupling Device And Connection With Printed Circuit (AREA)

Abstract

The utility model relates to a circuit experimental instrument without a plug wire, which belongs to electronic circuit experimental devices. A circuit board comprises a switch array, a socket, an X testing end port and a Y testing end port, wherein a switch array zone forms an m*n switch array through m*n switches, on the circuit board, m contact lines are respectively connected with corresponding pins of an X end of the socket and the corresponding pins of the X testing end port, and n contact lines are respectively connected with corresponding pins of an Y end of the socket and the corresponding pins of the Y testing end port. The experimental instrument has the advantages that the structure is novel and the instrument can be used as a substitution product of a common bread plate in circuit experiments. The experimental instrument can overcome the problems that experimental circuit wirings are difficultly built, the wirings are not in order, the working intensity is strong, and the contact is not good, the instrument can be operated simply, the cost is low, the instrument does not damage components, the working efficiency of experimental staff can be greatly increased, and the cost is lowered.

Description

Exempt from patch Experiment of Electrical Circuits instrument
Technical field
The utility model relates to a kind of electronic circuit experiment device.
Background technology
In Experiment of Electrical Circuits, in the past to the three kinds of modes of having built of experimental circuit: a kind of is to weld on printed circuit board (PCB), and this method shortcoming is the disposable uses of components and parts, needs welding circuit again when changing scheme, and labour intensity is big, the experimental cost height; Another kind method is to build on bread board, connects each pin of components and parts by plug wire, and the shortcoming of this kind method is that a large amount of uses of patch make it very not attractive in appearance, a large amount of interference have also been introduced, circuit confusion after line is finished causes loose contact easily and is difficult to failure judgement, debug difficulties; Also having a kind of method is software emulation, can be directly finish the building of circuit, test job with software on computers, but shortcoming is also understood easily, the one, component library is complete inadequately, the 2nd, software emulation be the ideal state of components and parts, also have gap with the actual performance of components and parts, be difficult to describe the actual working state of circuit.
Summary of the invention
The utility model provides a kind of patch Experiment of Electrical Circuits instrument of exempting from, and the labour intensity exist in the experimental circuit build process is big, experimental cost is high to solve, debug difficulties, be difficult to describe the problem of the actual working state of circuit.The technical scheme that the utility model is taked is:
Comprise switch arrays, socket, X test port and Y test port on the wiring board, wherein the switch arrays district forms m * n switch arrays by m * n switch, m, n is integer, and place up and down in the circuit board two contacts of each switch, and the lower contact of every capable switch connects together and forms delegation, be contact row, the upper contact of every row switch connects together, and forms row, is rows of contacts; In the circuit board, m contact row links to each other with x end and corresponding each pin of X test port of socket respectively, and n rows of contacts links to each other with y end and corresponding each pin of Y test port of socket respectively.
In the utility model, socket adopts Zero plug-in force socket.
In the utility model, be provided with low-tension supply in the circuit board.
Originally exempt from the plug wire test instrument when building circuit using, only to need be placed on components and parts in the socket, toggle switch array respective switch can realize the connection and the disconnection of each components and parts respective pins as required, thereby finishes the building of circuit.When changing circuit arrangement, only need to change components and parts, the break-make that changes respective switch gets final product; At x, the y test port can conveniently be realized the test to circuit.
The utility model advantage is novel structure, can be used as the substitute products of bread board commonly used in the Experiment of Electrical Circuits.Use the utility model both can overcome and build hookup wiring difficulty, wiring is random, and working strength is big, the problem of loose contact again can be simple to operate, and is with low cost, lossless to components and parts, the electronician is placed on more energy in circuit design and the debugging.Can improve experimenter's work efficiency greatly, reduce cost.
Description of drawings
Fig. 1 is the utility model structural representation.
Fig. 2 is the utility model circuit connecting relation synoptic diagram.
Fig. 3 is the utility model 4 * 4 switch matrix structure synoptic diagram.
Fig. 4 is the utility model socket synoptic diagram.
Fig. 5 is the circuit theory diagrams of the utility model Application Example 1.
Fig. 6 is the circuit theory diagrams of the utility model Application Example 2.
Embodiment
Comprise switch arrays 4, socket 2, X test port 1 and Y test port 3 on the wiring board, wherein the switch arrays district forms m * n switch arrays by m * n switch, m, n is integer, and place up and down in the circuit board two contacts of each switch, and the lower contact 6 of every capable switch connects together and forms delegation, be contact row, the upper contact 5 of every row switch connects together, and forms row, is rows of contacts; In the circuit board, m contact row links to each other with x end and corresponding each pin of X test port of socket respectively, and n rows of contacts links to each other with y end and corresponding each pin of Y test port of socket respectively.Socket adopts Zero plug-in force socket.
In the utility model, be provided with low-tension supply 7 in the circuit board.
Application Example 1: charging circuit
Three components and parts of this circuit are formed, and are respectively power supply, resistance and electric capacity.
Step 1: components and parts are carried out label.Because these three components and parts all are the two ends elements, in circuit diagram, its port label is respectively x1, y1; X2, y2; X3, y3 (as shown in Figure 5).
Step 2: behind the port label, ensuing work is plugged on three kinds of elements on the Zero plug-in force socket by its label exactly.
Step 3: closed then matrix switch x1y2, x2y3, x3y1.
So far, then the hookup overlap joint finishes, and can carry out experiment work.When changing corded arrangement, only need to be plugged on the socket again with components and parts label in the circuit diagram, the on off state of changing corresponding matrix switch gets final product.
Application Example 2:555 square wave generation circuit,
555 square wave generation circuit, mainly by 555 chips, resistance, electric capacity, power supply, pilot lamp is formed, and on the utility model it is carried out building of circuit set by step below.
Step 1: the components and parts port is carried out label.As shown in Figure 6,555 chips, 1,2,3,4 pins are denoted as x1, x2, x3, x4.5,6,7,8 pins are denoted as y1, y2, y3, y4.The R1 two ends are respectively x9, y9.The R2 two ends are respectively x8, y8.The C1 two ends are respectively x7, y7.The C2 two ends are respectively x6, y6.Pilot lamp L two-port is respectively x5, y5.The both ends of power mouth is respectively x20, y20.
Step 2: press label each components and parts are inserted Zero plug-in force socket.
Step 3: according to the closed corresponding toggle switch of label on the circuit diagram, as the x5 that has that links to each other with x1, x7, y6, four ports of y20, closed toggle switch x1y6, x1y20, x5y6, x7y6 can finish the connection of each port on this circuit.All the other each bar line connections similarly.
Step 4: can carry out the debugging of circuit, test job after overlap joint is finished.At x, the y test port can conveniently be realized the test to circuit.

Claims (3)

1. exempt from patch Experiment of Electrical Circuits instrument for one kind, it is characterized in that: comprise switch arrays (4), socket (2), X test port (1) and Y test port (3) on the wiring board, wherein the switch arrays district forms m * n switch arrays by m * n switch, m, and n is integer, place up and down in the circuit board two contacts of each switch, the lower contact of every capable switch (6) connects together and forms delegation, is contact row, and the upper contact of every row switch (5) connects together, form row, be rows of contacts; In the circuit board, m contact row links to each other with x end and corresponding each pin of X test port of socket respectively, and n rows of contacts links to each other with y end and corresponding each pin of Y test port of socket respectively.
2. the patch Experiment of Electrical Circuits instrument of exempting from according to claim 1 is characterized in that: socket adopts Zero plug-in force socket.
3. the patch Experiment of Electrical Circuits instrument of exempting from according to claim 1 and 2 is characterized in that: be provided with low-tension supply (7) in the circuit board.
CNU2007200946184U 2007-11-16 2007-11-16 Circuit experimental instrument without splicing wire Expired - Fee Related CN201117146Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2007200946184U CN201117146Y (en) 2007-11-16 2007-11-16 Circuit experimental instrument without splicing wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU2007200946184U CN201117146Y (en) 2007-11-16 2007-11-16 Circuit experimental instrument without splicing wire

Publications (1)

Publication Number Publication Date
CN201117146Y true CN201117146Y (en) 2008-09-17

Family

ID=39991722

Family Applications (1)

Application Number Title Priority Date Filing Date
CNU2007200946184U Expired - Fee Related CN201117146Y (en) 2007-11-16 2007-11-16 Circuit experimental instrument without splicing wire

Country Status (1)

Country Link
CN (1) CN201117146Y (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102914670A (en) * 2012-10-24 2013-02-06 华东光电集成器件研究所 Insulation resistance test clamp
CN103064054A (en) * 2012-12-19 2013-04-24 云南电力试验研究院(集团)有限公司电力研究院 Electric energy measure device simulation system and wiring matrix control method thereof
CN104778887A (en) * 2015-05-06 2015-07-15 山东大学 Comprehensive development experimental box for modular single-chip microcomputer and application thereof
CN105469675A (en) * 2015-12-15 2016-04-06 蒙山 Intelligent experiment teaching system
CN107238791A (en) * 2017-07-20 2017-10-10 南京富士通南大软件技术有限公司 Driving test environment based on VTSystem is from adaption system
CN107610569A (en) * 2017-10-23 2018-01-19 宜宾学院 The determination method of analogous circuit experiment equipment and its required electronic component

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102914670A (en) * 2012-10-24 2013-02-06 华东光电集成器件研究所 Insulation resistance test clamp
CN103064054A (en) * 2012-12-19 2013-04-24 云南电力试验研究院(集团)有限公司电力研究院 Electric energy measure device simulation system and wiring matrix control method thereof
CN103064054B (en) * 2012-12-19 2015-09-30 云南电力试验研究院(集团)有限公司电力研究院 The matrix majorization method of electric power meter analogue system and wiring thereof
CN104778887A (en) * 2015-05-06 2015-07-15 山东大学 Comprehensive development experimental box for modular single-chip microcomputer and application thereof
CN104778887B (en) * 2015-05-06 2017-07-11 山东大学 A kind of modularization single-chip microcomputer comprehensive exploitation experimental box and its application
CN105469675A (en) * 2015-12-15 2016-04-06 蒙山 Intelligent experiment teaching system
CN107238791A (en) * 2017-07-20 2017-10-10 南京富士通南大软件技术有限公司 Driving test environment based on VTSystem is from adaption system
CN107238791B (en) * 2017-07-20 2019-09-20 南京富士通南大软件技术有限公司 The adaptive match system of environment is tested in driving based on VTSystem
CN107610569A (en) * 2017-10-23 2018-01-19 宜宾学院 The determination method of analogous circuit experiment equipment and its required electronic component

Similar Documents

Publication Publication Date Title
CN201117146Y (en) Circuit experimental instrument without splicing wire
CN218069149U (en) Digital circuit experiment module and experiment box based on FPGA logic chip mapping
CN216560878U (en) Universal testing device for digital integrated circuit
CN216387243U (en) Ten-channel parallel safety gauge tester
CN213364917U (en) Power distribution terminal debugging tool
CN207380171U (en) A kind of connector body test device
CN216051996U (en) Relay protection device is examined debug test case surely
CN203838179U (en) Chip testing base
CN113258387A (en) Multifunctional transfer box
CN201274112Y (en) Household circuit demonstrating board
CN205193501U (en) General FPGA debugs device
CN219162255U (en) Jig for detecting adapter function module
CN217848366U (en) Multifunctional FPC (flexible printed circuit) adapter plate
CN109979291A (en) A kind of the General experimental device and experimental method of power electronic circuit
CN215375507U (en) High-low temperature performance test fixture
CN108152593B (en) Portable full-automatic electric interface direct current resistance test system and test method
CN104360109A (en) Quick test fixture
CN201359628Y (en) Circuit for judging whether plugging element is plugged in place or not
CN220400207U (en) Display screen test keysets and testing arrangement
CN2927401Y (en) Pressed-spring two-way switchover connector
CN205015366U (en) Device for testing on -off of wire harness
CN113471779B (en) Input device capable of programming keys and changing key positions
CN204228754U (en) A kind of test fixture fast
CN219434866U (en) Multifunctional relay checking base
CN215679340U (en) Flash burns and burns platelet, burns and burns record mainboard and removable flash burns and burns record device

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080917

Termination date: 20101116