CN201039667Y - Surface chip separator - Google Patents

Surface chip separator Download PDF

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Publication number
CN201039667Y
CN201039667Y CNU2007200693316U CN200720069331U CN201039667Y CN 201039667 Y CN201039667 Y CN 201039667Y CN U2007200693316 U CNU2007200693316 U CN U2007200693316U CN 200720069331 U CN200720069331 U CN 200720069331U CN 201039667 Y CN201039667 Y CN 201039667Y
Authority
CN
China
Prior art keywords
housing
pcb board
utility
model
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU2007200693316U
Other languages
Chinese (zh)
Inventor
朱洁文
黄宁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiekaoao Electronic (shanghai) Coltd
Original Assignee
Jiekaoao Electronic (shanghai) Coltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiekaoao Electronic (shanghai) Coltd filed Critical Jiekaoao Electronic (shanghai) Coltd
Priority to CNU2007200693316U priority Critical patent/CN201039667Y/en
Application granted granted Critical
Publication of CN201039667Y publication Critical patent/CN201039667Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model relates to a surface mounted type separator, comprising a housing, an inner conductor inside the housing and a cover plate. The utility model is characterized in that: the bottom part of the housing is jointed with a PCB board with three protruded ports; a projecting base seat at the central bottom of the housing is closely connected with the periphery of the inner wall of a central hole in the PCB board; the bottom face of the base seat is parallel with the lower plane of the PCB board. The side wall of the housing is left with three split notches; the extension end of the inner conductor is induced downlink along the notches and then is electrically connected with the PCB board. A cover is connected with the whorl at the upper port of the housing. The bottom of the housing is additionally provided with a PCB board, so that an apparatus can be connected to the ground to a utmost extent, and the apparatus can be precisely positioned through the three ports of the PCB board; the notches excavated at the side wall of the housing lead the load to stand the high temperature wave-soldering, having great radiating effect. The utility model can be applied directly on the PCB board, the manually welded installation is not needed; and the utility model is suitable to be manufactured in mass; the installation efficiency and the apparatus reliability are enhanced.

Description

Surface patch formula isolator
Technical field
The utility model belongs to technical field of electronic components, is specifically related to the isolator that a kind of miniaturization can use wave-soldering form surface patch formula to install.
Background technology
Existing isolator mounting means is with stay bolt isolator to be fixed on the printed substrate earlier, the lead-out wire of components and parts is passed hole on the printed substrate, again with artificial welding.This manual mode of operation can not adapt to industrial automation production requirement in enormous quantities, not only speed is slow, and,, the reliability of finished product device in application will be influenced as cause errors such as rosin joint, sealing-off because of lack of skill owing to have many uncertain factors in the manual operation.
The utility model content
The purpose of this utility model provides the new construction that a kind of simple in structure, easy for installation, service-strong is fit to the isolator of paster production technology.
For achieving the above object, the technical scheme that adopts is: surface patch formula isolator, comprise cavity (being outer conductor), place inner wire and cover plate in the described cavity, it is characterized in that: the bottom of described cavity fits with the printed substrate (abbreviation pcb board) that has three outstanding ports, place the projection base at described cavity bottom center, with the inner peripheral wall close proximity of described pcb board centre bore, the bottom surface of described base is concordant with the lower plane of described pcb board.
The sidewall of described cavity is equipped with three discrete notches, and the exit of inner wire is drawn along notch is descending, is electrically connected with described pcb board.
Described lid is threaded with the upper port of described cavity.
The beneficial effects of the utility model are: the bottom of cavity installs pcb board additional, makes device at utmost carry out ground connection, and can accurately locate by three ports of appended pcb board; The fluting design that cavity wall is special, the protection load can stand the installation process of high temperature wave-soldering,, at utmost dispel the heat simultaneously.The utility model can directly be used on pcb board, and manually welded and installed is fit to produce in enormous quantities, has improved the reliability of installation effectiveness and device, has reduced user's assembly cost.
Description of drawings
The utility model is described in further detail below in conjunction with the drawings and specific embodiments.
Fig. 1 the utility model structural representation;
The A of Fig. 2 Fig. 1 is to view;
Fig. 3 cavity inner structure schematic diagram.
Among the figure, 1-printed substrate (pcb board); 2-base; 3-port; 4-cavity (outer conductor); 5-inner wire; 6-lid; The exit of 7-inner wire; 8,8 '-notch.
Embodiment
From Fig. 1 and Fig. 2 as seen, surface patch formula isolator, comprise cavity 4, place inner wire 5 and cover plate 6 in the cavity 4, it is characterized in that: the bottom of described cavity 4 contacts with the pcb board 1 (Fig. 2) that has three outstanding ports 3, place the projection base 2 of cavity 4 bottom centre, with the inner peripheral wall close proximity of described pcb board 1 centre bore, the bottom surface of base 2 is concordant with the lower plane of pcb board 1.The sidewall that Fig. 3 shows described cavity 4 is equipped with three discrete notches 8 (or 8 '), and the exit 7 of described inner wire 5 is electrically connected with described pcb board 1 along notch 8 descending drawing.Described lid 6 is threaded with the upper port of described cavity 4.The utility model can be widely used in fields such as RFID, WIMAX, GSM, CDMA.

Claims (3)

1. surface patch formula isolator, comprise cavity (4), place inner wire (5) and cover plate (6) in the described cavity (4), it is characterized in that: the bottom of described cavity (4) fits with the printed substrate (1) that has three outstanding ports (3), place the projection base (2) of described cavity (4) bottom centre, with the inner peripheral wall close proximity of described printed substrate (1) centre bore, the bottom surface of described base (2) is concordant with the lower plane of described printed substrate (1).
2. according to the described surface patch formula of claim 1 isolator, it is characterized in that: the sidewall of described cavity (4) is equipped with three discrete notches (8), the exit (7) of described inner wire (5) is electrically connected with described printed substrate (1) along descending the drawing of notch (8).
3. according to the described surface patch formula of claim 1 isolator, it is characterized in that: described lid (6) is threaded with the upper port of described cavity (4).
CNU2007200693316U 2007-04-26 2007-04-26 Surface chip separator Expired - Fee Related CN201039667Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2007200693316U CN201039667Y (en) 2007-04-26 2007-04-26 Surface chip separator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU2007200693316U CN201039667Y (en) 2007-04-26 2007-04-26 Surface chip separator

Publications (1)

Publication Number Publication Date
CN201039667Y true CN201039667Y (en) 2008-03-19

Family

ID=39212197

Family Applications (1)

Application Number Title Priority Date Filing Date
CNU2007200693316U Expired - Fee Related CN201039667Y (en) 2007-04-26 2007-04-26 Surface chip separator

Country Status (1)

Country Link
CN (1) CN201039667Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112399711A (en) * 2020-09-28 2021-02-23 浙江三维利普维网络有限公司 High-power amplifier module and high-power amplifier module assembling method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112399711A (en) * 2020-09-28 2021-02-23 浙江三维利普维网络有限公司 High-power amplifier module and high-power amplifier module assembling method

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080319

Termination date: 20120426