CN201039282Y - Theft-prevention data processing terminal for power device - Google Patents
Theft-prevention data processing terminal for power device Download PDFInfo
- Publication number
- CN201039282Y CN201039282Y CNU2007200122042U CN200720012204U CN201039282Y CN 201039282 Y CN201039282 Y CN 201039282Y CN U2007200122042 U CNU2007200122042 U CN U2007200122042U CN 200720012204 U CN200720012204 U CN 200720012204U CN 201039282 Y CN201039282 Y CN 201039282Y
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- ground connection
- electric capacity
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Abstract
The utility model belongs to the security device for the electric power device, in particular to an antitheft data processing terminal for an electric power, which ensures the reliable running of the device and the safety of the personnel, and consists of a power circuit (1), an electric quantity transforming circuit (2), a communication module circuit (4), a calendar clock circuit (5), an antitheft information acquisition circuit (6), an alarm circuit (7) and a self-checking and encrypting circuit (8). The system is provided with a (CPU) control circuit (3) which includes an (ATM EGA8) single chip (IC1), a resistor array(R1), an inductance (L1), a crystal oscillator (Y1) and a capacitance (C3 to C6). The antitheft data processing terminal of the electric power not only automatically takes measures to ensure the reliable running of the device and the safety of the personnel, but also has advantages of high reliability, low cost and convenient maintenance.
Description
Technical field
The utility model belongs to the safety device of power equipment, particularly a kind of antitheft data processing terminal of power equipment that guarantees equipment reliability service and staff's safety.
Background technology
At present, for self the antitheft level that improves power equipment and the automatic management level of system, reduce the device losses cost, realize the purpose of safety in production.All adopt on-the-spot machine and software platform, its shortcoming is that real-time is poor, reliability is low, cost is high and inconvenient maintenance.
Summary of the invention
The purpose of this utility model is to overcome above-mentioned technical deficiency, provide a kind of have real-time, reliability is high, cost is low and easy to maintenance, guarantees the antitheft data processing terminal of power equipment of equipment reliability service.
The technical scheme that the utility model technical solution problem adopts is: a kind of antitheft data processing terminal of being made up of power circuit, electrical transformation circuit, communication module circuit, calendar clock circuit, antitheft Acquisition Circuit, warning circuit and self check and encrypted circuit of power equipment is characterized in being provided with cpu control circuit in system, cpu control circuit comprises: ATMEGA
8Single-chip microcomputer IC1, resistor chain R
1, inductance L
1, crystal oscillator Y
1And capacitor C
3~C
6IC
17 pin meet Y
1And C
3An end, 8 pin meet Y
1The other end and C
4One end, C
3, C
4The other end joins and ground connection, and 13 pin meet the calendar clock chip IC in the calendar clock circuit
27 pin and resistor chain R
14 pin, 12 pin meet IC
26 pin and R
15 pin, 6,4 pin meet R
11 pin and power supply, 15,16 pin meet the P in self check and the encrypted circuit respectively
24,1 pin and IC
65,6 pin, 22,19 pin ground connection, 18 pin meet C
5, L
1An end, 20 pin meet C
6An end, L
1Another termination power, C
5, C
6Other end ground connection, 21 pin ground connection, 3,5 pin ground connection; 23 pin meet the resistance AVR in the electrical transformation circuit
8With electric capacity AVC
3An end, 24 pin connecting resistance BVR8 and electric capacity BVC
3An end, 25 pin connecting resistance CVR
8With capacitor C VC
3An end, 26 pin connecting resistance ATR
8With electric capacity ATC
3One end, 27 pin connecting resistance BIR
8With electric capacity BTC
3One end, 28 pin connecting resistance CIR
8With capacitor C IC
3An end, 29 pin meet the insert row P in the self check encrypted circuit
25 pin, the resistance R in the 11 pin circuit taking alarm
2An end, 2 pin are taken over control the NAND gate IC that steals in the information acquisition circuit
46 pin and R
17 pin, 1 pin order steady state trigger IC
57 pin, 32 pin meet R
3An end and photoelectrical coupler IC
34 pin; 31 pin are connected the resistance TCR in the letter modular circuit
4, TCR
3An end, 30 pin are connected letter module TCJ
118 pin, 17 pin meet the insert row P in the self check encrypted circuit
23 pin, 14 pin are connected the communication module ICJ of letter modular circuit 4
115 pin.
The beneficial effects of the utility model are: the antitheft data processing terminal of this power equipment can be according to antitheft data such as adjacent locations, approaching, vibration and electric current, the isoparametric variation of voltage, the isoparametric variation of voltage, at any time take measures automatically, and adopt multiple means to monitor antitheft data and parameters such as electric current, voltage such as all positions, approaching, vibration in real time, guarantee equipment reliability service and staff's safety; Reliability height, cost are hanged down and are easy to maintenance.
Description of drawings
Specify with embodiment below in conjunction with accompanying drawing.
Fig. 1 shows the antitheft data processing terminal block diagram of power equipment.
The power circuit principle figure of Fig. 2 diagrammatic sketch 1.
The electrical transformation circuit theory diagrams of Fig. 3 diagrammatic sketch 1.
The electrical transformation circuit theory diagrams of Fig. 4 diagrammatic sketch 1.
CPU control, self check and the encryption of Fig. 5 diagrammatic sketch 1, warning, calendar clock circuit theory diagrams.
The communication module of Fig. 6 diagrammatic sketch 1, antitheft information acquisition circuit schematic diagram.
Among the figure, the 1-power circuit; 2-electrical transformation circuit; The 3-CPU control circuit; 4-communication module circuit; 5-calendar clock circuit; The antitheft information acquisition circuit of 6-; The 7-warning circuit; 8-self check and encrypted circuit; IC
1-ATMEGA
8Single-chip microcomputer; Y
1-crystal oscillator; L
1-inductance; PIC
1, PIC
2-three terminal regulator; PTC
3-power regulator; P
0-dc supply input; P
3-12V storage battery; The BAT-battery; AI, BI, CI-A, B, C are to current input terminal; AIS, BIS, CIS-electric parameters transducer; A II CA, B II CA, C II CA-operational amplifier; AIICB, BIICB, CIICB-operational amplifier; AV, BV, CV-A, B, C are to voltage input end; AVS, BVS, CVS-electric parameters transducer; AVICA, BVICA, CVICA-operational amplifier; AVICB, BVICB, CVICB-transport amplifier to; TCJ
1-communication module; SIM-mobile phone card; IC
2-calendar clock chip; IC
3-photoelectrical coupler; IC
4-NAND gate; P
1, P
2, P
4-insert row; J
1-relay; IC
6-encryption single-chip microcomputer; TCQ
1-triode; PCD
1, PCD
2, AID
1, AID
2, AID
3, BID
1, BID
2, BID
3, CID
1, CID
2, CID
3, AVD
1, AVD
2, AVD
3, BVD
1, BVD
2, BVD
3, CVD
1, CVD
2, CVD
3-diode; TCD
1-light-emitting diode; PC
1, PC
2, PC
3, PC
6, AIC
2, BIC
2, CIC
2, AVC
2, BVC
2, CVC
2, C
2, C
7-electrochemical capacitor; PC
4, PC
5, PC
7, PC
8, AIC
1, BIC
1, CIC
1, AIC
3, BIC
3, CIC
3, AVC
1, BVC
1, CVC
1, AVC
3, BVC
3, CVC
3, C
1, C
3~C
6-electric capacity; R
1-resistor chain; PR
1, PR
2, PR
3, AIR
2, BIR
2, CIR
2, AIR
8, BIR
8, CIR
8, AVR
1, BVR
1, CVR
1, AVR
8, BVR
8, CVR
8, TCR
1, TCR
3, TCR
4, 2R
1, R
2~R
7-resistance;
Embodiment
With reference to accompanying drawing, a kind of antitheft data processing terminal of being made up of power circuit 1, electrical transformation circuit 2, communication module circuit 4, calendar clock circuit 5, antitheft information acquisition circuit 6, warning circuit 7 and self check and encrypted circuit 8 of power equipment is characterized in being provided with cpu control circuit 3 in system, cpu control circuit 3 comprises: ATMEGA
8Single-chip microcomputer IC
1, resistor chain R
1, inductance L
1, crystal oscillator Y
1And capacitor C
3~C
6IC
17 pin meet Y
1And C
3An end, 8 pin meet Y
1The other end and C
4One end, C
3, C
4The other end joins and ground connection, and 13 pin meet the calendar clock chip IC in the calendar clock circuit 5
27 pin and resistor chain R
14 pin, 12 pin meet IC
26 pin and R
15 pin, 6,4 pin meet R
11 pin and power supply, 15,16 pin meet the P in self check and the encrypted circuit 8 respectively
24,1 pin and IC
65,6 pin, 22,19 pin ground connection, 18 pin meet C
5, L
1An end, 20 pin meet C
6An end, L
1Another termination power, C
5, C
6Other end ground connection, 21 pin ground connection, 3,5 pin ground connection; 23 pin meet the resistance AVR in the electrical transformation circuit 2
8With electric capacity AVC
3An end, 24 pin connecting resistance BVR
8With electric capacity BVC
3An end, 25 pin connecting resistance CVR
8With capacitor C VC
3An end, 26 pin connecting resistance ATR
8With electric capacity ATC
3One end, 27 pin connecting resistance BIR
8With electric capacity BTC
3One end, 28 pin connecting resistance CIR
8With capacitor C IC
3An end, 29 pin meet the insert row P in the self check encrypted circuit
25 pin, the resistance R in the 11 pin circuit 7 taking alarm
2An end, 2 pin are taken over control the NAND gate IC that steals in the information acquisition circuit 6
46 pin and R
17 pin, 1 pin order steady state trigger IC
57 pin, 32 pin meet R
3An end and photoelectrical coupler IC
34 pin; 31 pin are connected the resistance TCR in the letter modular circuit 4
4, TCR
3An end, 30 pin are connected letter module TCJ
118 pin, 17 pin meet the insert row P in self check and the encrypted circuit 8
23 pin, 14 pin are connected the communication module ICJ of letter modular circuit 4
115 pin.
Power circuit 1 (seeing accompanying drawing 2) comprising: three terminal regulator PIC
1, PIC
2, power regulator PIC
3, dc supply input P
0, storage battery P
3, diode PD
1, PD
2, electrochemical capacitor PC
1~PC
3, PC
6, capacitor P C
4, PC
5, PC
7, PC
8With resistance PR
1~PR
3PIC
11 pin meet PC
1Positive pole, PD
2, PD
1, PR
1An end, PC
2Positive pole and PIC
23 pin, 2 pin meet PC
1Negative pole and ground, 3 pin meet PC
3Positive pole, PC
4One end, PIC
34 pin and the insert row P in the antitheft information acquisition circuit 6
41 pin; P
01 pin meet PD
1The other end, 2 pin ground connection; P
32 pin meet PR
1, PD
2The other end, 1 pin ground connection, PC
3Negative pole meet PC
4The other end and ground, PIC
21 pin ground connection, 2 pin meet PC
6Positive pole, PC
7, PC
8One end and power supply, PC
6Minus earth, PC
7, PC
8Other end ground connection, PIC
32,3 pin ground connection, 1 pin meets PC
5, PR
2, PR
3One end, 5 pin meet PC
5, PR
2ICJ in the other end and the communication module circuit 4
11,2,3,4,5 pin, TCD
1An end, PR
3Other end ground connection.
Electrical transformation circuit 2 (seeing accompanying drawing 3,4) comprises that A, B, C become contrary device ALS, BLS, CLS, operational amplifier A IICA, BIICA, CIICA, operational amplifier A VICB, BVICB, CVICB, diode AVD to voltage input end AV, BV, CV, electric parameters transducer AVS, BVS, CVS, operational amplifier A VICA, BVICA, CVTCA, operational amplifier A IICB, BIICB, CIICB, A, B, C to current input terminal AI, BI, CI, electric weight
1, AVD
2, AVD
3, BVD
1, BVD
2, BVD
3, CVD
1, CVD
2, CVD
3, electrochemical capacitor AVC
2, BVC
2, CVC
2, AIC
2, BIC
2, CIC
2, electric capacity AVC
1, BVC
1, CVC
1, AVC
3, BVC
3, CVC
3, AIC
1, BIC
1, CIC
1, AIC
3, BIC
3, CIC
3, resistance AVR
1~AVR
8, BVR
1~BVR
8, CVR
1~CVR
8R
2~AIR
8, BIR
2~BIR
8, CIR
2~CIR
81 pin of AV connects 2 pin of AVS, and 2 pin meet AVR
1An end, 1 pin of AVS meets AVR
1The other end, 3 pin meet AVR
2, AVD
1, AVD
2And AVR
3An end, 4 pin meet AVR
2, AVD
1, AVD
2The other end, with 3 pin of AVICA; 2 pin of AVICA meet AVR
3The other end and the end of AVR4,4 pin ground connection, 1 pin meets AVD
3An end, 8 pin connect power supply, AVD
3Another termination AVC
1One end, AVC
2Anodal, AVR
5An end and AVR
4The other end, AVC
1Meet AVC
2Negative pole and ground; 5 pin of AVICB meet AVR
5The other end, 6 pin meet AVR
6, AVR
7One end, 7 pin meet AVR
7The other end and AVR
8One end; AVR
6Other end ground connection, AVC
3Other end ground connection.1 pin of BV connects 2 pin of BVS, and 2 pin meet BVR
1An end; 3 pin of BVS meet BVR
2, BVD
1, BVD
2And BVR
3An end, 4 pin meet BVR
2, BVD
1, BVD
2The other end, with 3 pin of BVICA, 1 pin meets BVR
1The other end; 2 pin of BVICA meet BVR
3The other end, BVR
4One end, 4 pin ground connection, 1 pin meets BVD
3An end, 8 pin connect power supply; BVD
3Another termination BVR
4The other end, BVC
1One end, BVC
2Anodal, BVR
5One end, BVC
1Another termination BVC
2Negative pole and ground; 5 pin of BVICB meet BVR
5The other end, 6 pin meet BVR
6, BVR
7One end, 7 pin meet BVR
7And BVR
8The other end, BVC
3Other end ground connection, BVR
6Other end ground connection; 1 pin of CV connects 2 pin of CVS, and 2 pin meet CVR
1An end; 1 pin of CVS meets CVR
1The other end, 3 pin meet CVR
2, CVD
1, CVD
2And CVR
3One end, 4 pin meet CVR
2, CVD
1, CVD
2The other end, with 3 pin of CVICA; 2 pin of CVICA meet CVR
3The other end and CVR
4One end, 4 pin ground connection, 1 pin meets CVD
3One end, 8 pin connect power supply; CVD
3Another termination CVC
1One end, CVR
4The other end, CVC
2Positive pole and CVR
5One end, CVC
1Another termination CVC
2Negative pole and ground; 5 pin of CVICB meet CVR
5The other end, 7 pin meet CVR
8, CVR
7One end, 6 pin meet CVR
7The other end and CVR
6One end, CVR
6Other end ground connection, CVC
3Other end ground connection.1,2 pin of AI connect 2,1 pin of AIS, and 3 pin of AIS meet AIR
2, AID
1, AID
2, AIR
3An end, 4 pin meet AIR
2, AID
1, AID
2The other end, with 3 pin of AIICA, 2 pin of AIICA meet AIR
3The other end and AIR
4One end, 4 pin ground connection, 1 pin meets AID
3It is power supply that one end, 8 pin connect; AID
3Another termination AIC
1, AIR
5One end and AIC
2Positive pole, AIC
1The negative pole of another termination AIC2 and ground; 5 pin of AIICB meet AIR
5The other end, 6 pin meet AIR
6, AIR
7An end, AIR
6Other end ground connection, 7 pin meet AIR
7The other end, AIR
8One end, AIC
3Other end ground connection; 1,2 pin of BI connect 2,1 pin of BIS, and 3 pin of BIS meet BIR
2, BID
1, BID
2, BIR
3An end, 4 pin meet BIR
2, BID
1, BID
2The other end, with 3 pin of BIICA; 2 pin of BIICA meet BIR
3The other end and BIR
4One end, 4 pin ground connection, 1 pin meets BID
3An end, it is the source that 8 pin connect; BID
3Another termination BIC
1, BIR
5One end, BIC
2Positive pole and BIR
4The other end, BIC
1Another termination BIC
2Negative pole and ground; 5 pin of BIICB meet BIR
5The other end, 6 pin meet BIR
6, BIR
7An end, 7 pin meet BIR
8One end and BIR
7The other end, BIR
6Other end ground connection, BIC
3One end ground connection.1,2 pin of CI connect 2,1 pin of CIS respectively; 3 pin of CIS meet CIR
2, CID
1, CID
2, CIR
3An end, 4 pin meet CIR
2, CID
1, CID
2The other end, with 3 pin of CIICA; 2 pin of CIICA meet CIR
3The other end, CIR
4One end, 4 pin ground connection, 1 pin meets CID
3One end, 8 pin connect power supply, CID
3In addition termination CIC
1, CIR
5One end, CIC
2Positive pole and CIR
4The other end, CIC
1Another termination CIC
2Negative pole and ground; 5 pin of CIICB meet CIR
5The other end, 6 pin meet CIR
6, CIR
7An end, CIR
6Other end ground connection, 7 pin meet CIR
8One end and CIR
7The other end, CIC
3Other end ground connection.
Communication module circuit 4 (seeing accompanying drawing 6) comprising: communication module ICJ
1, mobile phone card SIM, triode TCQ
1, light-emitting diode TCD
1, resistance TCR
1~TCR
4, ICJ
16,7,8,9,10 pin circuit 7 taking alarm in P
12 pin and antitheft information acquisition circuit 8 in 4 pin of ICS, 24,28 pin connect 3,5 pin of SIM, 25,26,27,29 pin connect 2,6,1,4 pin of SIM respectively, 29 pin ground connection, 32 pin connect the end of TCR2; The base stage of TCQ1 meets TCR
1The other end, grounded emitter, collector electrode meets TCR
1One end, another termination of TCR1 TCD
1The other end.
Calendar clock circuit 5 (seeing accompanying drawing 5) comprising: calendar clock chip IC
2, battery BAT, diode D
1, D
2, electrochemical capacitor C
2And capacitor C
1IC
28 pin meet D
1, D
2, C
1An end and C
2Positive pole, 4 pin meet C
1The other end, C
2Negative pole and ground, D
1Another termination power, D
2Another termination BAT one end, BAT other end ground connection
Antitheft information acquisition circuit 6 (seeing accompanying drawing 6) comprising: monostable flipflop IC
5, NAND gate IC
4, photoelectrical coupler IC
3, insert row P
4, electrochemical capacitor C
7And resistance R
3~R
7, ZR
1, J
2IC
51,4,8 pin ground connection, 2 pin R
7One end and C
7Positive pole, 5 pin meet IC
42 pin, 3,16 pin connect power supply, R
7Another termination power, C
7Minus earth.IC
41 pin meet R
5, ZR
1One end, 3 pin connect 8 pin, and 4 pin connect 5 pin, 7 pin ground connection, 9 pin meet J
21 pin and R
6One end, R
6Another termination power, J
22 pin ground connection, 14 pin connect power supply; P
41 pin meet PIC
13 pin, PIC
34 pin, PC
4An end and PC
3Positive pole,, 2 pin meet R
4One end, 3 pin ground connection; IC
31 pin meet R
4The other end, 2 pin meet 3 pin and ground, R
3Another termination power.
Warning circuit 7 (seeing accompanying drawing 5) comprises insert row P
1, relay J
1, triode Q
1, diode D
3And resistance R
2P
11 pin meet J
18,9 pin, 2 pin meet P
26 pin; Q
1Base stage meet R
2The other end, grounded emitter, collector electrode meets D
3An end, 16 pin of J, D
3Another termination J
11 pin and power supply, J
14,13 pin meet PIC
11 pin.
Self check and encrypted circuit 8 (seeing accompanying drawing 5) comprise encrypts single-chip microcomputer TC
6, insert row P
2TC
64 pin ground connection, 8 pin connect power supply; P
22 pin connect power supply.
Claims (1)
1. antitheft data processing terminal of being made up of power circuit (1), electrical transformation circuit (2), communication module circuit (4), calendar clock circuit (5), antitheft information acquisition circuit (6), warning circuit (7) and self check and encrypted circuit (8) of power equipment is characterized in that being provided with cpu control circuit (3), cpu control circuit (3) comprising: ATMEGA in system
8Single-chip microcomputer (IC
1), resistor chain (R
1), inductance (L
1), crystal oscillator (Y
1) and electric capacity (C
3~C
6); (IC
1) 7 pin meet (Y
1) and (C
3) an end, 8 pin meet (Y
1) other end and (C
4) end, (C
3), (C
4) other end joins and ground connection, 13 pin meet the calendar clock chip (IC in the calendar clock circuit (5)
2) 7 pin and resistor chain (R
1) 4 pin, 12 pin meet (IC
2) 6 pin and (R
1) 5 pin, 6,4 pin meet (R
1) 1 pin and power supply, 15,16 pin meet the insert row (P in self check and the encrypted circuit (8) respectively
2) 4,1 pin and encrypt single-chip microcomputer (IC
6) 5,6 pin, 22,19 pin ground connection, 18 pin meet electric capacity (C
5), inductance (L
1) an end, 20 pin meet (C
6) an end, (L
1) another termination power, (C
5), (C
6) other end ground connection, 21 pin ground connection, 3,5 pin ground connection; 23 pin meet the resistance (AVR in the electrical transformation circuit (2)
8) and electric capacity (AVC
3) an end, 24 pin connecting resistance (BVR
8) and electric capacity (BVC
3) an end, 25 pin connecting resistance (CVR
8) and electric capacity (CVC
3) an end, 26 pin connecting resistance (ATR
8) and electric capacity (ATC
3) end, 27 pin connecting resistance (BIR
8) and electric capacity (BTC
3) end, 28 pin connecting resistance (CIR
8) and electric capacity (CIC
3) an end, 29 pin meet the insert row (P in the self check encrypted circuit
2) 5 pin, the resistance (R in the 11 pin circuit taking alarm (7)
2) an end, 2 pin are taken over control the NAND gate (IC that steals in the information acquisition circuit (6)
4) 6 pin and (R
1) 7 pin, 1 pin order steady state trigger (IC
5) 7 pin, 32 pin connecting resistance (R
3) an end and photoelectrical coupler (IC
3) 4 pin; 31 pin are connected the resistance (TCR in the letter modular circuit (4)
4), (TCR
3) an end, 30 pin are connected letter module (TCJ
1) 18 pin, 17 pin meet the insert row (P in self check and the encrypted circuit (8)
2) 3 pin, 14 pin are connected the communication module (ICJ of letter modular circuits (4)
1) 15 pin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU2007200122042U CN201039282Y (en) | 2007-05-18 | 2007-05-18 | Theft-prevention data processing terminal for power device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU2007200122042U CN201039282Y (en) | 2007-05-18 | 2007-05-18 | Theft-prevention data processing terminal for power device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN201039282Y true CN201039282Y (en) | 2008-03-19 |
Family
ID=39211812
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNU2007200122042U Expired - Fee Related CN201039282Y (en) | 2007-05-18 | 2007-05-18 | Theft-prevention data processing terminal for power device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN201039282Y (en) |
-
2007
- 2007-05-18 CN CNU2007200122042U patent/CN201039282Y/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080319 |