CN201032737Y - Converting switch based input circuit - Google Patents

Converting switch based input circuit Download PDF

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Publication number
CN201032737Y
CN201032737Y CNU200720120450XU CN200720120450U CN201032737Y CN 201032737 Y CN201032737 Y CN 201032737Y CN U200720120450X U CNU200720120450X U CN U200720120450XU CN 200720120450 U CN200720120450 U CN 200720120450U CN 201032737 Y CN201032737 Y CN 201032737Y
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CN
China
Prior art keywords
circuit
resistance
capacitor
input
signal input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNU200720120450XU
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Chinese (zh)
Inventor
邢广珍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen luckystar Polytron Technologies Inc
Original Assignee
Shenzhen Skyworth RGB Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Skyworth RGB Electronics Co Ltd filed Critical Shenzhen Skyworth RGB Electronics Co Ltd
Priority to CNU200720120450XU priority Critical patent/CN201032737Y/en
Application granted granted Critical
Publication of CN201032737Y publication Critical patent/CN201032737Y/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

The utility model discloses an input circuit for switching the switch. The utility model comprises a video signal input switching chip, a signal input terminator, a DC isolating circuit which comprises a capacitance C1 and a resistance R5 is connected with the signal input terminator, a DC biasing circuit and an emitter follower circuit which are connected with the DC biasing circuit, a low-pass filtering circuit which is connected with the output of the emitter follower circuit, and an EOS protective circuit. The damage of the EOS surge current is able to be effectively prevented by the input circuit of the utility model; the mutual interferences between the different signal inputs when the switches are turned on or off are reduced; the weakening of the signal is able to be compensated well, the distortion of the signal is able to be reduced to minimum, and the quality of the image is improved greatly.

Description

A kind of input circuit based on diverter switch
[technical field]
The present invention relates to technical field of television sets, particularly a kind of input circuit based on diverter switch.
[background technology]
At present, many television sets all possess the function that can import the unlike signal source are arranged, and when these signals are imported simultaneously, need to switch one road signal and carry out Video processing through gating; Yet because the restriction of bandwidth, these gatings switch the signal that and often are accompanied by bigger decay and distortion, and the phase mutual interference has a strong impact on the image processing of subsequent step, makes picture quality descend greatly.So be necessary to provide a kind of technical scheme, the phase mutual interference when reducing the unlike signal input switch, the decay and the problem of dtmf distortion DTMF of solution signal, the quality of raising image.
[utility model content]
For addressing the above problem, the main purpose of this creation is to provide a kind of input circuit based on diverter switch.
For achieving the above object; the technical scheme of this creation is: a kind of input circuit based on diverter switch comprises that chip, signal input terminal, the DC buffer circuit of being made up of capacitor C 1, resistance R 5 that is connected with signal input terminal are switched in vision signal input, the DC biasing circuit that is connected with the DC buffer circuit exports low-pass filter circuit and the EOS protective circuit that links to each other with penetrating with circuit, with penetrating with circuit.
Further, described EOS protective circuit includes to be connected in to penetrate with diode D1, D2 between circuit and the low-pass filter circuit and in the vision signal input and switches the VCC end of chip and resistance R 4, capacitor C 3 and resistance R 3, the capacitor C 2 that the GND termination is gone into.
Compared to prior art, a kind of destruction that can effectively prevent the EOS surge current of the present invention based on the input circuit of diverter switch, the phase mutual interference when reducing the unlike signal input switch, decay that can well compensating signal, make distorted signals reduce to minimum, improve the quality of image greatly.
[description of drawings]
Fig. 1 is the circuit theory diagrams of a kind of input circuit based on diverter switch of this creation.
[embodiment]
Please refer to shown in Figure 1; a kind of input circuit based on diverter switch of the utility model comprises that chip, signal input terminal, the DC buffer circuit of being made up of capacitor C 1, resistance R 5 that is connected with input terminal are switched in vision signal input, the DC biasing circuit that is connected with the DC buffer circuit exports low-pass filter circuit and the EOS protective circuit that links to each other with penetrating with circuit, with penetrating with circuit.Vision signal input switching chip is the PIV330 chip in this creation.
The DC buffer circuit mainly is made up of capacitor C 1, resistance R 5, and capacitor C 1 provides DC to isolate, thereby stops the surge impact of EOS, capacitor C 1 also provides coupling for AC to the DC biasing circuit in addition, its value is 0.1~100uf, specifically depends on the bandwidth of input signal, is generally 47uf.The more little surge current that can reduce EOS more of the value of capacitor C 1, but also often limited the bandwidth of low frequency.And resistance R 5 is 75 ohm a terminating resistor.
The DC biasing circuit mainly is made up of resistance R 6, resistance R 7, transistor T 1, resistance R 8 and resistance R 9 with penetrating with circuit.The 5V power supply produces the base stage that a DC bias voltage is supplied with transistor T 1 through resistance R 6, resistance R 7 dividing potential drops, and the ratio that changes resistance R 6 and resistance R 7 can change the size of this bias voltage.This bias voltage provides a carrier for the signal of capacitor C 1 output, can avoid the distortion of signal.Transistor T 1 is emitter output, can follow the input of transistor T 1 base stage, and the ratio that changes resistance R 8 and resistance R 9 can be adjusted the gain of transistor T 1, with the loss of compensating signal.
Low-pass filter circuit mainly is made up of inductance L 1, capacitor C 4 and capacitor C 5, effective to general Ypbpr, YUV, YIQ, Y/R-Y/B-Y signal and composite signal (as NTSC, PAL, SECAM), the bandwidth of these signals all below 30Mhz, but be higher than for bandwidth 30Mhz the VGA type rgb signal and be not suitable for.This filter is with the high frequency composition at those fast lifting edges in the line synchronizing signal on the filtering Y-signal.The value size of adjusting capacitor C 4, capacitor C 5 and inductance L 1 can be optimized the frequency response of filter.When chip was switched in two paths of signals incoming video signal input simultaneously, they produced by parasitic capacitance each other and disturb, and can effectively reduce interference by selecting low pass filter for use.
The EOS protective circuit comprises being connected in to penetrate with diode D1, D2 between circuit and the low-pass filter circuit and in the vision signal input switches the VCC end of chip and resistance R 4, capacitor C 3 and resistance R 3, the capacitor C 2 that the GND termination is gone into.The cut-in voltage of diode D1, D2 is 0.7V, and they are higher than 5.7V with clamp EOS level or are lower than negative 0.7V, by unnecessary EOS level is fallen through 5V or ground connection disappearing.Resistance R 3, resistance R 4 restrictions are because the EOS electric current that the endoparasitic diode of chip change over switch causes is switched in the vision signal input.And capacitor C 2 and capacitor C 3 are shunt capacitance, in order to the ripple of filtering VCC.
Signal is exported from input terminal, is coupled to the dc bias circuit of transistor T 1 through capacitor C 1.Transistor T 1 is to penetrate with circuit to export; the signal of output need be through current-limiting protection and the clamping action of diode D1 and D2; and then the process low-pass filter circuit leaches unwanted high-frequency interferencing signal; chip internal is switched in last incoming video signal input, and the signal of input switches through vision signal input to be exported after chip internal switches gating.
Most preferred embodiment described above only is that this creation is set forth and illustrated, but is not limited to disclosed any concrete form, and it is possible carrying out many modifications and variations.

Claims (4)

1. input circuit based on diverter switch; comprise that vision signal input switches chip, signal input terminal, it is characterized in that: also include the DC buffer circuit of forming by capacitor C 1, resistance R 5 that is connected with signal input terminal, the DC biasing circuit that is connected with the DC buffer circuit and penetrate with circuit, with penetrating and export low-pass filter circuit and the EOS protective circuit that links to each other with circuit.
2. the input circuit based on diverter switch as claimed in claim 1 is characterized in that: described EOS protective circuit includes to be connected in to penetrate with diode D1, D2 between circuit and the low-pass filter circuit and in the vision signal input switches the VCC end of chip and resistance R 4, capacitor C 3 and resistance R 3, the capacitor C 2 that the GND termination is gone into.
3. the input circuit based on diverter switch as claimed in claim 2 is characterized in that: described DC biasing circuit mainly is made up of resistance R 6, resistance R 7, transistor T 1, resistance R 8 and resistance R 9 with penetrating with circuit; The 5V power supply produces the base stage that a DC bias voltage is supplied with transistor T 1 through resistance R 6, resistance R 7 dividing potential drops, and transistor T 1 is emitter output, can follow the input of base stage.
4. the input circuit based on diverter switch as claimed in claim 2, it is characterized in that: described low-pass filter circuit mainly is made up of inductance L 1, capacitor C 4 and capacitor C 5, and the value size of adjusting capacitor C 4, capacitor C 5 and inductance L 1 can be optimized the frequency response of filter.
CNU200720120450XU 2007-05-31 2007-05-31 Converting switch based input circuit Expired - Lifetime CN201032737Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU200720120450XU CN201032737Y (en) 2007-05-31 2007-05-31 Converting switch based input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU200720120450XU CN201032737Y (en) 2007-05-31 2007-05-31 Converting switch based input circuit

Publications (1)

Publication Number Publication Date
CN201032737Y true CN201032737Y (en) 2008-03-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
CNU200720120450XU Expired - Lifetime CN201032737Y (en) 2007-05-31 2007-05-31 Converting switch based input circuit

Country Status (1)

Country Link
CN (1) CN201032737Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112596044A (en) * 2020-11-20 2021-04-02 上海禾赛科技股份有限公司 Receiving device, laser radar and method for reducing interference signals of laser radar receiving device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112596044A (en) * 2020-11-20 2021-04-02 上海禾赛科技股份有限公司 Receiving device, laser radar and method for reducing interference signals of laser radar receiving device

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: SHENZHEN CITY CHAO MING INDUSTRY CO.,LTD.

Free format text: FORMER OWNER: SHENZHEN SKYWORTH-RGB ELECTRONIC CO., LTD.

Effective date: 20091016

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20091016

Address after: Guangdong city of Shenzhen province Baoan District Longhua Street sea water village Huarong Road Yu Jingtai Industrial Park building four floor, zip code: 518000

Patentee after: Shenzhen City Mingchao Industrial Co., Ltd.

Address before: Guangdong city of Shenzhen province Nanshan District Gao Xin Road SKYWORTH building A13-16, zip code: 518057

Patentee before: Shenzhen Skyworth-RGB Electronics Co., Ltd.

C56 Change in the name or address of the patentee
CP03 Change of name, title or address

Address after: 518000 Guangdong province Shenzhen city Longhua District Office sea water village Yu Jingtai Huarong Road Industrial Park 1 4 floor

Patentee after: Shenzhen luckystar Polytron Technologies Inc

Address before: 518000 Guangdong city of Shenzhen province Baoan District Longhua Street sea water village Huarong Road Yu Jingtai Industrial Park building four floor

Patentee before: Shenzhen City Mingchao Industrial Co., Ltd.

CX01 Expiry of patent term

Granted publication date: 20080305

CX01 Expiry of patent term