CN201004620Y - An interlock circuit with delay function - Google Patents
An interlock circuit with delay function Download PDFInfo
- Publication number
- CN201004620Y CN201004620Y CNU2007201184351U CN200720118435U CN201004620Y CN 201004620 Y CN201004620 Y CN 201004620Y CN U2007201184351 U CNU2007201184351 U CN U2007201184351U CN 200720118435 U CN200720118435 U CN 200720118435U CN 201004620 Y CN201004620 Y CN 201004620Y
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- Prior art keywords
- resistance
- triode
- out end
- delay function
- circuit
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Abstract
The utility model discloses an interlocking circuit with the time-delaying function, which comprises an IN end for receiving an trigger signal and an OUT end which is connected with an input end of the circuit. The OUT end is connected with the ground end by a resistance R4 and a dynatron Q1; the IN end is connected with the OUT end by a resistance R3 and a dynatron Q2. The utility model provides an interlocking circuit with the time-delaying function, can forcefully draw the original controlling signal to a low level, and has the advantages of the time-delaying function and fast responding speed, to make the power supply have enough time to restore, thereby avoiding the repeating start in a short time.
Description
[technical field]
The utility model relates to the tv product technical field, particularly is applied to a kind of interlock circuit with delay function in TV set power protective circuit and the signal control circuit.
[background technology]
In the TV set power protective circuit, when the power protecting circuit overvoltage, the circuit of forming with a triode and biasing resistor can realize that control signal forces to move to low level, the protection power circuit; Yet after in a single day the base stage triggering signal of triode is cancelled, control signal will return to original state again, not have the delay function and the quick function of response, so be necessary to provide a kind of delay function that has, make power supply that the circuit that the time of abundance recovers be arranged.
[novel content]
For addressing the above problem, main purpose of the present utility model is to provide a kind of interlock circuit with delay function.
For achieving the above object, the technical scheme of this creation is: a kind of interlock circuit with delay function, include the IN end that receives triggering signal, the OUT end that is connected with the signal control circuit input, it is characterized in that: described OUT end is held by a resistance R 4, triode Q1 with being connected to; And the IN end is connected to the OUT end by a resistance R 3, triode Q2.
Further, the collector electrode c of described triode Q1 links to each other with resistance R 4, emitter e ground connection, and base stage b is connected between the collector electrode c and resistance R 3 of triode Q2 by a resistance R 2.
Further, be connected the RC parallel circuits that constitutes by resistance R 1 and electrochemical capacitor C1 between the base stage b of described triode Q1 and the resistance R 2, this parallel circuits other end ground connection.
Further, the loop that the collector electrode c of described resistance R 4, triode Q1 and emitter e and ground are formed, the electric current of described OUT end can discharge by this loop.
Further, the loop that the emitter e of described triode Q2, collector electrode c, resistance R 2, resistance R 1 and ground are formed, the electric current of described OUT end can discharge by this loop.
Compared to prior art, a kind of interlock circuit with delay function of the utility model can be forced original control signal to move low level to, and the characteristics that have delay function and can respond fast, allow power supply have the sufficient time to recover, avoided repeating in the short time secondary start.
[description of drawings]
Fig. 1 is circuit theory diagrams of the present utility model.
[embodiment]
Please refer to shown in Figure 1ly, a kind of interlock circuit with delay function comprises that the OUT that receives triggering signal IN end, is connected with signal control circuit (high level effective circuit) input holds; The IN end is connected to the OUT end by a resistance R 3, triode Q2; The OUT end also is connected with a resistance R 4, triode Q1; Wherein, triode Q1 collector electrode c links to each other with resistance R 4, emitter e ground connection, and base stage b is connected between the collector electrode c and resistance R 3 of triode Q2 by a resistance R 2; In addition, be connected the parallel circuits that constitutes by resistance R 1 and electrochemical capacitor C1 between triode Q1 base stage b and the resistance R 2, this parallel circuits other end ground connection.The three base stage b that take over Q2 are connected between the collector electrode c of resistance R 4 and triode Q1.
During the power supply operate as normal, each road voltage power supply state of power supply is relevant with control signal, and when control signal was high level, each road voltage power supply of power supply normally promptly had output voltage, and when opposite control signal was low level, each road voltage of power supply was not worked, not output voltage.This control signal links to each other with the OUT end, during the power supply operate as normal, and triode Q1 and all not conductings of Q2, the OUT end is still high level; When the power supply output abnormality, testing circuit judges back output high level and holds to IN, and to ground, this electric current is again by resistance R 3, resistance R 2, the electrochemical capacitor C1 base stage b to triode Q1 by resistance R 3, resistance R 2, resistance R 1 for IN end electric current; And OUT end electric current passes through the collector electrode c of resistance R 4 to triode Q1, triode Q1 conducting this moment; In addition, OUT end electric current is by the emitter e of triode Q2, triode Q2 conducting, OUT end electric current is by two circuit dischargings, wherein be one by the collector electrode c of resistance R 4, triode Q1 and emitter e with the loop formed; The loop that another is made up of emitter e and collector electrode c, resistance R 2, resistance R 1 and the ground of triode Q2.Thereby effectively the OUT terminal voltage is dragged down, each road voltage of power supply is not worked, reached the purpose of protection power supply.
Wherein triode Q2 is operated in the amplification region, and its base stage b electric current is big more, and the electric current of collector electrode c is also big more, and it is short more to move OUT end to the low level time.In addition, the capacity of electrochemical capacitor C1 and resistance R 1 are the devices of decision time-delay length, and the capacity of electrochemical capacitor C1 is big, resistance R 1 resistance is big, and then delay time is long; The capacity of electrochemical capacitor C1 is little, resistance R 1 resistance is little, and then delay time is just short.
Most preferred embodiment described above only is that the utility model is set forth and illustrated, but is not limited to disclosed any concrete form, and it is possible carrying out many modifications and variations.
Claims (5)
1. the interlock circuit with delay function comprises the IN end that receives triggering signal, the OUT end that is connected with the signal control circuit input, and it is characterized in that: described OUT end is held by a resistance R 4, triode Q1 with being connected to; And the IN end is connected to the OUT end by a resistance R 3, triode Q2.
2. the interlock circuit with delay function as claimed in claim 1 is characterized in that: the collector electrode c of described triode Q1 links to each other with resistance R 4, emitter e ground connection, and base stage b is connected between the collector electrode c and resistance R 3 of triode Q2 by a resistance R 2.
3. the interlock circuit with delay function as claimed in claim 2 is characterized in that: be connected the RC parallel circuits that is made of resistance R 1 and electrochemical capacitor C1 between the base stage b of described triode Q1 and the resistance R 2, this parallel circuits other end ground connection.
4. as any one described interlock circuit with delay function in the claim 1 to 3, it is characterized in that: the loop that the collector electrode c of resistance R 4, triode Q1 and emitter e and ground are formed, the electric current of described OUT end can discharge by this loop.
5. as any one described interlock circuit in the claim 1 to 3 with delay function, it is characterized in that: the loop that the emitter e of triode Q2, collector electrode c, resistance R 2, resistance R 1 and ground are formed, the electric current of described OUT end can discharge by this loop.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007201184351U CN201004620Y (en) | 2007-02-02 | 2007-02-02 | An interlock circuit with delay function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007201184351U CN201004620Y (en) | 2007-02-02 | 2007-02-02 | An interlock circuit with delay function |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201004620Y true CN201004620Y (en) | 2008-01-09 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2007201184351U Expired - Fee Related CN201004620Y (en) | 2007-02-02 | 2007-02-02 | An interlock circuit with delay function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201004620Y (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102761252A (en) * | 2012-07-25 | 2012-10-31 | 广州视源电子科技股份有限公司 | Switching power supply circuit with switching metal oxide semiconductor (MOS) tube |
| CN103158668A (en) * | 2013-03-26 | 2013-06-19 | 北京经纬恒润科技有限公司 | Self-locking output circuit and car anti-theft circuit |
| CN104660234A (en) * | 2015-01-13 | 2015-05-27 | 深圳市恩普电子技术有限公司 | Circuit for zero-power standby mode and small-signal on-off control |
| WO2017202304A1 (en) * | 2016-05-23 | 2017-11-30 | 中兴通讯股份有限公司 | Start-up and shut-down circuit |
| CN107856696A (en) * | 2017-11-07 | 2018-03-30 | 广州电力机车有限公司 | A kind of power process bogie |
-
2007
- 2007-02-02 CN CNU2007201184351U patent/CN201004620Y/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102761252A (en) * | 2012-07-25 | 2012-10-31 | 广州视源电子科技股份有限公司 | Switching power supply circuit with switching metal oxide semiconductor (MOS) tube |
| CN102761252B (en) * | 2012-07-25 | 2015-05-27 | 广州视源电子科技股份有限公司 | Switching power supply circuit with switching metal oxide semiconductor (MOS) tube |
| CN103158668A (en) * | 2013-03-26 | 2013-06-19 | 北京经纬恒润科技有限公司 | Self-locking output circuit and car anti-theft circuit |
| CN103158668B (en) * | 2013-03-26 | 2015-08-26 | 北京经纬恒润科技有限公司 | A kind of self-locking output circuit and automobile burglar circuit |
| CN104660234A (en) * | 2015-01-13 | 2015-05-27 | 深圳市恩普电子技术有限公司 | Circuit for zero-power standby mode and small-signal on-off control |
| WO2017202304A1 (en) * | 2016-05-23 | 2017-11-30 | 中兴通讯股份有限公司 | Start-up and shut-down circuit |
| CN107856696A (en) * | 2017-11-07 | 2018-03-30 | 广州电力机车有限公司 | A kind of power process bogie |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080109 Termination date: 20150202 |
|
| EXPY | Termination of patent right or utility model |