CN200966052Y - A time slot signal system automatic level control circuit - Google Patents

A time slot signal system automatic level control circuit Download PDF

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Publication number
CN200966052Y
CN200966052Y CNU2006200640174U CN200620064017U CN200966052Y CN 200966052 Y CN200966052 Y CN 200966052Y CN U2006200640174 U CNU2006200640174 U CN U2006200640174U CN 200620064017 U CN200620064017 U CN 200620064017U CN 200966052 Y CN200966052 Y CN 200966052Y
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China
Prior art keywords
circuit
time slot
level control
slot signal
control circuit
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Expired - Lifetime
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CNU2006200640174U
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Chinese (zh)
Inventor
方绍湖
林显添
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Comba Telecom Technology Guangzhou Ltd
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Comba Telecom Technology Guangzhou Ltd
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Abstract

The utility model discloses an automatic electric level control circuit for time slot signal mode system. The circuit is formed by connecting a power detection circuit, an integral amplifying and processing circuit, an ATT decaying circuit or a variable gain amplifier with each other. A source filtering circuit is connected in series between the integral amplifying and processing circuit and the ATT decaying circuit or the variable gain amplifier. The utility model can be widely applied in the time slot signal mode system such as TD-SCDMA, GSM, PHS, etc and makes the system raised by 20dB; the time-domain and time slot waveform is not influenced at all and indexes of system such as EVM, PkCDE, frequency error, etc are basically not worsened and the template test can pass smoothly; and when in use the PIN detecting tube, the high-low temperature variation of ALC power can also meet the requirement of the system very well. The utility model can be debugged simply, has low cost, makes the maximum output power of the communication equipment constant and genuinely achieves the purpose of protecting the power magnify circuit of the system and assuring normal communication.

Description

The automatic level control circuit of a kind of time slot signal standard system
Technical field
The utility model relates to time slot signal standard type mobile communication technical fields such as TD-SCDMA, GSM, PHS, specifically is meant the automatic level control circuit of a kind of time slot signal standard system.
Background technology
In wireless communication system,, make the received power of receiver constantly change because factors such as transmission environment is complicated and changeable.In direct discharging station, also unstable through the power output after amplifying, cause system's neutral line amplifier to enter the inelastic region, even saturated, obstruction, perhaps the power amplifier pumping signal is excessive and damage power tube, so must introduce automatic level control circuit in the communication equipments such as repeater, to guarantee that peak power output is constant.
Common automatic electric-level control (ALC) circuit mainly is made up of power detection circuit, integration amplification treatment circuit, ATT attenuator circuit or variable gain amplifier three parts, its operation principle is the output stage detection at circuit, detecting circuit obtains a control voltage through the integration amplification treatment circuit that is made of operational amplifier, the variable gain amplifier of control input end or the ATT attenuator circuit of forming by attenuation diode, with the intensity of adjustment input signal, thereby guarantee that peak power output is constant.The effect of this circuit in CDMA, WCDMA etc. transmits standard continuously is preferably, but also has the deficiency of the following aspects simultaneously:
1, this circuit application is started to control deeply and is had a strong impact on signal performance when the circuit of time slot signal standards such as GSM, PHS, and phenomenon appears significantly standing out in time domain time slot waveform, and the EVM index can not meet the demands.In gsm system, start to control 10dB deeply, can not pass through the temporal power template.
2, in the TD-SCDMA standard, when alc circuit begins to start to control, indexs such as EVM, PkCDE, frequency error just begin severe exacerbation, when starting to control 10dB deeply, owing to do not go up synchronously, can't measure every signal index with frequency spectrograph, can not pass through the spectral emission template, can't satisfy the performance requirement of ALC at all.
When if the detection of discrete component PIN pipe is used in 3 detections, because the property at high and low temperature of PIN pipe itself makes detecting circuit inaccurate under high low temperature.Cause the high low temperature of ALC power to change greatly, discontented pedal system requirement.
Summary of the invention
The purpose of this utility model is exactly in order to solve above-mentioned the deficiencies in the prior art part, and the automatic level control circuit of a kind of time slot signal standard system is provided.Use the time slot signal standard system of this circuit to start to control 20dB deeply, time domain time slot waveform has no effect, indexs such as the EVM of system, PkCDE, frequency error do not have to worsen substantially, and when using the PIN detection tube, and the high low temperature of ALC power changes and also is well positioned to meet system requirements.
The purpose of this utility model is achieved through the following technical solutions: the automatic level control circuit of described a kind of time slot signal standard system, interconnect by power detection circuit, integration amplification treatment circuit, ATT attenuator circuit or variable gain amplifier and to form series active filter circuit between described integration amplification treatment circuit and described ATT attenuator circuit or variable gain amplifier.
In order to realize the utility model better, described active filter circuit is a single order Butterworth active low-pass filter, is interconnected to constitute by resistance R 15, capacitor C 8 and operational amplifier U4A; Described power detection circuit is made of the PIN detection tube, is promptly interconnected and is formed by resistance R 11, detection tube D1, capacitor C 6, load resistance R12; Described load resistance R12 is in series with the detection tube D2 identical with detection tube D1 model, and the minus earth of described detection tube D2 constitutes the detection temperature-compensation circuit; The reference voltage of integration reference voltage also can be the controllable voltage of being sent here by D/A converter by processor for fixing 5V voltage in the described integration amplification treatment circuit.
The utility model and prior art with compare, have following advantage and beneficial effect:
1, the utility model is on the basis of common alc circuit, added active filter circuit in integration amplification treatment circuit back, make the voltage of sending into front-end A TT attenuator circuit or variable gain amplifier obtain good smoothing effect, and then make that in the attenuation of certain period of time Inner Front End ATT attenuator circuit or the multiplication factor of variable gain amplifier be constant, do not show the waveform that destroys time slot signal, guaranteeing does not influence signal performance, makes signal reach real transparent transmission through system.
2, the utility model can be widely used in the time slot signal standard systems such as TD-SCDMA, GSM, PHS, make system start to control 20dB deeply, time domain time slot waveform has no effect, indexs such as the EVM of system, PkCDE, frequency error do not have to worsen substantially, template test can pass through smoothly, and when using the PIN detection tube, the high low temperature variation of ALC power also is well positioned to meet system requirements.
3, the utility model debugging is simple, with low cost, makes the peak power output of communication equipment constant, really plays the protection system power amplifier and guarantees to communicate by letter normal purpose.
Description of drawings
Fig. 1 is the circuit block diagram of common automatic level control circuit;
Fig. 2 is a circuit block diagram of the present utility model;
Fig. 3 is the circuit theory diagrams among the utility model embodiment.
Embodiment
Below in conjunction with drawings and Examples, the utility model is done detailed description further, but execution mode of the present utility model is not limited to this.
As shown in Figure 1, the detecting circuit integration amplification treatment circuit, ATT attenuator circuit (being made up of attenuation diode) three parts that mainly constitute by the power detection circuit, by operational amplifier of common automatic level control circuit (being applied to power amplification circuit) are formed.
As shown in Figure 2, the utility model is interconnected by power detection circuit, integration amplification treatment circuit, ATT attenuator circuit or variable gain amplifier to be formed, and is in series with an active filter circuit between integration amplification treatment circuit and ATT attenuator circuit or variable gain amplifier.
As shown in Figure 3, electricity transfers attenuator tube U1 (HSMP-3814), U2 (HSMP-3814) to form the ATT attenuator circuit, R11, D1, C6, R12, the power detection circuit of D2 for constituting by the PIN detection tube, on the load resistance R12 of detection tube D1, be in series with a detection tube D2 with the D1 same model, the minus earth of D2 wherein, constitute the detection temperature-compensation circuit, detecting circuit substantially constant under the high low temperature in the time of can making the situation of detection equal-wattage like this is so that ALC power keeps substantially constant under the high low temperature.
Operational amplifier U3A (LM258), U3B (LM258) constitute the integration amplification treatment circuit of detecting circuit, the direct positive amplification demodulator of U3A voltage, enter the voltage swing of next stage with adjustment, R14, C7 and U3B form differential integrator, to obtain a control voltage corresponding with detecting circuit.The integration reference voltage is provided by the potentiometer and the electric resistance partial pressure that link to each other with 5 pin, the integration reference voltage is used for regulating ALC power, resistance R 22, the effect of R23 scratch line are used to select 5V that the reference voltage of integration reference voltage fixes or the controllable voltage of being sent here by D/A converter by processor.Because the time-delay of integrating circuit etc., a frame the inside number of time slots can appear working as not simultaneously, the situation that ALC power is not exclusively the same, therefore if it is just the same then should select the controllable voltage sent here by processor to require different time-gap to start to control power, processor is selected corresponding reference voltage according to the number of time slots of present frame, this moment, R23 was with 0 Ω resistance jumper connection, disconnected R22; Otherwise can select fixing 5V voltage for use, R22 disconnects R23 with 0 Ω resistance jumper connection.In addition, provide by the D/A conversion by processor, also can provide the voltage of respective change to realize the method for another ALC power temperature-compensating in different temperatures by processor if select to obtain reference voltage.
R15, C8 and U4A (LM258) constitute single order Butterworth active low-pass filter, form active filter circuit.Detecting circuit amplifies through positive, behind the anti-phase differential integration, still has big ripple, therefore need pass through active low-pass filter again, through the final controlled voltage in level and smooth back, controls the attenuation of ATT attenuator circuit, finally realizes the purpose that automatic electric-level is controlled.
The ATT attenuator circuit is replaced by variable gain amplifier in foregoing circuit, does not influence the realization of present embodiment according to such scheme.
The utility model can be used as the automatic level control circuit of time slot signal standard systems such as TD-SCDMA, GSM, PHS, start to control EVM, PkCDE, frequency error, the spectral emission template of 10dB deeply to signal, temporal power templates etc. are without any influence, start to control the 20dB signal performance deeply and still obviously do not worsen, can well satisfy system requirements.The ALC function adopts the discrete device detection also can make high low temperature ALC variable power in 0.5dB in 0.3dB, and single carrier is consistent with multicarrier ALC power.
As mentioned above, can realize the utility model preferably.

Claims (7)

1, the automatic level control circuit of a kind of time slot signal standard system, interconnect by power detection circuit, integration amplification treatment circuit, ATT attenuator circuit or variable gain amplifier and to form, it is characterized in that series active filter circuit between described integration amplification treatment circuit and described ATT attenuator circuit or variable gain amplifier.
2, the automatic level control circuit of a kind of time slot signal standard according to claim 1 system is characterized in that described active filter circuit is a single order Butterworth active low-pass filter.
3, the automatic level control circuit of a kind of time slot signal standard according to claim 2 system is characterized in that described single order Butterworth active low-pass filter is interconnected to constitute by resistance R 15, capacitor C 8 and operational amplifier U4A.
4, the automatic level control circuit of a kind of time slot signal standard according to claim 1 system is characterized in that described power detection circuit is made of the PIN detection tube, is promptly interconnected and is formed by resistance R 11, detection tube D1, capacitor C 6, load resistance R12.
5, the automatic level control circuit of a kind of time slot signal standard according to claim 4 system, it is characterized in that, described load resistance R12 is in series with the detection tube D2 identical with detection tube D1 model, and the minus earth of described detection tube D2 constitutes the detection temperature-compensation circuit.
6, the automatic level control circuit of a kind of time slot signal standard according to claim 1 system is characterized in that the reference voltage of integration reference voltage is fixing 5V voltage in the described integration amplification treatment circuit.
7, the automatic level control circuit of a kind of time slot signal standard according to claim 1 system is characterized in that the controllable voltage of the reference voltage of integration reference voltage for being sent here by D/A converter by processor in the described integration amplification treatment circuit.
CNU2006200640174U 2006-09-08 2006-09-08 A time slot signal system automatic level control circuit Expired - Lifetime CN200966052Y (en)

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CNU2006200640174U CN200966052Y (en) 2006-09-08 2006-09-08 A time slot signal system automatic level control circuit

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Application Number Priority Date Filing Date Title
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102136826A (en) * 2010-12-09 2011-07-27 东莞理工学院 ACL control and temperature compensation method and device
CN102257857A (en) * 2011-06-09 2011-11-23 华为技术有限公司 Method and device for compensating power according to frequency
CN102340286A (en) * 2010-07-16 2012-02-01 东莞理工学院 Method for realizing ALC (Adaptive Logic Circuit) control
CN105024657A (en) * 2014-04-30 2015-11-04 京信通信系统(中国)有限公司 Power amplifier protection method and system
CN105634428A (en) * 2015-12-31 2016-06-01 中国石油天然气集团公司 Automatic gain control system and control method for AGC (Automatic Gain Control) loop
CN107070427A (en) * 2017-04-24 2017-08-18 深圳国人通信股份有限公司 A kind of power control circuit and its control method
CN107707208A (en) * 2017-10-25 2018-02-16 京信通信系统(中国)有限公司 The signal power control method and control circuit of communication system equipment
CN112187201A (en) * 2020-10-22 2021-01-05 上海航天电子通讯设备研究所 Temperature compensation gain closed-loop circuit of satellite-borne gallium nitride solid-state power amplifier

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102340286A (en) * 2010-07-16 2012-02-01 东莞理工学院 Method for realizing ALC (Adaptive Logic Circuit) control
CN102136826A (en) * 2010-12-09 2011-07-27 东莞理工学院 ACL control and temperature compensation method and device
CN102136826B (en) * 2010-12-09 2013-02-27 东莞理工学院 ACL control and temperature compensation method and device
CN102257857A (en) * 2011-06-09 2011-11-23 华为技术有限公司 Method and device for compensating power according to frequency
CN102257857B (en) * 2011-06-09 2013-09-11 华为技术有限公司 Method and device for compensating power according to frequency
CN105024657A (en) * 2014-04-30 2015-11-04 京信通信系统(中国)有限公司 Power amplifier protection method and system
CN105634428A (en) * 2015-12-31 2016-06-01 中国石油天然气集团公司 Automatic gain control system and control method for AGC (Automatic Gain Control) loop
CN107070427A (en) * 2017-04-24 2017-08-18 深圳国人通信股份有限公司 A kind of power control circuit and its control method
CN107707208A (en) * 2017-10-25 2018-02-16 京信通信系统(中国)有限公司 The signal power control method and control circuit of communication system equipment
CN112187201A (en) * 2020-10-22 2021-01-05 上海航天电子通讯设备研究所 Temperature compensation gain closed-loop circuit of satellite-borne gallium nitride solid-state power amplifier

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