CN1983363A - EL display device and method of driving EL display device - Google Patents
EL display device and method of driving EL display device Download PDFInfo
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- CN1983363A CN1983363A CNA2006101685340A CN200610168534A CN1983363A CN 1983363 A CN1983363 A CN 1983363A CN A2006101685340 A CNA2006101685340 A CN A2006101685340A CN 200610168534 A CN200610168534 A CN 200610168534A CN 1983363 A CN1983363 A CN 1983363A
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Abstract
To program pixel transistors to conduct predetermined currents by charging/discharging parasitic capacitors of source signal lines, a relatively large current needs to be made to flow from each source driver circuit of current output type. However, if such a large current is made to flow through a source signal line, this current is programmed to flow through the pixel, and consequently a current larger than a desired current flows in the EL device 15. For example, if an 10-times current is programmed, a 10-times current flows in the El device 15, which emits light with a 10-times luminance. So as to achieve a predetermined luminance, the time during which the currents flows in the El device are set to 1/10 of one frame (1F). By thus driving the EL device, the parasitic capacitors of the source signal lines can be charged/discharged, thereby achieving a predetermined luminance.
Description
The application is that denomination of invention is " motivational techniques of EL display panel ", the applying date to be dividing an application of March 6, application number in 2003 female case that is 03815038.7 (PCT/JP 03/02597).
Technical field
The present invention relates to a kind of self luminous display panel, such as using the organic or inorganic field to imitate luminous (electroluminescent) (EL) EL display panel of element.And it relates to information display and analog, and their use EL display panel, be used for the motivational techniques of EL display panel and be used for the exciting circuit of EL display panel.
Background technology
Usually, Active Matrix Display is by arranging a large amount of pixels and coming display image corresponding to the light intensity that vision signal is controlled each pixel in matrix.For example, if liquid crystal is used as electrochemical substance, then the transmittance of each pixel changes according to the voltage that writes this pixel.Even using organic field to imitate under the situation of luminous (EL) material as the Active Matrix Display of electrochemical substance, basic operation is also identical with the situation of using liquid crystal.
In display panels, each pixel is worked as shutter, and as blocking by pixel or shutter or representing back side light display image.Organic EL display panel is the autoluminescence type, and wherein each pixel has light-emitting component.Thereby, such as the autoluminescence type display panel of organic EL display panel have more visible than display panels, do not need back lighting, have advantages such as high response speed.
The brightness of each light-emitting component (pixel) is controlled by the magnitude of current in the organic EL display panel.That is to say that the place that organic EL display panel is different from display panels greatly is that light-emitting component is by current excitation or control.
The structure of organic EL display panel can be simple matrix type or active matrix type.The big high-resolution display panel of realizing last type is difficult to, although last type structurally simple and cheap.The back can realize big high-resolution display panel for one type, but the problem that relates to is that this is the high control method of a kind of technical difficulty and relatively costly.At present, just concentrating on and developing active matrix type display panel.In active matrix type display panel, the electric current of the light-emitting component that provides in each pixel of flowing through is by being installed in thin film transistor (TFT) (transistor) control in the pixel.
A kind of like this organic EL display panel of active matrix type is disclosed in Japanese patent application publication No. No.8-234683.The equivalent electrical circuit of a pixel of display panel is shown in Figure 62.Pixel 16 is made up of EL element 15, the first transistor 11a, transistor seconds 11b and storage capacitor 19 as light-emitting component.Light-emitting component 15 is that organic field is imitated luminous (EL) element.According to the present invention, provide (control) electric current to be called driver transistor 11 for the transistor 11a of EL element 15.The transistor of working as switch, the transistor 11b shown in Figure 62 is called switching transistor 11.
In many cases, the rectified action owing to organic EL 15 can be described as OLED (Organic Light Emitting Diode).In Figure 62 etc., Diode symbol is used for light-emitting component OLED15.
By way of parenthesis, be not limited to OLED according to light-emitting component 15 of the present invention.It can be an any kind, as long as its brightness is by the magnitude of current control of flowing through element 15.White light-emitting diode, typical light emitting diode and lighting transistor that example comprises inorganic EL element, is made up of semiconductor.Needn't require light-emitting component 15 rectifications.Bilateral diode also is available.Although reference number 15 is described as EL element, it can be used for the meaning of EL film or EL structure sometimes.
In the example of Figure 62, the source terminal of p channel transistor 11a (S) is marked as Vdd (power supply potential), and the negative electrode of EL element 15 is connected to earthing potential (Vk).On the other hand, anode is connected to the drain terminal (D) of transistor 11a.In addition, the gate terminal of p channel transistor 11b is connected to signal line 17a, and source terminal is connected to source signal line 18, and drain terminal is connected to the gate terminal (G) of storage capacitor 19 and p channel transistor 11b.
By way of parenthesis, although stated that here the transistor unit 11a of the electric current that is provided for encouraging EL element 15 is the p channel transistor, this is not restrictive, and they can be the n channel transistors.Certainly, transistor 11 can be bipolar transistor, FET or MOSFET.Base plate 71 is not limited to glass substrate, can be silicon substrate or metal substrate.
Be actuate pixel 16, the vision signal of expression monochrome information at first puts on the source signal line 18 with selected signal line 17a.Then, transistor 11a conducting, storage capacitor 19 is matched with the current potential of vision signal to the grid potential of charging or discharge and transistor 11b.When signal line 17a was selected in cancellation, transistor 11a ended, and transistor 11b cuts off with electronics mode and source signal line 18.The grid potential of transistor 11a keeps stable by storage capacitor 19.The electric current that is delivered to light-emitting component 15 by transistor 11a depends on the grid-source voltage Vgs of transistor 11a, and light-emitting component 15 continues on corresponding to the brightness of the magnitude of current that provides by transistor 11a luminous.
Organic EL display panel is made up of the low temperature polycrystalline silicon transistor array.But,, therefore exist transistor characteristic to change and will cause the irregular problem of demonstration because organic EL uses electric current luminous.
Summary of the invention
Consider the problem of above-mentioned conventional EL element, a target of the present invention provides a kind of motivational techniques of EL display, even there is the variation of pixel transistor characteristic, it also can realize the demonstration more consistent than conventional method, and it causes the fuzzy moving-picture that lacks than conventional method.
For reaching above-mentioned target, first invention of the present invention is a kind of motivational techniques of the EL of being used for display panel, and this EL display panel comprises:
EL element with arranged;
The driver transistor of the electric current that will flow through EL element is provided;
Be placed on first on-off element in the current path of EL element;
The grid pumping circuit that makes the first on-off element conducting or end for control; And
The source electrode exciting circuit of program current to driver transistor is provided,
Wherein, driver transistor is the p channel transistor,
The unit transistor that produces program current in the source electrode exciting circuit is the n channel transistor, and
Grid pumping circuit at least twice or repeatedly turn-off first on-off element during a frame period or period.
Second invention of the present invention is a kind of motivational techniques of the EL of being used for display panel, and this EL display panel comprises:
EL element with matrix arrangement;
The driver transistor of the electric current that will flow through EL element is provided;
Be placed on first on-off element in the current path of EL element;
Make the grid pumping circuit of the first on-off element turn-on and turn-off for control; And
The source electrode exciting circuit of program current to driver transistor is provided,
Wherein, driver transistor is the p channel transistor,
The unit transistor that produces program current in the source electrode exciting circuit is the n channel transistor,
During a frame period or a period, keep first on-off element to turn-off at two horizontal scanning period inner grid exciting circuits.
The 3rd invention of the present invention is a kind of motivational techniques of the EL of being used for display panel, and this EL display panel comprises:
EL element with matrix arrangement;
The driver transistor of the electric current that will flow through EL element is provided;
Be placed on first on-off element in the current path of EL element;
The grid pumping circuit that makes the first on-off element conducting and end for control; And
The source electrode exciting circuit of program current to driver transistor is provided,
Wherein, driver transistor is the p channel transistor,
The unit transistor that produces program current in the source electrode exciting circuit is the n channel transistor,
Select pixel column and constitute by first period and second period with the current programmed period,
During first period, apply first electric current,
During second period, apply second electric current,
First current ratio, second electric current is big, and
The source electrode exciting circuit is exported first electric current during first period, and output second electric current during second period of coming after first period.
The 4th invention of the present invention is the motivational techniques that are used for according to the EL display panel of the present invention's first invention, wherein, turn-offs first on-off element in a frame period or a period period ground.
The 5th invention of the present invention is a kind of EL display panel, comprising:
The source electrode exciting circuit of output program current;
EL element with arranged;
The driver transistor of the electric current that will flow through EL element is provided;
Be placed on first on-off element in the current path of EL element;
Be configured for program current is sent to the second switch element of the path of driver transistor;
Make the first on-off element conducting and end the first grid exciting circuit that is used to control;
Make the second switch element conductive and end the second grid exciting circuit that is used to control;
The source electrode exciting circuit of program current to driver transistor is provided;
Wherein, driver transistor is the p channel transistor,
The unit transistor that produces program current in the source electrode exciting circuit is the n channel transistor,
The first grid exciting circuit repeatedly turn-offs first on-off element during a frame period or period,
Be sidelong at one of display panel and put or to form the first grid exciting circuit, and
Place or form the second grid exciting circuit at the opposite side of display panel.
The 6th invention of the present invention is the EL display panel according to the present invention the 5th invention, wherein, forms grid pumping circuit and the source electrode exciting circuit is made of semi-conductor chip in the production run identical with the source electrode exciting circuit with driver transistor.
The 7th invention of the present invention is a kind of EL display panel, comprising:
The signal line;
The source signal line;
The source electrode exciting circuit of output program current;
Grid pumping circuit;
EL element with arranged;
The driver transistor of the electric current that will flow through EL element is provided;
In the current path of EL element, place the first transistor;
Be configured for program current is sent to the transistor seconds of the path of driver transistor; And the source electrode exciting circuit of program current to driver transistor be provided,
Wherein, driver transistor is the p channel transistor,
The unit transistor that produces program current in the source electrode exciting circuit is the n channel transistor,
Source electrode exciting circuit output program current arrives the source signal line,
Grid pumping circuit is connected to the signal line,
The gate terminal of transistor seconds is connected to the signal line,
The source terminal of transistor seconds is connected to the source signal line,
The drain terminal of transistor seconds is connected to the drain terminal of driver transistor, and
Grid pumping circuit is selected a plurality of signal lines and the driver transistor of program current to a plurality of pixels is provided.
The 8th invention of the present invention is a kind of EL display panel, comprising:
The viewing area of forming by I pixel column (I is than 1 big integer) and J pixel column (J is than 1 big integer);
Picture intelligence is put on the source electrode exciting circuit of the source signal line in the viewing area;
Forward voltage or cut-off voltage are put on the grid pumping circuit of the signal line in the viewing area; And
The virtual pixel that forms outside the viewing area is capable,
Wherein, in the viewing area with the arranged EL element, and based on luminous from the picture intelligence of source electrode exciting circuit, and.
Capable or the not luminous or sightless light of eyes of virtual pixel.
The 9th invention of the present invention is the EL display panel according to the present invention's the 7th invention,
Wherein, grid pumping circuit is once selected a plurality of pixel columns, and will put on a plurality of pixel columns from the picture intelligence of source electrode exciting circuit; And
When selecting first pixel column or I pixel column, select virtual pixel capable.
The tenth invention of the present invention is that wherein, grid pumping circuit is constructed by the p channel transistor according to the EL display panel of the present invention's the 7th invention.
The 11 invention of the present invention is a kind of EL display panel, comprising:
EL element with arranged;
The driver transistor of the electric current that will flow through EL element is provided;
Be placed on first on-off element in the current path of EL element;
Make the first on-off element conducting and end the grid pumping circuit that is used to control; And the source electrode exciting circuit of program current to driver transistor be provided,
Wherein, the driver transistor and first on-off element are the p channel transistors, and
The unit transistor that produces program current in the source electrode exciting circuit is the n channel transistor.
The 12 invention of the present invention is a kind of motivational techniques of the EL of being used for display panel, and comprising the following steps: provides the electric current that makes EL element send the light brighter than predetermined luminance for EL element; And make EL element luminous (N is greater than 1) in the period of the 1/N that equals a frame period or a period.
The 13 invention of the present invention is the motivational techniques that are used for according to the EL display panel of the present invention's the 12 invention, and wherein, the dividing time-steps that will equal the 1/N of a frame becomes a plurality of periods.
The 14 invention of the present invention is a kind of use be used to programme motivational techniques of electric current of the electric current that will flow through EL element, so that the electric current that will flow through EL element is programmed, comprises the following steps: to make EL element to send the light brighter than predetermined luminance; The viewing area (N＞1) that shows the 1/N that equals whole screen; And the 1/N viewing area that sequentially is offset whole screen is to show whole screen.
The 15 invention of the present invention is a kind of EL display of the EL of comprising display panel, has the EL display panel and comprises EL element with arranged successively; The driver transistor of the electric current that will flow through EL element is provided; Be placed on first on-off element in the current path of EL element; And the grid pumping circuit that makes the first on-off element conducting and end, and receiver.
One aspect of the present invention described here comprises two operations.The driver transistor 11a that first operation is included as pixel 16 provides from (drawing) electric current of current excitation circuit (IC) 14 with predetermined current driver transistor 11a is programmed.Second operation comprises makes the electric current of programming in driver transistor 11a flow through EL element 15.Like this,, change, also might make the predetermined current flows of having programmed even the characteristic of driver transistor 11a exists by with electric current driver transistor 11a being programmed and making electric current flow through EL element 15.This makes might realize consistent screen display.The transistor 11d that forms between EL element 15 and driver transistor 11a or place stimulus stream off and on crosses the electric current of each EL element 15.
Another aspect of the present invention is to carry out current programmed method by the driver transistor 11a that once selects a plurality of pixel columns.Sequentially scan selected pixel column.For example,, and once select two pixel columns, then the electric current of 0.5 μ A (=1/2) is programmed into each pixel column if from current driver 14, export 1 μ A electric current.
For accomplishing this point, top or the base formation virtual pixel along screen is capable at least.Be designed to current programmed also not luminous even virtual pixel is capable.The pixel column quantity that the virtual pixel line number amount that forms or arrange equals to select simultaneously subtracts one.
Stray capacitance is present in the source signal line 18, and electric current outputs to this source signal line 18 from current driver 14.If can not charge fully and discharge stray capacitance, just predetermined current can not be write in the pixel 16.For improving charging and discharge, should increase output current from current driver 14.Yet, writing the driver transistor 11a of pixel 16 from the electric current of current driver 14 outputs.Like this, increase from the electric current of current driver 14 outputs and also increased the electric current of writing the driver transistor 11a, cause proportional increase pixel 15 luminosity.Therefore, can not obtain predetermined brightness.
If selected the driver transistor 11a of a plurality of pixel columns simultaneously, then current programmed to a plurality of pixel columns what export from current driver 14, between them, divide equally.This makes might increase from current driver 14 electric current of exporting and the electric current that reduces to write the driver transistor 11a.
Another aspect of the present invention makes pixel 16 luminous off and on.That is to say, screen display intermittently is provided.Screen display is intermittently eliminated fuzzy moving-picture.This realized with the CRT situation in the same do not have the suitable film of residual image to show.Intermittently show and to finish by being controlled at the transistor 11d that places between driver transistor 11a and the EL element 15 or form.
By way of parenthesis, with top configuration, for example, if with 10 times of big electric currents (N=10) pixel transistor is programmed, then 10 times of big electric currents flow through EL element 15, and EL element 15 is sent 10 times of bright light.Be the luminosity that obtains to be scheduled to, the time decreased that electric current can be flow through EL element is to 1/10 of a frame (1F).Like this, the stray capacitance of source signal line can be charged and discharge fully, and the luminosity that can obtain to be scheduled to.Because to pixel programming, so the stray capacitance of source signal line can be charged and discharge fully with the doubly big electric current of N.This allows the precise current programming, causes consistent screen display.And electric current only flows through EL element 15 in the period of 1F/N, and (1F does not flow through electric current during (N-1)/N) period remaining.In this display condition, every 1F multiimage data presentation and black demonstration (not luminous).This makes might realize that the suitable film that does not have soft edge shows.
Description of drawings
Fig. 1 is the block scheme according to the pixel in the display panel of the present invention;
Fig. 2 is the block scheme according to the pixel in the display panel of the present invention;
Fig. 3 is the key diagram of illustration according to the operation of display panel of the present invention;
Fig. 4 is the key diagram of illustration according to the operation of display panel of the present invention;
Fig. 5 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Fig. 6 is the block scheme according to display of the present invention;
Fig. 7 is the key diagram of illustration according to the manufacture method of display panel of the present invention;
Fig. 8 is the block scheme according to display of the present invention;
Fig. 9 is the block scheme according to display of the present invention;
Figure 10 is the sectional view according to display panel of the present invention;
Figure 11 is the sectional view according to display panel of the present invention;
Figure 12 is the key diagram of illustration according to display panel of the present invention;
Figure 13 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 14 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 15 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 16 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 17 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 18 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 19 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 20 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 21 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 22 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 23 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 24 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 25 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 26 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 27 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 28 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 29 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 30 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 31 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 32 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 33 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 34 is the block scheme according to display of the present invention;
Figure 35 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 36 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 37 is the block scheme according to display of the present invention;
Figure 38 is the block scheme according to display of the present invention;
Figure 39 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 40 is the block scheme according to display of the present invention;
Figure 41 is the block scheme according to display of the present invention;
Figure 42 is the block scheme according to the pixel in the display panel of the present invention;
Figure 43 is the block scheme according to the pixel in the display panel of the present invention;
Figure 44 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 45 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 46 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 47 is the block scheme according to the pixel in the display panel of the present invention;
Figure 48 is the block scheme according to display of the present invention;
Figure 49 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 50 is the block scheme according to the pixel in the display panel of the present invention;
Figure 51 is the block scheme according to the pixel in the display panel of the present invention;
Figure 52 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 53 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 54 is the block scheme according to the pixel in the display panel of the present invention;
Figure 55 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 56 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 57 is that illustration is according to cellular key diagram of the present invention;
Figure 58 is the key diagram of illustration according to view finder of the present invention;
Figure 59 is the key diagram of illustration according to video cameras of the present invention;
Figure 60 is the key diagram of illustration according to Digit camera of the present invention;
Figure 61 is the key diagram of illustration according to TV of the present invention (monitor);
Figure 62 is the block scheme of the pixel in the conventional display panel;
Figure 63 is the block scheme according to pixel in the display panel of the present invention;
Figure 64 is the block scheme according to pixel in the display panel of the present invention;
Figure 65 is the block scheme according to pixel in the display panel of the present invention;
Figure 66 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 67 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 68 is the key diagram of illustration according to display panel of the present invention;
Figure 69 is the key diagram of illustration according to display panel of the present invention;
Figure 70 is the key diagram of illustration according to display panel of the present invention;
Figure 71 is the key diagram of illustration according to display panel of the present invention;
Figure 72 is the key diagram of illustration according to display panel of the present invention;
Figure 73 is the key diagram of illustration according to display panel of the present invention;
Figure 74 is the key diagram of illustration according to display panel of the present invention;
Figure 75 is the key diagram of illustration according to display panel of the present invention;
Figure 76 is the key diagram of illustration according to display panel of the present invention;
Figure 77 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 78 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 79 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 80 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 81 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 82 is the key diagram of illustration according to display panel of the present invention;
Figure 83 is the key diagram of illustration according to display panel of the present invention;
Figure 84 is the key diagram of illustration according to display panel of the present invention;
Figure 85 is the key diagram of illustration according to display panel of the present invention;
Figure 86 is the key diagram of illustration according to display panel of the present invention;
Figure 87 is the key diagram of illustration according to inspection method of the present invention;
Figure 88 is the key diagram of illustration according to inspection method of the present invention;
Figure 89 is the key diagram of illustration according to inspection method of the present invention;
Figure 90 is the key diagram of illustration according to inspection method of the present invention;
Figure 91 is the key diagram of illustration according to inspection method of the present invention;
Figure 92 is the key diagram of illustration according to inspection method of the present invention;
Figure 93 is the key diagram of illustration according to inspection method of the present invention;
Figure 94 is the key diagram of illustration according to the power circuit of display of the present invention;
Figure 95 is the key diagram of illustration according to the power circuit of display of the present invention;
Figure 96 is the key diagram of illustration according to the power circuit of display of the present invention;
Figure 97 is the key diagram of illustration according to the power circuit of display of the present invention;
Figure 98 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 99 is the schematic section of illustration according to display of the present invention;
Figure 100 is the key diagram of illustration according to display of the present invention;
Figure 101 is the key diagram of illustration according to display of the present invention;
Figure 102 is the key diagram of illustration according to display of the present invention;
Figure 103 is the key diagram of illustration according to display of the present invention;
Figure 104 is the key diagram of illustration according to display of the present invention;
Figure 105 is the key diagram of illustration according to display of the present invention;
Figure 106 is the key diagram of illustration according to display of the present invention;
Figure 107 is the key diagram of illustration according to display of the present invention;
Figure 108 is the key diagram of illustration according to display of the present invention;
Figure 109 is the key diagram of illustration according to display of the present invention;
Figure 110 is the key diagram of illustration according to display of the present invention;
Figure 111 is the key diagram of illustration according to display of the present invention;
Figure 112 is the key diagram of illustration according to display of the present invention;
Figure 113 is the key diagram of illustration according to display of the present invention;
Figure 114 is the key diagram of illustration according to display of the present invention;
Figure 115 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 116 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 117 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 118 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 119 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 120 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 121 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 122 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 123 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 124 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 125 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 126 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 127 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 128 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 129 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 130 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 131 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 132 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 133 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 134 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 135 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 136 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 137 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 138 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 139 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 140 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 141 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 142 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 143 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 144 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 145 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 146 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 147 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 148 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 149 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 150 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 151 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 152 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 153 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 154 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 155 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 156 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 157 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 158 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 159 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 160 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 161 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 162 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 163 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 164 is the key diagram of illustration according to the motivational techniques of display panel of the present invention;
Figure 165 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 166 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 167 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 168 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 169 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 170 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 171 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 172 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 173 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 174 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 175 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 176 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 177 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 178 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 179 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 180 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 181 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 182 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 183 is the key diagram of illustration according to the motivational techniques of display of the present invention;
Figure 184 is the key diagram of illustration according to source electrode exciting circuit of the present invention;
Figure 185 is the key diagram of illustration according to source electrode exciting circuit of the present invention;
Figure 186 is the key diagram of illustration according to source electrode exciting circuit of the present invention;
Figure 187 is the key diagram of illustration according to source electrode exciting circuit of the present invention;
Figure 188 is the key diagram of illustration according to source electrode exciting circuit of the present invention;
Figure 189 is the key diagram of illustration according to source electrode exciting circuit of the present invention.
(denotational description)
11 transistors (thin film transistor (TFT))
12 grid excitation IC (circuit)
14 source electrodes excitation IC (circuit)
15EL (element) (light-emitting component)
16 pixels
17 signal lines
18 source signal lines
19 storage capacitors (building-out condenser, additional capacitor)
50 display screens
51 write pixel (OK)
52 non-display pixels (non-display area, non-luminous region)
53 display pixels (viewing area, light-emitting zone)
61 shift registers
62 phase inverters
63 output buffers
71 array base plates (display panel)
72 laser radiation scopes (laser spots)
73 position markers
74 glass substrate (array base plate)
81 control IC (circuit)
82 power supply IC (circuit)
83 printed circuit board (PCB)s
84 flexible plates
85 gland bonnets
86 cathode line
87 anode lines (Vdd)
88 data signal lines
89 grid control signal lines
101 storehouses (bank) (rib (rib))
102 interlayer dielectrics
104 contact connectors
105 pixel electrodes
106 cathode electrodes
107 drying agent
108 λ/4 plates
109 polarizing plates
111 thin encapsulating films
281 virtual pixels (OK)
341 output-stage circuits
371OR (or) circuit
401 light emitting control lines
471 reverse bias lines
472 grid potential control lines
561 electronics are adjusted circuit
562 transistorized SD (source electrode-drain electrode) short circuit
571 antennas
572 keys
573 shells
574 display panels
581 emergent pupils (Eye ring)
582 amplifying lenses
583 convex lens
591 support points (fulcrum)
592 image pickup lens
593 memory units
594 switches
601 fuselages
602 photographic units
603 shutter releases
611 installation frames
612 legs
613 install
614 fixed parts
631 switches
681 dielectric films
691 diffraction grating
721 pixel aperture
341 output-stage circuits
9991 reference voltage circuits
992PC (data input device, control device)
993 input circuits (operational amplifier, switch, A/D converter)
994 transistors
995 operational amplifiers
996 splicing ears
997 probes (coupling arrangement)
941 coils (transformer)
942 control circuits
943 diodes
944 capacitors
945 resistors
946 transistors
951 switches
952 temperature sensors
9991 display panels
1001 connector resins
1002 sealing resins
1003 spreading agents
1004 polarizing plates (polarizing film, circular polarizing plate, circular polarizing film)
1011 glass rings
1021 flexible plates
1022 controllers
1023 bonder terminals
1031 serial datas
1032 parallel video data
1033 grid pumping circuit control datas
1051 heat radiator (heat dissipation film)
1052 holes (pore, the cold hole of going)
1061 parts of installing
1062 printed circuit board (PCB)s
1063 bolsters (cushioning fender)
1111 unit grid output circuits
1381 stray capacitances
1431 electric capacity drivers
1433 capacitance signal lines
1434 coupling condensers
1461 current output circuits
1471 lead-out terminals
1472 stray capacitances
1481 phase inverters
1511 common signal lines
1512 public exciting circuits
1841,1842,1843 current sources (transistor)
1851 switches (on/off device)
1854 current sources (single unit)
1853 inner wire
1861 electronic electronics (regulating current device)
1891 transistor groups
Embodiment
Understand for convenience and/or illustration, in this omission and/or amplification/dwindle some part of accompanying drawing.For example, in the cut-open view of display panel shown in Figure 11, shown encapsulating film 111 grades are quite thick.On the other hand, in Figure 10, shown gland bonnet 85 is quite thin.Some part is omitted.For example, although the polarizing plate (polarizing plate) (as circular polarizing plate) that need have a membrane phase according to display panel of the present invention prevents reflection, omitted membrane phase here in the accompanying drawings.This situation also is applicable to following accompanying drawing.In addition, same or analogous shape, material, function or operation are represented by identical reference number or character.
By way of parenthesis, even without indicating clearly, also can will wait the content of description and other example etc. to combine with reference to the accompanying drawings.For example, in Fig. 8, touch pad etc. can be additional to display panel, to be configured in the information display shown in Figure 57 to 61 and 102 etc. etc.And, amplifying lens 582 can be installed, be used for the view finder (seeing Figure 58) of video cameras (seeing Figure 59 etc.) or the like with configuration.And any motivational techniques of describing with reference to figure 4,15,18,21,23,27,31,35,39,44,52,53,55,63,67,77,78,79,80,114,116,120,122,125,129,130,131,132,133,136,139,140,144,145,152,164 or the like can be applied to according to any display of the present invention, display panel or information display.
In addition, quoted thin film transistor (TFT) at this as driver transistor 11 and switching transistor 11 etc., this is not restrictive.Can use thin film diode (TFD) or ring diode to replace them.And, the invention is not restricted to thin-film component, also can use the transistor that on silicon chip, forms.Much less, also can use FET, MOS-FET, MOS transistor or bipolar transistor.They are thin film transistor (TFT) in essence.Much less, the present invention also can use rheostat, controllable silicon, ring diode, photodiode, photistor or PLZT element.That is to say, can construct on-off element 11 and exciting element 11 by using any said elements.
Describe according to EL panel of the present invention below with reference to accompanying drawing.
As shown in Figure 10, transparency electrode 105, at least one organic EL layer 15 and the metal electrode (reflectance coating) (negative electrode) 106 that organic EL display panel forms by glass substrate (array base plate) 71, as pixel electrode formed, on their tops that is stacked on another, wherein organic function layer is made up of electron transfer layer, luminescent layer, positive hole transmission layer etc.When positive voltage being put on anode or transparency electrode (pixel electrode) 105 and negative voltage put on negative electrode or metal electrode (reflecting electrode) 106, organic EL 15 is luminous.
Big electric current flows through the circuit (anode line 86 or cathode circuit 87) that electric current is provided to male or female.For example, approximately the electric current of the 100A order of magnitude flows through the EL display with 40 inches screens.Thereby the anode line of made (formation) and the resistance value of cathode circuit should be enough little.Address this problem, according to the present invention, anode line etc. (circuit of glow current is provided to EL element) are formed by film.Then, it is electroplated multilayer, increase the thickness of wiring thin film by using chemical deposit or metallide technology.
Available plated metal comprises, for example, and chromium, nickel, gold, copper and aluminium and their alloys and mixts.In addition, as required, Copper Foil is pasted into circuit itself or adhered to circuit.Can be for alternatively, copper paste or the like be multilayer ground serigraphy on the line increasing the thickness of circuit, and therefore reduce line resistance.And, can use solder technology to be welded to form the electric wire of circuit.And, if necessary, can form insulation course on the line, and therefore the stacked conductive layer forms capacitor (electric capacity) to form grounding pattern (ground pattern) between circuit and grounding pattern on the line.
Best, metal electrode 106 is with having the metal of little work function (work function), such as lithium, silver, aluminium, magnesium, plug with molten metal, copper or their alloy.Particularly, for example, preferably use the Al-Li alloy.Transparency electrode 105 can be made by the conductive material with big work function, such as ITO or gold or the like.If as electrode material, then electrode becomes translucent with gold.By way of parenthesis, can use IZO or other material to replace ITO.This also is applicable to other pixel electrode 105.
Much less, not only can form, also can form by ink jet (ink jetting) by vapour deposition (vapor deposition) according to EL film 15 of the present invention.That is, not only can form, also can form by the material by macromolecule weight such as ink jet by the material of vapor deposition processes by low molecular wt according to EL element 15 of the present invention.In addition, they can be formed by serigraphy or offset printing.
Drying agent 107 is placed in the space between gland bonnet 85 and the array base plate 71.This is because organic EL film 15 moisture-sensitive.Under situation about EL film 15 and open-air air being cut off by gland bonnet 85, drying agent 107 absorbs the water of infiltration sealant, and therefore prevents the degeneration of organic EL film 15.
Although in Figure 10, use glass capsulation lid 85 to be used for sealing, can use film 111 (this can be a film,, approaches encapsulating film that is) to be used for sealing, as shown in Figure 11.Encapsulating film (thin encapsulating film) 111 can be, for example, vapour deposition thereon the electrolytic condenser film of DLC (diamond-like-carbon).This film has extremely low moisture-penetrability (high moisture resistance) feature.Use it as encapsulating film 111.Best, the difference of the thermal expansivity between gland bonnet or encapsulating film 111 and the array base plate 71 is 10% or still less.The bigger difference of thermal expansivity will cause that gland bonnet 111 or analog break away from array base plate 71.And, much less, can form encapsulating film 111 at electrode 106 lip-deep DLC films or analog by direct vapour deposition.In addition, can form thin encapsulating film by laminated thin resin molding and metal film.
Make us wanting ground, the film thickness of film 111 is such, and promptly nd is equal to or less than the main emission wavelength lambda of EL element 15 (wherein n is the refraction coefficient of film and the film thickness that d is film; If lamination two-layer or multilayer film, calculate the nd of every layer film and add up to these results).By satisfying this condition, and when using glass substrate to be used to seal, compare, might surpass from the twice of the efficient of the light extraction of EL element 15.And, can use aluminium and silver-colored alloy, potpourri or lamination.
Replace aforesaid gland bonnet 85, the technology of using encapsulating film 111 to be used to seal is called thin-film package.Extract from base plate 71 1 sides light " downside extracts and (sees Figure 10; Direction of arrow extraction light in Figure 10) " under the situation, thin-film package comprises formation EL film and forms subsequently will be as the aluminium electrode of the negative electrode on the EL film.Then, on aluminium lamination, form resin bed as cushion.Can use organic material such as acryl resin (acrylic) or epoxy resin (epoxy), be used for cushion.Suitable film thickness is to 10 μ m (comprising both) from 1 μ m.Preferably, film thickness is to 6 μ m (comprising both) from 2 μ m.Go up formation encapsulating film 111 at buffer film (rete).Do not having under the situation of buffer film, the structure of EL film can be out of shape under weight, causes inhomogeneous defective.As mentioned above, the electrolytic condenser of for example available DLC (diamond-like-carbon) or hierarchy (replacedly, the structure of being made up of the aluminium film of thin dielectric film and vapour deposition) is formed encapsulating film 111.
Only from these sides of EL layer 15 extract " upside extracts and (sees Figure 11; The direction of arrow in Figure 11 is extracted light " situation under, wherein, thin-film package comprises and forms EL film 15 and form 20 dusts (being included) subsequently to the thick Ag-Mg film of 300 dusts, as negative electrode (anode) on EL film 15.On film, form transparency electrode, such as ITO, to reduce resistance.Then, on electrode film, form resin bed as cushion.On buffer film, form encapsulating film 111.
Half of the light that produces by organic EL layer 15 be by reflectance coating 106 reflections and send by array base plate 71.Yet the external light of reflectance coating 106 reflections causes dazzle, and it reduces the demonstration contrast.Handle this situation, on array base plate 71, place λ/4 phase plates 108 and polarizing plate (polarization film (polarizingfilm)) 109.These are commonly referred to as circular polarizing plate (circular polarization thin slice (circular polarizingsheet)).
By way of parenthesis, if pixel is a reflecting electrode, then the light that is produced by organic EL layer 15 upwards sends.Thereby much less, phase plate 108 and polarizing plate 109 are placed in a luminous side.Reflective pixel can obtain by making pixel electrode 105 by aluminium, chromium, silver or analog.And, by protrusion (projection) (perhaps protruding and cave in (depression)) is provided, might increase the interface with organic EL layer 15 on the surface of pixel electrode 105, and therefore increase light-emitting area, cause improved luminescence efficiency.By way of parenthesis, the reflectance coating as negative electrode 106 (anode 105) is made into transparency electrode.If reflectivity can reduce to 30% or lower, then do not need circular polarizing plate.This is because significantly reduced dazzle.Equally also reduced the light interference.
Can be by using the acrylic resin (black matrix (BM)) of carbon containing, the reservation pixel aperture is uncovered and reduces dazzle.Any resin can use, as long as its absorbing light.The light diffusion material also is available, comprises ferrous metal, such as sexavalent chrome; Coating; Film, thick film, or the composition (member) that has fine and closely woven scrambling from the teeth outwards; Titanium dioxide; Aluminium oxide; Magnesium oxide; And opal.These materials are carried out painted if use with the dyestuff of the complementary colors that is produced by optical modulation layer 24 or pigment, then these materials need not be black or dark.
It is all luminous that problem is that all have applied the EL layer 15 of electric field.Be positioned under the pixel electrode 105 and form transistor 11 therein and the zone of signal line 17 is lighttight (they are called nontransparent zone).Even EL layer 15 is luminous in zone of opacity, issued light also is prevented from.Yet, will consumed power if luminous.Thereby the EL layer is big more in the zone of opacity, and then electric energy efficiency is low more.
Address this problem,, in non-luminous region, form dielectric film 681, as shown in Figure 68 according to the present invention.On pixel electrode 105, form dielectric film 681.And, in non-luminous region, form dielectric film 681.Non-luminous region is present between pixel electrode 105 and the EL layer 15, also is present between negative electrode 106 and the EL layer 15.Figure 68 illustrates a kind of configuration, wherein forms dielectric film 681 between pixel electrode 105 and EL layer 15.
The pixel electrode 105 that the schematically illustrated conduct of Figure 71 is watched from the top.In non-light-emitting area, form dielectric film 681.Figure 72 illustrates how to form dielectric film 681 in the zone that is not pixel aperture 721.
For example, dielectric film is an inorganic material, such as the film of SiO2, SiO, TiO or Al203.Can supply alternatively, it can be an organic material, such as the thin or thick film of acrylic resin or protective seam.By way of parenthesis, the pixel electrode in nontransparent zone can be removed by patterning case (patterning).And much less, the thin metal film of formation negative electrode etc. can be removed by the patterning case.
Because formed dielectric film 681 or removed the electrode of EL element 15, so electric charge can not poured into EL layer 15 by the patterning case.Therefore, the EL element in non-luminous region 15 is not luminous.This causes improved power efficiency.
By way of parenthesis, much less, can between R, G and B, change Pixel Dimensions as illustrative among Figure 73.Because the luminescence efficiency of EL element 15 changes, therefore can reach good white balance than (Pixel Dimensions) by the illustrative pixel aperture that between R, G and B, changes in as Figure 73 between R, G and B.
Increase the quantity of the light that sends to the outside from base plate 71, suggestion is formed on illustrative diffraction grating among Figure 69.Diffracted by the light that EL layer 15 produces by diffraction grating, reduced total amount at the light of reflection at critical angle.This has increased the total amount of the light that sends from base plate 71, realizes that high brightness shows.
Figure 69 (a) illustrates an example, wherein forms diffraction grating 691 on pixel electrode 105.Can by with certain arranged in patterns pixel electrode 105 or under the pixel electrode 105 or on form diffraction grating and obtain diffracting effect.
The shape of diffraction grating can be circular, leg-of-mutton, jagged, rectangle or sine-shaped, sinusoidal.Yet best according to characteristic and efficient, diffraction grating is sine-shaped, sinusoidal.Best, the spacing of diffraction grating is between 1 μ m and 20 μ m (comprising both).Preferably, between 2 μ m and 10 μ m (comprising both).Best, the height of diffraction grating is between 2 μ m and 20 μ m (comprising both).Preferably, between 3 μ m and 10 μ m (comprising both).And best, diffraction grating is three-dimensional (dot matrix) rather than linear (bidimensional).This is to be correlated with because linearity configuration will cause polarization.
Figure 69 (b) illustrates an example, wherein forms diffraction grating 691 on cathode electrode 106.Can by with certain arranged in patterns cathode electrode 106 or under the cathode electrode 106 or on form diffraction grating and obtain diffracting effect.
Figure 70 illustrates an example, wherein forms diffraction grating 691 on cathode electrode 106 and pixel electrode.Can form (linearity) diffraction grating 691a and 691b of bidimensional, and can be configured to the formation direction of diffraction grating 691a and 691b orthogonal.Certainly, much less, one of diffraction grating 691a and 691b or both can be three-dimensional.
Best, for transistor 11, use LDD (low-doped drain) structure.To get organic EL at this and describe EL element for example (, comprising OEL, PEL, PELD, OLED) 15, but this not restrictive, can use inorganic EL element yet by known to the various initialisms.
The organic EL display panel of active matrix type must satisfy two following conditions:
1. can select specific pixel and provide necessary information, and
2. can be by EL element circulating current during the entire frame cycle.
Satisfy this two conditions, in the conventional organic electroluminescence pixel configuration shown in Figure 62, use switching transistor to select pixel, and use driver transistor to come to provide electric current as EL element (EL film) 15 as transistor seconds 11a as the first transistor 11b.
Use this configuration display gray scale, must put on the grid of driver transistor 11a corresponding to the voltage of gray scale.Therefore, the variation in the conducting electric current (turn-on current) of driver transistor 11a directly occurs in demonstration.
If transistor is monocrystal (for example, the transistor that forms on silicon substrate), then transistorized conducting electric current is very consistent.Yet, being in the temperature that is not higher than 450 under the transistorized situation of low temperature polycrystalline silicon that forms on the cheap glass substrate by the low temperature polycrystalline silicon technology, its threshold is in ± 0.2V variation in the scope of 0.5V.The conducting electric current that flows through driver transistor 11a correspondingly changes, and causes the demonstration scrambling.This scrambling is not only by the variation in the threshold voltage caused, and is caused by the thickness of transistorized mobility and gate insulating film.Characteristic also changes because of degrading of transistor 11.
The variation of characteristics of transistor is not limited to the low temperature polycrystalline silicon technology, and takes place in the transistor that can form on semiconductor film, described semiconductor film be by the high temperature polysilicon technology 450 degree (degree centigrade) or higher treatment temperature place generate.In addition, this phenomenon can occur in organic transistor and the amorphous silicon transistor.To provide the transistorized description that mainly produces at this by the low temperature polycrystalline silicon technology.
By using as in the method for the voltage display gray scale as shown in Figure 62, strictly the opertaing device characteristic is to obtain consistent demonstration a kind of.Yet present low temperature polycrystalline silicon transistor or analog can not satisfy the standard that is defined in maintenance variation in the preset range.
In four transistors 11 and an EL element of comprising according to each dot structure in the EL display panel of the present invention as in Fig. 1, specifically illustrating.Pixel electrode is configured to and the source signal line overlap.In particular, on dielectric film, form pixel electrode 105, perhaps on source signal line 18, form complanation (planarized) acrylic film and be used for insulation.Known a kind of pixel electrode be (HA) structure of large aperture (high aperture) to the overlapping structure of small part source signal line 18.This reduces the unnecessary interference of light and allows suitable light emission.
In this circuit, single pixel comprises four transistors 11.The grid of transistor 11a is connected to the source electrode of transistor 11b.The grid of transistor 11b and 11c is connected to signal line 17a.The drain electrode of transistor 11b is connected to the source electrode of transistor 11c and the source electrode of transistor 11d.The drain electrode of transistor 11c is connected to source signal line 18.The grid of transistor 11d is connected to signal line 17b, and the drain electrode of transistor 11d is connected to the anode electrode of EL element 15.
By way of parenthesis, transistor 11b and 11c are the examples according to second switch element of the present invention.On the other hand, transistor 11d is the example according to first on-off element of the present invention.
When signal line (first sweep trace) 17a is (the applying forward voltage) activated, make the driver transistor 11a and the switching transistor 11c conducting of EL element 15.Simultaneously, being carried by source electrode exciting circuit 14 will be by the electric current of EL element 15.And transistor 11b conducting is with grid and the drain electrode of short-circuit transistor 11a, and is stored in the grid that is connected in transistor 11a and the capacitor between the source electrode (storage capacitor, additional capacitor) 19 (seeing Fig. 3 (a)) by the electric current that source electrode exciting circuit 14 is carried.
Then, make signal line 17a invalid (applying cut-off voltage), activate signal line 17b, and current path switches to and comprises the first transistor 11a, is connected to the transistor 11d of EL element 15 and the path of EL element 15, to carry the electric current of being stored (seeing Fig. 3 (b)) to EL element 15.
(Pixel Dimensions but not aperture than) is Sp (square μ m) if the capacity of the needed capacitor 19 of single pixel is Cs (pF) and the area that occupied by pixel, 500/Sp≤Cs≤20000/Sp then should satisfy condition, and the 1000/Sp≤Cs≤10000/Sp that satisfies condition preferably.By way of parenthesis, because transistorized grid capacity is little, therefore the Cs that quotes at this can be considered as only is the capacity of storage capacitor (capacitor) 19.
Best, capacitor 19 generally forms in the non-display area of pixel.Usually, for the organic EL15 of full color, form by the gas deposition that uses metal mask (metal mask) to cover.If mask is alignment not, then there is the overlapping danger of organic EL layer 15 (15R, 15G and 15B) possibility of different color.Thereby, must the pixel of different color be separated 10 μ or more by non-display area.Photoemissive effect (not light-emitting zone) is not played in these zones.Thereby, by forming storage capacitor 19, might effectively utilize the space in the pixel in these zones, the effective means that increases the aperture ratio is provided.
By way of parenthesis, all crystals pipe in Fig. 1 is a p channel transistor.Compare with the N channel transistor, p channel transistor has more or less lower mobility, but they are preferable, because their more proof voltage and degenerations.Yet, be not limited to p channel transistor according to EL element of the present invention, and the present invention can only use the N channel transistor.And the present invention can use N raceway groove and p channel transistor simultaneously.
In Fig. 1, transistor 11c and 11b be the N channel transistor of identical polar preferably, and transistor 11a and 11d are p channel transistors.Usually, the p channel transistor is more reliable than p channel transistor.They have the breakover current features such as (kink current) of minimizing.For transistor 11a, use the p channel transistor that EL element 15 is had good effect, the luminous intensity that the latter is wanted by the Control current acquisition.
Optimum ground should be all transistors 11 of forming pixel and built-in grid pumping circuit 12 uses p channel transistor.Have only the array of p channel transistor by composition, number of masks might be reduced to 5, cause lower cost and higher output.
The pixel arrangement of current drives allows to check picture element flaw in the electronics mode in Fig. 1 etc.Will be described below according to inspection method of the present invention.Figure 87 and 88 is key diagrams, and illustration is according to inspection method of the present invention.Under the pixel arrangement in Figure 87 (quote as proof among the figure pixel arrangement as an example), program current Iw puts on source signal line 18.The scope of program current Iw from 1 μ A to 10 μ A.Driver transistor 11a is so that the mode of predetermined program current Iw circulation and working.That is to say that the current potential at grid (G) the terminal place of driver transistor 11A changes.Current potential at grid (G) the terminal place of the driver transistor 11a of the predetermined program current Iw that requires to circulate is represented by Vt.
For example, be by the driver transistor 11a circulating current Iw of a pixel, the current potential at its grid (G) terminal place must hang down Vt2 (solid line in Figure 88) than Vdd voltage.Will be by the driver transistor 11a circulating current Iw of one other pixel, the current potential at its gate terminal place must hang down Vt1 (dotted line in Figure 88) than Vdd voltage.Corresponding to these Vt values of the variation of the current potential of source signal line 18, the characteristic of the driver transistor 11a of represent pixel 16.
That is to say that the current potential at the gate terminal place of the driver transistor 11a of selected pixel 16 becomes the current potential of source signal line 18.Decide because the electric current that is flow through by driver transistor 11a is the current potential by the gate terminal place that adjusts driver transistor 11a, the current potential at gate terminal place that therefore might be by checking driver transistor 11a is measured the characteristic of driver transistor 11a.And the defective that takes place in pixel 16 causes the current potential of source signal line 18 output abnormalities.Thereby, can detect defective etc.
By control grid pumping circuit 12 forward voltage is put on a signal line 17a.That is to say, sequentially select pixel column (cut-off voltage is put on other signal line 17a) singly.And, source signal line 18 is set makes electric current I w circulation.When forward voltage being put on signal line 17a, the gate terminal of the driver transistor 11a of selected pixel 16 is assumed to be the Vt voltage that requires to flow through scheduled current Iw.
Cut-off voltage is put on signal line 17b.Applying of cut-off voltage ends transistor 11d, and driver transistor 11a and EL element 15 are cut off each other.Thereby, can use according to inspection method of the present invention, even can be applied to also will form the array base plate of EL element 15 thereon.
Like this, when sequentially being synchronized with horizontal scanning period (1H) conversion and applying the position of signal line 17a of forward voltage, the current potential of source signal line 18 is as changing illustrative among Figure 89 (also seeing Figure 88).Be synchronized with 1H and export these variations.By way of parenthesis, the use of 1H is not strictly essential, because what will carry out here is to check rather than image shows.Thereby, use 1H to want sequentially to select a pixel column for convenience of explanation.Can use any fixing period to replace 1H.That is to say that 1H is the period of selecting the pixel column that will check.
In according to check system of the present invention (checkout facility, inspection method), obviously can select two or more pixel columns simultaneously.Even this is because select two or more pixel columns simultaneously, output to source signal line 18 unusually if send, also can detect picture element flaw etc.The electric current of exporting from the pixel 16 of checking is the Weak current of μ A level.If the circuit defect that takes place in pixel 16 etc., then source signal line 18 is delivered in the output of mA level at least.Thereby, can select and check two or more pixel columns simultaneously.Under extreme case, can once select and check all pixel columns in viewing area 50.And, can once check screen 50 half.
Figure 90 is the block scheme of check circuit, is used for carrying out according to inspection method of the present invention.Probe 997 is connected to the electrode terminal 996 of every source signal line 18, and program current Iw is put on source signal line 18.Can change or adjustment program current Iw with reference voltage circuit 991.Plus sige terminal (positive terminal) from the reference voltage Va input operational amplifier 995 of reference voltage generator circuit 991.Operational amplifier 995 is formed constant-current circuit with transistor 994 and resistor R m.
Program current Iw is arranged between 1 μ A and the 10 μ A.Use the required maximum current of excitation panel in fact.Can use the little electric current that is no more than 100nA to be used for measuring for alternatively to check black WriteMode (during black the demonstration).
Put on the plus sige terminal (positive terminal) of operational amplifier 995 by the reference voltage Va of reference voltage circuit 991 outputs.The plus sige terminal of operational amplifier is in identical current potential with the minus sign terminal, thus flow through source signal line 18 same current Iw (=Va/Rm) flow through transistor 994.Therefore, constant current Iw flows through all source signal lines 18.Can easily change electric current I w by changing reference voltage Va.
By way of parenthesis, although pass through the identical electric current I w of all source signal lines 18 circulations in this statement, this is not restrictive.For example, can be by coming rolling inspection via the different constant current of source signal line 18 circulations of adjoining.And the method that probe 997 is connected to electrode 996 also is not limited to said method.For example, can engage them by the ACF technology.In addition, can use golden flange (gold bump) or nickel flange (nickel bump) to connect.
And in according to inspection method of the present invention, although pass through source signal line 18 circulation constant current Iw in this statement, this is not restrictive.For example, can use electric current (interchange) to be used for checking with square wave.Also might be used in combination two kinds of following patterns: in first pattern, apply voltage for source signal line 18 and adjoin short circuit between the source signal line 18, and in second pattern with detection, by the 18 circulation constant currents of source signal line to detect picture element flaw.Cathode electrode that also might be by giving EL element 15 and anode electrode apply signal (voltage or electric current) and carry out inspection, perhaps detect or measuring-signal by source signal line 18.
Under the configuration in Figure 90,, therefore can measure voltage (electric current) waveform among Figure 89 by the line of conversion signal sequentially 17a because constant current Iw flows through source signal line 18.Convert voltage waveform to digital signal from aanalogvoltage (electric current) by input circuit 993 (it is made up of high input impedance operational amplifier, analog input selector switch, AD (analog to digital) converter circuit etc.), and with the signal capture that obtains in transacter and control device such as personal computer (PC) 992.
The source signal line 18 that flows through Weak current is in high impedance status.To in this state, correctly measure the potential change (or their absolute value) of source signal line 18, high impedance circuit (electrode input end of the input operational amplifier of being made up of the FET circuit) is connected to every source signal line 18.That is to say that these probes 997 are connected with electrode input end of electronics mode with the input operational amplifier (not shown) of separately input circuit 993.
A QCIF panel has 176 * RGB=528 bar source signal line 18.Be difficult on all source signal lines 18 and place AD converter.Thereby, multiplexer type simulation switch (not shown) is placed on the outgoing side of the input operational amplifier of each input circuit 993.AD converter is placed on output place of analog switch, and will be from the data capture of AD converter in PC 992.In Figure 90, high impedance circuit, analog switch etc. are described to the assembly of input circuit 993.
Figure 91 is the sequential chart of circuit (check circuit) of measuring the current potential (voltage or electric current) of source signal line 18.Figure 91 (a) illustrates the variation of the current potential (voltage or electric current) of source signal line 18, and wherein these change with 1H synchronous.Figure 91 (b) illustrates the current potential of signal line 17b.The position that can see the signal line that has applied forward voltage is with each pixel column conversion.In being synchronized with the pixel column selection, the transistor 11a work of selected pixel column, and the current potential of source signal line 18 (Figure 91 (a)) changes.
Figure 91 (c) illustrates the data capture signal (this signal also can be considered as the analog switch switching signal in the input circuit 993) of data input device 992.Data are caught in the data input device 992 at the rising edge of data capture signal.
The value of PC 992 data that evaluation/judgement is caught.And it accumulates these data values.Based on the result who is obtained, the defect state of detection or inspection array or panel, defective locations, defect mode, defect state etc.
Under the pixel arrangement in Figure 87, when forward voltage puts on signal line 17a and cut-off voltage and puts on signal line 17b, form following current path: the Vdd terminal → between the source electrode and drain electrode of transistor 11a → transistor 11c → source signal line 18.
If short circuit (being called SD short circuit or raceway groove short circuit) occurs between the source terminal S and drain terminal D of transistor 11a, then Vdd voltage outputs to source signal line 18 (SD short circuit in Figure 92 (a)).Thereby, can detect the SD short circuit (picture element flaw) of transistor 11a in the electronics mode.
In addition,, then do not form the path of program current Iw, thereby the current potential of source signal line 18 becomes and approaches earthing potential (seeing the signal line that Figure 92 (b) interrupts) if signal line 17a breaks.Thereby, can detect (inspection) line defect such as in signal line 17a, fractureing.Certainly, if the source signal line breaks, then therefore not output, can detect fractureing in the source electrode signal wire 18.
And, put at cut-off voltage under the situation of all signal line 17a, if unusual voltage outputs to source signal line 18, the transistor 11c or the 11b that then can detect certain pixel 16 are defective.And the signal that outputs to source signal line 18 changes along with applying Vdd voltage (anode voltage) or Vdd terminal open circuit.This feasible defective that might at length check and check in the pixel 16.About cathode electrode,, therefore might detect the defective in the pixel 16 owing to the signal that outputs to source signal line 18 changes along with signal applies once more.
Much less, on the contrary, also might be by applying signal in source signal line 18 and detect the signal that outputs to cathode electrode and detect defective in the pixel 16.Again, can come the scanning element row by selecting pixel column singly with forward voltage.
When sequentially being offset the pixel column of conversion, sequentially be synchronized with the current potential that offset operation is measured source signal line 18 by grid pumping circuit 12 selections.From the head-to-foot repetition aforesaid operations (finishing inspection) of screen 50 time, can check display panel (array base plate 71) to a pixel column.
As illustrated in Figure 93 (a), the signal wire current potential of the source signal line 18 by measuring pixel column (being connected to the pixel 16 of a source signal line 18) might detect maximum voltage Vtmax (maximal value (seeing Figure 88) of the Vt of the driver transistor 11a of pixel 16) and minimum voltage Vtmin (minimum value (seeing Figure 88) of the Vt of the driver transistor 11a of pixel 16).If the difference between maximum voltage and the minimum voltage is equal to, or greater than predetermined value, judge that then the array or the panel of measured/inspection is incongruent (non-conforming).
As illustrated in Figure 93 (b),, might determine that the characteristic of transistor 11a distributes by measuring the distribution of Vt in array or the panel.Can be according to standard deviation and the mean value of characteristic Distribution calculation Vt.In addition, when the standard deviation of Vt and mean value drop on outside the preset range, judge that measured/array or panel of checking is incongruent.
Check pixel 16 according to inspection method of the present invention by control grid pumping circuit 12, thereby apply forward voltage at least one signal line 17a, and therefore by source signal line 18 circulation program currents.
By way of parenthesis, although stated in above-mentioned example that this is not restrictive by selecting pixel column to measure or check the Vt that outputs to source signal line 18 singly.Can select two or more pixel columns simultaneously.Also might be at first by sequentially selecting the odd pixel row sequentially to check odd pixel 16, then by sequentially selecting the even pixel row sequentially to check even pixel 16.Can also detect picture element flaw (the signal line that breaks, SD short circuit etc.) with illustrated method in Figure 92.
Accelerate to check, can select many signal line 17a, can detect about defective locations and defect mode, can sequentially in having the part of defective, apply forward voltage subsequently and come defect recognition position and defect state every signal line 17a.
Do not require according to inspection method of the present invention and should once detect all source signal lines 18.For example, can keep open circuit by even number source signal line 18a by the terminal electrode 996 that probe 997 is connected to odd number source signal line 18b, odd number source signal line 18b keeps open circuit by the terminal electrode 996 that probe 997 is connected to even number source signal line 18a subsequently, finishes according to inspection method of the present invention.
Certainly, can detect per the 4th pixel column by skew sequentially.
By way of parenthesis, although 12 grades of the grid pumping circuit among Figure 90 are built-in type (rather than outside semi-conductor chips), this is not restrictive.Grid excitation device IC 12 can be constituted and used the COG process to be installed on the array base plate 71 by semi-conductor chip.
Although stated by probe 997 with reference to Figure 90 voltage is put on source signal line 18, this is not restrictive.In case source electrode driver IC 14 has been installed on the base plate 71, just can constant current be put on source signal line 18 by operate source pole excitation device IC 14.Can in input circuit 993, measure the change in voltage that causes by constant current.
Check system with pixel arrangement among Figure 87 has been described in above-mentioned example.Yet, the invention is not restricted to this, but also can realize according to check system of the present invention with another kind of pixel arrangement (Figure 38 etc.).
As mentioned above, relevant according to check system of the present invention (checkout facility, inspection method) and EL display and the array base plate 71 that in the EL display, uses.Check system selects voltage to select a pixel 16 in signal line 17a by applying, and finishes inspection thereby the driver transistor 11a of this pixel is connected to source signal line 18.And by applying signal such as voltage (or electric current) in such as the negative electrode or the terminal the anode electrode (signal wire) that receive outside input, whether check system detects from source signal line 18 these signals of output.Finish inspection by applying constant current in source signal line 18 in fact.And, sequentially select and scan grid signal wire 17a.
Best, in display panel, directly on array base plate 71, do not form source electrode exciting circuit 14.This will conveniently check.Best, on array base plate 71, after the formation EL element 15 seal glass (gland bonnet) is installed and is finished inspection before.This abandons minimizing the cost of incongruent panel.
For ease of understanding, the configuration of EL element among Fig. 1 is described below with reference to Fig. 3.Be to use two sequential (timing) to control according to EL element of the present invention.First sequential is the sequential when the desired current value of storage.Make transistor 11b and transistor 11c conducting with this sequential, be provided at the equivalent electrical circuit shown in Fig. 3 (a).Apply predetermined current Iw from signal wire.This makes the grid of transistor 11a be connected with drain electrode, allows electric current I w to flow through transistor 11a and transistor 11c.Thereby the grid-source voltage of transistor 11a is such, makes to allow I1 to flow through.
Second sequential is the sequential when the closed circuit and transistor 11d open circuit of transistor 11a and transistor 11c.At at this moment available equivalent electrical circuit shown in Fig. 3 (b).Source electrode-the grid voltage that keeps transistor 11a.In this case, owing to transistor 11a works in the saturation region all the time, so electric current I w keeps constant.
The display result of this operation shown in Figure 5.In particular, the reference number 51a among Fig. 5 (a) represents in the display screen 50 at certain time point with a current programmed pixel (OK) (writing pixel column).Pixel column 51a is non-luminous (non-display pixel (OK)), as illustrative in Fig. 5 (b).Other pixel (OK) is display pixel (OK) 53 (EL element 15 circulations of electric current by non-pixel (non-pixel) 53, make EL element 15 luminous).
In the pixel arrangement of Fig. 1, program current Iw flows through source signal line 18 during current programmed, as shown in Fig. 3 (a).Electric current I w flows through transistor 11a, and in a kind of like this mode of holding current Iw voltage in (programming) capacitor 19 is set.At this moment, transistor 11d open circuit (ending).
During electric current flows through the period of EL element 15, transistor 11c and 11b by and transistor 11d conducting, as shown in Fig. 3 (b).In particular, cut-off voltage (Vgh) puts on signal line 17a, and transistor 11b and 11c are ended.On the other hand, forward voltage (Vgl) puts on signal line 17b, makes transistor 11d conducting.
A sequential chart shown in Figure 4.Index (for example, (1)) the capable number of remarked pixel in Fig. 4 bracket.In particular, the signal line 17a in signal line 17a (1) remarked pixel capable (1).In addition, the * H among Fig. 4 in first row (wherein " * " is optional sign or numeral, and expression horizontal scanning line number) expression horizontal scanning period.In particular, 1H is first horizontal scanning period.By way of parenthesis, the purpose of above-mentioned these contents (1H number, 1-H circulation, the sequential scheduling of pixel column number) is to be convenient to explanation, and does not wish it is restrictive.
As seen from Figure 4, in the pixel column of each selection, (suppose that the selection period is 1H), when forward voltage put on signal line 17a, cut-off voltage put on signal line 17b.During this period, there is not electric current to flow through EL element 15 (not luminous).In non-selected pixel column, cut-off voltage puts on signal line 17a and forward voltage puts on signal line 17b.During this period, electric current flows through EL element 15 (luminous).
By way of parenthesis, the grid of the grid of transistor 11a and transistor 11c is connected to same signal line 17a.Yet the grid of the grid of transistor 11a and transistor 11c can be connected to different signal lines 17 (seeing Figure 32).Then, a pixel will have three signal lines ( signal line 17a, 17b and 17c) (being two signal line 17a and 17b) in the configuration of Fig. 1.On/off (ON/OFF) sequential of on/off (ON/OFF) sequential by the grid of oxide-semiconductor control transistors 11b respectively and the grid of transistor 11c, the variation that the current value that might further reduce EL element 15 causes because of the variation of transistor 11a.
Use different conduction type (N raceway groove and P raceway groove) with signal line 17b and for transistor 11c with 11d by sharing signal line 17a, might simplify exciting circuit, and improve the aperture ratio of pixel.
In this configuration, according to the write path of time sequential routine shutoff of the present invention from signal wire.That is to say, when storing predetermined electric current,, then in the source electrode (S) of transistor 11a and the electric capacity (capacitor) between the grid (G), do not store the precise current value if current path is a branch.By using different conduction-types, and control their threshold, might guarantee when the switched scan circuit for transistor 11c and 11d, turn-off transistor 11c by after make transistor 11d conducting.
By way of parenthesis, although stated by grid pumping circuit 12a (according to the example of second grid exciting circuit of the present invention) control grid signal wire 17a with by grid pumping circuit 12b (according to the example of first grid exciting circuit of the present invention) control grid signal wire 17b with reference to figure 1, but this is not restrictive, much less, can control grid signal wire 17a and 17b by single gate exciting circuit 12.This also is applied to the example that describes below.
Yet, under the sort of situation, because the threshold of oxide-semiconductor control transistors exactly, therefore be necessary to note the carrying out of handling.Can realize foregoing circuit by four transistors of minimum use, even but surpass four transistors, promptly comprise transistor 11e.(it is series connected and is used for sequential control more accurately or is used to reduce mirror effect (describing after a while)), work principle still is identical.By increasing transistor 11e, might carry program current to EL element 15 by transistor 11c more accurately.
With reference to figure 2, predetermined voltage is put on the gate terminal of transistor 11e, transistor 11e is placed low state of activation.
This configuration makes might be from driver transistor 11a by EL element 15 Weak current that circulates exactly.In addition, put on the voltage of the gate terminal (putting on signal line 17f) of transistor 11e, might change state from the electric current output of driver transistor 11a by control.By way of parenthesis, will the voltage identical put on the pixel in the viewing area with the voltage that puts on signal line 17f.Certainly, might form grid pumping circuit 12, its driver gate signal wire 17f, and apply AC signal in signal line 17f by operation grid pumping circuit 12.
By way of parenthesis, signal line 17a, signal line 17b can encourage by different grid pumping circuits or by single gate exciting circuit 12 with signal line 17f, as shown in FIG. 2.The other parts of this configuration identical with shown in Fig. 1, and thereby will the descriptions thereof are omitted.
By way of parenthesis, pixel arrangement is not limited at shown in Fig. 1 and 2 those.For example, can be as shown in Figure 63 and the configuration pixel.Figure 63 does not resemble the configuration among Fig. 1, lacks on-off element 11d.What replace it is to form or place switch 631.The function of switch 11d among Fig. 1 be turn on and off (by or cut off) be transported to the electric current of EL element 15 from driver transistor 11a.As what also will describe in the example of back, the on/off control function of transistor 11d constitutes pith of the present invention.Being configured among Figure 63 do not used under the situation of transistor 11d and finished the on/off function.
In Figure 63, the terminal a of switch 631 is connected to anode voltage Vdd.By way of parenthesis, the voltage that puts on terminal a is not limited to anode voltage Vdd.It can be any voltage that can turn-off the electric current that flows through EL element 15.
The terminal b of switch 631 is connected to cathode voltage (being expressed as ground connection among Figure 63).By way of parenthesis, the voltage that puts on terminal b is not limited to cathode voltage.It can be any voltage that can connect the electric current that flows through EL element 15.
The terminal c of switch 631 is connected with the cathode terminal of EL element 15.By way of parenthesis, switch 631 can be an any kind, as long as it has the ability that turns on and off the electric current that flows through EL element 15.Thereby its installation site is not limited to the position shown in Figure 63, and this switch can be positioned on the path that conveys electrical current to EL element 15 Anywhere.And this switch is not subject to its function, as long as this switch can turn on and off the electric current that flows through EL element 15.
In addition, the term here " by (off) " is not meant the state that does not have current flowing, and be meant the electric current that flows through EL element 15 reduce to be lower than normal.Content above-mentioned also is applied to other configuration of the present invention.
It will not need to illustrate switch 631, because can be realized by the combination of P raceway groove and N channel transistor.For example, it can be realized by the circuit of two analog switches.Certainly, switch 631 can only be made of P raceway groove or N channel transistor, because it only turn-offs the electric current that flows through EL element 15.
When switch 631 was connected to terminal a, Vdd voltage put on the cathode terminal of EL element 15.Thereby electric current does not flow through EL element 15, and is irrelevant with the voltage status of the voltage that is kept by the gate terminal G of driver transistor 11a.Therefore, EL element 15 is non-luminous.
When switch 631 was connected to terminal b, GND voltage put on the cathode terminal of EL element 15.Thereby electric current flows through EL element 15 according to the voltage status that the gate terminal G by driver transistor 11a keeps.Therefore, EL element 15 is luminous.
Thereby, in the pixel arrangement shown in Figure 63, between driver transistor 11a and EL element 15, do not form switching transistor 11d.Yet, might control the luminous of EL element 15 by gauge tap 631.
In the pixel arrangement shown in Fig. 1,2 etc., a pixel comprises a driver transistor 11a.Yet, the invention is not restricted to this, and a pixel can comprise two or more driver transistor 11a.An example is shown among Figure 64.In Figure 63, a pixel comprises two driver transistor 11a1 and 11a2, and its gate terminal is connected to public capacitor 19.By using a plurality of driver transistor 11a, might reduce the variation of program current.The other parts of this configuration with wait at Fig. 1 shown in those are identical, and thereby will the descriptions thereof are omitted.
In Fig. 1 and 2, circulate by the electric current of driver transistor 11a output by EL element 15, and turn on and off this electric current by the on-off element 11d that between driver transistor 11a and EL element 15, forms.Yet, the invention is not restricted to this.For example, in Figure 65 illustration another kind of configuration.
In the example shown in Figure 65, the electric current that is transported to EL element 15 is controlled by driver transistor 11a.The electric current that flows through EL element 15 is to be turned on and off by the on-off element 11d that is placed between Vdd terminal and the EL element 15.Thereby according to the present invention, on-off element 11d can be placed on Anywhere, as long as it can control the electric current that flows through EL element 15.
The variation of the characteristic of transistor 11a is relevant with transistorized size.Reduce the variation of characteristic, preferably the channel length of the first transistor 11a from 5 μ m to 100 μ m (comprising both).Preferably, it from 10 μ m to 50 μ m (comprising both).This is possible, because long channel length increase is included in the crystal boundary (grainboundary) in the raceway groove, reduces electric field, thus and inhibition turnover effect (kink effect).
Best, the transistor 11 of pixel is the polysilicon transistors that is formed by laser recrystalliza (laser recrystallization) (laser annealing), and the channel direction of all crystals pipe is consistent with the Laser emission direction.Especially, preferably the direction of Laser emission is consistent with the formation direction of source signal line 18.This characteristic that will make driver transistor 11a is along source signal line 18 unanimities, and reduces the amplitude fluctuation of source signal line 18 during current programmed.It is current programmed that the minimizing amplitude might be finished it exactly.
An object of the present invention is to propose a kind of circuit arrangement, wherein the variation in the transistor characteristic does not influence demonstration.Need four or more transistor for this reason.When using transistor characteristic to determine network constant, be difficult to determine suitable network constant, unless four characteristics of transistor are inconsistent.The threshold of transistor characteristic and transistorized mobility both are level or vertical the variation according to channel direction with respect to the longitudinal axis of laser emission.
By way of parenthesis, many in both cases variations are identical.Yet mobility and average threshold change in the horizontal direction and between the vertical direction.Thereby what wanted is that all crystals pipe all has identical channel direction in a pixel.
And, if the capacitance of storage capacitor 19 is Cs (pF) and the cut-off current value of transistor seconds 11b is Ioff (pA), the equation below then preferably satisfying.
3＜Cs/Ioff＜24
Preferably, satisfy following equation.
6＜Cs/Ioff＜18
By the cut-off current Ioff that transistor 11b is set is 5pA or littler, might reduce to 2% or still less with flowing through variation in the electric current of EL.This is because when leakage current increases, and does not apply the electric charge of store voltages between grid and source electrode (crossing capacitor) and can not keep a field.Thereby the storage capacitor of capacitor 19 is big more, and the tolerance of cut-off current is just big more.Equation by above satisfying might reduce to the fluctuation of the current value between the adjacent pixels 2% or lower.
In addition, the transistor that preferably constitutes active matrix is a p raceway groove polycrystalline SiTFT, and transistor 11b is bigrid or multi-gated transistor.Preferably, transistor has three or more grids.Unless transistor 11b has good cut-off characteristics, capacitor 19 can not keep electric charge.This will cause bright, cause screen to turn white.
Require the on/off (ON/OFF) of transistor 11b higher than as far as possible, transistor 11b is as source electrode-drain switch of transistor 11a.By using bigrid or multi grid, might reach high on/off (ON/OFF) ratio for transistor 11b.
The semiconductor film of composition transistor 11 normally forms by laser annealing with the low temperature polycrystalline silicon technology in pixel 16.The variation of laser annealing condition causes the variation of transistor 11 characteristics.Yet,, might use current programmed (as shown in FIG. 1 all) to encourage this pixel, so predetermined current will flow through EL element 15 if the characteristic of the transistor 11 in pixel 16 is consistent.This is the advantage that voltage-programming lacks.Best employed laser instrument is an excimer laser.
By way of parenthesis, the formation according to the semiconductor film of transistor 11 of the present invention is not limited to laser anneal method.The present invention also can use thermal annealing (heat annealing) method and relate to the method for solid phase (CGS) growth.In addition, the invention is not restricted to the low temperature polycrystalline silicon technology, can use the high temperature polysilicon technology.And, can form semiconductor film by silicon substrate being mixed and spreading.And, can form semiconductor film by organic material.
The present invention makes laser spots (laser emission scope) 72 be parallel to source signal line 18 and moves, as shown in Figure 7.And, move laser spots 72 in a kind of like this mode of aliging with a pixel column.Certainly, the quantity of pixel column is not limited to one.For example, can launch laser by the RGB among Figure 72 (being three pixel columns in this example) is handled as single pixel 16.And, can be once with the two or more pixels of laser alignment.Much less, mobile laser emission scope can overlapping (for mobile laser emission scope, overlapping be very usual).
To form an a kind of like this mode of square shape with three pixels of RGB and construct pixel.Thereby each R, G, B pixel have rectangular shape.Therefore, anneal, might eliminate the variation of the characteristic of transistor 11 in each pixel by using rectangle laser spots 72.And, can make the characteristic (mobility of the transistor 11 that is connected to same source signal line 18, Vt, S values etc.) unanimity (promptly, although the transistor 11 that is connected to the source signal line 18 that adjoins can be different aspect characteristic, can make the characteristic of the transistor 11 that is connected to same source signal line almost equal).
Usually, laser spots 72 has fixing length, as 10 inches.Because mobile laser spots 72, thus panel must place in such a way, promptly they can meet can mobile laser spots 72 scope (that is, with in the center laser spots 72 of the viewing area 50 of panel with nonoverlapping a kind of mode).
In configuration shown in Figure 7, in the length of laser spots 72, vertically place three panels.The annealing device of emission laser spots 72 is identified in position marker 73a and the 73b (based on the automatic location of pattern-recognition) on the glass substrate 74, and mobile laser spots 72.By pattern recognition device identification position marker 73.Annealing device (not shown) identification position marker 73, and the position of definite pixel column (making laser emission scope 72 be parallel to source signal line 18).It launches laser spots 72 in such a way, is the location overlap of continuous annealing with each pixel column.
Best, particularly, use the laser anneal method of describing with reference to figure 7 (it relates to the linear laser point that emission is parallel to source signal line 18) to be used for the current programmed of organic EL display panel.This is because have identical characteristic (characteristic of the pixel transistor that adjoins in the vertical is quite similar each other) being parallel to the transistor of placing on the source signal line direction 11.This reduces the variation of the voltage level on the source signal line by the current excitation pixel time, and thereby reduces the possibility of write current deficiency.
For example, under the situation that white raster shows, because electric current much at one by the transistor 11a in the adjacent pixels, therefore encourages the electric current of IC 14 outputs not have significant changes in amplitude from source electrode.If the current programmed electric current that the transistor 11a among Fig. 1 has identical characteristic and is used for pixel has identical value at pixel column, then the current potential of source signal line 18 is constant during current programmed.Thereby, in source signal line 18, there is not potential fluctuation to take place.Have much at one characteristic if be connected to the transistor 11a of same source signal line 18, significant potential fluctuation does not then have in source signal line 18.This for other can be current programmed pixel arrangement, configuration as shown in Figure 38 also is correct (thereby, preferably use in the manufacture method shown in Fig. 7).
A kind of relating to, programme the programming of two or more pixel columns simultaneously and can realize that with reference to the method for Figure 27, description such as 30 consistent image shows (because this method does not have the tendency of the scrambling that demonstration causes mainly due to the variation of transistor characteristic).Under the situation of Figure 27 etc., owing to select a plurality of pixel columns simultaneously, so if the transistor in the adjacent pixels row is consistent, then exciting circuit 14 can be absorbed in the scrambling in the characteristics of transistor of vertical placement.
By way of parenthesis, although illustrative IC chip is the IC chip that is stacked on the source electrode exciting circuit 14 in Fig. 7, this is not restrictive, much less, can form source electrode exciting circuit 14 in the process identical with pixel 16.
Specifically, the present invention guarantees that the voltage threshold Vth2 of driver transistor 11b will not fall the voltage threshold Vth1 that is lower than corresponding driver transistor 11a in the pixel.For example, make the grid length L2 of transistor 11b longer than transistor 11a grid length L1, even make the procedure parameter of these thin film transistor (TFT)s change, Vth2 also will not fall and be lower than Vth1.This makes the electric current that might suppress responsive leak.
By way of parenthesis, content above-mentioned also is applied to the pixel arrangement at the current mirror shown in Figure 38.Pixel among Figure 38 is by driver transistor 11a, driver transistor 11b, transistor 11c, switching transistor 11d, capacitor C 19, EL element 15 compositions such as grade, 11a flows through marking current by driver transistor, the exciting current of light-emitting component (as EL element 15) is flow through in driver transistor 11b control, transistor 11c connects or disconnection image element circuit and data line " data " by control grid signal wire 17a1, switching transistor 11d is writing grid and the drain short circuit that makes transistor 11a in the period by control grid signal wire 17a2, capacitor C 19 keeps grid-source voltage after applying voltage, EL element 15 is as light-emitting component.
In Figure 38, transistor 11c and 11d are N channel transistors and other transistor is a p channel transistor, but this is exemplary and nonrestrictive.Capacitor C s has an end that is connected to transistor 11a and the other end that is connected to Vdd (power supply potential), but it can be connected to any fixing current potential, replaces Vdd.The negative electrode of EL element 15 (negative pole) is connected to earthing potential.
Then, EL display panel of the present invention or EL display will be described.Fig. 6 is a key diagram, the circuit of main illustration EL display.In a matrix, arrange or form pixel 16.Each pixel 16 is connected with source electrode exciting circuit 14, the electric current of latter output use in pixel current programmed.In the output stage of source electrode exciting circuit 14 is the current mirror circuit of counting corresponding to the position of vision signal (describing after a while).For example, if use 64 gray scales, then on corresponding source signal line, form 63 current mirror circuits, so that when having selected the current mirror circuit of suitable quantity, the electric current of wanting is put on source signal line 18.
By way of parenthesis, the minimum output current of a current mirror circuit (comprises both) from 10nA to 50nA.Best, the minimum output current of current mirror circuit should (comprise both) from 15nA to 35nA, to guarantee to form the transistorized accuracy of the current mirror circuit among the excitation IC14.
In addition, comprise that precharge or discharge circuit are with to source signal line 18 charge or discharge forcibly.Best, the precharge of charge or discharge or voltage (electric current) output valve of discharge circuit can be provided with respectively for R, G and B forcibly to source signal line 18.This is because the threshold of EL element 15 is different between R, G and B.
Known organic EL has serious temperature dependency (temperature characterisitic).Adjusting the emission brightness that is caused by temperature characterisitic changes, by increasing nonlinear element (such as the thermistor of thermistor or positive temperature coefficient (PTC)) to current mirror circuit, with the variation that changes output current and cause by temperature characterisitic, produce reference current with analog form with adjustment such as thermistors.
According to the present invention, make source electrode exciting circuit 14 by semiconductor silicon chips, and by chip on glass (chip-on-glass) (COG) terminal on the source signal line 18 of technology and base plate 71 be connected.Use metal (such as chromium, copper, aluminium and silver), be used to make signal wire (as source signal line 18).These metals provide Low ESR for thin line width.If pixel is a reflection-type, then preferably by coming together to form circuit with reflectance coating simultaneously with the reflectance coating identical materials.This has simplified production run.
Not only can source electrode exciting circuit 14 be installed by the COG technology.Also might by chip on the film (chip-on-film) (COF) technology source electrode exciting circuit 14 is installed, and it is connected to the signal wire of display panel.About excitation IC, can constitute by three chips by constructing power supply IC 82 respectively.
On the other hand, form grid pumping circuit 12 by the low temperature polycrystalline silicon technology.That is to say, in the process identical, form with transistor in the pixel.This is because grid pumping circuit 12 has better simply inner structure and the frequency of operation lower than source electrode exciting circuit 14.Thereby, even can form by the low temperature polycrystalline silicon technology easily, and allow to reduce instrument bezel width (bezel width).Certainly, might construct grid pumping circuit 12 and use the COG technology that it is installed on the base plate 71 by silicon chip.And on-off element (like cellulose crystal pipe and grid excitation device) can form by the high temperature polysilicon technology, perhaps can be formed by organic material (organic transistor).
Because shift register circuit 61 has the minibuffer capacity, so they can not direct-drive signal line 17.Therefore, between the out gate 63 of each shift register circuit 61 and driver gate signal wire 17, form two or more inverter circuits 62 at least.
This can be applicable to form by polysilicon technology (as the low temperature polycrystalline silicon technology) situation of source electrode exciting circuit 14 equally on base plate 71.Between the shift register of analog switch door (as the transmission gate of excitation source electrode signal wire 18) and source electrode exciting circuit 14, form a plurality of inverter circuits.Following content (output stage (being placed on the inverter circuit between the output stage (as out gate or transmission gate)) of shift register output and pumping signal line) is public for grid pumping circuit and source electrode exciting circuit.
For example, be directly connected to source signal line 18 although in Fig. 6, be shown from the output of source electrode exciting circuit 14, but in fact the output from the shift register of source electrode driver is connected with a plurality of levels of inverter circuit, and phase inverter output is connected to analog switch door (as transmission gate).
The shift register circuit 61a control of grid pumping circuit 12 is used for the signal of signal line 17a, and shift register circuit 61b control is used for the signal of signal line 17b.In the output stage of phase inverter 62, form or place output buffer 63.By way of parenthesis, use the low temperature polycrystalline silicon treatment technology on array base plate 71, to form impact damper etc.
As illustrated in Figure 74, the output buffer circuit 341a of signal line 17a is bigger than the output buffer circuit 341b of signal line 17b.Best, the line resistance of signal line 17a is lower than the line resistance of signal line 17b.This is because enough lack by the time constant that makes signal line 17a, might improve the accuracy of write current.
Figure 111 is the block scheme according to grid pumping circuit 12 of the present invention.By way of parenthesis, the grid pumping circuit 12 among Fig. 6 is CMOS types, and it uses n raceway groove and p channel transistor.12 of grid pumping circuits among Figure 111 use the p channel transistor.Although level Four only is shown in Figure 111 for convenience of explanation, forms in fact or arranged and the signal line 17 as many unit gate output circuits 1111 that exist.
As illustrative in Figure 111, (12a and 12b) comprises signal terminal according to grid pumping circuit 12 of the present invention: four clock terminal (SCK0, SCK1, SCK2 and SCK3), one starts terminal (data-signal SSTA), with two anti-phase terminals (DIRA and DIRB, they apply the signal of phase differential 180 degree each other), it puts upside down direction of displacement.They also comprise power supply terminal, comprise L power supply terminal (VBB) and H power supply terminal (Vd).
Because 12 of the grid pumping circuits in Figure 111 use the p channel transistor, therefore in grid pumping circuit 12, can not comprise level shift circuit (being used for the low logic voltage conversion of signals is become the circuit of high voltage logic signal).Thereby, in the power circuit (IC) 82 shown in Fig. 8 waits, place or form level shift circuit.
If pixel 16 is made of p channel transistor, then they will mate grid pumping circuit 12 well, and the latter uses at the p channel transistor shown in Figure 111, or the like.P channel transistor ( transistor 11b and 11c and transistor 11d in Fig. 1 configuration) conducting when the voltage step-down.On the other hand, low-voltage also is used as the selection voltage of grid pumping circuit 12.If use than low level as selecting level, the grid excitation device that then has the P raceway groove is realized good coupling, as what see in can the configuration from Figure 113.This is because can not keep long-time than low level.On the other hand, higher level can keep long-time.
And, by using the P raceway groove as the driver transistor (the transistor 11a among Fig. 1) of electric current being provided for EL element 15, might use the solid electrode that constitutes by thin metal film negative electrode as EL element 15.And, can flow through electric current with positive dirction towards EL element 15 from anode potential Vdd.Consider above-mentioned environment, preferably the transistor in pixel 16 and the grid pumping circuit 12 is the P raceway groove.Thereby using p channel transistor according to the present invention is not only design problem as transistor (driver transistor and switching transistor) in pixel 16 and the grid pumping circuit 12.
Can directly on array base plate 71, form level shifter (LS) circuit.That is to say, use N raceway groove and p channel transistor to be used for level shifter (LS) circuit.The logical signal that comes the self-controller (not shown) is to be boosted by the level shifter circuit that directly forms on array base plate 71, so it will mate the logic level by the grid pumping circuit 12 of p channel transistor structure.Logic voltage through boosting puts on grid pumping circuit 12.
For ease of explanation, in example of the present invention, use the pixel arrangement among Fig. 1.Yet, relate to and use p channel transistor to be not limited to pixel arrangement among Fig. 1 as the selection transistor of pixel 16 and the technological concept of the present invention that is used for grid pumping circuit 12 (the transistor 11c of Fig. 1).Much less, for example, under the pixel arrangement situation of current excitation, also can be applicable to illustrative current mirror pixel arrangement in Figure 38 and 50.And, under the pixel arrangement situation of voltage drive, also can be applicable to two transistors (selecting transistor is transistor 11b, and driver transistor is transistor 11a) such as among Figure 62 illustrative those.And, much less, can be applicable to use four transistors (selecting transistor 11c and driver transistor 11a) as illustrative pixel arrangement in Figure 51.Also can be applicable to the pixel arrangement of current excitation with reference to the configuration of Figure 111 and 113 grid pumping circuits of describing 12.Thereby, above or the content that describes below be not limited to pixel arrangement etc.
And, wherein use the p channel transistor to be not limited to organic EL or other light emitting device (display panel or display) as the selection transistor of pixel 16 and the configuration that is used for grid pumping circuit.For example, also can be applicable to display panels.
Anti-phase terminal (DIRA and DIRB) puts on all unit gate output circuits (unit gateoutput circuit) 1111 with common signal.As what see in can the equivalent circuit diagram from Figure 113, the signal of opposite polarity is presented to anti-phase terminal (DIRA and DIRB).The reverse direction of scanning of shift register, counter-rotating puts on the polarity of the signal of anti-phase terminal (DIRA and DIRB).
By way of parenthesis, the circuit arrangement among Figure 111 comprises four clock cables.According to the present invention, the 4th, best numeral.Yet this is not restrictive, and the present invention can use and is less than or more than four clock cables.
Between the unit gate output circuit 1111 that adjoins, differently present clock signal (SCK0, SCK1, SCK2 and SCK3).For example, in the gate output circuit 1111a of unit, by the clock terminal SCK0 OC that feeds, simultaneously by the clock terminal SCK2 RST that feeds.The gate output circuit 1111c of unit also is this situation.Yet, in the gate output circuit 1111b of unit of the gate output circuit 1111a of the unit of being adjacent to (the unit gate output circuit in next stage), by the clock terminal SCK1 OC that feeds, simultaneously by the clock terminal SCK3 RST that feeds.Like this, feed by different way every a unit gate output circuit 1111 by clock terminal by different way: by feed OC and of SCK0 by the SCK2 RST that feeds, in next stage by feed OC and of SCK1 by the SCK3 RST that feeds, by feed OC and by the SCK3 RST that feeds of SCK0, the rest may be inferred in next stage again.
Figure 113 illustrates the circuit arrangement of the unit gate output circuit 1111 that only uses p channel transistor.Figure 114 is the sequential chart that is used to illustrate the circuit arrangement of Figure 113.Figure 112 is a sequential chart multistage among Figure 113.Thereby, by understanding Figure 113, might understand whole work.With its with explanatory note, it would be better to reference to the sequential chart among Figure 114 and understand this operation in conjunction with the circuit diagram of equivalence among Figure 113, and thereby will omit the detailed description of transistor work.
When only constituting exciting circuit, be difficult in fact the output voltage of signal line 17 is remained on H level (the Vd voltage among Figure 113) with p channel transistor.Also be difficult to they are remained on L level (vbb voltage among Figure 113) for a long time, but can such as during a pixel column of selection, hold them in the H level suitably in the short time.The signal that is fed to the IN terminal makes the state of n1 anti-phase with respect to n2 with the SCK clock that is fed to the RST terminal.Although n2 and n4 have the current potential of identical polar, the SCK clock that is fed to the OC terminal further reduces the potential level of n4.On the contrary, in the identical time, the Q terminal remained on L level (from signal line 17 output forward voltage).The signal that outputs to SQ terminal or Q terminal is sent to unit gate output circuit 1111 in the next stage.
In the circuit arrangement of Figure 111 and 113, by control IN (INA and INb) terminal and the sequential that puts on the signal of clock terminal, might be two patterns of using the same circuits configuration: in a kind of pattern, as shown in Figure 165 (a), select a signal line 17, in another kind of pattern, as shown in Figure 165 (b), select two signal lines 17.In selecting side grid pumping circuit 12a, Figure 165 (a) illustrates a kind of incentive mode, wherein on the basis of delegation of delegation displacement once (normal excitation) select (51a) pixel column.Figure 165 (b) illustrates a kind of configuration, wherein once selects two pixel columns.This incentive mode is selected the excitation of a plurality of pixel columns (51a or 51b) corresponding to descriptions such as reference Figure 24 the time.(using the capable configuration of virtual pixel).On the basis of delegation of delegation displacement, once select two row that adjoin.
According to the motivational techniques of Figure 165 (b), although pixel column (51a) keeps the final stage video, to pixel column 51b precharge.This makes pixel 16 be easier to write.That is to say that the present invention can be switched by the signal that manipulation puts on terminal between two kinds of incentive modes.
By way of parenthesis, although 165 (b) illustrate the pattern of the pixel column that a kind of selection adjoins, also might select to be different from the pixel column of adjacent pixels row, shown in Figure 123.In the configuration shown in Figure 113, be one group of control pixel column with four.In the middle of four pixel columns, might determine to select a pixel column still to select two continuous pixel columns.The quantity of the pixel column in each group is subjected to the restriction of clock (SCK) quantity, is four in this example.If use eight clocks (SCK), can be one group of control pixel column then with eight.Thereby, as what also can the configuration from Figure 113 see, can as illustrative among Figure 168, select pixel column.
In Figure 168 (a), can from the group of four pixel columns, select a pixel column (still do not select pixel column from pixel column of group selection of four pixel columns, depend on the input state and the displaced condition of IN data).In Figure 168 (b), can from the group of four pixel columns, select two pixel columns (from the group of four pixel columns, select two pixel columns still not select pixel column, depend on the input state and the displaced condition of IN data).According to the present invention, the pixel column that quantitatively equals clock count constitutes a group, and select a pixel column or quantitatively be not more than the pixel column (for example, if four pixel columns constitute groups then select two pixel columns (=4/2)) of half pixel column in each group.Thereby, in each pixel column group, always there is unselected pixel column.
When shown in Figure 165 (a), selecting a pixel column, flow through a pixel 16 as the illustrated program current Iw of Figure 167 (a).Program current Iw is written into pixel 16, and it is divided into illustrated two pixel columns as Figure 167 (b).Yet this is not restrictive.For example, by applying the electric current with the identical size of program current Iw as illustrated in Figure 167 (b) for twice, identical electric current can pass through two selected pixels (16a and 16b).
In the operation of selecting side grid pumping circuit 12a shown in Figure 165.In Figure 165 (a), be shifted singly by being synchronized with horizontal-drive signal, once select a pixel column.In Figure 165 (b), be shifted singly by being synchronized with horizontal-drive signal, once select two pixel columns.
Figure 168 is a key diagram, the operation of illustration grid pumping circuit 12b, the signal line 17b that its control makes EL element 15 conductings and ends.The state that Figure 168 (a) is caused when the signal line 17b of a pixel column in forward voltage being put on each group that is made of four pixel columns (one group of so hereinafter pixel column will be called the pixel column group) is shown.The position synchronous of shown pixel column 53 is shifted singly in horizontal-drive signal (HD).Certainly, it is random determining to select in 4 pixel column groups a pixel column (applying the signal line 17b of forward voltage in other three pixel columns) still not select pixel column (applying the signal line 17b of cut-off voltage in four pixel columns).Because this is configured to shift register, therefore is synchronized with horizontal-drive signal and is offset selection.
The state that Figure 168 (b) causes when the signal line 17b of two pixel columns in forward voltage being put on each 4 pixel column group is shown.The position synchronous of shown pixel column 53 is shifted singly in horizontal-drive signal (HD).Certainly, it is random determining to select in 4 pixel column groups two pixel columns (applying the signal line 17b of cut-off voltage in other two pixel columns) still not select pixel column (applying the signal line 17b of cut-off voltage in four pixel columns).Because this is configured in the shift register, therefore is synchronized with horizontal-drive signal and is offset selection.
The state that Figure 168 (a) causes when the signal line 17b of a pixel column in forward voltage being put on each 4 pixel column group is shown.The state that Figure 168 (b) causes when the signal line 17b of two pixel columns in forward voltage being put on each 4 pixel column group is shown.Yet, the invention is not restricted to this configuration (system).For example, forward voltage can be put on the signal line 17b of a pixel column in each six pixel column group.Can forward voltage can be put on the signal line 17b of two pixel columns in each eight pixel column group for alternatively.That is to say, the invention is not restricted to the motivational techniques among Figure 168.And, can change the on/off state independently for R, G and B.
Figure 169 is illustrated in the voltage status that outputs to signal line 17b in the incentive mode of Figure 168 (a).As discussed previously, pixel column represented in the index in signal line 17b ().By way of parenthesis, for convenience of explanation, pixel column is from (1).And, the numeral horizontal scanning period number of the row of the top in table.
As illustrated in Figure 169, signal line 17b (1) has the same waveform as to 17b (8) with signal line 17b (5) to 17b (4).That is to say, each 4 pixel column group is carried out identical operations.
Figure 170 is illustrated in the voltage status that outputs to signal line 17b in the incentive mode of Figure 168 (b).As illustrated in Figure 170, signal line 17b (1) to 17b (4) have with signal line 17b (5) to the identical waveform of 17b (8).That is to say, each 4 pixel column group is carried out identical operations.
According to the example among Figure 168, can at any time adjust the brightness of display screen 50 by the quantity that increases and reduce the pixel in the display mode.In the QCIF panel, the quantity of vertical pixel is 220 points.Thereby, in Figure 168 (a), can show 220/4=55 pixel column.That is to say, in white raster shows, when showing 55 pixel columns, obtain high-high brightness.Can make display screen darker by the quantity of the shown pixel column of following minimizing: 55 → 54 → 53 → 52 → 51 → ... 5 → 4 → 3 → 2 → 1 → 0.On the contrary, can make screen brighter by the quantity of the shown pixel column of following increase: 0 → 1 → 2 → 3 → 4 → 5 → ... 50 → 51 → 52 → 53 → 54 → 55.Thereby, can regulate brightness with a plurality of step levels.
In this brightness regulation process, the brightness of screen is directly proportional with the quantity with the pixel column that shows and changes linearly.In addition, the gamma characteristic (gamma characteristic) corresponding to brightness does not change (it is constant that the quantity of gray scale keeps, and no matter screen is bright or dark).
Change the brightness of the pixel of demonstration with adjusting screen 50 although think 1 increment in the above example, this is not restrictive.Can be by following change: 54 → 52 → 50 → 48 → 46 → ... 6 → 4 → 2 → 0.Can be for alternatively, can be by following change: 55 → 50 → 45 → 40 → 35 → ... 15 → 10 → 5 → 0.
Equally, in Figure 168 (b), the QCIF panel can show 220/2=110 pixel column.That is to say, in white raster shows, when showing 110 pixel columns, obtain high-high brightness.Quantity by the pixel column that shows by following minimizing can make display screen darker: 110 → 108 → 106 → 104 → 102 → ... 10 → 8 → 6 → 4 → 2 → 0.On the contrary, can make screen brighter by the quantity that increases the pixel column that shows by following: 0 → 2 → 4 → 6 → 8 → ... 100 → 102 → 104 → 106 → 108 → 110.Thereby, can regulate brightness with a plurality of step levels.
Change the brightness of the quantity of the pixel column that shows with adjusting screen 50 although think 2 increment, this is not restrictive.Can be by being 4 or changing greater than 4 increment.The pixel column that shows when reduction is when regulating brightness, and is best whenever possible, with distributed way reduction pixel column, rather than reduces with centralized fashion.This is in order to reduce flicker.
Also can replace using the quantity (pixel column is greatly luminous or non-luminous on whole horizontal scanning period) of pixel column to regulate brightness by changing every horizontal scanning period fluorescent lifetime.That is to say, by make pixel column the part of a horizontal scanning period (for example 1/8 of 1H or 1H 15/16) during the luminous brightness of regulating display screen.
Use the major clock (MCLK) of display panel to carry out this adjusting (control).
Under the situation of QCIF panel, MCLK approximately is 2.5MHz.This means can be to 176 clock pulse counts in a horizontal scanning period (1H).Thereby, by forward voltage (Vgl) being put on duration of signal line 17b, might count EL element 15 conductings that make in each pixel column and end to the MCLK step-by-step counting and based on count value control.
In particular, this can be set to clock (SCK) low level position and clock (SCK) is set to the low level duration finish by control in the sequential chart of Figure 112 and 114.It is short more that clock (SCK) is arranged to the low level duration, and the duration of the Q lead-out terminal being arranged to low level (Vgl) is just short more.
With the motivational techniques among Figure 168 (a), symmetrically the duration of the Vgl that in the period of 1H, takes place (forward voltage) shorter and shorter, as illustrative in Figure 171.In (a) of Figure 171, in the period of whole 1H, export Vgl (forward voltage) (yet with the p channel gate exciting circuit 12 shown in Figure 113, the impossible low level that surpasses the whole 1H period that produces is exported).A period of Vgh voltage (cut-off voltage) takes place between 1H and next 1H.Yet for convenience of explanation, this is shown in (a) of Figure 171.
Equally, in (b) of Figure 171, the duration of Vgl that outputs to signal line 17b is than two the MCLK pulses of lacking in (a).In (c) of Figure 171, the Vgl duration that outputs to signal line 17b is than two MCLK pulses of the weak point in (b).Remaining is with top identical, and thereby will the descriptions thereof are omitted.
With the motivational techniques of Figure 168 (b), symmetrically the duration of the Vgl that in the period of 2H, takes place (forward voltage) shorter and shorter, as illustrative in Figure 172.In (a) of Figure 172, in the period of whole 2H, export Vgl (forward voltage) (yet with the p channel gate exciting circuit 12 shown in Figure 113, the impossible low level that surpasses the whole 2H period that produces is exported).A period of the Vgh voltage (cut-off voltage) that between 2H and next 2H, takes place.This situation to Figure 171 is similar.
Equally, in (b) of Figure 172, the duration of Vgl that outputs to signal line 17b is than two the MCLK pulses of lacking in (a).In (c) of Figure 172, the duration of Vgl that outputs to signal line 17b is than two MCLK pulses of the weak point in (b).Remaining is with top identical, and thereby will the descriptions thereof are omitted.
By way of parenthesis, if regulate clock, then the continuous 2H of voltage can be put on the signal line 17b among Figure 171, as illustrative in Figure 173 by the configuration that changes grid pumping circuit 12 a little.
Motivational techniques among Figure 168 can realize that also suitable film shows.Yet, although viewing area 53 and non-display area 52 both be continuous in Figure 13, the viewing area 53 among Figure 168 is not continuous.This is because forward voltage is put on pixel column (Figure 168 (a)) in each 4 pixel column group or two contiguous pixels capable (Figure 168 (b)) in each 4 pixel column group.Certainly, by changes and improvements illustrative circuit arrangement in Figure 113 and 111, might change or change the pixel column that shows with respect to clock (SCK).For example, can be by skipping a pixel column display pixel rows.And, may be luminous by skipping six pixels enforcement pixel columns.Yet under the situation of the exciting circuit (shift register) that is made of the p raceway groove or forms, just the pixel column 52 at luminous (on-illuminated) is placed between the pixel column 53 of demonstration at least.
Figure 174 illustrates a kind of method, is under the situation about being made of the p channel transistor shown in Figure 113 at grid pumping circuit 12, and this method supports film to show.Degeneration as discussed previously, as to require demonstration intermittently to show with the image that prevents to cause owing to fuzzy moving-picture.That is to say, must insert black (showing black or the low-light level display screen).Screen display intermittently must as showing, CRT be provided.That is to say, show that any pixel column of an image enters black (low-light level) display mode behind scheduled time slot.This pixel column flicker (image demonstration and non-demonstration (black demonstration or low-light level show) are alternately).Black display time interval should be 4 milliseconds or longer.Can be for alternatively, black show (low-light level demonstration) should continue frame (field) period 1/4 or longer.Best, black show (low-light level demonstration) should continue frame (field) period 1/2 or longer.
This condition depends on that human vision persists.That is to say that because people's vision, the image that glimmers sooner than predetermined interval seems luminous continuously.This causes the moving-picture that blurs.Yet, when image flicker must be slower than predetermined time interval, although they visually seem is continuous, the non-demonstration of being inserted (the black demonstration) zone becomes identifiable, and shown image becomes discrete (having nothing unusual although visually it seems).Therefore, in film showed, image became discrete and does not have image blurring to take place.That is to say, eliminated fuzzy moving-picture.
In the regional A of Figure 174 (a), show the pixel column (luminous) in four pixel columns.Thereby, pixel column of per four horizontal scanning periods luminous once (the luminous 1H of every 4H).This period (pixel column conducting, by and used time of conducting once more) is 4 milliseconds or still less.Thereby it seems that at people's eyes these images are (any pixel column almost seem and showing always) that show continuously.In the area B of Figure 174 (a), insert black (low-light level demonstrations), so that pixel column of reason will it shows that once more the needed time will be 4 milliseconds or more after once in demonstration, and preferably 8 milliseconds or more.This makes image discrete, causes suitable film to show.
By way of parenthesis, using term " zone (area) A " or " area B " above is for convenience of explanation.In Figure 174, with the direction of arrow (from screen head-to-foot) scanning area A sequentially.This is similar to electron beam scanning among the CRT.That is to say, sequentially rewrite image (for Figure 174 (a), with reference to Figure 175).Scanning (excitation) pixel column shown in Figure 175 (a) → (b) → (c) → (a).For Figure 174 (b), with reference to Figure 176.As scanning (excitation) pixel column shown in Figure 176 (a) → (b) → (c) → (a).
As mentioned above, use according to motivational techniques of the present invention, in Figure 174 (a), for 4 milliseconds in the period (best 8 milliseconds) or a more period in a field (frame), pixel column shows 1H in every 4H arbitrarily, and keeps in all the other periods of ((frame) is in the period) not luminous (black demonstration (the black insertion) or low-light level show).Thereby, although top term " regional A " or " area B " used for convenience of explanation is more suitable for using term " period (period) A " or " period B " from the viewpoint of time.In particular, displayed image continuously in regional A (period A), display pixel rows (screen 50) off and in area B (period B) simultaneously.Foregoing also is applied to the example among Figure 174 (b), is applied to other example of the present invention equally.
In Figure 174 (b), two bright and following continuously two pixel columns of pixel column are not luminous.That is to say, in regional A (period A), the period of the luminous 2H of reaching of pixel column and the not luminous period that reaches 2H, and repeat this circulation.In area B (period B), pixel column keeps the not luminous predetermined periods that reaches.With the motivational techniques among Figure 174 (b), continuous demonstration looks and occurs in regional A, and demonstration intermittently looks and occurs in area B.
Thereby, when observing the display mode of any pixel column (pixel), replace two periods according to motivational techniques of the present invention: in first period, be less than in period (or be less than frame (field) period 1/4) of 4 milliseconds, at least image demonstration and non-demonstration repeat once at least, and in second period, pixel column (pixel) changes over non-display mode (black show or the low-light level lower than predetermined luminance shows) from display mode, and 4 milliseconds or more (frame (field) period 1/4 or more) enter display mode afterwards.Top excitation makes and might realize that suitable image shows.And it uses simple control circuit configuration (grid pumping circuit 12 etc.), causes cost to reduce.
In Figure 174, might regulate the brightness of (change) screen 50 once more by the quantity (, can change or regulate the quantity of the pixel column 53 that shows) that changes luminous pixel column as under the situation of Figure 168.And, by changing the black ratio of inserting zone (area B among Figure 174), might realize optimum condition according to visual display condition.For example, under the situation of still picture, must avoid increasing area B.Increase area B and will cause flicker.Under the situation of still image, should in screen 50, disperse viewing area 53.For example, the QCIF panel has 220 pixel columns.220/55=4 use 55 pixel columns to show still picture, because can show one by per four pixel columns.Be presented at 10 pixel columns in 200 pixel columns, can in per 22 pixel columns (220/10=22), show one.
By way of parenthesis, although in an area B (period B) shown in Figure 174, much less, this is not restrictive, and area B (period B) can be divided into two or more parts.
Yet, in Figure 174 (a), have only a luminous selection that whether makes in per four pixel columns.Thereby, can not make one in per 22 pixel columns luminous.Therefore, in per five 4 pixel column groups, show a pixel column (that is, in per 20 pixel columns, showing).In other words, four 4 pixel column groups are not luminous, and it is luminous having only one 1 pixel column in the pixel column group.Not luminous (the 220-4 * 5=200) of all remaining 20 (20) individual pixel columns.That is to say that the present invention is placed on the one group of pixel column that will handle in the unit, and the pixel column component is become a piece, and on the basis of a piece of a piece, control the quantity of the pixel column group that comprises the pixel column of wanting bright.Foregoing also is applied to the example among Figure 174 (b), equally also is applied to other example of the present invention.
On the contrary, under the situation that film shows, should insert 4 milliseconds black demonstration at least, Figure 174 is described as reference.And the ratio (deceive the duration that shows or deceive the area ratio that shows with display screen) by changing black insertion might change film display condition (regulating it to optimum condition).Show (for example, active if image moves) for very fast film, suggestion increases the black zone of inserting.When so doing, reduce brightness owing to reducing pixel quantity, by increasing the emission luminance compensation displayed image of each pixel column.And suggestion increases the black period of continuing that shows.If if the film viewing area is moved slowly relatively with the ratio of whole screen relative to little or moving-picture, then suggestion reduces the black ratio of inserting.When so doing, owing to the display brightness that the quantity that increases bright pixel column 53 increases can easily be regulated by the emission brightness that reduces each pixel column.This adjusting can wait by change program current Iw to be carried out.Can be for alternatively, can insert the period and be dispersed into a plurality of parts and regulate by deceiving.This makes that might realize having the suitable image that reduces flicker shows.
Thereby, also be under the situation that film shows, might be by changing or regulating the black condition of inserting and realize that more excellent image shows.Much less, foregoing also is applied to the example that describes below.
Check input image signal (ID detection) for moving-picture.If signal indication moving-picture or comprise many moving-pictures is then carried out the excitation system (by the demonstration at black intermittence of inserting) among Figure 174.Under the situation of still picture, realize the excitation system (with luminous pixel column dispersed placement as far as possible) among Figure 168.Certainly, can change excitation system according to the application of display panel of the present invention or display.For example, for the excitation system among still picture (such as the picture on computer monitor) use Figure 168.For the excitation system among AV application (such as TV) use Figure 174.Can use the SSTA data Pin of grid pumping circuit 12b easily to change excitation system.This can control simply and flow through in the transistorized conducting of the electric current of the EL element 15 of Fig. 1 shown in waiting and end and finish.
Switching between the excitation system of Figure 174 and 168 is (for moving-picture or still picture, perhaps for mainly being moving-picture or mainly being still picture), can or carry out when needed or can finish by manufacturer according to display panel of the present invention by providing switch to leave the user for.And, can be by automatically finishing switching with the condition of detection surrounding enviroment such as optical sensor.Also control signal (switching signal) and the vision signal that is received by the present invention might be combined, detect control signal, and switch display mode (excitation system).
Figure 177 is illustrated in the output waveform of signal line 17b under the situation of using the excitation system among Figure 174 (a).Under the situation of the pixel arrangement in Fig. 1, the on/off signal (Vgh is that cut-off voltage and Vgl are forward voltage) that puts on signal line 17b makes transistor 11d conducting and ends, and therefore makes EL element 15 conductings and ends.In Figure 177, top line comprises horizontal scanning period, wherein the quantity that symbol L remarked pixel is capable (under the situation of QCIF panel, L=220 pixel column).In Figure 168 and 174, again, be not limited to pixel arrangement among Fig. 1 according to excitation system of the present invention.Much less, also they can be applied to other pixel arrangement (for example, Figure 38).
As seeing from Figure 177, in period A (regional A), the 1H in every 4H, forward voltage (Vgl) puts on signal line 17b.In period B (area B), apply cut-off voltage (Vgh) continuously.Thereby electric current does not flow through EL element 15 in the section at this moment.Each pixel column is to scan to the position that each applies the signal line 17b of forward voltage.
By way of parenthesis, although stated scanning element row singly in the above example, the invention is not restricted to this.For example, under interleaved situation, skip a pixel column scanning element row.That is to say scanning even pixel row in first.Scanning odd pixel row in second.When rewriteeing first, keep writing second image.Yet, cause flicker (perhaps may not causing).When rewriteeing second, keep writing first image.Certainly, may cause flicker, as the example in Figure 174.
Under interleaved situation, a frame is made up of two fields, and this is very common situation at CRT.Yet, the invention is not restricted to this.For example, a frame can be made up of four fields.Under the sort of situation, in first, be overwritten in the image (wherein n is not less than 1 integer) in (4N+1) individual pixel column.In second, rewrite the image of (4N+2) individual pixel column.In the 3rd, rewrite the image of (4N+3) individual pixel column.In the end rewrite the image of (4N+4) individual pixel column in the 4th.Thereby, write pixel column according to the present invention and be not limited to sequential scanning.Foregoing also is applied to other example.Be meant the general scanning of jumping in this alleged staggered scanning, and be not limited to " 2=1 frame ".That is to say that a frame can be formed by a plurality of.
Much less, can be combined in the excitation system of describing among Figure 171,172,173 etc., the excitation system of use in Figure 177 or 178, it comprises the brightness (control ON (leading to) period) of flowing through the Current Regulation screen 50 of EL element 15 in a horizontal scanning period (1H) or the two or more horizontal scanning period by being controlled at.
As in the situation of Figure 177, Figure 178 illustrates the waveform that is applied to signal line 17b among Figure 174 (b).Figure 178 is that with the different of Figure 177 forward voltage (Vgl) puts on every signal line 17b and reaches two horizontal scanning periods (2H), and reaches 2H with after-applied cut-off voltage (Vgh) in period A (regional A sees Figure 168 (b)).Alternately apply forward voltage and cut-off voltage.In period B (area B), apply cut-off voltage continuously.Every 1H scans the position that each applies the signal line 17b of forward voltage.
Figure 177 is illustrated in the waveform of signal line 17b under the situation of using the excitation system among Figure 174 (a).Under the situation of the pixel arrangement of Fig. 1, the on/off signal (Vgh is that cut-off voltage and Vgl are forward voltage) that puts on signal line 17b makes transistor 11d conducting and ends, thereby makes EL element 15 conductings and end.In Fig. 1, top line comprises horizontal scanning period, wherein the quantity of the capable L of symbol L remarked pixel (under the situation of QCIF panel, L=220 pixel column).In Figure 168 and 174, again, be not limited to pixel arrangement among Fig. 1 according to excitation system of the present invention.Much less, they also are applied to other pixel arrangement (for example, Figure 38,43,51,62,63 etc.).
As the situation among Figure 177, Figure 178 illustrates the waveform of the signal line 17b that puts among Figure 174 (b).Figure 178 is different with Figure 177's, is that forward voltage (Vgl) puts on signal line 17b and reaches two horizontal scanning periods (2H), and reaches 2H with after-applied cut-off voltage (Vgh) in period A (regional A sees Figure 168 (b)).Alternately apply forward voltage and cut-off voltage.In period B (area B), apply cut-off voltage continuously.Every 1H scans the position that each applies the signal line 17b of forward voltage.Other content and Figure 177 are same or similar, and thereby with the descriptions thereof are omitted.
By way of parenthesis, in the above example, regional A and area B coexist as in the screen 50.That is to say that there be (change in location of regional A certainly) all the time in any period inner region A and the area B in screen display mode.This means that period A and period B are present in the field (frame, that is, the refresh cycle of screen).Yet, because can being used to improve film, black insertion the (black demonstration or low-light level show) show, therefore the invention is not restricted to the excitation system among Figure 124.For example, can use excitation system among Figure 179.
In Figure 179, suppose that for convenience of explanation screen constitutes by four display time interval (a) and (b), (c) with (d).Suppose also that a frame is made of four fields, Figure 179 (a) is corresponding to first, and Figure 179 (b) is corresponding to second, Figure 179 (c) corresponding to the 3rd and Figure 179 (d) corresponding to the 4th.In Figure 179, show the circulation that repeats (a) → (b) → (c) → (d).
In first, sequentially select the even pixel row to rewrite image, as illustrative in Figure 179 (a).When rewriteeing first, screen 50 is sequentially filled with black the demonstration from backing down the beginning, as Figure 179 (b) illustrative (Figure 179 (b) illustrates the screen 50 of having filled black demonstration).Then, in the 3rd, picture sequences ground begins to write the odd pixel row from backing down of screen 50, as illustrative in Figure 179 (c).In other words, sequentially show the odd number image from backing down the beginning.Then, in the 4th, picture sequences ground begins to put into non-light-emitting mode (the black demonstration) (Figure 179 (d) illustrates screen 50 fully at non-light-emitting mode) from backing down of screen 50.
By way of parenthesis, use word " to write image " and " displayed image " at Figure 179 (a) with (c), and the present invention is characterised in that displayed image (luminous) in fact.Thereby, write image (working procedure) and needn't be equal to displayed image.That is to say that people can think at Figure 179 (a) and (c), by control grid signal wire 17b, the electric current of EL element 15 is flow through in the present invention's control, thereby and image is placed luminous or non-light-emitting mode.Thereby, switch (for example, in the period at 1H) between the state among the state in Figure 179 (a) and Figure 179 (b) at once.For example, this can by control enable terminal finish (in the shift register of grid pumping circuit 12b, keep logical-state and disconnected-state (in Figure 179 (a), the shift register of even pixel row keeps logical-status data) and enable terminal show when disconnected Figure 179 (b) and (d) in state and at the state that enables terminal demonstration Figure 179 (a) when logical).Thereby, can use logical-state of signal line 17b and disconnected-demonstration that state can be finished among Figure 179 (a) and 179 (c) (for example, in capacitor 19, to keep pictorial data in advance under the situation of the pixel arrangement in Fig. 1.Be set out in Figure 179 (a) and (b), (c) and (d) in every kind of pattern a field period takes place.
Yet, the invention is not restricted to these display modes.In order to improve the film display condition at least, black insertion pattern (such as at Figure 179 (b) or the pattern (d)) can move 4 milliseconds.Thereby, in example of the present invention, Figure 179 (a) and (c) in display mode not only can produce scanning by the shift register circuit that uses grid pumping circuit 12b to signal line 17b.Can be by interconnecting odd gates signal wire 17b (being called the odd gates signal line group), interconnecting even number signal line 17b (being called even number signal line group) and alternately apply forward voltage and cut-off voltage produces these patterns in odd gates signal line group and even number signal line group.If forward voltage puts on odd gates signal line group and cut-off voltage and puts on even number signal line group then produce display mode among Figure 179 (c).If forward voltage puts on even number signal line group and cut-off voltage and puts on the odd gates signal line group then produce display mode among Figure 179 (a).Figure 179 (b) and (d) in display mode if when the shutoff voltage cut-off voltage puts on odd gates signal line group and even number signal line group, then produce Figure 179 (b) and (d) in display mode.Should be created in every kind of pattern among Figure 179 (a) and (b), (c), (d) (especially Figure 179 (b) and (d)) and reach 4 milliseconds or longer.Excitation system among Figure 179 replaces between screen display mode (Figure 179 (a) and (c)) and black display mode (the black insertion, Figure 179 (b) and (d)).This is shown as intermittently image, has improved film display performance (not fuzzy moving-picture).
Excitation system in the example of Figure 179 is included in first and the 3rd in odd pixel row or even pixel row displayed image and inserts blank screen (Figure 179 (b) and (d)) between two screen.Yet, the invention is not restricted to this.Display mode in Figure 168 can cause in first and the 3rd and can insert black the demonstration between two fields.
Be the sequential chart of an example describing below shown in Figure 180.Figure 180 (a) is corresponding to first, and Figure 180 (b) is corresponding to second, and this is black insertion pattern.Figure 180 (c) is corresponding to the 3rd.By way of parenthesis, omitted the 4th, it with Figure 180 (b) in identical.Yet the 4th is not strict necessary.A frame field can be made up of three fields.Owing in second, insert blank screen, therefore reduced fuzzy moving-picture widely.Thereby, in Figure 180, repeat the circulation of (a) → (b) → (c).
In Figure 180 (a), displayed image reaches 1H (in every 4H Vgl voltage (forward voltage) put on every signal line 17b reach 1H) in per four horizontal scanning periods (4H) in Figure 168 (a).Then, in second, cut-off voltage (Vgh) puts on all signal line 17b.This can enable terminal by control and finish at once, as the situation of the example of front.Thereby, not that strictness must keep the state among Figure 180 (b) to reach a field period.Finish suitable film and show 4 milliseconds of hold modes or longer just enough.Yet, in Figure 180 (a),, will skip image if sequentially rewrite image from the backing down the beginning of screen (needn't from backing down the beginning).State in Figure 180 (b) can be by contiguous block in many signal line 17b and as enable terminal with reference to control as described in Figure 179 and keep.
In Figure 180, displayed image regularly, for example, by in every 4H, making the luminous 1H of each pixel column.Yet, if time interval that each pixel column equates in unit in the period (frame for example, a field, or the like) luminous (demonstration) is just enough.That is to say, there is no need to take place regularly light-emitting mode and non-light-emitting mode.
Figure 181 illustrates the example that light-emitting mode takes place brokenly.Forward voltage puts on signal line 17b (1) in 1H, 5H, 6H, 9H, 13H, 14H or the like.In other period, apply cut-off voltage.Thereby randomly rather than periodically (although being periodically on long terms) applies forward voltage.If it is approximately equal to apply total duration of forward voltage between inherent different signal lines of a frame period (unit period), then just enough.Like this, the luminous duration (pixel column luminous (demonstration)) that approximately equates of different pixel column when forward voltage puts on signal line 17b.
By way of parenthesis, in Figure 181, every 1H scans the signal waveform that puts on signal line 17b.Like this, scan (applying) basic waveform, might make the brightness unanimity on the whole screen by skew signal line 17b 1H (according to predetermined time clock or all according to predetermined unit).In Figure 181, much less, the brightness of screen also can be controlled (adjusting) by the duration that adjusting applies forward voltage (Vgl).
In the above example, identical conduction and cut-off voltage mode puts on signal line 17b in each frame (unit period).Yet, according to the present invention, in predetermined periods, the duration that different pixel column (pixel) luminous (demonstration) or not luminous (not showing) approximately equate.Thereby in the excitation system that a frame is made of two fields, the signal waveform that puts on first and second can change between different signal line 17b.For example, in first, forward voltage can put on the period that any pixel column reaches 10H, and in second, applies the period (in the period, applying the period that forward voltage reaches 10H+20H in the unit of two fields) of 20H.Also forward voltage is put on the period that other pixel column reaches 30H.
At example shown in Figure 182.In Figure 182 (a) (first), for each pixel column, forward voltage puts on signal line 17b and reaches a horizontal scanning period (1H) in per four horizontal scanning periods (4H).In Figure 182 (b) (second), for each pixel column, forward voltage puts on signal line 17 and reaches 2H in every 4H.Thereby in two fields, forward voltage forward voltage in every (4+4) H applies (1+2) H.Yet in the unit period (two fields among Figure 132), forward voltage puts on every signal line 17b and reaches the identical period.Thereby each pixel column shows identical brightness (the supposition white raster shows).
By way of parenthesis, although stated that with reference to Figure 180 forward voltage applies 1H in every 4H, this is not restrictive.For example, in every 8H, forward voltage can apply 1H, as illustrative in Figure 183.And, in each, but signal waveform completely random ground rather than periodically put on signal line 17b.Equate between all signal line 17b if apply the total duration of forward voltage in the period in unit, then just enough.
Between all signal line 17b, equate that this shall not be applied to following situation although stated the total duration that applies forward voltage in the period in unit in the above example.
A kind of situation like this is when screen 50 (that is display panel) comprises the different screen 50 of a plurality of brightness.That is to say, for example, when screen 50 is made up of the first screen 50a of different brightness and the second screen 50b.Two screens 50 can change brightness by regulating program current Iw, but by scanning grid signal wire 17b and change the first screen 50a and the second screen 50b between luminous (demonstration) period of pixel column can more easily change brightness.For example, about each pixel column among the first screen 50a, forward voltage puts on signal line 17b and reaches 1H in every 4H.For each pixel column among the second screen 50b, forward voltage puts on signal line 17b and reaches 1H in every 8H.Like this, by change the duration that applies forward voltage between different screen, the gamma curve that might regulate screen intensity and screen is similar each other.
Power circuit (IC) 82 (see figure 8)s produce and output to the forward voltage (pixel 16 transistorized selection voltages) of signal line 17 and the voltage of the required current potential of cut-off voltage (pixel 16 transistorized non-selection voltages) from grid pumping circuit 12.Therefore, the semiconductor processes that is used for power supply IC 82 has enough proof voltages.
Thereby, logical signal can by power supply IC 82 easily level move (LS).Reason for this reason, grid pumping circuit 12 control signals of slave controller (not shown) output are fed to power supply IC 82, and are moved by level before being fed to according to grid pumping circuit 12 of the present invention there.Source electrode exciting circuit 14 control signals of slave controller (not shown) output are fed to according to source electrode exciting circuit 14 grades of the present invention (not needing level to move).
Yet the present invention is not restricted to all crystals pipe that forms on array base plate 71 be the p channel transistor.By only the p channel transistor being used for grid pumping circuit 12,, might make grid pumping circuit 12 littler than the grid pumping circuit 12 of CMOS structure as describing with reference to Figure 111 and 113 after a while.Therefore, might reduce the instrument bezel width.Under the situation of 2.2 inches QCIP panels, if take 6-μ m rule, then the width of grid pumping circuit 12 can reduce to 600 μ m.Even comprise the power lead of grid pumping circuit 12, width is also with regard to 700 μ m.If as similar circuit arrangement, then width will be increased to 1.2mm to use CMOS (n raceway groove and p channel transistor).Thereby, by only using the p channel transistor, might realize the characteristic effect that the instrument bezel width reduces as grid pumping circuit 12.
And if pixel 16 is made of the p channel transistor, then they will mate well with the grid pumping circuit of being made up of the p channel transistor 12.When voltage step-down (Vgl), p channel transistor ( transistor 11b and 11c and transistor 11d in the pixel arrangement of Fig. 1) conducting.On the other hand, lower voltage is also as the selection voltage of grid pumping circuit 12.If use lower level as selecting level, the grid excitation device that then has the p channel transistor is realized good coupling, as what can the configuration from Figure 113 see.This is because lower level can not be kept long-time.On the other hand, can keep higher voltage (Vgh) for a long time.
And, by using the p channel transistor as the driver transistor (the transistor 11a among Fig. 1) of electric current being provided for EL element 15, might use the ground-electrode made by thin metal film negative electrode as EL element 15.And electric current can flow to EL element 15 with positive dirction from anode potential Vdd.Because above-mentioned situation, preferably the transistor in pixel 16 and the grid pumping circuit 12 is the p channel transistor.Thereby using the p channel transistor is not a design problem as transistor in the pixel 16 (driver transistor 11a and switching transistor 11d, 11b and 11c) and conduct according to the transistor in the grid pumping circuit 12 of the present invention.
Can directly on array base plate 71, form level shifter (LS) circuit.That is to say, use n raceway groove and p channel transistor as level shifter (LS) circuit.Come the logical signal of self-controller (not shown) to boost, so it will mate with the logic level of the grid pumping circuit 12 that is made of the p channel transistor by the level shift circuit that directly on base plate 71, forms.Logic voltage through boosting puts on grid pumping circuit 12.
By way of parenthesis, level shift circuit can be constituted and used COG technology or similar techniques to be installed on the base plate 71 by semi-conductor chip.And source electrode exciting circuit 14 is made of semi-conductor chip in fact and uses the COG technology to be installed on the base plate 71.Yet source electrode exciting circuit 14 is not limited to be made of semi-conductor chip, and can use the polysilicon technology directly to form on base plate 71.If use the transistor 11a of p channel transistor as pixel 16, then program current flows with the direction from pixel 16 to source signal line 18.Thereby, should use the n channel transistor as the constant-current circuit in the source electrode exciting circuit.That is to say that source electrode exciting circuit 14 should dispose in the mode of drawing program current Iw.
Thereby, if the driver transistor 11a of pixel 16 (under the situation of Fig. 1) is the p channel transistor, then the constant-current circuit in source electrode exciting circuit 14 (circuit of output gray level electric current) must be the n channel transistor, will draw program current Iw to guarantee source electrode exciting circuit 14.In order on array base plate 71, to form source electrode exciting circuit 14, must be used for the mask (technology) of n channel transistor and be used for the p channel transistor mask (technology) both.In concept, in display panel of the present invention (display), use the p channel transistor, use the transistor that draw current source of n channel transistor simultaneously as the source electrode driver as pixel 16 and grid pumping circuit 12.
Fig. 8 is signal or the block scheme of voltage and the block scheme of display that provides on according to display of the present invention.Signal (power lead, data line, etc.) offer source electrode exciting circuit 14a by flexible base plate 84 from control IC 81.
In Fig. 8, the control signal that is used for grid pumping circuit 12 is produced by control IC, is moved by source electrode exciting circuit 14 level, and puts on grid pumping circuit 12.Because the driving voltage of source electrode exciting circuit 14 is 4 to 8 (V), be that the control signal of 3.3 (V) can convert the signal that amplitude is 5 (V) to from the amplitude of control IC 81 outputs, it can be received by grid pumping circuit 12.Certainly, signal voltage can move and offer grid pumping circuit 12 by the controller level.
Best, source electrode exciting circuit 14 comprises video memory.Pictorial data can be in being stored in video memory before experience error diffusion process and dither process.
In Fig. 8 etc., being described as the source electrode driver by reference number 14 expression, but replace as a pure driver, it can comprise power circuit, buffer circuit (comprising such as the such circuit of shift register), data converting circuit, latch cicuit, command decoder, shift circuit, address conversion circuit, video memory etc.Much less, also can be applicable to configuration with reference to the empty configurations of three sides of descriptions such as figure 9 (three-side free configuration) or other configuration, excitation system etc. with reference to descriptions such as figure 8.
When using display panel as information display (such as cell phone), a side that is preferably in display panel is installed (formation) source electrode excitation IC (circuit) 14 and grid excitation IC (circuit) 12, (by way of parenthesis, a kind of configuration that will encourage IC (circuit) to be installed in a side of display panel is called the empty configurations of three sides (structure) as shown in FIG. 9.By convention, grid excitation IC 12 is installed in the X side of viewing area, and source electrode excitation IC 14 is installed in the Y side.)。This makes that easy center line with display screen 50 is placed on central authorities and excitation IC is installed in design.Use the empty configuration of three sides, can produce grid pumping circuit (that is, can directly on base plate 71, form in source electrode exciting circuit 14 and the grid pumping circuit 12 at least one) by high temperature polysilicon technology, low temperature polycrystalline silicon technology etc. by the polysilicon technology.
By way of parenthesis, the empty configuration of three sides comprises that not only IC directly places or be formed on the configuration on the base plate 71, but also comprises that the film (TCP, TAB or other technology) that source electrode excitation IC (circuit) 14 and grid excitation IC (circuit) 12 have been installed is attached to the configuration of a side of base plate 71 (or almost a side).That is to say that the empty configuration of three sides comprises and stays configuration and the arrangement that both sides do not have IC and all similar configurations.
If grid pumping circuit 12 is placed on the next door of source electrode exciting circuit 14, as shown in FIG. 9, then signal line 17 must form along the c side.
By way of parenthesis, the heavy line in Fig. 9 etc. is represented the signal line 17 that forms abreast.Thereby, in part b (bottom of screen), form and the as many signal line 17 of scan signal line abreast, and in part a (top of screen), form single signal line 17.
Spacing between the signal line 17 that forms on the C side is to 12 μ m (comprising both) from 5 μ m.If less than 5 μ m, then stray capacitance will cause noise on the signal line that adjoins.Be illustrated in spacing experimentally and be 7 μ m or more a hour stray capacitance have significant effect.And when spacing during less than 5 μ m, beat noise (beating noise) and other pattern noise appear on the display screen consumingly.Specifically, noise produces differently between the right side of screen and left side, and is difficult to reduce beat noise and other pattern noise.When spacing surpassed 12 μ m, the instrument bezel width of display panel became too big and impracticable.
Reduce pattern noise, can under the signal line 17 or on grounding pattern (be fixed in a constant voltage or be arranged on the conductive pattern of a stable current potential usually) is set.Can be for alternatively, one independently barricade (curtain: be fixed in a constant voltage or be arranged on the conductive pattern of stable current potential usually) can be placed on the signal line 17.
Can use the ITO material to be formed on signal line 17 on the c side of Fig. 9.Yet in order to reduce resistance, preferably ITO and the thin metal film by lamination forms.And preferably form by the metal film of multilayer.When using the ITO lamination, on ITO, form titanium film, and form thin aluminum film or aluminium-molybdenum alloy film thereon.Can on ITO, form chromium for alternatively.For metal film, use thin aluminum film or chromium film.This also is applied to other example of the present invention.
By way of parenthesis, although stated with reference to figure 9 grades signal line 17 is placed on the side of viewing area, this is not restrictive, and they can be placed on both sides.For example, signal line 17a can be placed on the right side of viewing area 50, simultaneously signal line 17b can place (formation) in the viewing area 50 left side.This also is applied to other example.
And source electrode excitation IC 14 and grid excitation IC 12 can be integrated in the single chip.Then, it is just enough on display panel an IC chip only to be installed.This also reduces the realization cost.And this makes and might be created in the various voltages that use among the single-chip excitation IC simultaneously.
In the configuration shown in Fig. 1 waits, EL element 15 is connected to the Vdd current potential by transistor 11a.Yet, there is a problem, the organic EL that constitutes different color changes aspect driving voltage.For example, when carrying the electric current of 0.01A for every square centimeter, the terminal voltage that is used for the EL element of blueness (B) is 5V, and the terminal voltage that is used for the EL element of green (G) and redness (R) is 9V.That is to say that the terminal voltage that is used for B is different from the terminal voltage that is used for G and R.Thereby the source electrode-drain voltage (SD voltage) that is used for the transistor 11a of B is different from source electrode-drain voltage of G and R.Therefore, drain electrode-source electrode ends-leakage current difference between different color.If by-leakage current occur and by-leakage characteristics with color change, then glimmer, and the color balance multilated, and gamma characteristic departs from the color of emission, causes the display condition of complexity.
Handle this problem, be preferably used in the current potential that the current potential of the cathode electrode of one of rgb color at least is different from the cathode electrode that is used for other color.Can supply alternatively, the Vdd current potential (anode potential) that is preferably used in one of rgb color is different from the Vdd current potential that is used for other color.
Much less, as possible, the terminal voltage that is used for the EL element 15 of R, G and B equates.Should select material and structure in such a way, promptly at least white peak brightness and at 7000K in the color temperature scope of 12000K (comprising both), the terminal voltage that is used for the EL element of R, G and B is 10V or is lower than 10V.And among R, G and B, the maximum terminal voltage and the difference between the minimum terminal voltage of EL element should be 2.5V or littler.For example, if being used for the terminal voltage of the EL element of R when maximum current flows through EL element 15 is 7V, when then being preferably in maximum current and flowing through EL element, the terminal voltage that is used for the EL element 15 of R, G and B should comprise both between 7-2.5V (minimum value) and 7+2.5V (maximal value).Preferably, this difference should be 1.5v or littler.
Be made up of three primary colors R, G and B although stated pixel, this is not restrictive.They can be cyan, yellow and three kinds of colors of purple.They can be B and yellow two kinds of colors or similar color.Certainly, they can be monochromatic.Can supply alternatively, they can be R, G, B, cyan, yellow and six kinds of colors of purple, or R, G, B, cyan and five kinds of colors of purple.These are natural colours, their provide support color rendering scopes of the good expansion that shows.In addition, pixel can be R, G, B and four kinds of colors of white.Can supply alternatively, they can be R, G, B, cyan, yellow, purple, seven kinds of colors of black and white.Also might on whole viewing area 50, form (structure) turn white coloured light pixel and use RGB color filter etc. to produce three primary colors.And single pixel can be a dichromatism, such as B and yellow.Thereby, be not limited to use three primary colors R, G and B that colored those colors that show are provided according to EL display of the present invention.
Mainly containing three kinds of methods can be used for making organic EL display panel to become colour.One of them is a color conversion method.As long as it is just enough as luminescent layer to form single cyan coloring layer.Full color shows that needed remaining green and red color can produce by color conversion from blue color.Thereby the advantage that this method had is to eliminate respectively the demand that R, G and B colour coloring and preparation is used for the organic EL Material of R, G and B color.Color conversion method does not reduce output, not as the multicolour colorize method.Any of these three kinds of methods can be applied to EL display panel of the present invention.
And, except that three primary colors, can form the pixel of the coloured light that turns white.Can send out R, G and the luminous structure of B is set up the pixel of (form and the structure) coloured light that turns white by lamination.One group of pixel is made up of the pixel 16 of the pixel that is used for three primary colors RGB and the coloured light that turns white.The turn white pixel of coloured light of formation makes the peak brightness of easier expression white, and thereby might realize that bright image shows.
Even when one group of use is used for the pixel of three primary colors RGB, preferably change the pixel electrode area that is used for different color.Certainly, if well balance the luminescence efficiency and the colour purity of different color, then can use equal area.Yet, relatively poor if one or more color balances get, preferably regulate pixel electrode (light-emitting area).Can determine the electrode area of every kind of color based on current density.That is to say that when when 7000K (absolute temperature scale (ATS)) regulates white balance in the color temperature scope of 12000K (comprising both), the difference between the current density of different color should be within ± 30%.Preferably, this difference should be within ± 15%.For example, if current density approximately is 100A/ square metre, all three primary colors should have 70A/ square metre to 130A/ square metre current density (comprising both).Preferably, all three primary colors should have 85A/ square metre to 115A/ square metre current density (comprising both).
For handling this problem, the present invention forms shielding film 11 times down and at pixel transistor at grid pumping circuit 12 (being source electrode exciting circuit 14 in some cases).Shielding film is formed by the film of metal (such as chromium) and thickness (comprises both) from 50nm to 150nm.Film will provide bad shield effectiveness and thick film will cause scrambling, make the wiring pattern that is difficult to make transistor 11A1 in the upper strata.
Smooth film by inorganic material is made, is formed on the light shading film at 20 to 200nm thick (comprising both).One of electrode of storage capacitor 19 can be formed by this layer of light shading film.Under the sort of situation, the thickness of smooth film is minimized to increase the capacitance of storage capacitor.Also might form the light shading film of aluminium, on light shading film, use the anodization technology to form silicon oxide film, and use the dielectric film of silicon dioxide film as storage capacitor 19.On smooth film, form the pixel electrode of high aperture (HA) structure.
Under the situation of exciting circuit 12 grades, must be not only from upside but also will reduce the infiltration of light from downside.This is because photoconductive phenomenon will cause fault.If cathode electrode is made by metal film, then the present invention also forms cathode electrode and uses it as shielding film on the surface of driver 12 grades.
On the light-emitting area of base plate 71, form antireflection film.Antireflection film is formed by the thin multilayer film of titanium dioxide or magnesium fluoride.
If form cathode electrode on driver 12, then the electric field from cathode electrode can cause that driver fault or cathode electrode and exciting circuit are set to electrically contact.For handling this problem, the present invention forms the organic EL film of one deck at least on exciting circuit 12, and is preferably formed as two-layer or multilayer, forms organic EL film simultaneously on pixel electrode.Because organic EL film is an insulating material, therefore when forming it on driver, it is isolated each other with negative electrode and driver.Problem above this has solved.
If be short-circuited between transistor between the terminal of one or more transistors 11 or in pixel 11 and signal wire, then EL element 15 becomes a bright spot, and it keeps luminous always.Bright spot visually is significantly, and it must be changed into stain (shutoff).Detection is corresponding to the pixel 16 of bright spot, and with laser radiation electric capacity 19 so that this capacitance short-circuit.As a result, electric capacity 19 can no longer keep electric charge, and thereby can make transistor 11a stop to pass through electric current.Thereby, remain in the black display mode not luminous with the pixel of laser radiation.
What wanted by way of parenthesis, is from removing cathodic coating with those parts of laser radiation.With the laser radiation pixel time, this will prevent the terminal electrode and the cathodic coating short circuit of capacitor 19.Thereby, in the place that will carry out laser repairing, make wires design in advance and make cathode electrode have the hole.
Shortcoming in the transistor 11 of pixel 16 will influence excitation IC 14.For example, if among the driver transistor 11a that source electrode-drain electrode (SD) short circuit 562 occurs among Figure 56, then the Vdd voltage of panel puts on source electrode excitation IC.Thereby preferably the supply voltage maintenance of source electrode excitation IC 14 equates with the supply voltage Vdd (anode voltage) of panel or is higher.Best, can regulate with electronic regulator 561 by the reference voltage that source electrode excitation IC 14 uses.
As shown in Figure 56, if SD short circuit 562 occurs among the transistor 11a, then excessive electric current flows through EL element 15.In other words, EL element 15 keeps luminous consistently (becoming bright spot).Bright spot is an obvious defects.For example, if source electrode-drain electrode (SD) short circuit occurs among the transistor 11a of Figure 56, then current constant flow to EL element 15 (when the transistor 11d conducting) from Vdd voltage, irrelevant with the amplitude of grid (G) terminal voltage of transistor 11a.Thereby bright spot produces.
On the other hand, if if the SD short circuit occurs among the transistor 11a and transistor 11c conducting, then Vdd voltage puts on source signal line 18 and source electrode exciting circuit 14.If the supply voltage of source electrode exciting circuit 14 is not higher than Vdd, then can make source electrode exciting circuit 14 insulation breakdowns above withstand voltage.
The SD short circuit of transistor 11a can exceed point defect and cause the insulation breakdown of the source electrode exciting circuit of panel.And bright spot is that significantly it makes the panel defectiveness.Thereby, must bright spot be changed into stain by the lead that cut-out is connected between transistor 11 and the EL element 15.For this reason, by source terminal (S) or the drain terminal (D) that optical means (such as laser) is cut off transistor 11a, perhaps destroy the raceway groove of transistor 11a.
By way of parenthesis, although stated the cut-out lead in the above example, this is not restricted under black situation about showing.For example, as also seeing in Fig. 1, the power supply Vdd of transistor 11a can put on grid (G) terminal of transistor 11a all the time.For example, if two electric pole short circuits of capacitor 19, then Vdd voltage puts on grid (G) terminal of transistor 11a.Therefore, transistor 11a is cut off fully, makes EL element 15 stop to pass through electric current.This can easily finish, because can be by making the electrode for capacitors short circuit with laser radiation capacitor 19.
And, since the Vdd lead in fact cloth is under pixel electrode, so the display condition of pixel can be by controlling (correction) with laser radiation Vdd lead and pixel electrode.
For the black demonstration of pixel 16, can make EL element 15 degradations.For example, physically or chemically by making EL layer 15 degradation with laser radiation, so it will not luminous (black always demonstration).EL layer 15 can easily heat and demotes by laser radiation.Chemically can use excimer laser easily to change EL layer 15.
By way of parenthesis, although quote pixel arrangement among Fig. 1 in the above example as proof, the invention is not restricted to this.Much less, use laser to make the method for lead or electrode open circuit or short circuit also can be applicable to the pixel arrangement of other current excitation,, perhaps be applied to the pixel arrangement of voltage drive as current mirror, as in Figure 62 and 51 illustrative those.Thereby the present invention is not subjected to the restriction of pixel arrangement or structure.
Below with describe with in the relevant motivational techniques of the dot structure shown in Fig. 1.As shown in FIG. 1, the signal line 17a conduction when keeping selected (because the transistor 11 among Fig. 1 is p channel transistors, so in its signal line 17a conduction when being low state) of being expert at, and the signal line 17b conduction when keeping not selected of being expert at.
In source signal line 18, there is the stray capacitance (not shown).Cause stray capacitance by channel capacitance of electric capacity, transistor 11b and the 11c of the meet of source signal line 18 and signal line 17 etc.
The needed time t of current value that changes source signal line 18 is provided by t=CV/I, and wherein C is a stray capacitance, and V is the voltage of source signal line, and I is the electric current that flows through the source signal line.Thereby if current value can increase by ten times, then changing the needed time of current value can reduce nearly ten times.Even this stray capacitance that also means source signal line 18 increases by ten times, also current value change can be become predetermined value.Thereby, in short horizontal scanning period, apply the predetermined current value, it is useful increasing current value.
For example, encourage the output current of IC 14 to increase by ten times from source electrode, the electric current that causes being programmed into pixel 16 increases by ten times.This causes the emission brightness of EL element 15 to increase by ten times equally.Thereby, in order to obtain predetermined luminance,, the luminous period is reduced ten times by reducing ten times of the conduction periods (ON (leading to) time) (comparing) of transistor 11d among Fig. 1 with the conduction period of routine.
Thereby, to the stray capacitance of source signal line 18 in order to charge fully and to discharge and the predetermined current value is programmed among the transistor 11a of pixel 16, must be from the big relatively electric current of source electrode exciting circuit 14 outputs.Yet when so big electric current flow through source signal line 18, its big current value was programmed in the pixel, and all manages L element 15 than predetermined current flows source.For example, if current programmed to 10 times big, certain 10 times of big electric currents flow through EL element 15, and EL element 15 is sent 10 times of bright light.Be the emission brightness that obtains to be scheduled to, the time that electric current flows through EL element can reduce ten times.Like this, can be fully from 18 pairs of stray capacitance charge/discharges of source signal line, and the emission brightness that can obtain to be scheduled to.
By way of parenthesis, although having stated 10 times of big current values are write among the pixel transistor 11a (more accurately, is provided with the terminal voltage of capacitor 19), and the conduction period of EL element 15 is reduced to 1/10, this is exemplary.As another example, ten times of big electric currents can be write among the pixel transistor 11a, and can be with ON (leading to) time decreased to 1/5 of EL element 15.On the contrary, 10 times of big current values can be write among the pixel transistor 11a, and the conduction period of EL element 15 can be reduced to 1/2.
To be used for bright image show also might be set to ON (lead to) time 1/1 (keeping transistor 11d conducting) and for picture black demonstration ON (leading to) time be set to 1/10 (make transistor 11d conducting reach the frame period 1/10).And, can show based on visual video data real time altering.
The invention is characterized in that the electric current of writing pixel is set to a value that is different from predetermined value, and electric current flows through EL element 15 off and on.For convenience of explanation, stated that the electric current that N is doubly big is write in the pixel transistor 11 and conduction period of EL element 15 has been reduced to 1/N at this.Yet this is not restrictive.Much less, can the electric current that N1 is doubly big write in the pixel transistor 11 and can be reduced to 1/N2 (N1 and N2 differ from one another) the conduction period of EL element 15.
By way of parenthesis, term " (intermittently) off and on " is not meant according to panel motivational techniques of the present invention and uses intermittently demonstration all the time.Depend on that visual display condition can use 1/1 to show (be different from intermittently and show).That is to say, use, comprise when image shows intermittently showing according to motivational techniques of the present invention.Intermittently show it is a kind of display mode, wherein two horizontal scanning periods (2H) take place at least in the period at a frame.
By way of parenthesis, about intermittently showing, intermittently the period needn't spacing equate.For example, they can occur (supposing display time interval or non-display time interval formation predetermined value (constant ratio) generally) at random.And display time interval can change between R, G and B.For example, the R pixel can encourage 1/3 of a frame period in non-display mode, and G and B pixel can encourage 1/4 of a frame period in non-display mode.That is to say that in the period at intermittence, the display time interval of R, G and B or non-display time interval can be adjusted to predetermined value (constant ratio) in the mode that obtains best white balance.
For convenience of description, suppose that " 1/N " refers to 1F (or a frame) is reduced to 1/N.Yet, select a pixel column and will take time (usually, a horizontal scanning period (1H)), and can produce mistake according to the condition of scanning to current value programming.Thereby content described above completely for convenience of explanation rather than restrictive.And N is not limited to integer, can be that non-integer is as 3.5.For convenience of explanation, except as otherwise noted, N is an integer in this supposition.
Can be by 16 programmings make that EL element 15 is luminous to reach 1/5 of a period to pixel with the doubly big electric current of N=10.EL element 15 luminous 10/5=2 brightness doubly.On the contrary, also might be in pixel 16 and make that EL element 15 is luminous to reach 1/4 of a period with doubly big current programmed of N=2.EL element 15 luminous 2/4=0.5 brightness doubly.In brief, the present invention carries out the current programmed demonstration that is different from constant demonstration (1/1, promptly non-intermittent drive) that realizes showing by the electric current that use is different from N=1 times of electric current.And, in a broad sense, excitation system a frame make at least in (or the one) period offer EL element 15 current cut-off once.And excitation system shows by using the electric current bigger than predetermined value that pixel 16 is programmed to finish intermittently at least.
Show that with organic (inorganic) EL a relevant problem is that its uses in fact and CRT or the different display packing of other display, the latter uses electron gun that image is presented as one group of line that shows.That is to say that EL shows that the electric current (voltage) that will write pixel keeps 1F (one or a frame) period.Thereby a problem is the edge that the show events picture will cause bluring.
According to the present invention, electric current only flows through the period that EL element 15 reaches 1F/N, but (does not flow through electric current in the period of 1F (N-1)/N) remaining.Let us considers to realize the situation of a point in excitation system and the view screen.
In this display condition, every 1F multiimage data presentation and black demonstration (not luminous).That is to say, on temporal meaning, subsequently displaying transmitted image data (intermittently show) off and on.When show events image data off and on, realize not having ill-defined good display condition.In brief, can realize that the film that approaches CRT shows.Although the present invention realizes intermittently showing that the major clock of circuit is with conventional as broad as long.Thereby, do not increase the power consumption of circuit.
Under the situation of display panels, the pictorial data that be subjected to optical modulation (voltage) is remained in the liquid crystal layer.Therefore, show, must rewrite the data that put on liquid crystal layer for black the insertion.For this reason, the work clock of source electrode excitation IC 14 must be accelerated, and pictorial data and black demonstration must alternately put on source signal line 18.Thereby, for finishing black insertion (intermittently show, show), the major clock of necessary accelerating circuit as black.And, need video memory so that elongate time shaft.
In the pixel arrangement according to EL display panel of the present invention that Fig. 1,2,38 etc. illustrates, pictorial data remains in the capacitor 19.Electric current corresponding to the terminal voltage of capacitor 19 flows through EL element 15.Thereby pictorial data does not remain in the optical modulation layer, does not resemble under the situation of display panels.
The present invention is by making conductings such as switching transistor 11d, transistor 11e simply and ending and control the electric current that flows through EL element 15.That is to say that turn-off even flow through the electric current I w of EL element 15, pictorial data still keeps, because it is in capacitor 19.Thereby when on-off element 11d conducting next time, the electric current that flows through EL element 15 has the value identical with the electric current that flow through EL element 15 last time.Even for finishing black insertion the (intermittently show such as black and show), the major clock that the present invention also needn't accelerating circuit.And, needn't elongate time shaft, and thereby not need video memory.In addition, EL element 15 responds fast, luminously needs very short time from applying electrical current to.Thereby the present invention is suitable for film and shows, and shows by using intermittently, can solve with conventional data to keep the relevant problem in the show events picture of display panel (display panels, EL display panel etc.).
And under the situation of the big display with big source capacitance, source current can increase above ten times.Usually, if the source current value increases N doubly, then the conduction period of signal line 17b (transistor 11d) can be set to 1F/N.This makes and might apply the present invention to televisor, and is applied to the display that is used to monitor.
Describe in more detail according to motivational techniques of the present invention below with reference to the accompanying drawings.The stray capacitance of source signal line 18 be by and adjoin generations such as cross capacitance between buffering output capacitance, source signal line 18 and the signal line 17 of coupling capacitance, source electrode excitation IC (circuit) 14 of source signal line 18.This stray capacitance is generally 10pF or bigger.Under the situation of voltage drive, because voltage puts on source signal line 18 with Low ESR from source electrode excitation IC14, so big stray capacitance is not more or less disturbed excitation.
Yet under the situation of current excitation, especially the image at the black level place shows that pixel capacitor 19 need be programmed with 20nA or littler Weak current.Thereby if produce the stray capacitance bigger than predetermined value, then stray capacitance can not be in the time to a pixel column programming (usually in 1H, but be not limited to 1H, because can simultaneously to two pixel columns programmings) charging and discharge.If stray capacitance can not be charged in the period of 1H and discharge, then enough electric currents can not be write in the pixel, cause not enough resolution.
In the pixel arrangement of Fig. 1, program current Iw flows through source signal line 18 during current programmed, as shown in Fig. 3 (a).Electric current I w flows through transistor 11a, and in the mode of holding current Iw voltage in (programming) capacitor 19 is set.At this moment, transistor 11d open circuit (ending).
In electric current flows through the period of EL element 15, transistor 11c and 11b by and transistor 11d conducting, as shown in Fig. 3 (b).In particular, cut-off voltage (Vgh) is put on signal line 17a, transistor 11b and 11c are ended.On the other hand, forward voltage (Vgl) puts on signal line 17b, makes transistor 11d conducting.
Suppose electric current I 1 be electric current (predetermined value) that should proper flow N doubly, the electric current that then flows through EL element 15 among Fig. 3 (b) also is Iw.Thereby EL element 15 is sent the light of 10 times of predetermined value brightness.In other words, as shown in Figure 12, enlargement factor N is big more, and then the display brightness B of display panel is high more.Thereby enlargement factor N and brightness are in direct ratio.On the contrary, if electric current reduces to 1/N, then brightness and enlargement factor are inversely proportional to.
1/N period that if transistor 11d keeps conducting to reach its keeps the period (approximately 1F) of conducting usually, and in remaining (N-1)/N period remain off, then the mean flow rate on 1F equals predetermined brightness.This display condition closely is similar to CRT with the display condition under the electron gun scanning screen.Its difference is that the zone of displayed image is the 1/N (wherein rounding a screen is 1) (in CRT, luminous an is pixel column-more accurately, a pixel) of luminous whole screen.
According to the present invention, the 1F/N in image displaying area territory 53 moves from the head-to-foot of screen 50, as shown in Figure 13 (b).According to the present invention, electric current only flows through the period that EL element 15 reaches 1F/N, but (1F does not flow through electric current in (N-1)/N) period remaining.Thereby, display pixel off and on.Yet because afterimage, for human eye, whole screen seems and as one man shows.
By way of parenthesis, as shown in Figure 13, writing pixel column 51a is non-luminous 52a.Yet this is correct in Fig. 1,2 etc. pixel arrangement.In the pixel arrangement of the current mirror shown in Figure 38 waits, writing pixel column 51a can be luminous.Yet, for convenience of explanation, will provide the description of mainly quoting the pixel arrangement among Fig. 1 as proof at this.Come off and on greater than electric current to pixel programming comprising that the motivational techniques of actuate pixel call N-times of pulse excitation at the predetermined exciting current shown in Figure 13,16 etc. by using.
In this display condition, every 1F multiimage data presentation and black demonstration (not luminous).That is to say (off and on) separated by a certain interval on temporal meaning subsequently displaying transmitted image data.In pixel, keep the display panels (EL display panel, be different from invention) of data 1F period, can not during film shows, catch up with the variation in the pictorial data, cause the moving-picture (edge fog of image) that blurs.Because the present invention is displayed image off and on, so it can realize not having the ill-defined good display condition of image.In brief, can realize that the film that approaches CRT shows.
Sequential chart of illustration among Figure 14.The pixel arrangement of reference in the present invention etc. is configuration shown in Figure 1, except as otherwise noted.Yet, much less,, therefore the invention is not restricted to Fig. 1 because Figure 38,63,64,65 etc. pixel arrangement also can finish intermittently and show.
As can from Figure 14, seeing, in the pixel column of each selection, (select the period to be appointed as 1H), (see Figure 14 (a)) when forward voltage (Vgl) puts on signal line 17a, cut-off voltage (Vgh) puts on signal line 17b (seeing Figure 14 (b)).In the section, electric current does not flow through EL element 15 (non-light-emitting mode) at this moment.In non-selected pixel column, forward voltage (Vgl) puts on signal line 17b, and cut-off voltage (Vgh) puts on signal line 17a.In the section, electric current flows through EL element 15 (light-emitting mode) at this moment.In light-emitting mode, EL element 15 is 1F/N with the luminous and luminous period of brightness (NB) of N times of predetermined luminance.Thereby the average display brightness of display panel on 1F provided by (NB) * (1/N)=B (predetermined luminance).
By way of parenthesis, although top description seems to relate to white demonstration, the brightness in black the demonstration also is reduced to 1/10.Thereby, even excessive brightness displays in image shows, but also be reduced to 1/10, cause suitable image to show.
Figure 15 illustrates an example, and wherein the operational applications of Figure 14 is in each pixel column (the signal line 17a of its illustration pixel and the signal waveform of 17b).The cut-off voltage of signal line is by Vgh (high level) expression, and the waveform of forward voltage is represented by Vgl (low level).The pixel column numbering that index (as (1) and (2)) expression is selected.
In Figure 15, select signal line 17a (1) (Vgl voltage), and program current flows through source signal line 18 with the transistor 11a from the pixel column of selecting to the direction of source electrode exciting circuit 14.By way of parenthesis, the flow direction of program current changes with pixel arrangement.If the driver transistor 11a of pixel 16 is p channel transistors, then program current Iw flows to source electrode exciting circuit 14 from pixel 16.If the transistor 11a of pixel 16 is n channel transistors, then program current Iw flows to pixel 14 from source electrode exciting circuit 16.
Program current is that the N of predetermined value doubly (supposes N=10 greatly for convenience of explanation.Certainly, because predetermined value is the data current that is used for displayed image, therefore under the situation that white raster shows, it is not a fixed value).Be programmed into of the display condition variation of the current amplitude of each pixel 16 with natural image.Therefore, to capacitor 19 programmings, make 10 times of big electric currents will flow through transistor 11a.When selecting pixel column (1), in pixel arrangement shown in Figure 1, cut-off voltage (Vgh) puts on signal line 17b (1), and electric current does not flow through EL element 15.
After 1H, select signal line 17a (2) (Vgl voltage), and program current flows through source signal line 18 with the transistor 11a from the pixel column of selecting to the direction of source electrode exciting circuit 14.Program current is the N doubly big (for convenience of explanation, supposing N=10) of predetermined value.Therefore, to capacitor 19 programmings, make 10 times of big electric currents will flow through transistor 11a.
When selecting pixel column (2), in pixel arrangement shown in Figure 1, cut-off voltage (Vgh) puts on signal line 17b (2) and electric current does not flow through EL element 15.Yet because cut-off voltage (Vgh) puts on the signal line 17b (1) that signal line 17a (1) and forward voltage (Vgl) put on pixel column (1), so EL element 15 is luminous.
After next 1H, select signal line 17a (3), cut-off voltage (Vgh) puts on signal line 17b (3), and electric current does not flow through the EL element 15 in the pixel column (3).Yet, put on signal line 17b (1) and (2) in pixel column (1) and (2) because cut-off voltage (Vgh) puts on signal line 17a (1) and (2) and forward voltage (Vgl), so EL element 15 is luminous.
By aforesaid operations, be synchronized with the synchronizing signal displayed image of 1H.Yet with the motivational techniques among Figure 15,10 times of big electric currents flow through EL element 15.Thereby display screen 50 has 10 times of brightness.Certainly, much less,, program current can be reduced to 1/10 (by the control programming electric current rather than with intermittently the period reduce to 1/10) for the demonstration of predetermined luminance in this state.Yet 10 times of little electric currents will cause lacking of write current because of stray capacitance etc.For addressing this problem, basic thought of the present invention is to use the doubly big electric current of N to programme, and inserts blank screen 52 (intermittently showing), thus and acquisition predetermined luminance.
By way of parenthesis, make the electric current bigger flow through EL element 15, thereby and the stray capacitance of source signal line 18 charged fully and discharge than scheduled current according to motivational techniques of the present invention.That is to say, needn't make the doubly big electric current of N flow through EL element 15.For example, can imagine and form the current path be parallel to EL element 15 (form virtual EL element and use shielding film to prevent that virtual EL element 15 is luminous) and between EL element 15 and virtual EL element, divide electric current.
For example, when marking current is 0.2 μ A, when program current was set to 2.2 μ A, the electric current of 2.2 μ A flow through transistor 11a.Then, for example, the marking current of 0.2 μ A can flow through EL element 15, and 2 μ A flow through virtual EL element (seeing Figure 136).That is to say, keep the virtual pixel capable 281 among selection Figure 27 always.By way of parenthesis, even perhaps stop capable luminous or its luminous also the stashing of virtual pixel not seen etc. by shielding film.
Under the superincumbent configuration, the electric current N that flows through source signal line 18 by increase doubly might the doubly big electric current of N flows through driver transistor 11a and the electric current enough little electric current doubly bigger than N flows through EL element 15.As shown in FIG. 5, this method allows to use whole viewing area 50 as image displaying area territory 53, does not have non-display area 52.
Figure 13 (a) illustrates and writes in the displayed image 50.In Figure 13 (a), pixel column is write in reference number 51 (a) expression.Program current offers source signal line 18 from source electrode excitation IC 14.In Figure 13 etc., electric current is written in the pixel column in the period of 1H, but this is not restrictive.Period can be 0.5H or 2H.
And, although stated program current is write in the source signal line 18, the invention is not restricted to current programmed.But the present invention is working voltage programming (Figure 62 etc.) also, and voltage is write in the source signal line 18.For example, a kind of possible voltage drive method is programmed by being applied to 18 pairs of pixels of source signal line 16 than the bright required voltage of predetermined luminance, and uses intermittently demonstration to obtain predetermined luminance subsequently.
In Figure 13 (a), when selecting signal line 17a, will flow through the current programmed of source signal line 18 to transistor 11a.At this moment, cut-off voltage puts on signal line 17b, and electric current does not flow through EL element 15.This is because when transistor 11d conducting on EL element 15, can see the capacitance component of EL element 15 from source signal line 18, and this electric capacity stops enough electric currents to be programmed into capacitor 19.Thereby, adopting the configuration shown in Fig. 1 as an example, the pixel column of write current is a light-emitting zone 52 not, as shown in Figure 13 (b).
Suppose use the doubly big electric current of N programme (supposition N=10, as mentioned above), then screen become 10 times bright.Thereby 90% viewing area 50 can be made of non-luminous region 52.Thereby for example, if according to QCIF, the quantity of the horizontal scanning line in on-screen display (osd) area is 220 (S=220), and then 22 horizontal scanning lines can be formed viewing area 53, and 220-22=198 bar horizontal scanning line can be formed non-display area 52.Generally speaking, if the quantity of horizontal scanning line (quantity of pixel column) is represented that by S then the S/N in whole zone constitutes viewing area 53, it sends the light of N times of brightness.Then, with the vertical scan direction viewing area 53 of screen.Thereby the S in whole zone (N-1)/N is a non-luminous region 52.Non-luminous region provides black show (not luminous).And non-luminous region 52 is by making transistor 11d by producing.By way of parenthesis, although stated the light that makes 53 the N times of brightness in viewing area, must regulate the value that viewing area 53 is adjusted to N by brightness regulation and gamma.
In the above example, if use 10 times of big electric currents to programme, then screen becomes 10 times of bright and viewing areas 50 90% and can be made up of non-luminous region 52.Yet this must not mean that R, G and B pixel constitute non-luminous region 52 with same ratio.For example, 1/8 R pixel, 1/6 G pixel, and 1/10 B pixel can constitute non-luminous region 52, wherein different color constitutes different proportion.
Might allow in R, G and B, to regulate respectively non-luminous region 52 (or light-emitting zone 53).For this reason, must provide independently signal line 17b for R, G and B.Yet, allow to regulate independently R, G and B and make it might regulate white balance, the feasible color balance (seeing Figure 41) of regulating every kind of gray scale easily.
As shown in Figure 13 (b), comprise that the pixel column of writing pixel column 51a constitutes non-luminous region 52, (when writing scanning is in head-to-foot the carrying out of screen and constitute viewing area 53 in the zone of writing the S/N (at 1F/N on the temporal meaning) on the pixel column 51a.When the end of from during to top scanning screen, the area change position).About the display condition of screen, the band of viewing area 53 moves from the head-to-foot of screen.
In Figure 13, move from the head-to-foot of screen a viewing area 53.When hanging down frame rate, moving of viewing area 53 can visually identify.Especially the user make his/her eye near or move up and down his/her the time certainly will easier identification.
For handling this problem, viewing area 53 can be divided into a plurality of parts, as shown in Figure 16.If the total area of the viewing area that is divided is S (N-1)/N, then brightness equals the brightness (wherein, S is effective viewing area 50 of display panel) among Figure 13.By way of parenthesis, needn't five equilibrium viewing area 53.For example, the viewing area can be divided into that to have area be 1 viewing area 53a, has area and be 2 viewing area 53b, and having area and be 1 viewing area 53c and having area is 4 viewing area 53d.And the viewing area that is divided needn't accurately equal the non-display area 52 that is divided dimensionally.
Much less, also might make the average-size of viewing area 53 on a few frames (field), equal target size.For example, make the size of viewing area 53 equal S/10, the size that a kind of possible motivational techniques are included in viewing area 53 in first frame (field) is set to S/10, the size of viewing area 53 is set to S/20 in second frame (field), the size of viewing area 53 is set to S/20 in the 3rd frame (field), and the size of viewing area 53 is set to S/5 in the 4th frame (field), obtains the viewing area (display brightness) of the S/10 that wanted to go up mean time at four frames (field).And, for the period of L, the average viewing area on a few frames (field) is equated in rgb color.Yet best, as top indication, a few frames (field) is no more than four frames (field).Otherwise flicker may be depended on the image of demonstration and produce.
By way of parenthesis, can be considered picture update period of being synchronized with pixel 16 or (end of to the top) scanning 50 needed periods of screen from the top to bottom a frame of this indication or one.
And, making the average viewing area difference on a few frames (field) reach the L period between the rgb color, to obtain suitable white balance.Especially when emission efficiency changed between R, G and B, this motivational techniques were effective.And the quantity K of division can change between R, G and B.G is visually remarkable especially, thereby the quantity of the division of increase G makes it to surpass R and B is useful.
By way of parenthesis, stated division viewing area 53 for convenience of explanation in the above example.Yet the zoning is equivalent to be divided the period (time).Thereby, in Fig. 1,,, the zoning divides the period (time) so being equivalent to because ON (leading to) time of transistor 11d is divided.
Figure 17 illustrates the voltage waveform of signal line 17 and the emission brightness of EL element.As seeing from Figure 17, the period (1F/H) that signal line 17b is set to Vgl is divided into a plurality of parts (K part).That is to say that 1F (KN) period of signal line 17b being arranged to Vgl repeats K time.If the period of 1F/ (KN) repeats K time, then the luminous period 53 of Zong Jiing is 1F/N.This reduces flicker and realizes that with low frame rate image shows.
Best, the quantity of division is variable.For example, when the user presses brightness regulating switch or rotation brightness regulation knob, can respond and change the value of K.And, can allow the user to regulate brightness.Can be for alternatively, can be manually or the value of automatically regulating K according to the image that will show or data.
And the quantity of division can change according to the condition of pictorial data.If pictorial data is a moving-picture, then do not divide by keeping non-luminous region 52, might avoid the moving-picture that blurs.Under the situation of moving-picture,, do not glimmer even therefore reduce frame rate because image is changing always yet.If pictorial data is a still picture,, even when low frame rate, also might avoid flicker then by non-display area 52 is divided into a plurality of parts.Thereby, be moving-picture or still picture and control the division numbers of non-display area 52 by the real-time judge pictorial data based on the result who judges, might under low-power consumption, realize high-quality display, there not be the moving-picture that blurs.
Be consistent with the sequential of the state that puts on signal line 17b from cut-off voltage (Vgh) to the sequential of the change of the state that applies cut-off voltage (Vgh) if put on the state of signal line 17a from forward voltage (Vgl), then certainly will in the image that keeps, change to the change that applies forward voltage (Vgl) state.Believe this be since in capacitor 19 discharge and the leakage of voltage of programming cause that and this is with the 11d characteristic and by their on/off sequential different caused according to transistor 11b.
For handling this problem, preferably be clipped in the middle writing pixel column 51, as illustrative in Figure 66 by non-display area 52.Preferably use electric current (voltage) to writing the pixel column programming, after a horizontal scanning period, forward voltage is put on the signal line 17b of pixel column, thereby electric current flows through EL element 15.Best, at least 3 microseconds after forward voltage being put on the signal line 17a that selects pixel column put on cut-off voltage the signal line 17b of each pixel column.Best, if flow through at electric current on the sequential of EL element 15 without limits, then before writing pixel column 51 and pixel column afterwards be included in the non-display area 52, as illustrative in Figure 66.
Figure 67 is a key diagram, the motivational techniques above the illustration.For convenience of explanation, Figure 67 supposes the pixel arrangement among Fig. 1.
In Figure 67 (a), forward voltage (Vgl) puts on signal line 17a and reaches a horizontal scanning period (1H).Removing forward voltage and cut-off voltage is put on moment of signal line 17a, cut-off voltage continues to put on signal line 17b.After past, forward voltage (Vgl) puts on signal line 17b, as illustrative in Figure 67 (a) at time A.Best, period A is 1 microsecond or longer.Preferably, period A is 3 microseconds or longer.
Forward voltage put on signal line 17a by continuing cut-off voltage put on signal line 17b and at transistor 11b and the 11c of pixel 16 that cut-off voltage is replaced forward voltage put on signal line 17a and forward voltage is put on signal line 17b and Fig. 1 as when ending fully as shown in Figure 67 (a), the variation that is programmed into the electric current in the pixel 16 might reduce, and realizes that suitable image shows.
In Figure 67 (b), forward voltage (Vgl) is put on signal line 17a reach the period shorter than a horizontal scanning period (1H).Removing forward voltage and cut-off voltage is put on moment of signal line 17a, cut-off voltage continues to put on signal line 17b.Time C in the past after, forward voltage (Vgl) is put on signal line 17b, as shown in Figure 67 (b).Best, period C is 1 microsecond or longer.Preferably, period C is 3 microseconds or longer.
Forward voltage put on signal line 17a by continuing cut-off voltage put on signal line 17b and at transistor 11b and the 11c of pixel 16 that cut-off voltage is replaced forward voltage put on signal line 17a and forward voltage is put on signal line 17b and Fig. 1 as when ending fully as shown in Figure 67 (b), the variation that is programmed into the electric current of pixel 16 might reduce, and realizes that suitable image shows.
In Figure 67 (c), forward voltage (Vgl) is put on signal line 17a reach a horizontal scanning period (1H).Removing forward voltage and cut-off voltage is put on moment of signal line 17a, cut-off voltage continues to put on signal line 17b.
And, after forward voltage (Vgl) is put on signal line 17a, cut-off voltage is put on signal line 17b reach 1H.
Forward voltage put on signal line 17a by continuing cut-off voltage put on signal line 17b and at transistor 11b and the 11c of pixel 16 that cut-off voltage is replaced forward voltage put on signal line 17a and forward voltage is put on signal line 17b and Fig. 1 as when ending fully as shown in Figure 67 (c), the variation that is programmed into the electric current of pixel 16 might reduce, and realizes that suitable image shows.
By way of parenthesis, although the example above having described by the pixel arrangement of quoting Fig. 1 etc. as proof, much less, top example also can be applicable in the pixel arrangement shown in Figure 63,64,65 etc.
And, although waited and stated that signal line 17b is set to the period of Vgl (under the situation of Fig. 1 with reference to Figure 17, transistor 11d is conducting during the 1F/N period) be divided into 1F/ (KN) period that a plurality of parts (division numbers is K) and signal line 17b be set to Vgl and repeat K time, but this is not restrictive.The period of 1F/ (K*N) can repeat L (L ≠ K) inferior.In other words, the present invention shows display screen 50 by the period (time) that Control current flows through EL element 15.Thereby (L ≠ K) inferior thought is included in the technological thought of the present invention to repeat 1F/ (K*N) period L.And, not the part that strictly dividing time-steps must be become equate.And, the control method of L, the period of L, and the circulation of L can change between R, G and B.
By changing the value of L, can change the brightness of display screen 50 with digital form.For example, between L=2 and L=3, there is 50% brightness (contrast) to change.By sequentially changing the period of L, might regulate the brightness of screen 50 linearly pro rata with the period of L.Even regulated brightness, also can keep the quantity of gray scale.By way of parenthesis, the period of L is not limited to the integral multiple of a horizontal scanning period (1H).Much less, 5/2H or the period (as 1/2H or 1/8H) shorter than 1H can be used for operation and control.
In above-mentioned example, along with the electric current that is transported to EL element 15 switches on and off, opening and closing display screen 50 (luminous or not luminous).That is to say that use the electric charge that remains in the capacitor 19, approximately the electric current that equates flows through transistor 11a many times.The invention is not restricted to this.For example, can open or close display screen 50 (seeing the embodiment shown in Figure 32,33,53,54 etc.) by making capacitor 19 charging and discharge.
Figure 18 illustrates the voltage waveform that puts on signal line 17, to finish at the visual display condition shown in Figure 16.The difference of Figure 18 and Figure 15 is that operation among the signal line 17b is (in the operation of Fig. 1,2,64 and 65 transistor 11d; Perhaps in the operation of the switch in Figure 63 631.Although switch 631 is not by signal line 17b control, those skilled in the art can easily carry out the on/off control of switch 631, thereby with the descriptions thereof are omitted).How many screen divider are arranged, just make the 17b conducting of signal line and end (Vgl and Vgh) how many times.Figure 18 is identical with Figure 15 in others, thereby with the descriptions thereof are omitted.
Because the black demonstration on the EL display corresponding to not luminous fully, does not therefore resemble the situation that show the intermittence on display panels, contrast does not reduce.And, under the configuration of Fig. 1, can show by making transistor 11d conducting simply and ending to finish intermittently.Under the configuration of Figure 38 and 51, can show by making transistor unit 11e conducting simply and ending to finish intermittently.Like this, because in capacitor 19, stored pictorial data, so even make pixel 16 conductings and, also can reproduce identical image demonstration (quantity of gray scale is unlimited, because use the analogue value) by one or many.That is to say, in pixel 16, keep pictorial data to reach the period (till in next frame, rewriteeing pictorial data) of 1F.Whether carry corresponding to the electric current of the pictorial data of storage and control by oxide- semiconductor control transistors 11d and 11e or switch 631 to EL element 15.
Above-mentioned motivational techniques are not limited to the current excitation type and can be applied to the voltage drive type equally.That is to say, in the electric current that will flow through EL element 15 is stored in configuration in each pixel, realize intermittent drive by the current path of connecting or cut off between driver transistor 11 and the EL element 15.Much less, can realize intermittent drive, for example, by transistor 11d among control Figure 43 or the transistor 11e among Figure 51.
Maintenance is important with the terminal voltage of the capacitor 19 of electric current or voltage-programming.This is because the terminal voltage of capacitor 19 in one (frame) any change (charge/discharge) in the period, causes the change of screen intensity, causes glimmering when hanging down frame rate.The electric current that is flow through EL element 15 by transistor 11a must be higher than 65%.More particularly, if the initial current of writing pixel 16 and flowing through EL element 15 is taken as 100%, the electric current that then just flow through EL element 15 in next frame (field) before electric current being write in the pixel 16 must not fallen and be lower than 65%.Determine the electric capacity of capacitor 19 and the cut-off characteristics that voltage keeps transistor 11b in the mode that satisfies above-mentioned condition.
Under the pixel arrangement that in Fig. 1 etc., shows, set up when intermittently showing with do not set up when showing intermittence between, the quantity of the transistor 11 in the single pixel does not have difference.That is to say, by oxide-semiconductor control transistors 11d, under the pixel arrangement of remainder, finish suitable current programmed, as the effect of the stray capacitance by removing source signal line 18.In addition, obtain showing that with CRT approaching film shows.
And, because the work clock of grid pumping circuit 12 is obviously slower than the work clock of source electrode exciting circuit 14, so there is no need that the major clock of circuit is upgraded (identical clock can be applied to carry out intermittently show or do not carry out intermittently arbitrary situation of demonstration).In addition, can easily change the value of N or K.This can control by the on/off of transistor 11b etc. simply and finish.
By way of parenthesis, visual display direction (image is write direction) can be in first (frame) head-to-foot from screen, and in second (frame) from the end to the top.That is to say, alternately repeat direction up and down.By such switched scan direction, even under low frame rate, also might reduce flicker.
Can might in first (frame), use downward direction for alternatively, forward whole screen to black demonstration (not showing) once, and in second (frame) use upward to.Also whole screen might be forwarded to black demonstration (not showing) once.Also whole screen might be forwarded to black demonstration (not showing) once, visual from the head-to-foot rewriting of screen subsequently.That is to say that whole screen forwards black the demonstration to after rewriting and displayed image.So whole screen is forwarded to the black improvement film display performance that shows.
In description, stated that for convenience of explanation writing direction on screen is to the top from the top to bottom or the end of from according to motivational techniques of the present invention.Yet, the invention is not restricted to this.Also the direction of writing on the screen might be fixed as head-to-foot direction or the end to the top direction, and in first (frame), non-display area 52 be moved from the top to bottom, and in second (frame) from the end to the top.Can be for alternatively, frame might be divided into three fields and distribute to R with first, give G for second, and the 3rd given B, therefore three fields constitute single frame.Also might show R, G and B (seeing Figure 75 to 82 etc.) successively by between R, G and B, switching by each horizontal scanning period (1H).Content above-mentioned also is applied to other example of the present invention.Much less, top content similarly is applied to other example of the present invention.
If the brightness of viewing area 53 remains on predetermined value, then viewing area 53 is big more, and display screen 50 is bright more.For example, when the brightness in image displaying area territory 53 was 100 (nt), if the number percent that is occupied by viewing area 53 in the display screen 50 changes to 20% from 10%, then the brightness of screen doubled.Thereby, by changing the ratio of viewing area 53 in whole screen 50, might change the display brightness of screen.The invention provides a kind of system, this system controls image by control viewing area 53 with respect to the size that shows 50 and shows.
Can optionally specify the size (see figure 6) of viewing area 53 by the data pulse (ST2) that control sends to shift register circuit 61.And, by changing the period of input timing and data pulse, might switch (the size difference between Figure 13 and Figure 16 that makes for convenience of explanation, non-display area 52) between the display condition shown in the display condition shown in Figure 16 and Figure 13.If the size of non-display area 52 is equated, then can obtain identical brightness (supposing that identical reference current puts on source electrode excitation IC (describing after a while)).Thereby the quantity expansion viewing area 53 that increases data pulse at a 1F in the period makes screen 50 brighter, makes screen 50 darker and reduce quantity.And, applied data pulse continuously and cause the display condition shown in Figure 13, and input caused the display condition shown in Figure 16 the intermittence of data pulse.Thereby, can easily control the brightness that image shows by controlling the data pulse that puts on shift register 61 simply.
It is brightness regulation schemes of using in continuous that Figure 19 (a) illustrates as viewing area in Figure 13 53.The display brightness of the screen 50 among Figure 19 (a1) is the brightest, and the display brightness of the screen 50 among Figure 19 (a2) is second the brightest, and the display brightness of the screen 50 among Figure 19 (a3) is the darkest.Can easily finish variation (or vice versa) by shift register circuit 61 grades of controlling grid pumping circuit 12 as mentioned above from Figure 19 (a1) to Figure 19 (a3).In this case, needn't change Vdd voltage among Fig. 1 (anode voltage or or the like).Needn't change from the program current of source electrode exciting circuit 14 outputs or the amplitude of program voltage.That is to say, can under the situation that does not change power supply or vision signal, change the brightness of screen 50.
And, changing to the process of Figure 19 (a3) from Figure 19 (a1), the gamma characteristic of screen does not change.Thereby, no matter the brightness of screen 50, the contrast and the gamma characteristic of maintenance display screen.This is a validity feature of the present invention.
In the brightness regulation of conventional screen, the low-light level of screen 50 causes bad gray scale performance.That is to say,, but in low-light level shows, can show fewer than half gray scale even can in high brightness shows, show 64 gray scales.On the contrary, do not rely on the display brightness of screen according to motivational techniques of the present invention, and can show nearly 64 kinds of gray scales, this is the highest.
The brightness regulation scheme that Figure 19 (b) uses when illustrating in as Figure 16 viewing area 53 being disperseed.The display brightness of the screen 50 among Figure 19 (b1) is the brightest, and the display brightness of the screen 50 among Figure 19 (b2) is second the brightest, and the display brightness of the screen 50 among Figure 19 (b3) is the darkest.Can easily finish change by the shift register circuit 61 of controlling grid pumping circuit 12 grades as mentioned above from Figure 19 (b1) to Figure 19 (b3).By shown in Figure 19 (b), disperseing viewing area 53, even under low frame rate, also might eliminate flicker.
Even under lower frame rate in order to eliminate flicker, can be as shown in Figure 19 (c), disperseing viewing area 53 more subtly.Yet this reduces the film display performance.Thereby the motivational techniques among Figure 19 (a) are suitable for moving-picture.When what want is that the motivational techniques among Figure 19 (c) are suitable when reducing power consumption by the demonstration still picture.Can easily finish switching by control shift register circuit 61 from Figure 19 (a) to Figure 19 (c).
Although form non-display area 52 with the time interval that equates in Figure 19, this is not restricted.Much less, also might in half zone of screen 50, form continuous viewing area 53, and in the remainder of the screen 50 shown in Figure 19 (c1) with equal time at interval Alternation Display zone 53 and non-display area 52.
Figure 20 illustration is according to another example of motivational techniques of the present invention.Figure 20 illustrates a kind of system, and it selects a plurality of pixel columns simultaneously, uses charging and the discharges such as stray capacitance of the program current of a plurality of pixel columns of excitation to source signal line 18, thus the shortage that alleviates write current widely.Owing to select a plurality of pixel columns simultaneously, therefore can reduce the exciting current of every pixel.Thereby, might reduce the electric current that flows through EL element 15.For convenience of explanation, suppose that for example the quantity M of N=10 and the pixel column selected simultaneously is that 5 (electric current that flows through source signal line 18 increases by ten times.Owing to select five pixel columns simultaneously, therefore 1/5 program current flows through each pixel).
The present invention according to reference Figure 20 describes selects M pixel column simultaneously.Put on source signal line 18 from IC14 of source electrode excitation for the doubly big electric current of scheduled current N.For flowing through doubly big current programmed in each pixel of the electric current N/M of EL element 15.For making EL element 15 luminous with predetermined emission brightness, the duration that electric current flows through EL element 15 is a frame (one 's) the M/N duration.This makes and might charge fully and discharge the stray capacitance of source signal line 18, causes the enough resolution of launching under the brightness predetermined.
By way of parenthesis, although in description, stated for convenience of explanation and flow through the source signal line that this is not restrictive for the doubly big electric current of scheduled current N according to motivational techniques of the present invention.The present invention is characterised in that, the signal (curtage) from 14 outputs of source electrode exciting circuit is divided into a plurality of parts, and they are put on the pixel column of selecting simultaneously (if not select them in definite, then being fine).If select to have consistent characteristic in the pixel 16 simultaneously, be programmed into the pixel 16 from source electrode exciting circuit 14 output and by the electric current that the quantity M of the pixel column of selecting simultaneously divides with the driver transistor 11a that is connected to same source signal line 18.
That is to say that electric current only flows through the period that EL element 15 reaches the M/N that equals a frame (), but in the period of remaining (1F (N-1) M/N), do not flow through electric current.In this display condition, every 1F multiimage data presentation and black demonstration (not luminous).That is to say subsequently displaying transmitted image data (intermittently show) off and on temporal meaning.Thereby, realize good display condition, there is not edge fog.And, because source signal line 18 is by the doubly big current excitation of N, therefore be not subjected to effect of parasitic capacitance.Thereby this method can adapt to high-resolution display panel.
By way of parenthesis, stated in the above example for convenience of explanation and selected M pixel column simultaneously and from the doubly big electric current of source electrode exciting circuit 14 output N.Yet, the invention is not restricted to this.Might select M pixel column simultaneously and export primary current according to the former state of exporting from source electrode exciting circuit 14.Under the sort of situation, with brightness realization the present invention of the display screen 50 that reduces.Certainly, if, then can increase the brightness of screen 50 from 14 outputs of source electrode exciting circuit 2 times, 2.5 times or 5.25 times of big electric currents.
Although stated the period of selecting M pixel column simultaneously and making each pixel 16 luminous M/N for convenience of explanation in the above example, the invention is not restricted to this.Also might select simultaneously M pixel column and from source electrode exciting circuit 14 output M/10 doubly, M/5 doubly or the doubly big electric current of M/2.5.That is to say, can be independent of N display time interval optionally is set.Increase display time interval and then increase the brightness of screen 50, reduce the brightness that display time interval then reduces screen 50.That is to say, select the present invention of M pixel column also can easily control or regulate the brightness of screen 50 simultaneously by controlling display time interval.
Figure 21 is a key diagram, and illustration realizes the excitation waveform of the motivational techniques shown in Figure 20.In the voltage waveform of signal line 17, cut-off voltage is that Vgh (H level) and forward voltage are Vgl (L level).The index of signal wire (such as (1), (2) and (3)) remarked pixel line number.By way of parenthesis, the QCIF panel has 220 pixel columns and the VGA panel has 480 pixel columns.
In Figure 21, select signal line 17a (1) (Vgl puts on the signal line 17a of pixel column (1)), and program current flows through source signal line 18 (under the situation of Fig. 1) with the transistor 11a from the pixel column of selecting to the direction of source electrode exciting circuit 14.For convenience of explanation, to write pixel column 51a be (1) individual pixel column among Figure 20 in supposition here.
The program current that flows through source signal line 18 is that the N of predetermined value doubly (supposes N=10 greatly for convenience of explanation.Certainly because predetermined value is the data current that is used for displayed image, and it is not a fixed value, unless under the situation of white raster demonstration etc.The current value that is programmed into each pixel 16 changes by pictorial data.Also five pixel columns (M=5) are selected in supposition simultaneously.Therefore, ideally the capacitor 19 of a pixel is programmed, so the big electric current of twice (N/M=10/5=2) will flow through transistor 11a.
When writing pixel column and be (1) individual pixel column, select the signal line 17a of pixel column (1), (2), (3), (4) and (5), as shown in Figure 21.That is to say that switching transistor 11b and transistor 11c in pixel column (1), (2), (3), (4) and (5) are conductings.And program current flows through the driver transistor 11a of pixel column (1), (2), (3), (4) and (5).As can from Figure 21, seeing, in the 5th H, forward voltage puts on the signal line 17a of pixel column (1), (2), (3), (4) and (5) and cut-off voltage puts on the signal line 17b of pixel column (1), (2), (3), (4) and (5).Thereby the switching transistor 11d in pixel column (1), (2), (3), (4) and (5) ends, and electric current does not flow through the EL element 15 in the respective pixel row.That is to say that EL element 15 is in the non-light-emitting mode 52.
By way of parenthesis, stated for convenience of explanation and selected voltage to put on pixel column (in the above description, pixel column (1), (2), (3), (4) and (5)) signal line 17a, cut-off voltage puts on signal line 17b and the transistor 11d of pixel column (pixel column (1), (2), (3), (4) and (5)) is ended.Yet,, much less, the transistor 11d of the pixel column except that the pixel column of selecting is ended as illustrative in Figure 20.In Figure 20, the transistor 11d in comprising the wide region of writing pixel column 51 is ended to form non-display area 52.Much less, can disperse or do not divide non-display area, as described in reference Figure 19.
According to the present invention, in Fig. 1,2 etc. pixel arrangement, when importantly in the end program current being remained in the pixel of at least using in the current programmed pixel column, cut off the current path of EL element 15.Yet under the current mirror pixel arrangement situation of Figure 38, foregoing is not restrictive.
According to the present invention, importantly select simultaneously to be used for to write one of pictorial data or all pixel column (wherein forward voltage puts on signal line 17a) be placed on non-display mode.This is because one or more pixel columns are put into the resolution that has reduced shown image in the display mode.
In the ideal case, the transistor 11a in five pixels carries the electric current of Iw * 2 separately (electric current that is Iw * 2 * N=Iw * 2 * 5=Iw * 10 flows through source signal line 18 to source signal line 18.Thereby, if predetermined voltage Iw flows through when not using according to N of the present invention times of pulse excitation, then flow through source signal line 18 for 10 times of big electric currents of Iw).
By top operation (motivational techniques), the capacitor 19 of each pixel column (1), (2), (3), (4) and (5) is programmed with the program current that twice is big.For the ease of understanding, suppose that here transistor 11a has equal characteristic (Vt and S value).
Owing to select five pixel columns (K=5) simultaneously, therefore five driver transistor 11a work.That is to say that the electric current that 10/5=2 is doubly big flows through the transistor 11a of each pixel.Total programming electric current of the transistor 11a of five pixels 16 flows through source signal line 18.For example, if the electric current of writing among the pixel column 51a is Iw, the electric current that then equals Iw * 10 flows through source signal line 18.Writing the pixel column 51b (pixel column (2), (3), (4) and (5) when with electric current pixel column (1) being programmed) that writes that pixel column (1) writes pictorial data afterwards is that to be used to increase the auxiliary pixel of the magnitude of current that is transported to source signal line 18 capable.Yet, no problem, because the pictorial data of rule is written to after a while writes pixel column 51b and (see Figure 20.Suppose 51a among Figure 20 corresponding to pixel column (1) and 51b corresponding to pixel column (2), (3), (4) and (5)).
Thereby four pixel column 51b provide the demonstration identical with pixel column 51a in the period of 1H.Therefore, be at least and increase electric current and writing pixel column 51a and writing pixel column 51b of selecting is placed in the non-display mode 52 and (sees Figure 20 (b)).Yet, yet much less, in current mirror pixel arrangement or other pixel arrangement that is used for voltage-programming of Figure 38, pixel column 51a can be in the display mode.
In Figure 21, after 1H, signal line 17a (1) becomes not selected and forward voltage (Vgl) puts on signal line 17b.See the waveform of the 6th the signal line among the H.Simultaneously, select signal line 17a (6) (applying Vgl voltage) and program current to flow through source signal line 18 to the direction of source electrode exciting circuit 14 with the transistor 11a from the pixel column of selecting (6).By this operation, the pictorial data of rule remains in the pixel column (1).That is to say that the program current and the program current that are identified for pixel column (1) clearly flow through pixel column (6).
After next 1H, signal line 17a (2) becomes the signal line 17b (seeing the 7th H among Figure 21) that not selected and forward voltage (Vgl) puts on pixel column (2).Simultaneously, select signal line 17a (7) (applying Vgl voltage) and program current to flow through source signal line 18 to the direction of source electrode exciting circuit 14 with the transistor 11a from the pixel column of selecting (7).By this operation, the pictorial data of rule remains in the pixel column (2).Repaint whole screen 50, as by top operation singly the conversion pixel column scan.
With the motivational techniques among Figure 20 since with the big electric current of twice (voltage) to each pixel programming, therefore the emission brightness of EL element 15 is twice height (yet numeral " two " is just according to examples here) in the ideal case.Thereby the brightness of display screen is that the predetermined value twice is big.For this brightness is equated with predetermined luminance, can write pixel column 51 with comprising and for half zone of display screen 50 changes into non-display area 52, as illustrative in Figure 16.
As the situation of Figure 13, when a viewing area 53 when the top of screen moves to the end, as shown in Figure 20, if use low frame rate, then moving of viewing area 53 can visually identify.Especially the user make his/her eye near or certainly will identify easilier when moving up and down his/her head.For handling this problem, viewing area 53 can be divided into a plurality of parts, as illustrative in Figure 22 (quantity of division is K).
Figure 23 illustrates the voltage waveform that puts on signal line 17.The difference of Figure 21 and Figure 23 is the operation of signal line 17b.Signal line 17b conducting and as many by the number of times of (Vgl and Vgh) and screen divider number.Remainder is almost identical with Figure 21, or can know by analogy, therefore will omit its explanation.
As mentioned above, divide the flicker that screen is reduced in viewing area 53.Thereby the good image that can obtain flicker free shows.By way of parenthesis, can divide viewing area 53 more subtly.Viewing area 53 is divided meticulously more, and then flicker produces fewly more.Because EL element 15 is super-sensitive,, do not reduce display brightness even make its conducting and end with the time interval that is shorter than 5 microseconds yet.
Use according to motivational techniques of the present invention, can make EL element 15 conductings and end by turning on and off the signal that puts on signal line 17b.Like this, use the low frequency of KHz level can control clock frequency.And, do not need video memory etc. so that insert blank screen (inserting non-display area 52).Thereby, can realize with low cost according to exciting circuit of the present invention or method.
Figure 24 illustrates the situation of selecting two pixel columns simultaneously.Discovery selects the method for two pixel columns to provide the image of the problem of having virtually no to show on the display panel that is formed by the low temperature polycrystalline silicon technology simultaneously.Might this be because the driver transistor 11a in adjacent pixels has closely similar characteristic.In laser annealing, when being parallel to 18 irradiations of source signal line, the laser band obtains good result's (seeing Fig. 7 and explanation thereof).
This is because the semiconductor film that part is annealed simultaneously has consistent characteristic.That is to say, in the range of exposures of laser band, as one man produce semiconductor film and use the transistorized Vt of this semiconductor film, migration to shelter almost consistent with the S value.Thereby if be parallel to the Laser emission (see figure 7) that source signal line 18 moves striping, then the pixel (pixel column, i.e. pixel of vertically arranging on the screen) along source signal line 18 obtains characteristic much at one.Therefore, if it is current programmed that a plurality of pixel column conductings are carried out, then almost as one man be programmed in the pixel by the electric current that obtains according to the pixel quantity division program current of selecting.This makes the programming that might make electric current approach desired value and obtains consistent demonstration.Thereby, might use the array base plate 71 built along the Laser emission direction and realize suitable image demonstration with reference to the motivational techniques of Figure 24 description of etc.ing.
As mentioned above, if the Laser emission direction is approximately conformed to the direction of source signal line 18, then the characteristic of the pixel transistor 11a that vertically arranges becomes almost consistent.This make might be accurately with target voltage to pixel programming, and thereby obtain suitable image and show (even flatly the characteristic of the pixel transistor 11a of Pai Lieing is inconsistent).Pixel column of selecting by conversion singly or the pixel column by the two or more selections of linear transformation are synchronized with 1H (horizontal scanning period) and carry out top operation.
By way of parenthesis, according to the present invention, the Laser emission direction always must not be parallel to the direction of source signal line 18.Even this is because the direction and the source signal line 18 of Laser emission are angled, also can makes along the pixel transistor of a source signal line 18 placements and obtain almost equal characteristic.Thereby, make the Laser emission direction be parallel to source signal line 18 and mean the pixel that vertically is adjacent to along any pixel of source signal line 18 is taken in the laser emission scope.In addition, source signal line 18 constitutes transmission usually as the program current of vision signal or the lead of voltage.
By way of parenthesis, in example of the present invention, pixel column is write in every 1H conversion, but this is not restrictive.Can every 2H conversion pixel column.And, but linear transformation is more than two pixel columns.And, time interval conversion pixel column that can be on request.Can be at interval according to the position change conversion time on the screen.For example, can reduce the time interval of conversion in the centre of screen, but the time interval that increases conversion in the top and the bottom of screen.And, can on the basis of a frame one frame, change time interval of conversion.
And, not the strict necessary continuous pixel column of selecting.For example, can select per second pixel column.In particular, possible motivational techniques are included in and select the first and the 3rd pixel column in first horizontal scanning period, in second horizontal scanning period, select the second and the 4th pixel column, in the 3rd horizontal scanning period, select the 3rd and the 5th pixel column, and in the 4th horizontal scanning period, select the 4th and the 6th pixel column.Certainly, be included in the motivational techniques of selecting the first, the 3rd and the 5th pixel column in first horizontal scanning period and also belong to technology category of the present invention.And, can select in every several pixel column.
By way of parenthesis, the combining of the selection of Laser emission direction and a plurality of pixel columns is not limited to Fig. 1,2,32,63,64,65 etc. pixel arrangement, but much less, also can be applicable to the configuration of other current excitation, such as Figure 38,42,50 etc. current mirror pixel arrangement.And it can be applied to the pixel arrangement of the voltage drive among Figure 43,51,54,62 etc.This is because as long as the transistor in the upper and lower of pixel has equal characteristic, just can suitably use the magnitude of voltage that puts on identical source electrode signal wire 18 to carry out voltage-programming.
As mentioned above, select five pixel columns simultaneously according to motivational techniques of the present invention among Figure 21.Figure 24 and 25 illustrates the example of the motivational techniques of selecting two pixel columns simultaneously.In Figure 24, when writing pixel column and be (1) individual pixel column, select signal line 17a (1) and (2) (seeing Figure 25).That is to say that switching transistor 11b and transistor 11c in pixel column (1) and (2) are conductings.And when forward voltage put on signal line 17a, cut-off voltage put on signal line 17b.
Thereby, in the 1st and the 2nd H, the switching transistor 11d in pixel column (1) and (2) by and electric current do not flow through EL element 15 in the respective pixel row.That is to say that EL element 15 is in the non-light-emitting mode 52.By way of parenthesis, in Figure 24, viewing area 53 is divided into five parts to reduce flicker.
In the ideal case, the electric current of carrying Iw * 2 separately of the transistor 11a in two pixel columns is to source signal line 18 (during as N=10.Because K=2, the electric current of Iw * K * 5=Iw * 10 flows through source signal line 18).Then, 5 times of big electric currents are programmed into the capacitor 19 of each pixel 16 and are held.
Owing to select two pixel columns (K=2) simultaneously, therefore two driver transistor 11a work.That is to say that the electric current that 10/2=5 is doubly big flows through the transistor 11a of each pixel.Total programming electric current of two transistor 11a flows through source signal line 18.
For example, if the electric current of writing among the pixel column 51a is Id, the electric current of Iw * 10 flows through source signal line 18.Because being written to after a while, the pictorial data of rule writes among the pixel column 51b, therefore no problem.In the period of 1H, pixel column 51b provides the demonstration identical with pixel column 51a.Therefore, for increase that electric current selects write pixel column 51a at least and pixel column 51b is in the non-display mode 52.
After next 1H, signal line 17a (1) becomes not selected and forward voltage (Vgl) puts on signal line 17b.Simultaneously, select signal line 17a (3) (Vgl voltage) and program current to flow through source signal line 18 to the direction of source electrode exciting circuit 14 with the transistor 11a from the pixel column of selecting (3).By this operation, the pictorial data of rule remains in the pixel column (1).
After next 1H, signal line 17a (2) becomes not selected and forward voltage (Vgl) puts on signal line 17b.Simultaneously, select signal line 17a (4) (Vgl voltage) and program current to flow through source signal line 18 to the direction of source electrode exciting circuit 14 with the transistor 11a from the pixel column of selecting (4).By this operation, the pictorial data of rule remains in the pixel column (2).Repaint whole screen, as by top operation singly the conversion pixel column scan (the two or more pixel columns of conversion simultaneously certainly.For example, under the situation of pseudo-interlacing excitation, once with two pixel columns of conversion.And, from the viewpoint that image shows, identical image can be write two or more pixel columns).
As under the situation of Figure 16, with the motivational techniques among Figure 24 since with five times of big electric currents (voltage) to each pixel programming, so in the ideal case, the emission brightness of EL element 15 be five times bright.Thereby the brightness of viewing area 53 is that five times of predetermined value are high.Write pixel column 51 and can change into non-display area 52 for 1/5 zone of display screen 50 for this brightness being equated with predetermined luminance, comprising.
As shown in Figure 27, sequentially write pixel column 51 (51a and 51b) to two of downside selections and (also see Figure 26 from the upside of screen 50.In Figure 26, select pixel column 16a and 16b).Yet,, or not 51b although write pixel column 51a existence in the bottom of screen.That is to say to have only a pixel column to select.Thereby the electric current that puts on source signal line 18 all is written to writes pixel column 51a.Therefore, for being written to, the common big electric current of twice writes pixel column 51a.
For handling this problem, the present invention forms (placement) virtual pixel in the bottom of screen 50 capable 281, as shown in Figure 27 (b).Thereby, after the pixel column of the bottom of selecting screen 50, select the last pixel column and the virtual pixel capable 281 of screen 50.Therefore, the electric current of appointment is written to the pixel column of writing among Figure 27 (b).By way of parenthesis, although virtual pixel capable 281 is illustrated as top or the bottom that is adjacent to viewing area 50, this is not restricted.Can form it in position away from screen area 50.In addition, virtual pixel capable 281 needn't comprise switching transistor 11d or EL element 15, all as shown in FIG. 1 those.This reduces the size of virtual pixel capable 281, and it causes shortening the frame length of panel.
Figure 28 illustrates the mechanism how state shown in Figure 27 (b) takes place.As seeing, after the pixel 16c that selects screen 50 bottoms, select the last pixel column 281 of screen 50 from Figure 28.Virtual pixel capable 281 is placed on the outside of viewing area 50.That is to say that virtual pixel capable 281 is not luminous, is non-luminous, even perhaps luminously also be hidden.For example, eliminate the contact hole between pixel electrode and the transistor 11, on virtual pixel is capable, do not form EL element 15, or the like.EL element 15, transistor 11d and signal line 17b are illustrated in the virtual pixel capable 281 among Figure 28, but they do not need excitation.In the virtual pixel capable 281 of reality, do not form EL element 15, transistor 11d or signal line 17b according to the display panel of the present invention's exploitation.Yet, be preferably formed as pixel electrode.This is to there are differences in the stray capacitance that will prevent between virtual pixel and other pixel 16 and the situation of the difference of the program current that causes keeping.
Although having stated in the bottom of screen 50 with reference to Figure 27 provides (form or place) virtual pixel (OK) 281, this is not restrictive.For example, the end of to top scanning screen, as shown in Figure 29 (a).Under the situation of reverse scan, it is capable 281 also should to form virtual pixel at the top of screen 50, as shown in Figure 29 (b).That is to say, all form (placement) virtual pixel capable 281 in the top and the bottom of screen 50.This configuration also adapts to the reverse scan of screen.
In above-mentioned example, select two pixel columns simultaneously.The invention is not restricted to this.For example, can select five pixel columns (seeing Figure 23) simultaneously.When selecting five pixel columns simultaneously, should form four virtual pixels capable 281.Figure 134 is the key diagram of an example of illustration.Figure 134 is a key diagram, the configuration of the bottom of illustration screen 50.This example relates to writes five pixel columns simultaneously.Four virtual pixels capable 281 have been formed or have placed.Virtual pixel capable 281 does not comprise EL element 15 etc.Virtual pixel capable 281 includes only pixel transistor ( transistor 11a, 11b and 11c), capacitor 19 and other flows through the assembly of program current.Certainly, much less, can form signal line 17b, EL element 15 etc.
Consider top situation, the quantity M of the pixel column that the quantity of desired virtual pixel capable 281 equals to select simultaneously subtracts 1.For example, if select five pixel columns simultaneously, the quantity that then desired virtual pixel is capable is 5-1=4.If select 10 pixel columns simultaneously, the quantity that then desired virtual pixel is capable is 10-1=9.
Figure 135 is a key diagram, is illustrated in the capable placement location of virtual pixel under the situation that forms virtual pixel capable 281.In fact, suppose reverse energization, place virtual pixel capable 281 in the top and the bottom of screen 50.
Figure 135 (a) illustrates the formation position that is used for selecting simultaneously the virtual pixel capable 281 that two pixel columns (M=2) encourage.Figure 135 (b) illustrates the formation position that is used for selecting simultaneously the virtual pixel capable 281 that three pixel columns (M=3) encourage.Figure 135 (c) illustrates the formation position that is used for selecting simultaneously the virtual pixel capable 281 that four pixel columns (M=4) encourage.Figure 135 (d) illustrates the formation position that is used for selecting simultaneously the virtual pixel capable 281 that five pixel columns (M=5) encourage.By way of parenthesis, if as in Figure 135, select four virtual pixels capable 281, it is feasible then selecting two to five pixel columns to encourage simultaneously.
In the example of motivational techniques, keep different pictorial data in the above for each pixel column.Much less, if in two pixel columns, keep identical pictorial data, then double the quantity of desired pixel column.That is to say,, then require the virtual pixel of twice quantity capable if once select two pixel columns to scan.Thereby the quantity that desired virtual pixel is capable is that the quantity M by the pixel column of selecting simultaneously subtracts 1, all multiply by the quantity of the pixel column that writes the phase diagram image data.
In the example of motivational techniques, select the pixel column that adjoins simultaneously in the above.Yet, be not limited thereto according to excitation system of the present invention.Figure 136 and 137 illustrates the example according to another motivational techniques of the present invention (excitation system).Figure 136 illustrates the example that comprises the motivational techniques of selecting two pixel columns simultaneously.In Figure 136, form virtual pixel in the bottom of screen 50 capable 281, as under the situation of Figure 135.
In comprising the motivational techniques of selecting two pixel columns simultaneously, must be always chosen in the virtual pixel capable 281 that the bottom forms.That is to say, select the transistor 11b and the 11c of the virtual pixel capable 281 of virtual pixel capable 281 to remain conducting.
Figure 136 (a) illustrates the state at the top (with current programmed) of scanning screen 50.Figure 136 (b) illustrates the state of central authorities' (with current programmed) of scanning screen 50.Figure 136 (c) illustrates the state of the bottom (with current programmed) of scanning screen 50.In superincumbent any situation, select virtual pixel capable 281 together.Thereby, select two pixel column-virtual pixels capable 281 simultaneously and will in the lump image be write in them with current programmed pixel column.
With the motivational techniques among Figure 136, singly with the pixel column of selecting in the viewing area 50 at the virtual pixel capable 281 at place, fixed position.Then, the electric current from virtual pixel capable 281 and the pixel column of selecting is offered source electrode excitation IC (circuit) 14 (seeing Figure 137).If Figure 137 (a) is illustrated in the foment of certain time point, then Figure 137 (b) illustrates horizontal scanning period state afterwards.
By way of parenthesis, in Figure 136, capable 281 electric currents identical with the electric current of the pixel column of selecting one by one 51 of virtual pixel are sent to source signal line 18.Yet, the invention is not restricted to this.But the big electric current of electric current of the pixel column 51 that capable 281 delivery ratios of virtual pixel are selected one by one.For example, it can carry 2.5 times or 3.5 times of big electric currents.
Can the enlargement factor that is transported to the electric current of source signal line 18 by virtual pixel capable 281 be set by in design, specifying channel width W and the channel length L of the driver transistor 11a of virtual pixel capable 281.Increase W and then increase the exciting current that flows through source signal line 18, reduce W and then reduce the exciting current that flows through source signal line 18.Thereby, if the W/L of driver transistor 11a that makes virtual pixel capable 281 then can make the exciting current of virtual pixel capable 281 bigger than the exciting current of viewing area 50 greater than the W/L of the driver transistor 11a of the pixel 16 of viewing area 50.Much less, preferably make the exciting current of virtual pixel capable 281 bigger.
By way of parenthesis, although, select singly and will the invention is not restricted to this with current programmed pixel column with the motivational techniques of Figure 136.For example, can select two or more pixel columns simultaneously, as illustrative in Figure 24.
Have the pixel arrangement among Figure 136,, therefore can reduce the variation in the virtual pixel capable 281, cause consistent image to show owing to select virtual pixel capable 281 all the time.By way of parenthesis, when the image scanning direction was reverse, virtual pixel capable 281 was formed on the top that is preferably in the screen 50 among Figure 136.
In the above example, each or frame in, scanning from the same pixel line number.NTSC etc. support the interlacing excitation.In the interlacing excitation, a frame is made up of two fields, scans the odd pixel row and scanning even pixel row in second in first.
In the example of Figure 133, Figure 133 (a) illustrates first method of excitation and Figure 133 (b) illustrates the method for second of excitation.When describing with reference to Figure 24, the motivational techniques use here selects the excitation of two pixel columns.
In first, select two pixel columns simultaneously since first pixel column, and select follow-up pixel column by shifting one's position.This process to wait to describe with reference to Figure 24 similar, thereby its detailed description will be unnecessary.
In second, select two pixel columns simultaneously since second pixel column, and select follow-up pixel column by shifting one's position.Main points are that scanning is since second pixel column rather than first pixel column.With interlacing excitation, scanning odd pixel row in first and in second scanning even pixel row.That is to say, the starting position of scanning first with second between different.Much less, it is capable 281 to form virtual pixel, waits such as reference Figure 134 and describes.
Be not limited to select simultaneously a plurality of pixel columns according to motivational techniques of the present invention.For example, it is multiplicable to write the speed of pixel column.That is to say, select pixel column singly and on the pixel column of selecting, rewrite image (seeing Figure 13).Identical pictorial data is write the pixel column that adjoins.For example, in first, identical image is write in first and second pixel columns.Equally, identical image is write in third and fourth pixel column with identical image write in the 5th and the 6th pixel column.Operation above repeating, up to the 479th and the 480th pixel column finish write image to first in till.
In second, identical image is write in the second and the 3rd pixel column.Equally, identical image is write the 4th with the 5th pixel column in identical image is write in the 6th and the 7th pixel column.Operation above repeating, up to the 478th and the 479th pixel column or the 480th and the 481st pixel column finish write image to second in.
Select to be not limited to select simultaneously two pixel columns in the time of a plurality of pixel column.Much less, for example, can in first, scan the odd pixel row (1,3,5,7,9 ..., 479) and can in second, scan the even pixel row (2,4,6,8,10 ..., 480).Even pixel row in first or can be non-luminous or can sequentially scan as non-display area 52 is as illustrative in Figure 24.And the odd pixel row in second or can be non-luminous or can sequentially scan as non-display area 52 is as illustrative in Figure 24.
In Figure 15 and 21 etc., select pixel column singly, be synchronized with pixel column of horizontal-drive signal conversion.Yet, the invention is not restricted to this, and much less, convertible two or more pixel columns are selected pixel column.Use one or more virtual pixels capable according to capable configuration of virtual pixel of the present invention or virtual pixel row energization.Certainly, best incorporated ground uses virtual pixel row energization and N times of pulse excitation.
Now, will describe in more detail below according to interlacing excitation of the present invention.Figure 127 illustrates the configuration of carrying out the display panel of interlacing excitation according to the present invention.In Figure 127, the signal line 17a of odd pixel row is connected to grid pumping circuit 12a1.The signal line 17a of even pixel row is connected to grid pumping circuit 12a2.On the other hand, the signal line 17b of odd pixel row is connected to grid pumping circuit 12b1.The signal line 17b of even pixel row is connected to grid pumping circuit 12b2.
Thereby the operation (control) by grid pumping circuit 12a1 sequentially is overwritten in the pictorial data in the odd pixel row.In the odd pixel row, control the luminous of EL element and not luminous by the operation (control) of grid pumping circuit 12b1.And the operation (control) by grid pumping circuit 12a2 sequentially rewrites the pictorial data in the even pixel row.In the even pixel row, control the luminous of EL element and not luminous by the operation (control) of grid pumping circuit 12b2.
Figure 128 (a) illustrates the mode of operation among first of display panel.Figure 128 (b) illustrates the mode of operation among second of display panel.In Figure 128, the diagonal line hatches of indicating grid pumping circuit 12 represents that grid pumping circuit 12 do not participate in the data scanning operation.In particular, in first of Figure 128 (a), grid pumping circuit 12a1 is that the control of writing of program current is operated, and grid pumping circuit 12b2 to be the light emitting control of EL element 15 operate.In second of Figure 128 (b), grid pumping circuit 12a2 is that the control of writing of program current is operated, and grid pumping circuit 12b1 to be the light emitting control of EL element 15 operate.Operation above in frame, repeating.
Figure 129 illustrates the visual show state in first.Figure 129 (a) illustration is write pixel column (using the position of the odd pixel row of electric current (voltage) programming).The position of pixel column: Figure 129 (a1) → (a2) → (a3) is write in conversion sequentially.In first, sequentially rewrite odd pixel row (remaining on the pictorial data in the even pixel row).The show state of Figure 129 (b) illustration odd pixel row.By way of parenthesis, Figure 129 (b) illustration odd pixel row.Illustration even pixel row in Figure 129 (c).As seeing from Figure 129 (b) that the EL element 15 of the pixel in the odd pixel row is non-luminous.On the other hand, in viewing area 53 and non-display area 52, all scan the even pixel row, as in (N times of pulse excitation) as shown in Figure 129 (c).
Figure 130 is illustrated in the visual show state in second.Figure 130 (a) illustration is write pixel column (using the position of the odd pixel row of electric current (voltage) programming).The position of pixel column: Figure 130 (a1) → (a2) → (a3) is write in conversion sequentially.In second, sequentially rewrite even pixel row (remaining on the pictorial data in the odd pixel row).The show state of Figure 130 (b) illustration odd pixel row.By way of parenthesis, Figure 130 (b) illustration odd pixel row.Illustration even pixel row in Figure 130 (c).As seeing from Figure 130 (b) that the EL element 15 of the pixel in the even pixel row is non-luminous.On the other hand, in viewing area 53 and non-display area 52, all scan the odd pixel row, as in (N times of pulse excitation) as shown in Figure 130 (c).
Like this, can easily in the EL display panel, realize the interlacing excitation.And the shortage and the fuzzy moving-picture of write current eliminated in N times of pulse excitation.In addition, Control current (voltage) programming easily and EL element 15 luminous and can easily realize circuit.
By way of parenthesis, be not limited to shown in Figure 129 and 130 those according to motivational techniques of the present invention.For example, the motivational techniques shown in Figure 131 also are feasible.In Figure 129 and 130, using the odd pixel row or the even pixel row of electric current (voltage) programming to belong to non-display area 52 (not luminous or black demonstration).Example among Figure 131 comprises luminous the grid pumping circuit 12b1 and the 12b2 of synchro control EL element 15.Yet, much less, using the pixel column 51 of writing of electric current (voltage) programming to belong to non-display area (under the situation of the current mirror pixel arrangement of Figure 38, not needing this).In Figure 131,, do not need to provide two grid pumping circuit 12b1 and 12b2 because light emitting control is common for odd pixel row and even pixel row.An independent grid pumping circuit 12b just can carry out light emitting control.
Motivational techniques among Figure 131 are used identical light emitting control for the odd pixel row with the even pixel row.Yet, the invention is not restricted to this.Figure 132 is illustrated in the example that changes light emitting control between odd pixel row and the even pixel row.In Figure 132, specifically, the light-emitting mode of odd pixel row (viewing area 53 and non-display area 52) and the light-emitting mode of even pixel row have opposite pattern.Thereby viewing area 53 has identical size with non-display area 52.Certainly, this is not restricted.
In the above example, with electric current (voltage) pixel column is programmed singly.Yet, be not limited thereto according to motivational techniques of the present invention.Much less, available current (voltage) is simultaneously to two pixel columns (a plurality of pixel column) programmings, as shown in Figure 133.And, in Figure 130 and 129, not that strictness must all pixel columns in odd pixel row or even pixel row should be non-luminous.Much less, can be as shown in waiting at Figure 66 the actuate pixel row.
In the motivational techniques of once selecting two or more pixel columns, the quantity of the pixel column of Xuan Zeing is big more simultaneously, then its variation in the characteristic of difficult more absorbing crystal pipe 11a that becomes.Yet the electric current that is programmed into a pixel increases with the minimizing of the quantity of selected pixel column, causes big electric current to flow through EL element 15, and this then makes EL element 15 be easy to degradation.
Figure 30 illustrates and how to address this problem.At Figure 30 basic thought behind is to use the method for selecting a plurality of pixel columns simultaneously during 1/2H (horizontal scanning period 1/2), describe as reference Figure 22 and 29, and during after a while 1/2H (horizontal scanning period 1/2), use the method for selecting a pixel column, as describing with reference to figure 5 and 13.The variation of the characteristic of the feasible possible absorbing crystal pipe 11a of this combination also realizes high speed and consistent surface.
With reference to Figure 30,, suppose and in first period, select five pixel columns simultaneously and in second period, select a pixel column for easy to understand.At first, as shown in Figure 30 (a1), in first period (1/2H), select five pixel columns simultaneously.This operation is described with reference to Figure 22, thereby with the descriptions thereof are omitted.As an example, suppose that the electric current that flows through source signal line 18 is 25 times of predetermined value.Thereby the transistor 11a in the pixel 16 (in the pixel arrangement of Fig. 1) programmes with five times of big electric currents (25/5 pixel column=5).Because electric current is 25 times big, the therefore stray capacitance that in source signal line 18 grades, produces charging and discharge in the extremely short period.Therefore, the current potential of source signal line 18 in the period of short time, reach the target current potential and to the terminal voltage programming of the capacitor 19 of each pixel 16 to flow through 25 times of big electric currents.In a 1/2H (horizontal scanning period 1/2), apply 25 times of big electric currents.
Nature owing to identical pictorial data is write five write in the pixel column, therefore makes five transistor 11d that write in the pixel column end so that displayed image not.Thereby display condition is as shown in Figure 30 (a2).
In period, select a pixel to carry out electric current (voltage) programming at next 1/2H.Condition is as shown in Figure 30 (b1).Carry out electric current (voltage) programming so that write pixel column 51a as five times of big electric currents are flow through.The variation of the terminal voltage of the capacitor 19 that is programmed by minimizing flows through equal electric current in Figure 30 (a1) and Figure 30 (b1), to reach target current more quickly.
In particular, in Figure 30 (a1), electric current flows through a plurality of pixels, fast near approximate desired value.In this phase one, because to a plurality of transistor 11a programmings, therefore transistorized variation causes the error relevant with desired value.In subordinate phase, only select one will write and keep the pixel column of data, and be programmed into predetermined target value fully by the current value that changes from approximate desired value.
By way of parenthesis, carrying out from the scanning of the head-to-foot non-luminous region 52 of screen with from the head-to-foot scanning of writing pixel column 51a of screen with mode identical in Figure 13 etc., and thereby will the descriptions thereof are omitted.
Figure 31 illustrates the excitation waveform that is used to realize the motivational techniques shown in Figure 30.As seeing from Figure 31,1H (horizontal scanning period) is made up of two phase places.Use the ISEL signal between two phase places, to switch.Illustration ISEL signal in Figure 31.
At first, the ISEL signal will be described.Execution comprises current output circuit A and current output circuit B at the exciting circuit 14 of the operation shown in Figure 30.Each current output circuit comprises the D/A circuit, operational amplifier etc. that 8 gradation datas become simulation from digital conversion.In the example of Figure 30, current output circuit A is configured to export 25 times of big electric currents.On the other hand, current output circuit B is configured to export 5 times of big electric currents.By the ISEL signal and be applied in source signal line 18 and control output, and be applied in source signal line 18 from current output circuit A and current output circuit B by the on-off circuit that in the electric current output block, forms (placement).Such current output circuit is placed on the every source signal line 18.
When the ISEL signal when low, select the current output circuit A of 25 times of big electric currents of output, and by the electric current (more precisely, by the current output circuit A ABSORPTION CURRENT that among source electrode excitation ICs 14 form) of source electrode excitation IC 14 absorptions from source signal line 18.Can easily use a plurality of resistance and analog switch to regulate enlargement factor (such as x25 or x5) from the electric current of current output circuit.
As shown in Figure 30, when writing pixel column and be the 1st pixel column (see among Figure 31 1H row), select signal line 17a (1), (2), (3), (4) and (5) (under situation of the configuration shown in Fig. 1).That is to say that switching transistor 11b and transistor 11c in pixel column (1), (2), (3), (4) and (5) are conductings.In addition, because ISEL is low, selects the current output circuit A of 25 times of big electric currents of output and it is connected to source signal line 18.And cut-off voltage (Vgh) puts on signal line 17b.Thereby the switching transistor 11d in pixel column (1), (2), (3), (4) and (5) ends, and electric current does not flow through the EL element 15 in the respective pixel row.That is to say that EL element 15 is in the non-light-emitting mode 52.
In the ideal case, the transistor 11a in five pixels carries the electric current of Iw * 2 to source signal line 18 separately.Then, with of capacitor 19 programmings of five times of big electric currents to each pixel 16.For the ease of understanding, suppose that here transistor has equal characteristic (Vt and S value).
Owing to select five pixel columns (K=5) simultaneously, therefore five driver transistor 11a work.That is to say that the electric current that 25/5=5 is doubly big flows through the transistor 11a of each pixel.Total programming electric current of five transistor 11a flows through source signal line 18.For example, if the electric current of writing pixel column 51a by conventional motivational techniques is Iw, then the electric current of Iw * 25 flows through source signal line 18.Writing the pixel column 51b that writes that pixel column (1) writes pictorial data afterwards is that to be used to increase the auxiliary pixel of the magnitude of current that flows to source signal line 18 capable.Yet, because being written to after a while, the pictorial data of rule writes pixel column 51b, therefore no problem.
Thereby pixel column 51b provides the electric current identical with pixel column 51a in the period of 1H.Therefore, selecting to write at least pixel column 51a and pixel column 51b is in the non-display mode 52 to increase electric current.
In next 1/2H period (horizontal scanning period 1/2), only select to write pixel column 51a.That is to say, only select (1) pixel column.As seeing from Figure 31, forward voltage (Vgl) only puts on signal line 17a (1) and cut-off voltage (Vgh) puts on signal line 17a (2), (3), (4) and (5).Thereby the transistor 11a in the pixel column (1) is in work (providing electric current to source signal line 18), but switching transistor 11b and transistor 11c in the pixel column (2), (3), (4) and (5) end.That is to say, do not select them.In addition, because ISEL is high, therefore selects the current output circuit B of 5 times of big electric currents of output and it is connected to source signal line 18.And cut-off voltage (Vgh) puts on signal line 17b, it be in state identical during a 1/2H in.Thereby the switching transistor 11d in pixel column (1), (2), (3), (4) and (5) ends, and electric current does not flow through the EL element 15 in the respective pixel row.That is to say that EL element 15 is in the non-light-emitting mode 52.
Thereby each the transistor 11a in the pixel column (1) carries the electric current of Iw * 5 to source signal line 18.Then, with 5 times of big electric currents the capacitor in the pixel column (1) 19 is programmed.
In next horizontal scanning period, make and write offset pixel rows delegation.That is to say that pixel column (2) becomes the current pixel column of writing.During the one 1/2 period, when writing pixel column and be (2) pixel column, select signal line 17a (2), (3), (4) and (5) and (6).That is to say that switching transistor 11b and transistor 11c in pixel column (2), (3), (4), (5) and (6) are conductings.In addition, because ISEL is low, therefore selects the current output circuit A of 25 times of big electric currents of output and it is connected to source signal line 18.And cut-off voltage (Vgh) puts on signal line 17b.Thereby, the switching transistor 11d in pixel column (2), (3), (4), (5) and (6) be end and electric current do not flow through EL element 15 in the respective pixel row.That is to say that EL element 15 is in the non-light-emitting mode 52.On the other hand, because Vgl voltage puts on the signal line 17b (1) of pixel column (1), so the EL element 15 in transistor 11d conducting and the pixel column (1) is luminous.
Owing to select five pixel columns (K=5) simultaneously, therefore five driver transistor 11a work.That is to say that the electric current that 25/5=5 is doubly big flows through the transistor 11a of each pixel.Total programming electric current of five transistor 11a flows through source signal line 18.
In next 1/2H period (horizontal scanning period 1/2), only select to write pixel column 51a.That is to say, only select (2) pixel column.As seeing from Figure 31, forward voltage (Vgl) only puts on signal line 17a (2) and cut-off voltage (Vgh) puts on signal line 17a (3), (4), (5) and (6).Thereby, transistor 11a in pixel column (1) and (2) is in work (pixel column (1) provides electric current to provide electric current to source signal line 18 to EL element 15 and pixel column (2)), but switching transistor 11b and transistor 11c in the pixel column (3), (4), (5) and (6) end.That is to say, do not select them.In addition, because ISEL is high, therefore selects the current output circuit B of 5 times of big electric currents of output and current output circuit B is connected to source signal line 18.And cut-off voltage (Vgh) puts on signal line 17b, it be in state identical in a 1/2H in.Thereby, the switching transistor 11d in pixel column (2), (3), (4), (5) and (6) be end and electric current do not flow through EL element 15 in the respective pixel row.That is to say that EL element 15 is in the non-light-emitting mode 52.
Thereby each the transistor 11a in the pixel column (1) carries the electric current of Iw * 5 to source signal line 18.Then, with 5 times of big electric currents the capacitor in each pixel column (1) 19 is programmed.Whole screen draws when the operation of order above carrying out.
The motivational techniques of describing with reference to Figure 30 select G pixel column (G is 2 or bigger) in first period and so that the doubly big electric current of N flows through the mode of each pixel column programmes.In second period, motivational techniques select B pixel column (B is littler than G, but is not less than 1) and so that the doubly big electric current of N flows through the mode of pixel programmes.
Another kind of scheme also is feasible.In first period, select G pixel column (G is 2 or bigger) and so that the total current in all pixel columns will be the mode of the doubly big electric current of N programmes.In second period, a this Scheme Choice B pixel column (B less than G, but be not less than 1) and so that the total current in the pixel column of selecting (if selecting a pixel column then electric current in pixel column) will be that the mode of the doubly big electric current of N is programmed.For example, in Figure 30 (a1), select five pixel columns and the big electric current of twice to flow through transistor 11a in each pixel simultaneously.Thereby the electric current that 5 * 2=10 is doubly big flows through source signal line 18.In second period, in Figure 30 (b1), select a pixel column.10 times of big electric currents flow through the transistor 11a in this pixel.
By way of parenthesis, in Figure 31, although select a plurality of pixel columns simultaneously and select single pixel column in the period of 1/2H in the period of 1/2H, this is not restrictive.A plurality of pixel columns can be in the period of 1/4H, selected simultaneously and single pixel column can be in the period of 3/4H, selected.And, select the period of a plurality of pixel columns simultaneously and select the summation of the period of single pixel column to be not limited to 1H.For example, total period can be 2H or 1.5H.
In Figure 30, in a 1/2H, select simultaneously after five pixel columns, also might in second period, select two pixel columns simultaneously.This can realize that also actual acceptable image shows.
In Figure 30, in two stages, select pixel column-select five pixel columns in the period simultaneously and select single pixel column in the period, but this not restrictive at second 1/2H at a 1/2H.For example, also might in the phase one, select five pixel columns simultaneously, in subordinate phase, select two in five pixel columns, and in the phase III, select a pixel column at last.In brief, can in two or more stages, pictorial data be write in the pixel column.
In above-mentioned example, select pixel column singly and, perhaps once select two or more pixel columns also with current programmed with current programmed.Yet, the invention is not restricted to this.Also might use the combination of two kinds of methods according to pictorial data: select pixel column singly and with current programmed method and the method once selecting two or more pixel columns and their are programmed with electric current.
Figure 126 will select the excitation system of pixel column singly and select the motivational techniques of a plurality of pixel columns to combine singly.Under the situation of once selecting a plurality of pixel columns, for the ease of understanding supposition simultaneously as selecting two pixel columns, as illustrative among Figure 126 (a2).Thereby, respectively form a virtual pixel capable 281 in the top and the bottom of screen.Select the excitation system of pixel column must not use virtual pixel capable singly.
By way of parenthesis, for the ease of understanding, suppose that source electrode excitation IC 14 (selecting a pixel column) and the source electrode among Figure 126 (a2) among Figure 126 (a1) encourages the equal electric current of IC 14 (selecting two pixel columns) output.Thereby, provide and the screen intensity that is in a ratio of half as the excitation system of selecting pixel column as shown in Figure 126 (a1) singly as the excitation system of once selecting two pixel columns as shown in Figure 126 (a2).For equal screen intensity is provided, the dutycycle among Figure 126 (a2) can double (for example, if the dutycycle among Figure 126 (a1) is 1/2, then the dutycycle among Figure 126 (a2) can be set to 1/1=1/2 * 2).And the amplitude of the reference current of input can change over twice equally in source electrode excitation IC 14.Can supply alternatively, program current can double.
Figure 126 (a1) illustrates according to typical motivational techniques of the present invention.If incoming video signal is non-interlaced (line by line) signal, then use the excitation system among Figure 126 (a1).If incoming video signal is an interlace signal, then use the excitation system among Figure 126 (a2).And, if vision signal has low picture resolution, then use the excitation system among Figure 126 (a2).Also might use motivational techniques among Figure 126 (a2) and use motivational techniques among Figure 126 (a1) for moving-picture for still picture.The starting impulse that offers grid pumping circuit 12 by control can easily switch motivational techniques among motivational techniques among Figure 126 (a1) and Figure 126 (a2).
Problem is once to select the excitation system of two pixel columns to provide to be in a ratio of with the excitation system (Figure 126 (a1)) of selecting pixel column singly the screen intensity of half shown in Figure 126 (a2) like that.For equal screen intensity is provided, the dutycycle among Figure 126 (a2) can double (for example, if the dutycycle among Figure 126 (a1) is 1/2, then the dutycycle among Figure 126 (a2) can be set to 1/1=1/2 * 2).That is to say, can change the ratio in middle non-display area 52 of Figure 126 (b) and the viewing area 53.
Can easily change the ratio of non-display area 52 and viewing area 53 by the starting impulse that offers grid pumping circuit 12.That is to say, can change the incentive mode among Figure 126 (b) according to the display mode among Figure 126 (a1) and 126 (a2).
By way of parenthesis, Figure 126 (a2) illustrates the motivational techniques that sequentially once encourage two pixels.Yet, there is no need to select the adjacent pixels row, and can as shown in Figure 123, select two non-pixel columns that adjoin for sequential scanning.
Above-mentionedly use identical waveform for the signal line 17b of different pixels row, and apply electric current by time interval conversion pixel column with 1H according to N of the present invention times impulse Excitation Method for Frequency.Use such scanning to make the luminous pixel column of conversion sequentially, wherein the luminous duration of EL element 15 is fixed in 1F/N.The conversion pixel column uses identical waveform to accomplish easily for the signal line 17b of pixel column simultaneously by this way.Can put on shift register circuit 61a among Fig. 6 and data ST1 and the ST2 of 61b finishes by control simply.For example, if when input ST1 output Vgl when low arrives signal line 17b to signal line 17b and when input ST1 exports Vgh when being high, the ST2 that then can put on shift register circuit 61b in the period of 1F/N was set to low and is set to height in the remaining period.Subsequently, can use the clock CLK2 that is synchronized with 1H to make the ST2 displacement of input.
By way of parenthesis, must make EL element 15 conductings and end with 0.5 millisecond or the longer time interval.The short time interval will cause the black demonstration of the deficiency that persistence of vision causes, cause fuzzy image and it is looked seeming that resolution has reduced.This represents that also data keep the show state that shows.Yet, being increased to 100 milliseconds and will causing flicker of the on/off time interval.Thereby the on/off time interval of EL element must not be shorter than 0.5 millisecond and no longer than 100 milliseconds.Preferably, the on/off time interval should be from 2 milliseconds to 30 milliseconds (comprising both).Also preferably, the on/off time interval should be from 3 milliseconds to 20 milliseconds (comprising both).
Also as mentioned above, unallocated blank screen 152 realizes that good film shows, but makes the flicker of screen more noticeable.Thereby what wanted is will deceive to insert to be divided into a plurality of parts.Yet too many division will cause that moving-picture is fuzzy.The quantity of dividing should from 1 to 8 (comprising both).Preferably, it should from 1 to 5 (comprising both).
By way of parenthesis, preferably the division numbers of blank screen can change between still picture and moving-picture.When N=4,75% is occupied and 25% is shown that by image (viewing area 53) occupies by blank screen (non-display area 52).When division numbers is 1, then vertically scan the band (non-display area 52) of the black demonstration of formation 75%.When division numbers is 3, scan three pieces, wherein each piece is made up of with the display screen that constitutes 25/3 number percent the blank screen that constitutes 25%.For still picture increases division numbers is that moving-picture reduces division numbers.Can or automatically or by the user manually finish switching according to input imagery (detection of moving-picture).Can finish switching according to input content (such as the video of display) for alternatively.
For example, using on the cell phone of still picture as wallpaper and entr screen, division numbers should be 10 or more (under extreme cases, can every 1H turn on and off demonstration).When with NTSC form show events picture, division numbers should from 1 to 5 (comprising both).Best, can in three or more step, switch division numbers; For example, 0,2,4,8,16 divide, or the like.Best, can change division numbers from 0 to half of the quantity of the scan line that shows.Best, can be according to the content of pictorial data to change division numbers in real time.Also might allow the user to wait and change division numbers with switch.Also might allow to change division numbers in real time according to the brightness of exterior light.
Best, be taken as at 1 o'clock at whole screen, the ratio of blank screen and entire display screen curtain should from 0.2 to 0.9 (according to N from 1.2 to 9), comprises both.Preferably, ratio should from 0.25 to 0.6 (according to N from 1.25 to 6), comprises both.If ratio is 0.20 or littler, then film shows that improvement is few.When ratio is 0.9 more for a long time, the display part brightens, and its vertical moving becomes and is easy to visually identify.
And best, the number of frames of per second from 10 to 100 (10Hz is to 100Hz) comprises both.Preferably, its from 12 to 65 (12Hz is to 65Hz) comprises both.When the quantity of frame hour, the flicker of screen becomes significantly, and too big number of frames makes and causes the deterioration of resolution from the difficulty of writing of source electrode exciting circuit 14 grades.
Under any circumstance, the present invention allows to change the brightness of image by control grid signal wire 17.Yet much less, the electric current (voltage) that puts on source signal line 18 by change can change visual brightness.Much less, can use above-mentioned two kinds of methods (Figure 33 and 35 etc.) in combination: the method for control grid signal wire 17 and change the method for the electric current (voltage) that puts on source signal line 18.
Much less, foregoing also is applied to the current programmed pixel arrangement of Figure 38 etc., also is applied to the pixel arrangement that Figure 43,51,54 etc. is used for voltage-programming.This can control by the on/off of terminal 11d among transistor 11d, Figure 43 among Figure 38 and the transistor 11e among Figure 51 and finish.This also can finish by the splicing ear that switches the switch 631 among Figure 63.Like this, carry electric current to give the line of EL element 15, can easily realize times pulse excitation according to N of the present invention by switching on and off.
And, (be not limited to 1F in can be during period of 1F.Any unit interval is all right) whenever signal line 17b is set to Vgl in the period of 1F/N.This be because by in the unit interval scheduled time slot in turn-off EL element 15 and obtain predetermined brightness.Yet signal line 17b preferably is set is Vgl and make EL element 15 luminous immediately afterwards in the current programming period (1H).This will reduce the influence of the retention performance of capacitor 19 among Fig. 1.
And preferably the quantity of configuration screen division is variable.For example, when the user presses brightness regulating switch or rotation brightness regulation knob, can responsively change division numbers K value.Can be for alternatively, can be manually or automatically change the K value according to the image that will show or data.
Like this, can easily realize changing the mechanism of K value (division numbers of image display portion 53).This can be adjustable or variable realizing by making time of changing ST (when ST is set when low during 1F) simply.
By way of parenthesis, stated that period (1F/N) that signal line 17b is set to Vgl is divided into period repetition K time that a plurality of parts (K part) and signal line 17b are set to the 1F/ (K/N) of Vgl although waited with reference to Figure 16, this is not restricted.Can make period of 1F/ (K/N) repeat (L ≠ K) L time.In other words, the present invention by Control current flow through EL element 15 period (time) come displayed image 50.Thereby (L ≠ K) inferior thought is included in the technological thought of the present invention to repeat 1F/ (K/N) period L.And, by changing the value of L, can digitally change the brightness of image 50.For example, between L=2 and L=3, there is 50% brightness to change.Control described herein also can be applicable to other example of the present invention (certainly, can be applicable to content described here after a while).These are also included within according in the N of the present invention times pulse excitation.
Above-mentioned example comprises that placement (formation) turns on and off screen 50 as the transistor 11d of the on-off element between EL element 15 and the driver transistor 11a and by oxide-semiconductor control transistors 11d.This motivational techniques are eliminated the shortage of the write current in the black display condition during current programmed, thereby and realize appropriate resolution or black the demonstration.That is to say, in current programmed, importantly realize suitable black demonstration.Then the motivational techniques of describing realize black the demonstration by replacement driver transistor 11a.This example will be described with reference to Figure 32 in the back.
Pixel arrangement among Figure 32 is identical with shown in Fig. 1 in fact.With the pixel arrangement of Figure 32, the Iw electric current of programming flows through EL element 15, makes EL element 15 luminous.By programming, driver transistor 11a keeps flowing through the ability of electric current.Excitation system shown in Figure 32 is used this ability that flows through electric current (shutoff) transistor 11a that resets.Hereinafter, this excitation system is called the excitation of resetting.
For using pixel arrangement shown in Figure 1 to realize the excitation of resetting, transistor 11b and 11c must be independently of one another and conducting or end.In particular, as illustrative among Figure 32, must control the signal line 11a (signal line WR) of the on/off control that is used for transistor 11b independently and be used for the signal line 11c (signal line EL) that the on/off of transistor 11c is controlled.Can use as illustration among Fig. 6 two independently shift register 61 control grid signal wire 11a and 11c.
Best, should between signal line WR and signal line EL, change driving voltage.The range value of signal line WR (difference between forward voltage and cut-off voltage) should be littler than the range value of signal line EL.In fact, the range value of signal line too senior general increases reach throught voltage between signal line and the pixel, causes not enough black level.Can control the amplitude of grid signal wire WR in the time of pixel 16 by controlling the current potential that does not apply (perhaps applying (during selecting)) source signal line 18.Because the variation of the current potential of source signal line 18 is little, therefore make the range value of signal line WR little.On the other hand, signal line EL is used for the on/off control of EL.Thereby it is big that its range value becomes.For this reason, between shift register circuit 61a and 61b, change output voltage.If pixel is made of p channel transistor, then use approximately equalised Vgh (cut-off voltage) for shift register circuit 61a and 62b, make the Vgl (forward voltage) of shift register circuit 61a be lower than the Vgl (forward voltage) of shift register circuit 61b simultaneously.
Below with reference to Figure 33 the excitation of resetting is described.Figure 33 is the figure of illustration replacement exiting principle.At first, as illustrative in Figure 33 (a), make transistor 11c and 11d by and make transistor 11b conducting.As a result, the drain electrode of driver transistor 11a (D) terminal and grid (G) short-circuit of terminals allow current Ib to flow through.Usually, with electric current transistor 11a is programmed in field formerly (frame), and can flow through electric current.In this state, when transistor 11d being ended and make transistor 11b conducting, exciting current Ib flows through the gate terminal of transistor 11a.Therefore, the grid of transistor 11a (G) terminal has identical current potential with drain electrode (D) terminal, reset transistor 11a (to the state that does not have electric current to flow).
The reset mode of transistor 11a (wherein not having electric current to flow) is equivalent at reference Figure 51 and waits the state that keeps offset voltage in the variation cancellation pattern of describing.That is to say, in the state of Figure 33 (a), between the terminal of capacitor 19, keep offset voltage.Offset voltage changes with the characteristic of transistor 11a.Thereby in Figure 33 (a), the state that transistor 11a does not flow through electric current remains in the capacitor 19 of each pixel (that is, transistor 11a flows through and approaches zero black demonstration electric current).
By way of parenthesis, in Figure 33 (a), before the operation, transistor 11b and 11c are ended, make transistor 11d conducting, and make electric current flow through driver transistor 11a.Best, should in the shortest time, finish this operation.Otherwise, can will flow through EL element 15 for electric current, make EL element 15 luminous, thereby and reduce to show contrast and worry.Best, the running time here comprises both from 0.1% to 10% of 1H (horizontal scanning period).Preferably, it from 0.2% to 2% or from 0.2 microsecond to 5 microseconds (comprising both).And, can once on all pixels 16 of screen, carry out this operation (operation that will carry out before the operation in Figure 33 (a)).This operation will reduce drain electrode (D) terminal voltage of driver transistor 11a, make current Ib is flow through in the state shown in Figure 33 (a) smoothly.By way of parenthesis, top content also is applied to according to other replacement excitation of the present invention.
Along with running time of Figure 33 (a) becomes long more, then certainly will flow through bigger Ib electric current, reduce the terminal voltage of capacitor 19.Thereby, fixing running time of Figure 33 (a).Illustrate with analysis by experiment, the running time in Figure 33 (a) preferably (comprises both) from 1H to 5H.Best, this period should change between R, G and B pixel.This be because the EL material change between the different color and on up voltage between different EL materials, change.Should be respectively R, G and B pixel and specify the period of the best that is suitable for the EL material.Should from 1H to 5H, (comprise both) although stated the period in this example, much less, relate generally under the situation of deceiving the excitation system of broadcasting (writing of blank screen) that the period can be 5H or longer.By way of parenthesis, the period is long more, and then the black display condition of pixel is good more.
After the state of Figure 33 (a), the state shown in Figure 33 (b) occurs in the period of (comprising both) to 5H at 1H.Figure 33 (b) illustrate transistor 11c and 11b be conducting and transistor 11d be the state that ends.This is to carry out current programmed state as previously described.In particular, export (or absorption) program current Iw and flow through driver transistor 11a from source electrode exciting circuit 14.The current potential that grid (G) terminal of driver transistor 11a is set makes program current Iw flow (keeping set current potential in capacitor 19).
If program current Iw is OA, then transistor 11a remains in the state that does not flow through electric current of Figure 33 (a), and therefore realizes suitable black demonstration.And, when the white demonstration that is used for Figure 33 (b) current programmed, change even exist in the characteristic of the driver transistor of pixel, also begin current programmed from the black fully offset voltage that shows.Thereby, reach target current value required time according to gray scale and become consistent.This has eliminated the gamma error that the variation because of the characteristic of transistor 11a causes, makes to realize that suitable image shows.
After the programming in Figure 33 (b), sequentially make transistor 11b and 11c by and transistor 11d conducting, with program current Iw (=Ie) flow to EL element 15 from driver transistor 11a, thereby and make EL element 15 luminous.Described in the content shown in Figure 33 (c), and thereby will omit its detailed description with reference to figure 1 grade.
The excitation system of describing with reference to Figure 33 (excitation of resetting) comprises first operation, this first operation disconnects driver transistor 11a and EL element 15 (therefore do not have electric current mobile) and makes between drain electrode (D) terminal and grid (G) terminal of driver transistor (perhaps between source electrode (S) terminal and grid (G) terminal, perhaps generally speaking, between two terminals that comprise excited crystal tube grid (G) terminal) short circuit; And after first operation, second of driver transistor programming is operated with electric current (voltage).At least after first operation, carry out second operation.By way of parenthesis, for the excitation of resetting, transistor 11b and 11c must be subjected to such control as shown in Figure 32 independently.
In visual display mode (if observing transient change), replacement will be with current programmed pixel column (black display mode), and 1H after with current programmed (also in deceiving display mode) because transistor 11d ends.Then, electric current is offered EL element 15 and pixel column with predetermined brightness (by the programming electric current) luminous.That is to say that the black pixel column that shows moves and it should look and seems that the position in that pixel column passes through rewrites image from screen head-to-foot.By way of parenthesis, although it is current programmed to have stated that after resetting 1H carries out, this period can be similar to 5H or shorter.This is because the replacement that will finish among Figure 33 (a) will be used the long relatively time.If this period is 5H, then will be by five pixel columns of black display (six pixel columns that comprise the pixel column that experience is current programmed).
And once the quantity of the pixel column of Chong Zhiing is not limited to one, two or more pixel columns of can once resetting.Also might reset and scan two or more pixel columns by some pixel columns in the overlaid pixel row.For example, four pixel columns if once reset, then replacement pixel column (1), (2), (3) and (4) in first horizontal scanning period (1 unit), in second horizontal scanning period, reset pixel column (3), (4), (5) and (6), and the pixel column (5) of in the 3rd horizontal scanning period, resetting, (6), (7) and (8), and the pixel column (7) of in the 4th horizontal scanning period, resetting, (8), (9) and (10).By way of parenthesis, the operation of the excitation among Figure 33 (b) and 33 (c) excitation operation certain and Figure 33 (a) is synchronously carried out.
Much less, can reset at the same time after all pixels in the screen or scan period carry out (b) of Figure 33 and (c) in excitation operate.And, much less can be in interlacing incentive mode (with the scanning of time interval of one or more pixel columns) replacement pixel column (with the time interval of one or more pixel columns).And, the pixel column of can resetting randomly.Comprise operation pixel column (that is the vertical direction of control screen) according to replacement excitation of the present invention.Yet, the thought of the excitation of resetting not controlling party to the direction that is limited to pixel column.For example, much less, can be in the excitation of resetting of the direction of pixel column.
Stated that Figure 32 illustrates the actuated pixel that is used to reset and disposes.Yet,, might reduce variation with current programmed pictorial data by controlling grid signal wire 17a and signal line 17c independently.Will be described below the motivational techniques that are used for such control.
At first, the description that why appearance changes in current programmed pictorial data in the pixel arrangement of Fig. 1 will be given in.With the pixel arrangement of Fig. 1, make transistor 11b and 11c conducting simultaneously and end by the voltage that puts on signal line 17a.Yet, in fact, may between transistor 11b and transistor 11c, have the trickle difference of characteristic, and may have transistor 11b and transistor the 11c not conducting simultaneously or the situation of ending.For example, if forward voltage and cut-off voltage adjoining land put on signal line 17a, then transistor 11b can turn-off after transistor 11c.
If transistor 11c ends and transistor 11b conducting, then illustrative state occurs among Figure 33 (a).That is to say that reset mode occurs.Therefore, current Ib flows, and makes capacitor 19 charge or discharge.The state of pixel 16 transistorized variable effect charge or discharge.If transistor 11b ends than transistor 11c is early, then capacitor 19 not charge or discharge.If transistor 11b ends than transistor 11c is late, then capacitor 19 charge or discharge.The error that occurs in the voltage that capacitor 19 keeps is relevant with the duration of charge or discharge.
For addressing this problem, after forward voltage, cut-off voltage is put on signal line 17a (by applying cut-off voltage, transistor 11b by), and forward voltage after, cut-off voltage put on signal line 17c (by applying cut-off voltage, transistor 11c ends) subsequently.That is to say, with electric current to pixel 16 programming after (during programming, forward voltage is put on signal line 17a and 17c, keep transistor 11b and 11c conducting), cut-off voltage is put on signal line 17a, and after the period, cut-off voltage is put on signal line 17c at preset time.By top operation, can finish suitable current programmedly, eliminate the state among Figure 33 (a).Identical among the operation of transistor 11d, control etc. and Fig. 1 etc., and thereby will the descriptions thereof are omitted.
By way of parenthesis, here the preset time period between 0.1 and 10 microseconds (comprising both).Can be for alternatively, it 1H 1/1000 and 1/10 between (comprising both).If this period is too short, then can not finish suitable electric current (voltage) programming, cause the sustaining voltage of capacitor 19 to change.If it is oversize, then reduce the duration of electric current (voltage) programming, cause not enough writing.The motivational techniques of on/off sequential that control voltage keeps the on/off sequential of transistor 11b and electric current (voltage) write the transistor 11c of driver transistor 11a are called the motivational techniques of time control.
The method of time control is not limited to the pixel arrangement among Figure 32, but also can be applicable to the pixel arrangement of Figure 38 etc.In Figure 32, transistor 11d is that voltage keeps transistor.Transistor 11c writes transistor among the driver transistor 11a with electric current (voltage).Transistor 11d can carry out on/off control by forward voltage and the cut-off voltage that puts on signal line 17a2.Transistor 11c can carry out on/off control by forward voltage and the cut-off voltage that puts on signal line 17a1.With electric current to pixel 16 programming after (during programming, forward voltage is put on signal line 17a1 and 17a2, keep transistor 11b and 11c conducting), cut-off voltage is put on signal line 17a2, and after the period, cut-off voltage is put on signal line 17a1 at preset time.By top operation, can finish suitable electric current (voltage) programming.Identical among the operation of transistor 11e, control etc. and Fig. 1 etc., and thereby will the descriptions thereof are omitted.
By way of parenthesis, if the motivational techniques of the control of the time among the replacement excitation among Figure 33 and Figure 32 can realize then that in conjunction with according to N of the present invention times pulse excitation or interlacing excitation better image shows.Specifically, configuration among Figure 22 can easily realize N/K times of pulse excitation (this motivational techniques provide two or more luminous zones and can easily make transistor 11d conducting by control grid signal wire 17b and by realizing in screen: this formerly described) intermittently, and thereby can realize that the suitable image of flicker free shows.This is the configuration among Figure 22 or the outstanding feature of its modification.
Much less, can finish more outstanding image by the motivational techniques of describing after a while in conjunction with reverse bias motivational techniques, precharge motivational techniques, reach throught voltage motivational techniques etc. shows.Thereby, much less, can be in conjunction with the excitation of resetting according to other example of the present invention.The content that relates to the combination of excitation system also is applied to other example of the present invention.
Figure 34 is a block scheme of realizing the display of replacement excitation.Grid pumping circuit 12a control grid signal wire 17a and signal line 17b in Figure 32.By on/off voltage being put on signal line 17a, make transistor 11b conducting and end.And, by on/off voltage being put on signal line 17b, make transistor 11d conducting and end.Grid pumping circuit 12b control grid signal wire 17c in Figure 32.By on/off voltage being put on signal line 17c, make transistor 11c conducting and end.
Thereby, signal line 17a be by grid pumping circuit 12a control and signal line 17c is controlled by grid pumping circuit 12b.This makes optionally to specify and makes transistor 11b conducting and time of the driver transistor 11a that resets and make transistor 11c conducting and with the time of electric current to driver transistor 11a programming.Those that describe among the other parts of configuration and Fig. 6 etc. are same or similar, and thereby with the descriptions thereof are omitted.By way of parenthesis, use the polysilicon technology to form grid pumping circuit 12.And, much less, grid pumping circuit 12a and 12b can be integrated in the single unit.
Figure 35 is the sequential chart of resetting and encouraging.Forward voltage is being put on signal line 17a so that in the transistor 11b conducting and the driver transistor 11a that resets, cut-off voltage is put on signal line 17b end to keep transistor 11d.This creates the state shown in Figure 32 (a).Current Ib flows during the section at this moment.
For example, see pixel column (1), in 1H, cut-off voltage is put on signal line 17c, forward voltage is put on signal line 17a, and cut-off voltage is put on signal line 17b.Therefore, in 1H, pixel column (1) is in the reset mode, and wherein transistor 11d ends and do not have electric current to flow through EL element 15.
In 2H, forward voltage is put on signal line 17c, forward voltage is put on signal line 17a, and cut-off voltage is put on signal line 17b.Therefore, in 2H, pixel column (1) is in the current programmed pattern, and wherein transistor 11d ends and do not have electric current to flow through EL element 15.
In 3H, cut-off voltage is put on signal line 17c, cut-off voltage is put on signal line 17a, and forward voltage is put on signal line 17b.Therefore, in 3H, pixel column (1) is in the visual display mode, and wherein transistor 11d conducting and electric current flow through EL element 15.
Thereby, replacement capacitor 19 in 1H (horizontal scanning period).Therefore, the gate terminal G of transistor 11a has the voltage that approaches anode voltage Vdd.Therefore, transistor 11a is by (reset mode).Because replacement capacitor 19 once with to current programmed, therefore might be realized the exact current programming.In replacement capacitor 19, pixel is in (even transistor 11d conducting) in the non-display mode.This state approaches to insert the state of blank screen.Thereby, reach certain period or longer by continuing Reset Status, might eliminate fuzzy moving-picture.
Although in the sequential chart shown in Figure 35, the replacement time is 2H (when forward voltage being put on signal line 17a and transistor 11b conducting), and this is not restrictive.Yet (, except that 2H, 1H is the programming period.) the replacement time can be 2H or longer.If can reset very fast, then the time of resetting can be less than 1H.
Can easily use DATA (ST) the pulse period that is input to grid pumping circuit 12 to change the duration of reset stage.For example, if the DATA that imports in the ST terminal in the period of 2H is set to height, then the reset stage for every signal line 17a output is 2H.Equally, if the DATA that imports in the ST terminal in the period of 5H is set to height, then the reset stage for every signal line 17a output is 5H.
After the reset stage of 1H, forward voltage is put on the signal line 17c (1) of pixel column (1).When transistor 11c conducting, the program current Iw that puts on source signal line 18 is write among the driver transistor 11a by transistor 11c.
After current programmed, cut-off voltage is put on the signal line 17c of pixel column (1), transistor 11c ends, and pixel and source signal line disconnect.Simultaneously, also cut-off voltage is put on signal line 17a and driver transistor 11a and withdraw from reset mode (by way of parenthesis, using term " current programmed pattern " to be more suitable in referring to this period) than term " reset mode ".On the other hand, forward voltage is put on signal line 17b, transistor 11d conducting, and the electric current that is programmed into driver transistor 11a flows through EL element 15.Put on pixel column (2) and follow-up pixel column equally about the said content of pixel column (1).And their operation sees it is tangible from Figure 35.Thereby the description of (2) and later pixel row will be omitted.
In Figure 35, reset stage has been 1H.Figure 36 illustrates the example that reset stage is 5H.Can easily use DATA (ST) the pulse period that is input to grid pumping circuit 12 to change the duration of reset stage.Figure 36 be illustrated in the DATA that imports in the ST1 terminal of period inner grid exciting circuit 12a of 5H be set to height and for the reset stage of every signal line 17a output be the example of 5H.Reset stage is long more, and it is more thorough then to reset, and causes suitable black demonstration.And, can reduce fuzzy moving-picture.Among Figure 36 other operation wait with Figure 35 in identical, and thereby the general the descriptions thereof are omitted.
Display brightness reduces pro rata with the length of reset stage.Yet,, might prevent that screen intensity from descending by as under the situation of N times of pulse excitation, using the doubly big program current of N of predetermined value.Thereby the excitation of resetting is an embodiment of N times of pulse excitation.
In Figure 36, reset stage has been 5H.In addition, reset mode is continuous.Yet reset mode need not be continuous.For example, every 1H can switch on and off from the signal of every signal line 17a output.Such on/off operation can easily be finished by enable circuits (not shown) that forms in the output stage that operates in shift register or DATA (ST) pulse that is controlled at input in the grid pumping circuit 12.
In the circuit arrangement shown in Figure 34, grid pumping circuit 12a needs at least two shift register circuits (is used for signal line 17a, and another is used for signal line 17b).This proposes the problem of the circuit scale of increase grid pumping circuit 12a.Figure 37 illustrates an example, and wherein grid pumping circuit 12a has only a shift register.The sequential chart of the output signal that the operation of the circuit from Figure 37 shown in Figure 35 produces.Noting, is to be represented by the distinct symbols in Figure 35 and 37 from the signal line 17 of grid pumping circuit 12a and 12b.
As can from increased the OR Figure 37 (or) fact of circuit 371 sees, logically the output from every signal line 17a is added to output from the prime of shift register circuit 61a, and forward voltage or cut-off voltage is outputed to signal line 17a according to this result.
By way of parenthesis, suppose the pixel arrangement in Figure 32 here for convenience of explanation, and supposition from OR (or) when circuit 371 is output as height (positive logic) forward voltage outputed to signal line 17a.
In Figure 37, signal line 17a exports forward voltage in the period of 2H.On the other hand, signal line 17c exports the output of shift register circuit 61a same as before.Thereby, in the period of 1H, apply forward voltage.
For example, if shift register circuit 61a exports high level signal the second, then forward voltage is outputed to the signal line 17c of pixel 16 (1), it is in the state of using electric current (voltage) programming now.Simultaneously, also forward voltage is outputed to the signal line 17a of pixel 16 (2), make the transistor 11b conducting of pixel 16 (2), and the driver transistor 11a of replacement pixel 16 (2).
Equally, if shift register circuit 61a exports high level signal the 3rd, then forward voltage is outputed to the signal line 17c of pixel 16 (2), it is in the state of using electric current (voltage) programming now.Simultaneously, also forward voltage is outputed to the signal line 17a of pixel 16 (3), the transistor 11b conducting of pixel 16 (3), and replacement pixel 16 (3) driver transistor 11a.Thereby signal line 17a exports forward voltage in 2H, and signal line 17c receives forward voltage in the period of 1H.
In programming mode because transistor 11b and 11c conducting (Figure 33 (b)) simultaneously, if therefore during transferring to non-programming mode (Figure 33 (c)) transistor 11c before transistor 11b, end, then the reset mode among Figure 33 (b) takes place.For preventing this situation, must transistor 11c be ended.For this reason, need be before signal line 17c forward voltage be put on signal line 17a.
Top example relates to the pixel arrangement of (in fact, among Fig. 1) among Figure 32.Yet, the invention is not restricted to this.For example, also can be applicable to the current mirror pixel arrangement, the configuration shown in Figure 38.By way of parenthesis, in Figure 38,, can be implemented in illustrative N times pulse excitation among Figure 13,15 etc. by making transistor 11e conducting and ending.Figure 39 is a key diagram, and illustration is used the example of current mirror pixel arrangement among Figure 38.The replacement of describing in the current mirror pixel arrangement below with reference to Figure 39 encourages.
As shown in Figure 39 (a), transistor 11c and 11e end, and transistor 11d conducting.Then, drain electrode (D) terminal of current programmed transistor 11a and grid (G) short-circuit of terminals and current Ib flow through between them, as shown in the figure.Usually, with in the electric current field (frame) formerly to transistor 11b programming, and it can flow through electric current, and (this is certain, because keep grid potential to reach period and the displayed image of 1F in capacitor 19.Yet electric current does not flow during black fully demonstration).In this state, when transistor 11e by and during transistor 11d conducting, exciting current Ib flows through grid (G) terminal (grid (G) terminal and drain electrode (D) short-circuit of terminals) of transistor 11a.
Therefore, the grid of transistor 11a (G) terminal has identical current potential with drain electrode (D) terminal, reset transistor 11a (to the state that does not have electric current to flow).Because driver transistor 11b and current programmed shared common grid (G) terminal of transistor 11a, driver transistor 11b therefore also resets.
The reset mode of transistor 11a and 11b (wherein not having electric current to flow) is equivalent to the state that keeps offset voltage in the variation cancellation pattern of descriptions such as reference Figure 51.That is to say, in the state of Figure 39 (a), between the terminal of capacitor 19, keep offset voltage (offset voltage is the starting potential of electric current when beginning to flow: when applying the voltage that is equal to, or greater than starting potential, electric current flows through transistor 11).Offset voltage changes along with the characteristic of transistor 11a and 11b.Thereby, in Figure 39 (a), keep transistor 11a and 11b not to flow through the state ( transistor 11a and 11b flow through and approach zero black demonstration electric current,, they have been reset to the starting potential of electric current when beginning to flow that is) of electric current in the capacitor 19 of each pixel.
In Figure 39 (a), when reset stage becomes longer, certainly will there be bigger Ib electric current to flow, reduce the terminal voltage of capacitor 19, as in the situation of Figure 33 (a).Thereby the running time among Figure 39 (a) should be fixed.Illustrate with analysis by experiment, preferably the running time (10 horizontal scanning periods) from 1H to 10H among Figure 39 (a), comprise both.Preferably, it should be from 1H to 5H or from 20 microseconds to 2 millisecond (comprising both).This also is applied to the excitation system in Figure 33 and 34.
As in the situation of Figure 33 (a), if the reset mode among Figure 39 (a) is synchronized with the current programmed pattern among Figure 39 (b), then no problem because the period of current programmed pattern in Figure 39 (b) of the reset mode from Figure 39 (a) be (constant) fixed.That is to say that preferably the period of current programmed pattern in Figure 33 (b) or Figure 39 (b) of the reset mode from Figure 33 (a) or Figure 39 (a) should comprise both from 1H to 10H (10 horizontal scanning periods).Preferably, it should be from 1H to 5H or from 20 microseconds to 2 millisecond (comprising both).If this period is too short, driver transistor 11a does not fully then reset.If it is oversize, then driver transistor 11 ends fully, this means the current programmed more time that needs.And, reduced the brightness of screen 50.If carry out the black insertion shown in Figure 13 (produce non-display area 52) then this must not be genuine, because use black insert (non-display area 52) for N times of pulse excitation.
After the state of Figure 39 (a), the state shown in Figure 39 (b) takes place.Figure 39 (b) illustrates the state that transistor 11c and 11d conducting and transistor 11e end.This is to carry out current programmed state.In particular, export (absorption) program current Iw and flow through current programmed transistor 11a from source electrode exciting circuit 14.The current potential of grid (G) terminal of driver transistor 11a is set in capacitor 19, makes program current Iw to flow.
If program current Iw is OA (black show), then transistor 11b remains on that it does not flow through in the state of electric current among Figure 39 (a), and thereby realizes suitable black demonstration.And, when the white demonstration that is used for Figure 39 (b) is current programmed, current programmed is to begin from the black fully offset voltage that shows, even there be and change (offset voltage is the starting potential of the electric current according to the characteristic appointment of each driver transistor when beginning to flow) in the characteristic of the driver transistor in the pixel.Thereby, reach the needed time of target current value according to gray scale and identify.This eliminates the gamma error that the variation because of the characteristic of transistor 11a or 11b causes, makes that might finish suitable image shows.
After current programmed in Figure 39 (b), transistor 11c and 11d sequentially by and transistor 11e conducting, with program current Iw (=Ie) flow to EL element 15 from driver transistor 11b, thereby and make EL element 15 luminous.Content shown in Figure 39 (c) was described, and thereby will omit its detailed description.
Comprise first operation with reference to Figure 33 and 39 excitation systems of describing (excitation of resetting), this first operation driver transistor 11a or 11b are disconnected (use transistor 11e or 11d therefore do not have electric current mobile) with EL element 15 and between drain electrode (D) terminal and grid (G) terminal of driver transistor (perhaps between source electrode (S) terminal and grid (G) terminal, perhaps generally speaking, between two terminals that comprise the grid of driver transistor (G) terminal) short circuit; With second operation of after first operation, driver transistor being programmed with electric current (voltage).At least after first operation, carry out second operation.
By way of parenthesis, not the sin qua non with the operation of driver transistor 11a and 11b and EL element 15 disconnections in first operation.The short circuit in first operation of the drain electrode of driver transistor (D) terminal and grid (G) terminal need not driver transistor 11a or 11b and EL element 15 disconnections can be caused some variation in reset mode.Should determine whether to omit disconnection by considering the characteristics of transistor in the array of structure.
Current mirror pixel arrangement among Figure 39 provides a kind of motivational techniques, the transistor 11a of its reset current programming, and the driver transistor 11b that therefore resets.
With the current mirror pixel arrangement of Figure 39, in reset mode, always driver transistor 11b and EL element 15 must do not disconnected.Thereby, carry out following operation: first operation, this first operation makes between drain electrode (D) terminal and grid (G) terminal of current programmed transistor a (perhaps between source electrode (S) terminal and grid (G) terminal, perhaps generally speaking, between two terminals that comprise current programmed transistorized grid (G) terminal or comprising between two terminals of grid (G) terminal of driver transistor) short circuit, and after first operation, second of current programmed transistor programming is operated with electric current (voltage).At least after first operation, carry out second operation.
In visual display mode (if can observe transient change), replacement will be with current programmed pixel column (black display mode), and after predetermined H with current programmed.The black pixel column that shows moves and it should look and seems that the position in that pixel column passes through rewrites image from screen head-to-foot.
Although mainly described top example, also can be applied to be used for the pixel arrangement of voltage-programming according to replacement excitation of the present invention with respect to being used for current programmed pixel arrangement.Figure 43 is a key diagram, and illustration is according to pixel arrangement of the present invention (panel configuration), is used in the pixel arrangement that the is used for voltage-programming excitation of resetting.
In configuration shown in Figure 43, formed the transistor 11e of replacement driver transistor 11a.When forward voltage being put on signal line 17e, transistor 11e conducting causes grid (G) terminal of driver transistor 11a and the short circuit between drain electrode (D) terminal.But also formed the transistor 11d that cuts off current path between EL element 15 and the driver transistor 11a.The pixel arrangement (Figure 43 illustrates the pixel arrangement that is used for voltage-programming) that is used for voltage-programming according to the present invention is described below with reference to Figure 44.
As illustrative in Figure 44 (a), transistor 11b ends and 11d and transistor 11e conducting.The drain electrode of driver transistor 11a (D) terminal and grid (G) short-circuit of terminals and current Ib flow, as shown in FIG..Therefore, the grid of transistor 11a (G) terminal has identical current potential with drain electrode (D) terminal, reset transistor 11a (to the state that does not have electric current to flow).Before reset transistor 11a, transistor 11d conducting, transistor 11e ends, and is synchronized with the HD synchronizing signals of describing as reference Figure 33 or 39 and electric current flows through transistor 11a.Carry out the operation shown in Figure 44 (a) then.Being synchronized with the HD signal resets and is not strict necessary.
The reset mode of transistor 11a and 11b (wherein not having electric current to flow) is equivalent to the state that keeps offset voltage in the variation cancellation pattern of descriptions such as reference Figure 41.That is to say, in the state of Figure 44 (a), between the terminal of capacitor 19, keep offset voltage (reset voltage).This reset voltage changes with the characteristic of driver transistor 11a.Thereby, in Figure 44 (a), the state that driver transistor 11a and 11b do not flow through electric current remains in the capacitor 19 of each pixel ( transistor 11a and 11b flow through and approach zero black demonstration electric current, that is, the starting potential when they being reset to electric current and beginning to flow).
By way of parenthesis,, when reset stage becomes longer, certainly will there be bigger Ib electric current to flow, reduces the terminal voltage of capacitor 19, as in the situation that is used for current programmed pixel arrangement being used for the pixel arrangement of voltage-programming.Thereby the running time among Figure 44 (a) should be fixed.Best, the running time should comprise both from 0.2H to 5H (five horizontal scanning periods).Preferably, it should be from 0.5H to 4H or from 2 microseconds to 400 microseconds (comprising both).
In addition, preferably signal line 17e should share with the signal line 17a in the prime.That is to say, signal line 17e should with the signal line 17a short circuit of pixel column in the prime.This configuration is called prime grid control system.By way of parenthesis, level-level grid control system is used the waveform of the signal line of the pixel column that one or more H select before the pixels of interest row.Thereby this system is not limited to previous pixel column.For example, can use the reset driver transistor 11a of pixels of interest row of the waveform of the signal line of two pixel columns the preceding.
To more specifically descriptive level-level grid control system.Suppose that the pixels of interest row is that its signal line is (N) pixel column of 17e (N) and 17a (N).Previous pixel column supposition in 1H selection before is that its signal line is (N-1) pixel column of 17e (N-1) and 17a (N-1).The pixel column supposition that 1H selects after the pixels of interest row is that its signal line is (N+1) pixel column of 17e (N+1) and 17a (N+1).
In period, when forward voltage is put on the signal line 17a (N-1) of (N-1) pixel column, also forward voltage is put on the signal line 17e (N) of (N) pixel column at (N-1) H.This is because the signal line 17a (N-1) of the pixel column in signal line 17e (N) and the prime is short circuit.Therefore, pixel transistor 11b (N-1) conducting in (N-1) pixel column, and the voltage that will put on source signal line 18 is write in grid (G) terminal of driver transistor 11a (N-1).Simultaneously, pixel transistor 11e (N) conducting in (N) pixel column, grid (G) terminal of driver transistor 11a (N) and drain electrode (D) short-circuit of terminals, and replacement driver transistor 11a (N).
In period, when forward voltage is put on the signal line 17a (N) of (N) pixel column, also forward voltage is put on the signal line 17e (N+1) of (N+1) pixel column at (N) H that follows (N-1) H period.Therefore, pixel transistor 11b (N) conducting in (N) pixel column, and the voltage that will put on source signal line 18 is write in grid (G) terminal of driver transistor 11a (N).Simultaneously, pixel transistor 11e (N+1) conducting of (N+1) pixel column, grid (G) terminal of driver transistor 11a (N+1) and drain electrode (D) short-circuit of terminals, and replacement driver transistor 11a (N+1).
Equally, in the period, when forward voltage is put on the signal line 17a (N+1) of (N+1) pixel column, also forward voltage is put on the signal line 17e (N+2) of (N+2) pixel column at (N+1) that follow (N) H period.Therefore, pixel transistor 11b (N+1) conducting in (N+1) pixel column, and the voltage that will put on source signal line 18 is write grid (G) terminal of driver transistor 11a (N+1).Simultaneously, pixel transistor 11e (N+2) conducting in (N+2) pixel column, grid (G) terminal of driver transistor 11a (N+2) and drain electrode (D) short-circuit of terminals, and replacement driver transistor 11a (N+2).
According to the level-level grid control system of the invention described above, replacement driver transistor 11a in the period of 1H, and carry out voltage (electric current) programming subsequently.
As in the situation of Figure 33 (a), if the reset mode among Figure 44 (a) is synchronized with the voltage-programming pattern among Figure 44 (b), then no problem because the period of the current programmed pattern of the reset mode from Figure 44 (a) in Figure 44 (b) be (constant) fixed.If this period is short, the driver transistor 11 of then not resetting fully.If it is oversize, then driver transistor 11 ends fully, and this means current programmedly needs the more time.And, reduce the brightness of screen 50.
In the state of Figure 44 (a), state shown in Figure 44 (b) takes place.Figure 44 (b) illustrates the state that transistor 11b conducting and transistor 11e and 11d end.This state among Figure 44 (b) is the state that is carrying out voltage-programming.In particular, write grid (G) terminal of driver transistor 11a (current potential of grid (G) terminal of driver transistor 11a is set in capacitor 19) from source electrode exciting circuit 14 output program voltages and with it.By way of parenthesis, in the situation of voltage-programming, transistor 11d is ended.In addition, if needn't in conjunction with the N shown in Figure 13,15 etc. doubly encourage or carry out N/K times of pulse excitation intermittently (this motivational techniques in screen, provide two or more luminous zones and can be easily by making transistor 11e conducting and ending and realize), then transistor 11e is dispensable.Owing to formerly described this, therefore with the descriptions thereof are omitted.
When using configuration shown in Figure 43 or the motivational techniques shown in Figure 44 to be used for the voltage-programming of white demonstration, even the characteristic of the driver transistor in the pixel exist to change, also begin voltage-programming (offset voltage is the starting potential of the electric current according to the characteristic appointment of each driver transistor when beginning to flow) from the black fully offset voltage that shows.Thereby, according to gray scale, reach the needed time of target current value to identify.This eliminates the gamma error that the variation because of the characteristic of transistor 11a causes, makes and might realize that suitable image shows.
After the voltage-programming of Figure 44 (b), transistor 11d by and transistor 11d conducting so that program current is transported to EL element 15 from driver transistor 11a, thereby and make EL element 15 luminous, as shown in Figure 44 (c).
As mentioned above, use the replacement excitation of the voltage-programming shown in Figure 43 to form by first operation, second operation and the 3rd operation according to the present invention, first operation makes transistor 11d conducting, and transistor 11e ends, and is synchronized with the HD synchronizing signal and makes electric current flow through transistor 11a; Second operation is with 15 disconnections of transistor 11a and EL element and make between drain electrode (D) terminal and grid (G) terminal of driver transistor 11a (or between source electrode (S) terminal and grid (G) terminal, perhaps generally speaking, between two terminals of grid (G) terminal of driver transistor) short circuit; And with voltage driver transistor 11a is programmed after the superincumbent operation of the 3rd operation.
In the above example, make transistor 11d conducting and by being transported to EL element 15 from driver transistor 11a (the situation of configuration shown in Figure 1) with Control current.For making transistor 11d conducting and ending, must scan grid signal wire 17b, need shift register circuit 61 (grid pumping circuit 12) for this reason.Yet shift register circuit 61 is very big dimensionally and be that signal line 17b uses shift register circuit 61 to make can not to reduce the instrument bezel width.The system of describing with reference to Figure 40 addresses this problem.
By way of parenthesis, although describe mainly as example at this in the pixel arrangement that illustrations such as Fig. 1 are current programmed, but the invention is not restricted to this, and much less, the present invention also can be applied to wait with reference to Figure 38 other configuration of current programmed (the current mirror pixel arrangement) described.
And, make element conductive and the technological thought that ends also can be applied to the pixel arrangement that is used for voltage-programming among Figure 41 etc. as piece.According to the present invention,, therefore can use it in conjunction with the method that applies anti-bias voltage (describing) with reference to Figure 50 because this method makes electric current flow through EL element 15 off and on.Thereby, can finish the present invention in conjunction with other example.
Figure 40 illustrates the example of piece excitation system.For the ease of understanding, suppose directly to form grid pumping circuit 12 that perhaps silicon chip, grid excitation IC 12 are installed on the array base plate 71 at array base plate 71.Omit source electrode exciting circuit 14 and source signal line 18, to avoid that this figure is complicated.
In Figure 40, signal line 17a is connected to grid pumping circuit 12.On the other hand, signal line 17b is connected to light emitting control line 401.In Figure 40, four signal line 17b are connected to a light emitting control line 401.
By way of parenthesis, although four signal line 17b are grouped into a piece here, this is not restrictive, and much less, can form a piece with surpassing four signal line 17b.Usually, preferably viewing area 50 is divided into five or a plurality of part.Preferably, screen 50 should be divided into ten or more parts.Also preferably, screen 50 should be divided into 20 or more part.The division of smallest number will make flicker significantly.The division of too big quantity will increase the quantity of light emitting control line 401, make to be difficult to carry out the wiring of light emitting control line 401.Thereby, in the situation of QCIF display panel with 220 vertical scan lines, should be with 220/5=44 bar or more line are grouped into a piece at least.Preferably, 220/10=22 or more line should be grouped into a piece.Yet if odd-numbered line and even number line are grouped in two different pieces, even also do not have too many flicker when hanging down frame rate, thereby two pieces are just enough.
In example shown in Figure 40, on a basis by or forward voltage (Vgl) or cut-off voltage (Vgh) sequentially put on light emitting control line 401a, 401b, 401c, 401d, ..., 401n switches on and off the electric current that flows through EL element 15.
By way of parenthesis, in the example of Figure 40, signal line 17b does not intersect with light emitting control line 401.Thereby, can there be signal line 17b to become defective with 401 short circuits of light emitting control line.And owing to do not have capacitive coupling between signal line 17b and light emitting control line 401, therefore capacitive load is very little from light emitting control line 401 signal line 17b the time.This makes and is easy to excitation luminescence control line 401.
Best, put on the forward voltage/cut-off voltage of light emitting control line 401 and select the control timing of voltage (Vgl) to be synchronized with a horizontal scanning clock (1H) by the pixel column that grid pumping circuit 12 outputs to signal line 17a.Yet this is not restrictive.
The signal that puts on light emitting control line 401 switches on and off the electric current that is transported to EL element 15 simply.They needn't be with synchronous from the pictorial data of source electrode exciting circuit 14 outputs.This be because put on the signal of light emitting control line 401 certainly will control programming electric current in the capacitor 19 of pixel 16.Thereby, always must not make they and pixel column select signal Synchronization.Even synchronously they the time, clock is not limited to the 1H signal, can be 1/2H or 1/4H signal.
Even in the situation of current mirror pixel arrangement shown in Figure 38,, then can make transistor 11e conducting and end if signal line 17b is connected to light emitting control line 401.Thereby, can realize the piece excitation.
By way of parenthesis, in Figure 32,, might realize the piece excitation by signal line 17a being connected to light emitting control line 401 and resetting.In other words, be a kind of motivational techniques according to of the present invention excitation, it uses a control line simultaneously a plurality of pixel columns to be placed non-luminous (the black demonstration) pattern.
In the above example, each pixel column is placed (formation) one and is selected the signal line.The invention is not restricted to this, and can be a selection of two or more pixel columns placements (formation) signal line.
Figure 41 illustrates such example.By way of parenthesis, for convenience of explanation, mainly use the pixel arrangement among Fig. 1.In Figure 41, the signal line 17a that is used for the pixel column selection selects three pixels (16R, 16G and 16B) simultaneously.Reference character R wants expression relevant with red pixel, and reference character G represents relevant with green pixel, and that reference character B represents is relevant with blue pixel.
Thereby, when selecting signal line 17a, select pixel 16R, 16G and 16B and be ready to write data.Pixel 16R writes capacitor 19R with data by source signal line 18R, and pixel 16G writes capacitor 19G with data by source signal line 18G, and pixel 16B writes capacitor 19B with data by source signal line 18B.
The transistor 11d of pixel 16R is connected to signal line 17bR, and the transistor 11d of pixel 16G is connected to signal line 17bG, and the transistor 11d of pixel 16B is connected to signal line 17bB.Thereby, can make the EL element 15R of pixel 16R respectively, the EL element 15B conducting of the EL element 15G of pixel 16G and pixel 16B and ending.Can control fluorescent lifetime and the luminous period of EL element 15R, EL element 15G and EL element 15B by control grid signal wire 17bR, signal line 17bG and signal line 17bB respectively.
For realizing this operation, in the configuration of Fig. 6, suitably form (placement) four shift register circuits: the shift register circuit 61 of scanning grid signal wire 17a, the shift register circuit 61 of scanning grid signal wire 17bR, the shift register circuit 61 of scanning grid signal wire 17bG, and the shift register circuit 61 of scanning grid signal wire 17bB.
By way of parenthesis, although stated and flow through source signal line 18 and flow through EL element 15 for the doubly big electric current of scheduled current N in the time of 1/N for the doubly big electric current of scheduled current N, this can not realize actually.In fact, the signal pulse that puts on signal line 17 is penetrated in the capacitor 19, makes the magnitude of voltage of being wanted (current value) can not be set on capacitor 19.Usually, on capacitor 19, be provided with than the low magnitude of voltage of the magnitude of voltage of being wanted (current value).For example, even 10 times of big current values will be set, about 5 times of big current values only are set on capacitor 19 also.For example, even specify N=10, in fact have only the doubly big electric current of N=5 to flow through EL element 15.Thereby this method is provided with the doubly big current value of N so that doubly be worth proportional with N by EL element 15 or flow through corresponding to its electric current.Can be for alternatively, this motivational techniques will put on EL element 15 in the mode of chopping than the big electric current of the value of being wanted.
This method carries out electric current (voltage) programming so that the emission brightness by making the electric current bigger than the value of being wanted flow through driver transistor 11a (in the situation of Fig. 1) off and on to obtain the EL element wanted (that is, if flow through EL element 15 continuously then will provide the electric current of the brightness higher than the brightness of being wanted).
By way of parenthesis, in source electrode exciting circuit 14, install and use the compensating circuit that penetrates of capacitor 19.This will describe after a while.
Best, use the N channel transistor as switching transistor 11b among Fig. 1 etc. and 11c etc.This will reduce the reach throught voltage that arrives capacitor 19.And owing to reduced ending-leaking of capacitor 19, therefore this method can be applied to 10Hz or lower frame rate.
Depend on pixel arrangement, if reach throught voltage tends to increase the electric current that flows through EL element 15, then white honeybee threshold voltage will increase, and increase the contrast of feeling in image shows.This provides good image to show.
On the contrary, use p channel transistor to penetrate to cause as switching transistor 11b among Fig. 1 and 11c, thereby and obtain suitable black demonstration, this also is useful.When p channel transistor 11b by the time, voltage uprises (Vgh), and the terminal voltage of capacitor 19 is moved to the Vdd side a little.Therefore, the voltage of the grid of transistor 11a (G) terminal rises, and causes stronger black demonstration.And, can increase and be used for the electric current (can transmit certain fundamental current, till gray scale 1) that first gray scale shows, thereby the shortage that can alleviate write current during current programmed.
In addition, to increase reach throught voltage be useful (seeing Figure 42 (a)) by form capacitor 19b wittingly between the signal line 17a of transistor 11a and grid (G) terminal.Best, the electric capacity of capacitor 19b is between 1/50 and 1/10 (comprising both) of the electric capacity of normal capacitor 19a.Preferably, it is between 1/40 and 1/15 (comprising both).Can supply alternatively, it should be source electrode-grid (or source electrode-drain electrode (SD) or gate-to-drain (GD)) electric capacity of the transistor 11b of from 1 to 10 times (comprising both).Preferably, it is the SG electric capacity of from 2 to 6 times (comprising both).By way of parenthesis, can between source electrode (S) terminal of the terminal (grid of transistor 11a (G) terminal) of capacitor 19a and transistor 11d, form or place capacitor 19b.In the sort of situation, electric capacity etc. have and above-mentioned those identical values.
If Cb (pF) expression reach throught voltage produces the electric capacity of capacitor 19b, if the electric capacity of Ca (pF) expression capacitor 19a, if Vw (V) is illustrated in grid (G) terminal voltage of transistor 11a in white peak value electric current when maximum display brightness (during the white raster shows) situation, and establish Vb (V) and be illustrated in the black situation that shows electric current grid (G) terminal voltage (in fact when electric current is 0, promptly, during black the demonstration), preferably satisfy following relationship.
Ca/(200Cb)≤|Vw-Vb|≤Ca/(8Cb)
By way of parenthesis, | Vw-Vb| is the absolute value (being variable voltage range) of the difference of white demonstration and the terminal voltage of deceiving the driver transistor between showing.
Preferably, satisfy following relationship.
Ca/(100Cb)≤|Vw-Vb|≤Ca/(10Cb)
By way of parenthesis, top content not only can be applicable to the pixel arrangement among Fig. 1, and can be applicable to other pixel arrangement.For example, in the current mirror pixel arrangement of Figure 42 (b), between grid (G) terminal of the signal line 17a of transistor 11a or 17b and transistor 11a, form or place reach throught voltage and produce capacitor.Switching transistor 11c should be the n channel transistor and should have two or more grids.Can supply alternatively, switching transistor 11c and 11d should be the p channel transistors and should have three or more grid.
In the pixel arrangement of the voltage-programming of Figure 41, between the signal line 17c of driver transistor 11a and grid (G) terminal, form or place reach throught voltage and produce capacitor 19c.Switching transistor 11c should have three or more grid.Can between drain electrode (D) terminal (in the side of capacitor 19b) of transistor 11c and signal line 17a, form or place reach throught voltage and produce capacitor 19c.And, can be at grid (G) terminal and formation between the signal line 17a or the placement reach throught voltage generation capacitor 19c of transistor 11a.Can between drain electrode (D) terminal (in the side of capacitor 19b) of transistor 11c and signal line 17c, form or place reach throught voltage and produce capacitor 19c.
If Ca (pF) expression electric charge keeps the electric capacity of capacitor 19a, if source electrode-grid capacitance of Cc (pF) expression switching transistor 11c or 11d (increasing the electric capacity that any reach throught voltage produces capacitor), if Vgh (V) expression puts on the high voltage signal of signal line, and establish the low voltage signal that Vgl (V) expression puts on the signal line, if satisfy down relation of plane then can finish suitable black demonstration.
0.05(V)≤(Vgh-Vgl)×(Cc/Ca)≤0.8(V)
Preferably, satisfy following relationship.
0.1(V)≤(Vgh-Vgl)×(Cc/Ca)≤0.5(V)
Above content also be applied to pixel arrangement among Figure 43 etc.In the pixel arrangement of the voltage-programming of Figure 43, between grid (G) terminal of transistor 11a and signal line 17a, form or place reach throught voltage and produce capacitor 19b.
By way of parenthesis, form reach throught voltage by transistorized source electrode line and gate line and produce capacitor 19b.Yet, owing to cover formation capacitor 19b, the therefore situation that on practical significance, exists capacitor 19b and transistor clearly not to separate on the signal line 17 by the source width of increase transistor 11 and with source electrode line.
Also belong to the present invention by making switching transistor 11b and 11c (in the configuration of Fig. 1) than the method for constructing reach throught voltage generation capacitor 19b greatly that needs on the surface.Often the mode of relation of plane forms: channel width W/ channel length L=6/6 μ m to satisfy down for switching transistor 11b and 11c.Increase the W amount and produce capacitor 19b with the structure reach throught voltage.For example, the ratio of W and L is arranged between 2: 1 and 20: 1 (comprises both).Best, the ratio of W and L (comprised both) between 3: 1 and 10: 1.
Best, between R, G and B, change the size (electric capacity) that reach throught voltage produces capacitor 19b, this makes pixel modulated.This is because exciting current changes between the EL element 15 of R, G and B and because cut-off voltage changes with EL element 15, change is programmed into the voltage (electric current) of grid (G) terminal of the driver transistor 11a in the middle of the EL element 15.For example, be 0.02pF if be used for the capacitor 19bR of R pixel, the capacitor 19bG and the 19bB that then are used for other color (G and B pixel) should be 0.025pF.And, for example, be 0.02pF if be used for the capacitor 19bR of R pixel, the capacitor 19bG that then is used for the G pixel should be that 0.03pF and the capacitor 19bB that is used for the B pixel should be 0.025pF.By between R, G and B pixel, changing the electric capacity of capacitor 19b like this, might regulate the skew exciting current that is used for R, G and B respectively.This makes might optimize the black demonstration level that is used for R, G and B.
Described and to change the electric capacity that reach throught voltage produces capacitor 19b, but the relation between the electric capacity of the electric capacity that relatively keeps capacitor 19a according to electric charge and reach throught voltage generation capacitor 19b is determined reach throught voltage.Thereby it is not strict necessary changing capacitor 19b between R, G and B pixel.That is to say, can change the electric capacity that electric charge keeps capacitor 19a.For example, be 1.0pF if be used for the capacitor 11aR of R pixel, the capacitor 11aG that then is used for the G pixel can be that 1.2pF and the capacitor 11bB that is used for the B pixel can be 0.9pF.At this moment, the electric capacity of reach throught voltage generation capacitor 19b should be common between R, G and B.Thereby, according to the present invention, be at least the electric capacity ratio of one of rgb color change between electric charge maintenance capacitor 19a and reach throught voltage generation capacitor 19b.By way of parenthesis, electric charge be can between R, G and B pixel, change and the electric capacity of capacitor 19a and the electric capacity that reach throught voltage produces capacitor 19b kept.
And, can between the left part of screen 50 and right part, change the electric capacity that reach throught voltage produces capacitor 19b.In the situation of the position of pixel 16 near grid excitation device 12, provide on the side owing to place them in signal, so signal fast rise (because high percent of pass), cause high-penetration voltage.Place (formation) pixel on the end of signal line 17 and have blunt waveform (because signal line 17 has electric capacity).This is because signal rises slowly (because low percent of pass), causes low penetration voltage.Thereby the reach throught voltage of the pixel 16 of an approaching side that is connected with grid excitation device 12 produces capacitor 19b and should design with reduced size.And, should be exaggerated at the capacitor 19b of the end of signal line 17.For example, the electric capacity of capacitor approximately changes 10% between the left part of screen and right part.
The reach throught voltage that produces depends on that electric charge keeps the electric capacity ratio between capacitor 19a and the reach throught voltage generation capacitor 19b.Thereby although stated change the electric capacity that reach throught voltage produces capacitor 19b between the left part of screen and right part, this is not restrictive.Also might be in that to keep reach throught voltage to produce capacitor 19b between the left part of screen and the right part constant and change the electric capacity that electric charge keeps capacitor 19a between the left part of screen and right part.Much less, also might change at the left part of screen and the reach throught voltage between the right part and produce the electric capacity of capacitor 19b and the electric capacity that electric charge keeps capacitor 19a.
Be that the electric current that puts on EL element 15 is yet that the N of the conventional electric current that applies doubly big instantaneously according to one of relevant problem of N of the present invention times pulse excitation.Big electric current can shorten the life-span of EL element.For addressing this problem, applying anti-bias voltage Vm is useful in EL element 15.
In the above example, in one (frame), rewrite the rgb image data.Sequentially rewrite the RGB data.Term " sequentially " refers in first to rewrite the R pictorial data, rewrites the G pictorial data in second, and rewrites the B pictorial data in the 3rd, supposes that a frame is made up of three fields.This motivational techniques are called sequential energisation.
Much less, can such as the N times of pulse excitation or the excitation of resetting, use sequential energisation in conjunction with according to other motivational techniques of the present invention.Use is according to the display panel of the combination of motivational techniques of the present invention or use the display of such display panel to be also included among the present invention.
Figure 75 is a key diagram, and illustration is carried out the display panel of sequential energisation.Source electrode exciting circuit 14 is by switching output R, G and B data to splicing ear 996 between R, G and B.Thereby, 14 of source electrode exciting circuits need lead-out terminal among Figure 48 quantity 1/3.
The signal that outputs to splicing ear 996 from source electrode exciting circuit 14 is distributed to 18R, 18G and 18B by output switching circuit 751.Directly on array base plate 71, form output switching circuit 751 by the polysilicon technology.Can supply alternatively, it can be formed and be installed on the array base plate 71 by the COG technology by silicon chip.And, output switching circuit 751 can be attached in the source electrode exciting circuit 14 electronic circuit as source electrode exciting circuit 14.
If switch 752 is connected to the R terminal, then the output signal from source electrode exciting circuit 14 puts in source signal line 18R.If switch 752 is connected to the G terminal, then the output signal from source electrode exciting circuit 14 puts on source signal line 18G.If switch 752 is connected to the B terminal, then the output signal from source electrode exciting circuit 14 puts on source signal line 18B.
By way of parenthesis, in the configuration of Figure 76, when switch 752 is connected to the R terminal, the G terminal of switch and B terminal open circuit.Thereby the electric current of input source electrode signal wire 18G and 18B is OA.Therefore, the pixel 16 that is connected to source signal line 18G and 18B provides black and shows.
When switch 752 is connected to the G terminal, the R terminal of switch and B terminal open circuit.Thereby the electric current of input source electrode signal wire 18R and 18B is OA.Therefore, the pixel 16 that is connected to source signal line 18R and 18B provides black and shows.
In the configuration of Figure 76, when switch 752 is connected to the B terminal, the R terminal of switch and G terminal open circuit.Thereby the electric current of input source electrode signal wire 18R and 18G is OA.Therefore, the pixel 16 that is connected to source signal line 18R and 18G provides black and shows.
If a frame is made up of three fields, then in first, sequentially the R pictorial data is write in the pixel 16 in the viewing area 50 in fact.In second, sequentially the G pictorial data is write in the pixel 16 in the viewing area 50.In the 3rd, sequentially the B pictorial data is write in the pixel 16 of viewing area 50.
Thereby, in suitable field, sequentially rewrite R data → G data → B data → R data → ... to realize sequential energisation.With reference to providing among figure 5,13,16 etc. how by making switching transistor 11d conducting as shown in fig. 1 and ending the description of carrying out N times of pulse excitation.Much less, a kind of like this motivational techniques can combine with sequential energisation.
In the above example, stated when pictorial data being write in the R pixel 16, black data is written in G pixel and the B pixel, when pictorial data being write in the G pixel 16, black data is written in R pixel and the B pixel, and when pictorial data being write in the B pixel 16, black data is written in R pixel and the G pixel.The invention is not restricted to this.
For example, when pictorial data being write in the R pixel 16, G pixel and B pixel can remain on the pictorial data that rewrites in the previous field.This can make screen 50 brighter.When pictorial data was write G pixel 16, R pixel and B pixel can remain on the pictorial data that rewrites in the previous field.When pictorial data being write in the B pixel 16, G pixel and B pixel can remain on the pictorial data that rewrites in the previous field.
For the color pixel that keeps the pictorial data in the pixel rather than rewriteeing, can control grid signal wire 17a respectively for R, G and B pixel.For example, as illustrative in Figure 75, signal line 17aR can be appointed as conducting and end the transistor 11b of R pixel and the signal wire of 11c, can specify signal line 17aG is the signal wire that makes the transistor 11b of G pixel and 11c conducting and end, and can to specify signal line 17aB be the signal wire that makes the transistor 11b of B pixel and 11c conducting and end.On the other hand, can specify signal line 17b to make the common conducting of transistor 11d of R, G and B pixel and the signal wire that ends.
With top configuration, when being set to the R contact when source electrode exciting circuit 14 output R pictorial data and with switch 752, forward voltage can put on signal line 17aR and cut-off voltage can put on signal line aG and aB.Thereby, the R pictorial data can be write the pictorial data that R pixel 16 and G pixel 16 and R pixel 16 can keep preceding field.
When source electrode exciting circuit 14 was exported the G pictorial data and switch 752 is set to the G contact in second, forward voltage can put on signal line 17aG and cut-off voltage can put on signal line aR and aB.Thereby the G pictorial data can be write the pictorial data that G pixel 16 and R pixel 16 and B pixel 16 can keep preceding field.
When source electrode exciting circuit 14 was exported the B pictorial data and switch 752 is set to the B contact in the 3rd, forward voltage can put on signal line 17aB and cut-off voltage can put on signal line aR and aG.Thereby the B pictorial data can be write the pictorial data that B pixel 16 and R pixel 16 and G pixel 16 can keep preceding field.
In the example shown in Figure 75, (formation) signal line 17a is set with transistor 11b conducting that makes R, G and B pixel 16 respectively and the mode of ending.Yet, the invention is not restricted to this.For example, can as illustrative among Figure 76, form or place the common signal line 17a of R, G and B pixel 16.
With respect to the configuration of Figure 75 etc., G and B source signal line open circuit have been stated when selecting R source signal lines by switch 752.Yet, open-circuit condition be with the quick condition of electronics mode and be not wanted.
Figure 76 illustrates and takes measures to eliminate the configuration of this quick condition.The terminal a of the switch 752 of output switching circuit 751 is connected to Vaa voltage (being used for the black voltage that shows).Terminal b is connected to the lead-out terminal of source electrode exciting circuit 14.Be each R, G and B pixel installation switch 752.
In the state shown in Figure 76, switch 752R is connected to the Vaa terminal.Thereby Vaa voltage (being used for the black voltage that shows) puts on source signal line 18R.Switch 752G is connected to the Vaa terminal.Thereby Vaa voltage (being used for the black voltage that shows) puts on source signal line 18G.Switch 752B is connected to the lead-out terminal of source electrode exciting circuit 14.Thereby the B picture intelligence is applied to source signal line 18B.
In the superincumbent state, rewriteeing the B pixel and will deceive display voltage and putting on R pixel and G pixel.When with top mode control transformation switch 752, rewrite the image that constitutes by pixel 16.By way of parenthesis, identical in the control of signal line 17b and the above-mentioned example, and thereby will omit its detailed description.
In the above example, in first, rewrite R pixel 16, in second, rewrite G pixel 16, and in the 3rd, rewrite B pixel 16.That is to say that each changes the color of the pixel that rewrites.The invention is not restricted to this.The color that can every horizontal scanning period (1H) changes the pixel that rewrites.For example, possible motivational techniques are included in and rewrite the R pixel among the H, rewrite the G pixel in the 2nd H, rewrite the B pixel in the 3rd H, rewrite the R pixel in the 4th H, or the like.Certainly, can per two horizontal scanning periods or per 1/3 color that changes the rewriting pixel.
Figure 77 illustrates an example, and wherein every 1H changes the color of the pixel that rewrites.By way of parenthesis, in Figure 77 to 79, diagonal line hatches remarked pixel 16 or do not rewrite pictorial data and keep from the pictorial data of preceding field or in black display.Certainly, alternately repeat the black demonstration of pixel and from the maintenance of the pictorial data of preceding field.
Much less, in the excitation system of Figure 75 to 79, also might use N times of pulse excitation or M row energization simultaneously in Figure 13.Figure 75 to 79 etc. illustrate writing of pixel 16.Although do not describe the light emitting control of EL element 15, much less, can use this example in conjunction with the example of describing before or after a while.
Frame needn't be formed and can be made up of two fields or four or more by three fields.In the illustrative here example, frame form by two fields and in first, rewrite among the three primary colors RGB R and G pixel and in second, rewrite the B pixel.In illustrative here another example, frame form by four fields and in first, rewrite among the three primary colors RGB the R pixel, in second, rewrite the G pixel, and in third and fourth, rewrite the B pixel.In these sequences,, then can more effectively realize white balance if consider the luminescence efficiency of R, G and BEL element 15.
In the above example, in first, rewrite R pixel 16, in second, rewrite G pixel 16, and in the 3rd, rewrite B pixel 16.That is to say every color that changes the pixel that rewrites.
According to example shown in Figure 77, in first, in a H, rewrite the R pixel, in the 2nd H, rewrite the G pixel, in the 3rd H, rewrite the B pixel, in the 4th H, rewrite the R pixel, or the like.Certainly, can every two or more horizontal scanning periods or per 1/3 color that changes the pixel that rewrites.
According to the example shown in Figure 77, in first, in a H, rewrite the R pixel, in the 2nd H, rewrite the G pixel, in the 3rd H, rewrite the B pixel, and in the 4th H, rewrite the R pixel.In second, in a H, rewrite the G pixel, in the 2nd H, rewrite the B pixel, in the 3rd H, rewrite the R pixel, and in the 4th H, rewrite the G pixel.In the 3rd, in a H, rewrite the B pixel, in the 2nd H, rewrite the R pixel, in the 3rd H, rewrite the G pixel, and in the 4th H, rewrite the B pixel.
Thereby, by in each at random or have certain and regularly rewrite R, G and B pixel, might prevent the color separation between R, G and B color.And, reduced flicker.
In Figure 78, every 1H rewrites a plurality of pixel 16 colors.In Figure 77, in first, the pixel 16 that rewrites in a H is R pixels, and the pixel 16 that rewrites in the 2nd H is G pixels, and the pixel 16 that rewrites in the 3rd H is B pixels, and the pixel 16 that rewrites in the 4th H is R pixels.
In Figure 78, every 1H changes the locations of pixels of the different color that rewrites.By R, G and B pixel being distributed to different field (much less, this can finish having under certain regular situation) and sequentially being rewritten them, might prevent the color separation between R, G and B color and reduce flicker.
By way of parenthesis, even in the example of Figure 78, R, G should have identical fluorescent lifetime or luminous intensity with the B pixel in each picture element (this is a group of R, G and B pixel).Much less, this also finishes to be avoided color irregularity in Figure 76,77 etc. example.
As shown in Figure 78, in order in every H, to rewrite the pixel (three kinds of colors--R, G and B--rewrites) of different color in first the H of Figure 78, in Figure 75, source electrode exciting circuit 14 can be configured to picture intelligence with arbitrary hue (perhaps determine color) and output to terminal and switch 752 can be configured at random (perhaps having certain regularity) and be connected to R, G and B contact under certain regularity.
Panel in the example of Figure 79 has W (white) pixel 16W outside three primary colors RGB.By forming or placing pixel 16W, might suitably realize the honeybee value brightness of color and realize that high brightness shows.Figure 79 (a) illustrates an example, wherein forms R, G, B and W pixel 16 in each pixel column.Figure 79 (b) illustrates an example, wherein places R, G, B and W pixel in different pixel columns successively.
Much less, the motivational techniques among Figure 79 can be in conjunction with the motivational techniques among Figure 77,78 etc.And, much less can be in conjunction with N times of pulse excitation, the M row energization of while etc.Those those of skill in the art of this area can easily finish these contents based on this instructions, and thereby with the descriptions thereof are omitted.
By way of parenthesis, for convenience of explanation, suppose according to display panel of the present invention to have three primary colors RGB, but this not restrictive.Display panel can have cyan, yellow and purple outside R, G and B, perhaps it can have among R, G and the B among any one or R, G and the B any two.
And, in each, handle R, G and B although stated the sequential energisation system, much less the invention is not restricted to this.In addition, how the example illustration among Figure 75 to 79 is write pictorial data in the pixel 16.Do not resemble in Fig. 1, they do not have illustration (although, certainly, they relate to) by operate transistor 11d and make electric current flow through the method that EL element 15 is come display image.In configuration shown in Figure 1, make electric current flow through EL element 15 by oxide-semiconductor control transistors 11d.
And the motivational techniques among Figure 77,78 etc. can sequentially show rgb image by oxide-semiconductor control transistors 11d (in the situation of Fig. 1).For example, in Figure 80 (a), during a frame (one) period, from head-to-foot (perhaps the end of to top) scanning R viewing area 53R, G viewing area 53G and the B viewing area 53B of screen.Remaining areas becomes non-display area 52.That is to say, carry out excitation intermittently.
Figure 80 (b) illustrates an example, wherein produces a plurality of RGB viewing area 53 during the period at one (frame).This motivational techniques similar to shown in Figure 16.Thereby it will not need explanation.In Figure 80 (b),, even under lower frame rate, also might eliminate flicker by division viewing area 53.
Figure 81 (a) illustrates a kind of situation, and wherein R, G and B viewing area 53 are of different sizes (much less, the size of viewing area 53 period luminous with it is proportional).In Figure 81 (a), R viewing area 53R has identical size with G viewing area 53G.B viewing area 53B has the big size than G viewing area 53G.In organic EL display panel, B often has low luminescence efficiency.By making the viewing area 53 of B viewing area 53B,, might realize white balance effectively as shown in Figure 81 (a) greater than other color.
Figure 81 (b) illustrates an example, wherein at one (frame) a plurality of B display time interval 53B (53B1 and 53B2) is arranged during the period.Yet Figure 81 (a) illustrates the size that changes a B viewing area 53B allowing suitably to regulate the method for white balance, and Figure 81 (b) illustrates and shows a plurality of methods with identical surface area with the B viewing area 53B that realizes suitable white balance.
Be not limited to one of Figure 81 (a) or Figure 81 (b) according to excitation system of the present invention.What wanted is to produce R, G and B viewing area 53 and produce intermittently to show, thus and fuzzy moving-picture and not enough the writing in the pixel 16 of correction.With the motivational techniques among Figure 16, do not produce the independently viewing area 53 that is used for R, G and B.Show R, G and B (should state provides W viewing area 53) simultaneously.By way of parenthesis, much less can be in conjunction with Figure 81 (a) and Figure 81 (b).For example, might will use the motivational techniques of the viewing area 53 of the different size that is used for R, G and B among Figure 81 (a) to combine with the motivational techniques that Figure 81 (b) produces a plurality of viewing areas 53 that are used for R, G and B.
By way of parenthesis, the motivational techniques among Figure 80 and 81 are not limited to according to the motivational techniques among Figure 75 to 79 of the present invention.Much less, with as shown in Figure 41 respectively to R, G and B control flow through the configuration of the electric current of EL element 15 (EL element 15R, EL element 15G and EL element 15B), can easily realize the motivational techniques in Figure 80 and 81.By forward voltage/cut-off voltage being put on signal line 17bR, might make the 16R conducting of R pixel and end.By forward voltage/cut-off voltage being put on signal line 17bG, might make the 16G conducting of G pixel and end.By forward voltage/cut-off voltage being put on signal line 17bB, might make the 16B conducting of B pixel and end.
Can realize top excitation by the grid pumping circuit 12bB of the grid pumping circuit 12bR that as shown in Figure 82, forms or place control grid signal wire 17bR, the grid pumping circuit 12bG that controls grid signal wire 17bG and control grid signal wire 17bB.By by grid pumping circuit 12bR, 12bG and 12bB among middle method excitation Figure 82 that describe such as Fig. 6, can realize the motivational techniques in Figure 80 and 81.Certainly, much less can use the configuration of the display panel among Figure 82 to realize motivational techniques among Figure 16 etc.
And, with the configuration shown in Figure 75 to 78, as long as can write in the pixel 16 of different and the pixel 16 that has rewritten pictorial data with deceiving pictorial data, can use common signal line 17b, not use the signal line 17bB of the signal line 17bG of signal line 17bR, control EL element 15G of control EL element 15R and control EL element 15B just can realize motivational techniques in Figure 80 and 81 to R, G and B.
In EL element 15, electronics from negative pole (negative electrode) inject electron transfer layer and simultaneously the hole be injected into hole transmission layer from anodal (anode).Injected electrons and hole are moved to antipole at the electric field action that applies.In the process of so doing, because of the difference of energy level on the border of luminescent layer, electronics and hole are captured in the organic layer, and the accumulation charge carrier.
The accumulation of known space charge in organic layer causes that molecule is oxidized or reduces, produce unsettled basic anion molecule (radical anion molecule) or basic cationic molecule (radical cationmolecule), they then make film (membrane) degrading quality, the driving voltage during causing reducing brightness and increasing constant current drive.For preventing like this, for example, modifier structure and apply reverse voltage.
Apply anti-bias voltage and mean and apply inverse current, and thereby injected electrons and hole attracted to negative pole and positive pole respectively.This makes formation and the minimizing galvanochemistry that might cancel space electric charge in the organic layer demote, thus life-saving.
Figure 45 illustrates the terminal voltage variation of anti-bias voltage Vm with respect to EL element 15.When putting on EL element 15, specified electric current produces terminal voltage.In Figure 45, the current density that flows through the electric current of EL element 15 is every square metre of 100A.Trend among Figure 45 illustrates different with a little of the trend that observes when current density is 50 to every square metre 100A.Thereby, suppose and this method can be applied to large-scale current density.
Z-axis is illustrated in the ratio of the initial terminal voltage of terminal voltage and EL element 15 after 2500 hours.For example, if terminal voltage is respectively 8V and 10V, then when applying the electric current of current density at 0 (zero) constantly and after 2500 hours, the terminal voltage ratio is 10/8=1.25 with every square metre of 100A.
Transverse axis is illustrated in anti-bias voltage Vm in the period applies product and the specified terminal voltage V0 of duration t1 with it ratio.For example, if in 1/2 (half) period, apply anti-bias voltage Vm with 60Hz (60Hz does not have special significance), t1=0.5 then.And t2 is the duration that applies specified terminal voltage.And, if terminal voltage (specified terminal voltage) when the moment, 0 (zero) applied the electric current of the current density with every square metre of 100A is if be that 8V and anti-bias voltage Vm are-8V, then | anti-bias voltage * t1|/(specified terminal voltage * t2)=|-8 (V) * 0.5|/(8 (V) * 0.5)=1.0.
In Figure 45, when | anti-bias voltage * t1|/(specified terminal voltage * t2) is 1.0 or when bigger (not changing initial specified terminal voltage), the terminal voltage ratio stops to change.Therefore, the work that applies of anti-bias voltage Vm gets fine.Yet, when | anti-bias voltage * t1|/(specified terminal voltage * t2) is 1.75 or when bigger, the terminal voltage ratio is tended to increase.Thereby, anti-bias voltage Vm and apply duration rate (application duration rate) t1 (or the ratio between t2 or t1 and the t2) should so that | anti-bias voltage * t1|/(specified terminal voltage * t2) is equal to, or greater than 1.0 mode and determines.Best, anti-bias voltage Vm and apply duration rate t1 should so that | anti-bias voltage * t1|/(1.75 the mode of being equal to or less than of specified terminal voltage * t2) is determined.
Yet,, should alternately apply reverse bias Vm and rated voltage for the biasing excitation.For sample A and the B mean flow rate on the unit interval being equated, as shown in Figure 46, must make that instantaneous bigger electric current flows through when not applying anti-bias voltage by applying anti-bias voltage Vm.Therefore, apply the terminal voltage that anti-bias voltage Vm (the sample A among Figure 46) also increases EL element 15.
Yet in Figure 45, even with relating to the motivational techniques that apply anti-bias voltage, specified terminal voltage V0 should satisfy mean flow rate (that is, make EL element 15 luminous).(, when applying the electric current of current density, obtain such terminal voltage with every square metre of 200A according to the example of quoting as proof at this.Yet, because dutycycle is 1/2, the therefore brightness when the mean flow rate in the circulation equals current density at every square metre 200A.)
Top description supposition white raster shows (maximum voltage puts on all EL element 15 in the screen).Yet, on the EL display, provide video to show that the gray scale as natural image shows.Thereby white peak value electric current (electric current that flows during the white demonstration of maximum perhaps according to example described here, has the electric current of the average current density of every square metre of 100A) does not always flow through EL element 15.
Usually, in the situation that video shows, the electric current that puts on (flowing through) each EL element 15 approximately is 0.2 of a white peak value electric current (electric current that flows when specified terminal voltage perhaps according to the example of quoting as proof at this, has the electric current of the current density of every square metre of 100A).
Therefore, show that for the video in the example of Figure 45 the value of transverse axis should multiply by 0.2.Thereby, should so that | anti-bias voltage * t1|/(specified terminal voltage * t2) equal 0.2 or bigger mode determine anti-bias voltage Vm and apply duration rate t1 (or the ratio between t2 or t1 and the t2).Best, should so that | anti-bias voltage * t1|/(specified terminal voltage * t2) equals 0.35 (=1.75 * 0.2) or littler mode and determines anti-bias voltage Vm and apply duration rate t1.
That is to say, the transverse axis in Figure 45 (| anti-bias voltage * t1|/(specified terminal voltage * t2)) on, 1.0 value should change into 0.2.Thereby, if go up display video at display panel (might this be that normal situation and white raster can not be shown) always, anti-bias voltage Vm should so that | anti-bias voltage * t1|/(specified terminal voltage * t2) equal 0.2 or bigger mode apply preset time t1.Even increase | anti-bias voltage * t1|/(value of specified terminal voltage * t2), terminal voltage ratio does not also increase widely, as shown in Figure 45.Thereby, show by considering white raster, should the upper limit be set so that | anti-bias voltage * t1|/(specified terminal voltage * t2) equal 1.75 or littler.
According to the present invention, apply anti-bias voltage Vm (electric current) do not flow through period of EL element 15 at electric current during in fact.Yet this is not restrictive.For example, can when flowing through EL element 15, electric current apply anti-bias voltage Vm (electric current) forcibly.Yet in the sort of situation, consequently electric current will stop to flow through EL element 15, cause non-light-emitting mode (black display mode).And, in current programmed pixel arrangement, applying anti-bias voltage Vm although focus in this description, this is not restricted.
Be used for the configuration of reverse bias actuated pixel, using N channel transistor 11g, as shown in Figure 47.Certainly, this can be a p channel transistor.
In Figure 47, when the voltage that puts on grid potential control line 473 is set to when higher than the voltage that puts on reverse bias line 471, transistor 11g (N) conducting and anti-bias voltage Vm is put on the anode electrode of EL element 15.
In the pixel arrangement of Figure 47 etc., can operate grid potential control line 473 at fixing current potential always.For example, in Figure 47, when voltage Vk was 0 (V), the current potential of grid potential control line 473 was set to 0 (V) or higher (best, 2V or higher).By way of parenthesis, this current potential is represented by Vsg.In this state, when the current potential of reverse bias line 471 be set to anti-bias voltage Vm (0V or lower, and best-5V or be lower than Vk) time, transistor 11g (N) conducting and anti-bias voltage Vm is put on the anode electrode of EL element 15.When the voltage of reverse bias line 471 be set to than put on grid potential control line 473 (that is when, the grid of transistor 11g (G) terminal voltage) voltage is high, transistor 11g remain off and anti-bias voltage Vm is not put on the anode electrode of EL element 15.Certainly, much less, in this state, reverse bias line 471 can be placed high impedance status (such as open-circuit condition).
And, can form or place grid pumping circuit 12c respectively with control reverse bias line 471, as illustrative among Figure 48.By as conversion sequentially in the situation of grid pumping circuit 12a, grid pumping circuit 12c work, and be synchronized with map function and conversion applies the position of anti-bias voltage.
Above-mentioned motivational techniques make might be by only changing reverse bias line 471 current potential and grid (G) terminal of transistor 11g is arranged on set potential anti-bias voltage Vm is put on EL element 15.This makes and is easy to control applying of anti-bias voltage Vm.And, can reduce the voltage that between source electrode (S) terminal of transistor 11g and grid (G) terminal, applies.This can similarly be applied to when transistor 11g is the p channel transistor.
When not flowing through EL element 15, electric current applies anti-bias voltage Vm.This can finish by make transistor 11g conducting when transistor 11d ends.That is to say that the counter-rotating of the on/off logic of transistor 11d can put on grid potential control line 473.For example, in Figure 47, the grid of transistor 11d and 11g (G) terminal can be connected to signal line 17b.Because transistor 11d is that p channel transistor and transistor 11g are the N channel transistors, so they are with opposite mode conducting with end.
Figure 49 is the sequential chart of reverse bias excitation.In the drawings, represent the pixel column numbering such as (1) and index such as (2).For convenience of explanation, suppose (1) expression first pixel column and (2) expression second pixel column, but this not restrictive.Also might consider (1) expression N pixel column and (2) expression (N+1) pixel column.Except some special circumstances, be applied to other example in the same manner.Although describe example among Figure 49 etc. by quoting pixel arrangement among Fig. 1 etc. as proof, this is not restrictive.For example, they also are the pixel arrangement that can be applicable among Figure 41,38 etc.
When the signal line 17a (1) that forward voltage (Vgl) put in first pixel column, cut-off voltage (Vgh) is put on signal line 17b (1) in first pixel column.Thereby transistor 11d ends and electric current does not flow through EL element 15.
Voltage Vsl (it makes transistor 11g conducting) is put on reverse bias line 471 (1).Thereby, transistor 11d be conducting and anti-bias voltage put on EL element 15.After cut-off voltage (Vgh) is put on signal line 17b, apply the anti-bias voltage scheduled time slot (1H 1/200 or longer; Perhaps 0.5 microsecond).Before forward voltage (Vgl) is put on signal line 17b, turn-off the anti-bias voltage predetermined periods (1H 1/200 or longer; Perhaps 0.5 microsecond).Do like this is in order to prevent transistor 11d and 11g conducting simultaneously.
In next 1H (horizontal scanning period), cut-off voltage (Vgh) is put on signal line 17a, and select second pixel column.That is to say, forward voltage is put on signal line 17b (2).On the other hand, forward voltage (Vgl) is put on signal line 17b, transistor 11d conducting, and flow through EL element 15 from the electric current of transistor 11a, make EL element 15 luminous.And, cut-off voltage (Vgh) is put on reverse bias line 471 (1), stop anti-bias voltage being put on EL element 15 in first pixel column (1).Voltage Vsl (anti-bias voltage) is put on reverse bias line 471 (2) in second pixel column.
During operation on sequentially repeat, be overwritten in the image on the whole screen.In the above example, in to pixel programming, apply anti-bias voltage.Yet the circuit arrangement among Figure 48 is not limited thereto.Anti-bias voltage can be put on a plurality of pixel columns continuously is clearly.But combined block excitation (seeing Figure 40), N times pulse excitation, replacement excitation or virtual pixel encourage and use the reverse bias excitation also is tangible.
Not only during showing, image can apply anti-bias voltage.Can after turn-offing the EL display, apply anti-bias voltage and reach predetermined periods.
Although the example above having described with reference to the pixel arrangement among the figure 1, much less, the use of anti-bias voltage also can be applicable to the pixel arrangement in Figure 38 and 41 etc.For example, Figure 50 illustrates and is used for current programmed pixel arrangement.
Figure 50 illustrates the pixel arrangement of current mirror.Transistor 11c is the pixel selection element.When forward voltage being put on signal line 17a1, transistor 11c conducting.Transistor 11d is an on-off element, and it has the function of drain electrode (D) terminal and grid (G) short-circuit of terminals of function of reset and transistor 11a.Transistor 11d conducting when forward voltage being put on signal line 17a2.
Before selecting given pixel, transistor 11d conducting 1H (horizontal scanning period, i.e. a pixel column) or longer.Best, its conducting before is 3H at least.In the sort of situation, transistor 11d conducting 3H before selecting pixel makes grid (G) terminal and drain electrode (D) short-circuit of terminals of transistor 11a.Therefore, transistor 11a ends.Thereby electric current stops to flow through transistor 11b and turn-offs EL element 15.
When EL element 15 was not luminous, transistor 11g conducting put on EL element 15 with anti-bias voltage.Thereby, when ending, transistor 11d applies anti-bias voltage.Therefore, transistor 11d and transistor 11g conducting simultaneously in logical relation.
Voltage Vsg is put on continuously grid (G) terminal of transistor 11g.Transistor 11g conducting when the anti-bias voltage enough littler than voltage Vsg puts on reverse bias line 471.
Subsequently, when the horizontal scanning period that vision signal is put on (writing) pixel arrives, forward voltage is put on signal line 17a1, make transistor 11c conducting.Thereby the video voltage that outputs to source signal line 18 from source electrode exciting circuit 14 puts on capacitor 19 (transistor 11d keeps conducting).
When transistor 11d conducting, pixel is placed black display mode.One (frame) in the period conduction period of transistor 11d long more, the ratio of then black display time interval is just big more.Thereby, need be increased in the brightness during the display time interval, no matter the mean flow rate that black display time interval and obtaining is wanted on (frame).That is to say, need be increased in the electric current that will flow through EL element 15 during the display time interval.This operation is based on according to N of the present invention times pulse excitation.Thereby operating characteristic of the present invention is to realize with comprising the combining of excitation by the black demonstration of turn-on transistor 11d establishment by N times of pulse excitation.And configuration of the present invention (method) characteristic is included in EL element 15 and anti-bias voltage is not put on EL element 15 when luminous.
Although in the above example, during showing, image when pixel is not luminous, applies anti-bias voltage, and the configuration that applies anti-bias voltage is not limited thereto.As long as when displayed image not, apply anti-bias voltage, just need not in each pixel, form anti-offset transistor 11g.Word " not luminous (not illuminated) " refer to after using display panel or before apply the configuration of anti-bias voltage.
For example, in the pixel arrangement of Fig. 1, select pixel 16 ( transistor 11b and 11c conducting) and can encourage the low-voltage V0 (for example GND (ground connection) voltage) of IC (circuit) 14 outputs and put on drain electrode (D) terminal of driver transistor 11a from source electrode from source electrode excitation IC output.If transistor 11d is conducting in this state also, then voltage V0 puts on the anode terminal of EL element.Simultaneously, if put on the negative electrode Vk of EL element 15 than the voltage Vm of voltage V0 low 5 to 15V, then anti-bias voltage puts on EL element 15.And if will apply as Vdd voltage to the voltage of-5V than voltage V0 low 0, then transistor 11a ends.Thereby, thereby by from source electrode exciting circuit 14 output voltages and control grid signal wire 17, anti-bias voltage might be put on EL element 15.
Even create black show once after, N times of pulse excitation also allow one (frame) during the period in predetermined current (electric current of programming (by the voltage that remains in the capacitor 19)) flow through EL element 15 again.Yet, with the configuration among Figure 50, in case transistor 11d conducting owing to make capacitor 19 discharges (perhaps reducing its electric charge), therefore can not make predetermined current (electric current of programming) flow through EL element 15.Yet this configuration feature is easy to circuit operation.
By way of parenthesis,, the invention is not restricted to this, and can be applicable to other pixel arrangement, the configuration shown in Figure 38 and 50 based on electric current although top example is used for current programmed pixel arrangement.Also can be applicable to be used for the pixel arrangement of voltage-programming, the configuration shown in Figure 51,54 and 62.
Figure 51 illustrates the pixel arrangement that is used for voltage-programming.Transistor 11b as selector switch element and transistor 11a as the driver transistor that electric current is put on EL element 15.This configuration comprises the transistor (on-off element) that anti-bias voltage is put on the anode of EL element 15.
With the pixel arrangement among Figure 51, the electric current that will flow through EL element 15 puts on source signal line 18.Then, when selecting transistor 11b, it is put on grid (G) terminal of transistor 11a.
For describing the configuration among Figure 51, will at first basic operation be described with reference to Figure 52.Pixel arrangement among Figure 51 be variation cancellation type and in four-stage, operate: initialization operation, the operation of resetting, programming operation and light emission operation.
In that being provided, horizontal-drive signal (HD) carries out initialization operation afterwards.Forward voltage puts on signal line 17b, transistor 11g conducting.In addition, forward voltage also puts on signal line 17a, transistor 11c conducting.At this moment, voltage Vdd puts on source signal line 18.Thereby voltage Vdd puts on the terminal of capacitor 19b.In this state, driver transistor 11a conducting and little electric current flow through EL element 15.This electric current makes the absolute value of the voltage on the drain electrode of driver transistor 11a (D) terminal at least than the voltage height at place, the working point of driver transistor 11a.
Then, the operation of resetting.Cut-off voltage puts on signal line 17b, and transistor 11e is ended.On the other hand, in the period of T1, forward voltage put on signal line 17c, transistor 11b conducting.Period, T1 was corresponding to reset stage.Forward voltage puts on signal line 17a continuously in the period of 1H.Best, period T1 1H 20% and 90% between (comprising both) or between 20 microseconds and 160 microseconds (comprising both).Best, the capacity ratio between capacitor 19b (Cb) and capacitor 19a (Ca) (comprises both) between 1/6 and 2/1.
During reset stage, transistor 11b conducting, the grid of driver transistor 11a (G) terminal and drain electrode (D) short-circuit of terminals.Thereby the grid of transistor 11a (G) terminal becomes with the voltage at drain electrode (D) terminal place and equates, transistor 11a is placed modes of deflection (reset mode: the state that does not have electric current to flow).In reset mode, the starting potential the when voltage at the grid of transistor 11a (G) terminal place begins to flow near electric current.The grid voltage that keeps reset mode is remained on the terminal b place of capacitor 19b.Thereby capacitor 19 keeps offset voltage (reset voltage).
In next programming mode, cut-off voltage puts on signal line 17c, and transistor 11b ends.On the other hand, DATA voltage puts on source signal line 18 in the period of Td.Thereby DATA voltage and offset voltage (reset voltage) sum puts on grid (G) terminal of driver transistor 11a.This allows driver transistor 11a to flow through the electric current of programming.
After the programming period, cut-off voltage puts on signal line 17a, and transistor 11c ends, and driver transistor 11a and source signal line 18 are disconnected.In addition, cut-off voltage also puts on signal line 17c, and transistor 11b ends, and it is remain off in the period of 1F.On the other hand, when needed, forward voltage and cut-off voltage periodically put on signal line 17b.Thereby, if in conjunction with N times of pulse excitation among Figure 13,15 etc. or in conjunction with the interlacing excitation, then this method even can finish better image and show.This method also can encourage in conjunction with reverse bias.Thereby, be not limited to the pixel arrangement of current excitation according to excitation system of the present invention, the configuration shown in Fig. 1, but also can be applicable to the pixel arrangement of voltage-programming.
With the excitation system among Figure 52, in reset mode, capacitor 19 keeps the initial current voltage (offset voltage, reset voltage) of transistor 11a.Thereby, when reset voltage being put on grid (G) terminal of driver transistor 11a, set up the darkest black demonstration.Yet, be coupling between source signal line 18 and the pixel 16, to the reach throught voltage of capacitor 19, perhaps transistorized punch-through causes the undue brightness (contrast of minimizing) of the screen that causes turning white.Therefore, the motivational techniques of describing with reference to Figure 53 can not realize the high contrast that shows.
For anti-bias voltage Vm is put on EL element 15, transistor 11a is ended.For transistor 11a is ended, can make the drain terminal and grid (G) short-circuit of terminals of transistor 11a.This configuration will be described with reference to Figure 53 after a while.
Can Vdd voltage or the voltage that transistor 11a is ended might be put on source signal line 18 for alternatively, make transistor 11b conducting, and voltage is put on grid (G) terminal of transistor 11a.This voltage makes transistor 11a by (perhaps making it almost not have electric current to flow through (almost end: transistor 11a is in the high impedance status)).Subsequently, transistor 11g conducting and anti-bias voltage put on EL element 15.Anti-bias voltage Vm can be put on all pixels simultaneously.In particular, the voltage that transistor 11a is almost ended is put on source signal line 18 and make transistor 11b conducting in all pixel columns.Therefore, transistor 11a ends.Then, transistor 11g conducting, and anti-bias voltage put on EL element 15.Then, vision signal is put on one by one pixel column with in the display displayed image.
Then, with the excitation of the replacement in the pixel arrangement of description Figure 51.Figure 53 illustrates an example.As shown in Figure 53, the signal line 17a that is connected to grid (G) terminal of the transistor 11c among the pixel 16a also is connected to grid (G) terminal of the reset transistor 11b among the pixel 16b of next stage.Equally, the signal line 17a that is connected to grid (G) terminal of the transistor 11c among the pixel 16b also is connected to grid (G) terminal of the reset transistor 11b among the pixel 16c of next stage.
Thereby, when forward voltage puts on the signal line 17a of grid (G) terminal that is connected to transistor 11c among the pixel 16a, pixel 16a enters the voltage-programming pattern, the reset transistor 11b conducting of the pixel 16b of next stage, and the driver transistor 11a of pixel 16b is reset.Equally, when forward voltage puts on the signal line 17a of grid (G) terminal of the transistor 11c that is connected among the pixel 16b, pixel 16b enters current programmed pattern, the reset transistor 11b conducting of the pixel 16c in next stage, and the driver transistor 11a of pixel 16c is reset.Thereby, can easily realize the excitation of resetting by prime grid control system.And, can reduce every pixel, from the quantity of the inlead of signal line.
More detailed description will be provided.Suppose shown in Figure 53 (a) voltage is put on signal line 17.In particular, forward voltage puts on the forward voltage of pixel 16a and the signal line 17a that cut-off voltage puts on other pixel 16.And the signal line 17b that cut-off voltage puts on pixel 16a and 16b simultaneously forward voltage puts on the signal line 17b of pixel 16c and 16d.
In this state, pixel 16a is in the voltage-programming pattern and is not luminous, and pixel 16b is in the reset mode and is not luminous, and pixel 16c waits for current programmed and luminous, and pixel 16d waits for current programmed and luminous.
After 1H, the data in shift register 61 circuit of control grid pumping circuit 12 are moved one to enter the state shown in Figure 53 (b).In Figure 53 (b), pixel 16a waits for current programmed and luminous, and pixel 16b is just in current programmed pattern and not luminous, and pixel 16c is in reset mode and not luminous, and pixel 16d waits for current programmed and luminous.
Thereby the driver transistor 11a that has seen the pixel in the voltage replacement next stage of the signal line 17a that puts on each pixel is sequentially to carry out voltage-programming in next horizontal scanning period.
The pixel arrangement that is used for voltage-programming among Figure 43 also can realize the control of prime grid.Figure 54 illustrates an example, wherein uses the method for attachment of prime grid control system for the pixel arrangement among Figure 43.
In Figure 54, the signal line 17a that is connected to grid (G) terminal of the transistor 11b among the pixel 16a is connected to grid (G) terminal of the reset transistor 11a among the pixel 16b of next stage.Equally, the signal line 17a that is connected to grid (G) terminal of the transistor 11b among the pixel 16b is connected to grid (G) terminal of the reset transistor 11a among the pixel 16c of next stage.
Thereby, when forward voltage puts on the signal line 17a of grid (G) terminal of the transistor 11b that is connected among the pixel 16a, pixel 16a enters the voltage-programming pattern, the reset transistor 11e conducting of the pixel 16b in the next stage, and the driver transistor 11a of pixel 16b is reset.Equally, when forward voltage puts on the signal line 17a of grid (G) terminal of the transistor 11b that is connected among the pixel 16b, pixel 16b enters current programmed pattern, the reset transistor 11e conducting of the pixel 16c in the next stage, and the driver transistor 11a of pixel 16c is reset.Thereby, can easily realize the excitation of resetting by prime grid control system.
More detailed description will be provided.Suppose and shown in Figure 55 (a), like that voltage is put on signal line 17.In particular, forward voltage puts on the signal line 17a of pixel 16a and the signal line 17a that cut-off voltage puts on other pixel 16.The transistor 11g that supposes the reverse bias that is useful on ends.
In this state, pixel 16a is in the voltage-programming pattern, and pixel 16b is in the reset mode, and pixel 16c waits for current programmed, and pixel 16d waits for current programmed.
After 1H, the data in shift register 61 circuit of control grid pumping circuit 12 are moved one to enter the state shown in Figure 55 (b).In Figure 55 (b), it is current programmed that pixel 16a waits for, pixel 16b is in the current programmed pattern, and pixel 16c is in the reset mode, and pixel 16d etc. is to be programmed.
Thereby the driver transistor 11a that can see the pixel in the voltage replacement next stage of prime of the signal line 17a that puts on each pixel is sequentially to carry out voltage-programming in next horizontal scanning period.
For black fully demonstration the in the current excitation, with of driver transistor 11 programmings of 0 electric current to pixel.That is to say that source electrode exciting circuit 14 is not carried electric current.When not carrying electric current, can not make parasitic capacitance discharge that in source signal line 18, causes and the current potential that can not change source signal line 18.Therefore, the grid potential of driver transistor also remain unchanged and formerly the current potential of frame (field) in (1F) keep being accumulated in the capacitor 19.For example, if previous frame comprises white demonstration, even then present frame comprises that black fully the demonstration also keeps white demonstration.
For addressing this problem, according to the present invention, the place that begins at a horizontal scanning period (1H) before the electric current that will programme is output to source signal line 18 writes black level voltage in the source signal line 18.For example, if pictorial data is made up of the 0th to the 7th gray scale that approaches black level, then only during certain period that begins to locate of a horizontal scanning period, write black level voltage to reduce writing of current programmed load and undercompensation.By way of parenthesis, black fully the demonstration corresponding to the 0th gray scale shows in vain corresponding to the 63rd gray scale (in the situation that the 64-gray scale shows).
Best, for carrying out precharge gray scale, it should be limited to black viewing area.In particular, by carrying out precharge (selective precharge) from write the gray scale that pictorial data is chosen in the black region (low brightness area wherein has only the write current of little (faint) to flow) in the situation of current excitation.If at the enterprising line precharge of whole tonal range, then brightness reduces (not reaching object brightness) in white viewing area.
Also have, may show smear in some cases.
Best, to carrying out selective precharge (for example, in the situation of 64 gray scales, after to the 0th to the 7th gray scale precharge, writing pictorial data) since 1/8 of all gray scales of the 0th gray scale.Preferably, to carrying out selective precharge (for example, in the situation of 64 gray scales, after to the 0th to the 3rd gray scale precharge, writing pictorial data) since 1/16 of all gray scales of the 0th gray scale.
To carry out precharge method also be effectively aspect the enhancing contrast ratio by only detecting the 0th gray scale, especially in black the demonstration.It realizes extremely good black demonstration.Problem is that screen seems in tone and turns white when the whole screen display the 1st and second gray scale.Thereby, in predetermined scope, carry out selective precharge: since 1/8 of all gray scales of the 0th gray scale.
By way of parenthesis, change pre-charge voltage and tonal range also are useful between R, G and B, because the emission starting potential of EL display element 15 and emission brightness change between R, G and B.For example, in the situation of R, to carrying out selective precharge (for example, in the situation of 64 gray scales, after to the 0th to the 7th gray scale precharge, writing pictorial data) since 1/8 of all gray scales of the 0th gray scale.In the situation of other color (G and B), to carrying out selective precharge (for example, in the situation of 64 gray scales, after to the 0th to the 3rd gray scale precharge, writing pictorial data) since 1/16 of all gray scales of the 0th gray scale.About pre-charge voltage,, then 7.5V is write the source signal line 18 that is used for other color (G and B) if 7V is write the source signal line 18 that is used for R.Best pre-charge voltage usually changes with the production lot of EL display panel.Thereby preferably pre-charge voltage can be waited by external regulator and regulate.Also can use the electronic electronic circuit easily to realize such regulator circuit.
In pixel 16, form electric charge and kept capacitor 19.If the electric charge that in capacitor 19, keeps 10% or manyly discharged during the period at one (frame), then can not keep black display mode.About visual display condition, comprise that the pixel of the transistor 11 with bad cut-off characteristics produces bright spot (be called and end-leak bright spot).Thereby, must use transistor, especially in the situation of the transistor 11b in Fig. 1 with good cut-off characteristics.
For addressing this problem, the present invention ends the transistor 11d of work by operation signal line 17b in short period time.Even voltage keeps transistor 11b to have bad cut-off characteristics, this motivational techniques also can reduce ends-leaks bright spot.And, by changing OFF (breaking) period that voltage keeps transistor 11b, might control to reduce and end-leak the degree of bright spot.
As illustrative in Figure 115 (a), believe that the electric charge in remaining on capacitor 19 passes through to take place to end when transistor 11b leaks-the leakage bright spot.This be because when transistor 11d conducting in fact the current potential at A be low.Thereby if transistor 11d keeps conducting in the long-time period, then capacitor 19 discharges apace, causes to end-the leakage bright spot.When as shown in Figure 16 repeat viewing area 53 and non-display area 52 with short time interval like that the time, if such non-display area 52 as shown in Figure 13 has bigger ratio, then not by-leak bright spot to occur.Yet,, end-leak bright spot and occur if such viewing area 53 as shown in Figure 5 continues to reach for a long time.
And the motivational techniques that are used for display panel according to the present invention are come displayed image by switching between Fig. 5,13 and 16 condition according to the content of pictorial data.Thereby, can be pursuant to visual content displayed and continue display condition among Fig. 5.If the condition among Fig. 5 occurs, the motivational techniques that then describe below are effective.That is to say, need not always carry out the method for describing in the example below.Can work as when transistor 11d keeps conducting to reach certain period and carry out it.
When transistor 11d by the time, rise once at least at the current potential of an A.Therefore, as illustrative in Figure 115 (b), electric current flows to a B from an A, again to capacitor 19 chargings.Thereby, do not end-leak bright spot and occur.That is to say, when transistor 11d conducting and by the time, to capacitor 19 charging.
By way of parenthesis, top description is to obtain from a kind of Theory Thinking of phenomenon.Thereby, may there be the understanding of mistake.Yet, in the panel of reality, use according to motivational techniques of the present invention reduce by-to leak aspect the bright spot be that effectively this is certain.
In the pixel arrangement of Fig. 1 (Figure 115), driver transistor 11a and switching transistor 11d are p channel transistors.Thereby when transistor 11d conducting, transistor 11b leaks.On the other hand, when transistor 11d ended, the current potential rising at an A reduced the leakage of electric charge, perhaps capacitor is charged again.Thereby, if transistor 11d is the n channel transistor, again capacitor 19 is charged when then electric charge is from capacitor 19 leakages and in transistor 11d conducting when transistor 11d ends.By way of parenthesis, if driver transistor 11d is the n channel transistor, then end-leak bright spot and do not occur, but brightness further increases in white the demonstration.Much less, the present invention can handle this situation equally.
Now, for convenience of explanation, will introduce the notion of " load (duty) ".Be different from respect to the employed term of stn liquid crystal display panel " load " according to term of the present invention " load ".Dutycycle according to of the present invention 1/1 refers to that electric current flows through the incentive mode of EL element 15 in the period of one (frame).That is to say that 1/1 dutycycle refers to that non-display area 52 accounts for 0% state of display screen 50.Yet, in fact, owing to using the pixel column of electric current (voltage) programming to be in the non-display mode, so on stricti jurise, 1/1 dutycycle can not take place in the pixel arrangement in Fig. 1.Yet because 200 or more pixel column are arranged in display panel, therefore the non-display area of an about pixel column is in tolerance limit.On the other hand, 0/1 dutycycle refers to do not have electric current to flow through the state of EL element 15 in the period of one (frame).That is to say that 0/1 dutycycle refers to that non-display area 52 accounts for 100% state of display screen 50.In the following description, suppose that 220 pixel columns are arranged in the EL display panel.
For example, 220/220 dutycycle is reduced to 1/1 dutycycle.And the dutycycle with 55/220 reduces to 1/4 dutycycle.When dutycycle was 1/4,3/4 screen was occupied by non-display area 52.Thereby, in N times of pulse excitation, can when N=4, obtain target (being scheduled to) display brightness.Dutycycle with 110/220 reduces to 1/2 dutycycle.When dutycycle was 1/2,50% screen was occupied by non-display area 52.Thereby, in N times of pulse excitation, can when N=2, obtain predetermined display brightness.
In description, suppose and to select (in the situation of Fig. 1) with current programmed pixel column by signal line 17a according to display panel of the present invention.Output from the grid pumping circuit 12a that controls grid signal wire 17a is called WR side selection signal wire.And, suppose that EL element 15 is by signal line 17b selection (in the situation of Fig. 1).Output from the grid pumping circuit 12b that controls grid signal wire 17b is called signal line 17B (the EL side is selected signal wire).
Present enabling pulse for grid pumping circuit 12, in shift register, sequentially be shifted as the data that keep.The data that keep in the shift register based on grid pumping circuit 12a are determined to export forward voltage (Vgl) and are still exported cut-off voltage (Vgh) to WR side selection signal wire.In the output stage of grid pumping circuit 12a, form or place the OEV1 circuit (not shown) that output is ended.When the OEV1 circuit when low, select signal to output to signal line 17a same as before as the WR side of the output of grid pumping circuit 12a.Relation of plane on the illustration logically in Figure 116 (a).By way of parenthesis, forward voltage is set to logic level L (0) and cut-off voltage is set to logic level H (1).
That is to say that when grid pumping circuit 12a output cut-off voltage, cut-off voltage puts on signal line 17a.When grid pumping circuit 12a output forward voltage (logic low), by OR (or) circuit with it with the output of OEV1 circuit mutually or, and the result outputed to signal line 17a.That is to say,, cut-off voltage (Vgh) is outputed to grid excitation signal wire 17a when OEV1 circuit when being high.
The data that keep in the shift register based on grid pumping circuit 12b are determined to export forward voltage (Vgl) and are still exported cut-off voltage (Vgh) to signal line 17B (the EL side is selected signal wire).In the output stage of grid pumping circuit 12b, form or place the OEV2 circuit (not shown) that output is ended.When the OEV2 circuit when low, output to signal line 17b same as before as the output of grid pumping circuit 12b.Relation of plane on the illustration logically in Figure 116 (a).By way of parenthesis, forward voltage is set to logic level L (0) and cut-off voltage is set to logic level H (1).
That is to say that when grid pumping circuit 12b output cut-off voltage (it is cut-off voltage that the EL side is selected signal), cut-off voltage puts on signal line 17b.When grid pumping circuit 12b output forward voltage (logic low), by OR (or) circuit with it with the output of OEV2 circuit mutually or, and the result outputed to signal line 17b.That is to say that when input signal when being high, the OEV2 circuit outputs to grid excitation signal wire 17b with cut-off voltage (Vgh).Thereby, be forward voltage even select signal from the EL side of OEV2 circuit, also forcibly cut-off voltage (Vgh) is outputed to signal line 17b.By way of parenthesis, if low, then directly select signal to output to signal line 17b the EL side to being input as of OEV2 circuit.
In the example that is described below, for handle by-leak bright spot, set up state among Figure 115 by operation OEV2 circuit.In particular, even signal line 17B (EL side select signal wire) continues the output forward voltage, in the OEV2 circuit periodically the input logic height so that transistor 11d end.By transistor 11d is ended, might solve and end-leak the problem of bright spot.
Figure 116 illustrates the example according to motivational techniques of the present invention.Because the OEV1 circuit is low, therefore select singly pixel column and based on from the output of grid pumping circuit 12a with electric current (voltage) programming.Thereby, be used to select the signal of pixel column to select signal identical with pixel sides.
As illustration among Figure 116, each horizontal scanning period (1H) grid pumping circuit 12b (EL side select signal wire) puts on the OEV2 circuit by operation OEV2 circuit with logic high, thereby and cut-off voltage is put on signal line 17B (the EL side is selected signal wire) forcibly.Thereby, even grid pumping circuit 12b always exports forward voltage (Vgl), because from the signal of OEV2 circuit and every 1H outputs to cut-off voltage signal line 17b in certain period.Apply the discharge (see Figure 115) of the application minimizing of cut-off voltage by the OEV2 circuit, thereby and reduce and end-leak bright spot from capacitor 19.
The variation of the variation of the voltage that outputs to signal line 17a that Figure 116 illustration is caused by OEV1 and the voltage that outputs to signal line 17b that causes by OEV2.About signal line 17a, because OEV1 is always low, so the WR side selects the waveform of signal wire directly to become the waveform of signal line 17a.About signal line 17b and since OEV2 between high and low alternately, so the output of the output of signal line 17B (the EL side is selected signal wire) and OEV2 circuit is mutually or will put on the waveform of signal line 17b with generation.Thereby, with reference to Figure 116, equaling and in (A+B) period cut-off voltage being put on signal line 17b, wherein higher voltage is put on the OEV2 circuit in (representing) time interval by A, during the time interval cut-off voltage put on EL selection signal wire in (representing) by B.And during high voltage was put on the period of OEV2 circuit, cut-off voltage put on signal line 17b.
By operation OEV2 circuit, might control the luminous period of EL element 15.Thereby, can change the brightness of screen 50 by control OEV2 circuit.That is to say that the OEV2 circuit has the effect that minimizing ends-leak bright spot and control screen intensity.
In Figure 117, forward voltage is put on signal line 17B (EL side select signal wire) (this is corresponding to 1/1 dutycycle in conventional motivational techniques) always.Yet,, when forward voltage puts on WR side selection signal wire, cut-off voltage must be put on signal line 17B (the EL side is selected signal wire) with the pixel arrangement among Fig. 1.Therefore, when forward voltage put on signal line 17a, cut-off voltage put on signal line 17b.
Excitation with 1/1 dutycycle cause by-leak bright spot.This is because transistor 11b leaks because of (SD) voltage between the high raceway groove of transistor 11b.As illustrative in Figure 117, if during the 1H in predetermined periods OEV2 keep high, then cut-off voltage puts on signal line 17b.Therefore, transistor 11d conducting and by setting up state among Figure 115.When transistor 11d by the time, reduce (SD) voltage between the raceway groove of transistor 11b and set up state among Figure 115 (b).This reduce from the leakage of transistor 11b and or eliminate or reduce widely by-leak bright spot.
By way of parenthesis, although stated every 1H operation OEV2 circuit with reference to Figure 117, this is not restrictive.Much less, for example, can every 2H or longlyer make transistor 11d conducting and end, as illustrative in Figure 118.Certainly, can every 3H or longlyer in predetermined periods, make transistor 11d conducting and by once by control OEV2 circuit.Much less, the present invention also can be applicable to by cut-off voltage being put on the situation (seeing Figure 24 etc.) that the signal line 17b that covers two pixel columns once selects two pixel columns.
Figure 119 illustrates a kind of situation, and wherein forward voltage and cut-off voltage periodically put on signal line 17b.Forward voltage and cut-off voltage periodically put on signal line 17b rather than apply forward voltage continuously.Even when forward voltage and cut-off voltage put on signal line 17b, if forward voltage continue to apply certain period or longer by-leak bright spot may occur.Again, by operation OEV2 circuit, cut-off voltage puts on signal line 17b at interval with preset time.Therefore, transistor 11d is ended.This reduce from the leakage of transistor 11b and or eliminate or reduce widely by-leak bright spot.
Stated by being set to height and periodically cut-off voltage has been put on signal line 17b at the beginning of 1H or the OEV2 of end with reference to Figure 117,118 etc.Yet, the invention is not restricted to this.For example, as illustrative in Figure 120, cut-off voltage can put on signal line 17b in the centre of 1H.
Thereby, by cut-off voltage being put on signal line 17b, might reduce and end-leak bright spot.Yet, if it is too short to put on the cut-off voltage of signal line 17b, reduce by-leak and do not have effect aspect the bright spot.Figure 121 be illustrated in cut-off voltage or forward voltage put on signal line 17b duration and by-leak the relation between the minimizing effect of bright spot.
By-leak bright spot to appear in black the demonstration.By-leak bright spot and increase black illumination (illumination that obtains by the display screen of measuring display panel with illuminometer) (causing the excessive brightness of the screen that turns white).Figure 121 (a) illustrates the voltage waveform that puts on signal line 17b.Cut-off voltage apply that the duration is represented by C and a circulation applying cut-off voltage is represented by S.By way of parenthesis, although suppose the period of circulation S corresponding to 1H here, this is not restrictive.
In Figure 121, when C/S is 0.02 or more hour, black illumination is high (exist many by-leak bright spot), but when C/S near 0.02 the time, black illumination is near 0 (not by-leakage bright spot).If the 1H=S=100 microsecond, then C/S=0.02 that is to say, C/S becomes 0.02 microsecond.Thereby, when the 1H=100 microsecond, can be in the period of 2% even 1/1 the dutycycle that approximates 1H greatly by cut-off voltage is put on signal line 17b eliminate by-leak bright spot.
With reference to Figure 122, when not using, obtain the signal waveform of signal line 17b (A) according to motivational techniques of the present invention.When by obtaining the signal waveform of signal line 17b (B) when applying forward voltage and cut-off voltage according to motivational techniques of the present invention operation OEV2 circuit.
In the above example, control the OEV2 circuit on the period, do not use dutycycle control at whole (frame).Yet, the invention is not restricted to this.Can be to carry out the control of OEV2 circuit at 1/1 o'clock only based on pictorial data in dutycycle.Can be for alternatively, when certain condition--for example 1/1 dutycycle--can carry out the control of OEV2 circuit when continuing to reach certain period.
Illustrate when being easy to act as most dutycycle and between 1/1 and 1/2, (comprising both) by analysis, and preferably when dutycycle (comprises both) between 1/1 and 3/4, operation OEV2 circuit.Best equally, carry out the control of OEV2 circuit between dutycycle remains on 1/1 and 1/2 in the period of 10 frames (field) when (comprising both).
And, can regulate screen intensity by operation OEV2.Increasing OEV2 is the high duration, then reduces screen intensity.Reducing OEV2 is the high duration, then increases screen intensity.The method of adjusted (change) screen intensity by OEV2 is the principal character according to motivational techniques of the present invention.
In the above example, by cut-off voltage is put on signal line 17b reduce by-leak bright spot.Yet this is applicable when being made up of the p channel transistor as pixel under the pixel arrangement situation in Fig. 1 only.If pixel is made up of the n channel transistor, then forward voltage puts on signal line 17b.As mentioned above, the present invention by provide as illustrative among Figure 115 will than the high voltage of voltage that puts on capacitor 19 (some B) put on an A rather than by the period that forward voltage and cut-off voltage is put on signal line 17b reduce by-leak bright spot.And, end-leak by providing the period that reduces voltage (SD voltage) between the raceway groove that keeps transistor 11b to reduce.
Method among Figure 116 to 122 by the operation by OEV2 periodically with cut-off voltage put on signal line 17b reduce by-leak bright spot.Yet, be not limited thereto according to motivational techniques of the present invention.Can be with preset time under the situation of inoperation OEV2 circuit, cut-off voltage be put at interval signal line 17b by operation grid pumping circuit 12b.Figure 123 illustrates an example.
In Figure 123, produce and scan the non-display area of forming by a pixel column 52 at interval with preset time.With the pixel arrangement among Fig. 1, non-display area 52 and signal line 17 are not limited to single pixel column and can cover two or more pixel columns in producing non-display area 52.
In Figure 123, non-display area 52 moving like that shown in Figure 123 (a) → 123 (b) → 123 (c).Best, non-display area 52 repeats four times in one (frame) or repeatedly, as illustrative in Figure 124.
By way of parenthesis, in the example of Figure 123 and 124, the period that cut-off voltage is put on signal line 17b is not limited to 1H.Comparable 1H of this period is short, as by the period E among Figure 125 as illustration.
Top example prevents to end-the leakage bright spot by apply cut-off voltage by operation OEV2 circuit in predetermined periods when forward voltage continued to put on signal line 17b (the signal line 17b among Fig. 1) in certain period.
As in pixel 16 design at by-leak the measure of bright spot, can improve the cut-off characteristics of transistor 11b.For example, this can finish by in series placing a plurality of transistor 11b, as illustrative in Figure 150.Shown and preferably in series placed or formed three or more transistor 11b by analysis.Preferably, in series place or form five or a plurality of transistor, as illustrative in Figure 150.
By way of parenthesis, although described example among Figure 115 to 126 by quoting pixel arrangement among Fig. 1 as proof, this is not restrictive.Prevent leakage with reference to the motivational techniques of descriptions such as Figure 115 from the electric charge of capacitor 19.Thereby, can be applicable to comprise any pixel arrangement as capacitor in Fig. 1 19 and maintenance transistor 11b.
For example, the pixel arrangement among Figure 38 also comprises capacitor 19 and keeps transistor 11d.Thereby, also can realize by oxide-semiconductor control transistors 11e according to the effect of motivational techniques of the present invention with the pixel arrangement among Figure 38.Equally, the pixel arrangement among Figure 43 also comprises capacitor 19 and keeps transistor 11e.Thereby effect of the present invention can realize by operation driver transistor 11d.
Pixel arrangement among Figure 51 also comprises capacitor 19a and keeps transistor 11b.Thereby effect of the present invention can realize by operate transistor 11e.This is applied to Figure 50 etc. equally.And this is applied to the pixel arrangement among Figure 63 equally.Pixel arrangement among Figure 63 also comprises capacitor 19 and keeps transistor 11b.Therefore, influence transistor unit 11b, might strengthen consequent maintenance effect by operating switch 631 with by EL element 15.Thereby, can realize effect of the present invention.
The problem relevant with the pixel arrangement among Fig. 1,38 etc. is the change that the amplitude of signal line 17a causes the electric charge in the capacitor 19, makes to obtain predetermined gray scale.The pixel arrangement that to quote as proof among Fig. 1 provides description for convenience of explanation.The variation of the pixel arrangement current potential of pixel 16 in the current programmed situation of routine among Fig. 1 of Figure 138 illustration.
With reference to Figure 138, the signal waveform of the signal line 17a of signal line 17a (1) remarked pixel (1).Signal line 17a (2) expression is inferior to the signal waveform of the signal line 17a of the pixel (2) of pixel (1).Signal line 17a (3) expression is inferior to the signal waveform of the signal line 17a of the pixel (3) of pixel (2).18 expressions of source signal line put on voltage (electric current) waveform of source signal line.The capacitor current potential of pixel current potential illustration pixel (2) (voltage waveform of the gate terminal G of driver transistor 11a).Scan grid signal wire 17a:(1 in the following sequence) → (2) → (3) → (4) → (5) → ... (1) → (2) → ....
With the pixel arrangement among Fig. 1 (although be not limited among Fig. 1 pixel arrangement), between the grid G of transistor 11b and source S terminal, produce stray capacitance 1381.When signal line 17a changes to Vgl (forward voltage) or when Vgl changed to Vgh, change in voltage was sent to the grid G terminal (capacitor 19 terminals) of transistor 11a by stray capacitance 1381 from Vgh (cut-off voltage).Potential change at the gate terminal place of driver transistor 11a causes that the current value (magnitude of voltage) that is programmed into driver transistor 11a departs from predetermined value.And the departure degree of predetermined value depends on the capacity ratio between stray capacitance 1381 and the capacitor 19.Along with the minimizing of the electric capacity of stray capacitance 1381 or along with the increase of the electric capacity of capacitor 19, reduce with the departure degree of predetermined value.
Variation at an A and B place pixel current potential is noticeable.At an A, signal line 17a (2) changes to Vgl from Vgh.At a B, signal line 17a (2) changes to Vgh (seeing the pixel arrangement Figure 138) from Vgl.
At an A, along with the change of current potential from Vgh (cut-off voltage) to Vgl (forward voltage) of signal line 17a, the current potential at the gate terminal G place of driver transistor 11a descends.Yet because transistor 11b and 11c conducting, so the current potential of source signal line 18 (electric current) is written in the pixel 16 and makes capacitor 19 chargings (discharge).When capacitor 19 charging (discharge), driver transistor 11a is programmed so that predetermined current flows through (pixel current potential become equal voltage Vb).In the period of 1H, finish programming because pixel design makes, so driver transistor 11a flows through predetermined current at a C.
At a B, the current potential of signal line 17a changes to Vgh (cut-off voltage) from Vgl (forward voltage).Along with this change in voltage, the current potential at the gate terminal G place of driver transistor 11a rise (pixel current potential become equal voltage Vc).When the current potential of signal line 17a was changed into Vgh (cut-off voltage), transistor 11b and 11c ended, capacitor 19 terminals and source signal line 18 are disconnected, and so sustaining voltage Vc.
Thereby although make the pixel current potential that program current flows equal voltage Vb, in fact the pixel current potential of Bao Chiing equals voltage Vc.Therefore, the program current that flows through EL element 15 has the value different with the value of being wanted.
To the motivational techniques that address this problem be described with reference to Figure 139.Yet the motivational techniques among Figure 138 not necessarily ask a question.At first, with the reason of describing for this reason.
About driver transistor 11a, the current potential of signal line 17a changes over Vgh (cut-off voltage) and keeps this state in (one) period at a frame from Vgl (forward voltage).When Vgl (forward voltage) changed over Vgh (cut-off voltage), the potential transfer of driver transistor 11a was to anode voltage Vdd at signal line 17a.
Because driver transistor 11a is the p channel transistor, therefore transfers to anode voltage Vdd work and flow to prevent electric current.Current programmed method has the problem of little program current during black the demonstration, as previously described at this.For handling this problem, the present invention uses N times of pulse excitation etc.Yet in Figure 18, the pixel current potential is transferred at last and is maintained at black-side, makes and might realize suitable black demonstration.
The present invention can realize top effect by the synergy of following content: each pixel driver transistor 11a is the p channel transistor, anode voltage is than cathode voltage height, the electric current that puts on source signal line 18 when the WR side is selected signal wire (signal line 17a) for low (Vgl) flows through the driver transistor 11a of pixel 16, and when the WR side selects signal wire (signal line 17a) to be high (Vgh) pixel 16 and source signal line 18 is disconnected.Thereby using the p channel transistor is important as transistor 11b and 11c (see figure 1).And, as described in reference Figure 111, if use the p channel transistor as grid pumping circuit 12 then strengthen synergy.
And for suitable current programmed, using the p channel transistor is important as the transistor 11d that is cut to the path of EL element 15.And, by in certain period (2H at least), keeping the fact of high (Vgh) further to strengthen synergy the gate terminal G of switching transistor 11d by N times of pulse excitation because reduced from the leakage of transistor 11b with the drain terminal D of high relatively voltage maintenance driver transistor 11a.Thereby the configuration among Fig. 1 is a configuration feature of the present invention with combining of system among Figure 138 etc.
Then, with the motivational techniques of describing among Figure 139.By way of parenthesis,, in the output stage of grid pumping circuit 12a, form OEV1 circuit (seeing Figure 116 etc.), and when high level signal puts on the OEV1 circuit, Vgh voltage put on signal line 17a as previously described at this.By applying Vgh voltage, transistor 11b and 11c are by (in the situation of the pixel arrangement in Fig. 1 etc.).
Every 1H applies high voltage OEV1 circuit once, and Vgh (cut-off voltage) is outputed to signal line 17a.Yet non-selected signal line 17a does not experience output to be changed, because cut-off voltage (Vgh) is not put on their 17a from the outset.In the situation of the signal line 17a of the selection that has applied forward voltage (Vgl), insert Vgh (cut-off voltage) period by high voltage being put on the OEV1 circuit.
When higher voltage put on the OEV1 circuit, cut-off voltage (Vgh) put on all signal line 17a.Source electrode exciting circuit 14 offers source signal line 18 from source signal line absorption program current (in the situation of the pixel arrangement among Fig. 1) and anode terminal Vdd, driver transistor 11a and switching transistor 11c by the pixel 16 selected with program current.Thereby, if all signal line 17a end when source electrode exciting circuit 14 is absorbing program current, then no longer there is the supply line of program current.Therefore, source electrode exciting circuit 14 absorbs the current potential of electric charge and source signal line 18 along with the time descends from the stray capacitance of source signal line 18.
The problem relevant with the motivational techniques among Figure 138 be, when signal line 17a changes to when disconnected from logical, its voltage is owing to stray capacitance 1381 is penetrated into capacitor 19 (reach throught voltage), and is maintained at than on the high level of predetermined voltage.
Might reduce the next voltage that in capacitor 19, keeps approximating greatly predetermined voltage of current potential of source signal line 18 by control OEV1 circuit, thus the reach throught voltage that compensation causes because of stray capacitance 1381.Motivational techniques among Figure 139 are based on this principle.
As seeing from Figure 139, by control OEV1 circuit, to select voltage (forward voltage: Vgl) put in the period (1H) of signal line 17a, insert the period t1 (t1 is corresponding to the period that higher voltage is put on the OEV1 circuit) that applies cut-off voltage.Period t1 is called the open-grid period.The open-grid period finishes than period of the Zao t2 of end of 1H.And the period of open-grid period than the late t3 of beginning of 1H begins.Thereby, period=t3+t1+t2 of 1H.
With reference to Figure 139, the voltage waveform of the signal line 17a of signal line 17a (1) remarked pixel (1).Signal line 17a (2) expression is inferior to the voltage waveform of the signal line 17a of the pixel (2) of pixel (1).Signal line 17a (3) expression is inferior to the voltage waveform of the signal line 17a of the pixel (3) of pixel (2).18 expressions of source signal line put on voltage (electric current) waveform of source signal line.The capacitor current potential of pixel current potential illustration pixel (3) (voltage waveform of the gate terminal G of driver transistor 11a).Scan grid signal wire 17a:(1 in the following sequence) → (2) → (3) → (4) → (5) → ... (1) → (2) → ....
To suppose that the pixel current potential is that the current potential of pixel (3) and the pixel arrangement quoted as proof among Fig. 1 provide description.In 1H and 2H, pixel current potential (3) keeps the current potential from preceding field (frame).In 3H, forward voltage (Vgl) puts on signal line 17a (3), and the transistor 11b of pixel column (3) and 11c conducting.
Some A in Figure 139, along with the variation of signal line 17a from Vgh (cut-off voltage) to Vgl (forward voltage), the current potential of the gate terminal of driver transistor 11a descends.Yet because transistor 11b and 11c conducting, the current potential of source signal line 18 is written in the pixel 16 and to capacitor 19 chargings (discharge).To capacitor 19 charging (discharge) time, driver transistor 11a is programmed to flow through predetermined current (pixel current potential become equal voltage Vb).In the period of 1H, finish programming because pixel design makes, so driver transistor 11a flows through predetermined current at a C.
At a B, finish and program current is write pixel and pixel current potential become and equal voltage Va (supposition voltage Va is a target voltage.See Figure 142 (a)).At a C, the current potential of signal line 17a changes to Vgh (cut-off voltage) from Vgl (forward voltage).Along with the variation of this voltage, the current potential of the gate terminal of driver transistor 11a rising (pixel current potential (3) equals voltage Vd because of reach throught voltage becomes).When the current potential of signal line 17a was changed into Vgh (cut-off voltage), transistor 11b and 11c ended, and capacitor 19 and source signal line 18 are disconnected, and therefore in open-grid period t1 the pixel current potential is remained on voltage Vd.
During open-grid period t1, the current potential of source signal line 18 descends because source electrode exciting circuit 14 continue to absorb program currents and period t1 in the past after, it becomes and equals voltage Vc, as (seeing Figure 142 (b)) shown under source signal line current potential.Then, during period t2, forward voltage puts on signal line 17a (3) once more, and transistor 11b and 11c conducting.When transistor 11b and 11c conducting, the current potential of source signal line 18 is written in the capacitor 19 of pixel.Therefore, pixel current potential (3) becomes and equals voltage Vc.In period t2, enter current programmed pattern once more and pixel current potential (3) is changed into Vb.Yet period t2 is short, voltage-programming enough only, and thereby the change amount from voltage Vc to voltage Vb be smallly (period t2 to be set to make that the change amount will be small.Showing period t2 by analysis should be arranged between 0.5 and 5 microseconds (comprising both)).On the other hand, period t1 is arranged on (comprising both) is fit between 0.5 and 10 microseconds.
At an E, the current potential of signal line 17a (3) changes to Vgh (cut-off voltage) from Vgl (forward voltage).Along with the variation of this voltage, the current potential of the gate terminal of driver transistor 11a rise (pixel current potential become equal voltage Va).When the current potential of signal line 17a was changed into Vgh (cut-off voltage), transistor 11b and 11c ended, capacitor 19 terminals and source signal line 18 are disconnected, and so sustaining voltage Va.Thereby, make the pixel current potential (3) that program current flows be maintained at voltage Va (this means and compensated reach throught voltage).
Motivational techniques among Figure 139 are characterised in that it can regulate the amount of compensation reach throught voltage according to video signal data (program current).The amplitude of reach throught voltage depends on the electric capacity (although because of the gate terminal voltage of driver transistor 11a have some difference) of potential difference (PD), stray capacitance 1381 and capacitor 19 between Vgh and the Vgl in fact.Therefore, the amplitude of reach throught voltage is a fixed value.If it also is constant higher voltage being put on the duration of OEV1 circuit, then when program current be that the magnitude of current that is absorbed by source electrode exciting circuit 14 is little when wanting to be used for black the demonstration.Thereby the pictorial data in writing pixel is that the current potential in the source signal line 18 descends also little when wanting to be used for black the demonstration.When program current is when wanting to be used for white demonstration, big by the magnitude of current of source electrode exciting circuit 14 absorptions.Thereby the pictorial data in writing pixel is that the current potential in the source signal line 18 descends big when wanting to be used for white demonstration.
On the other hand, the reach throught voltage that is caused by signal line 17a is a fixed value.Thereby the program current in writing pixel carries when deceiving video data, only carries out compensation in a small amount for reach throught voltage by control OEV1 circuit.The reach throught voltage that is caused by signal line 17a becomes main.This provides more black and shows.Even reach throught voltage causes and the departing from greatly of predetermined value, and is also no problem in the black demonstration that is characteristic with low luminosity coefficient.
When the program current in writing pixel carries white video data, be that reach throught voltage carries out a large amount of compensation by control OEV1 circuit.This is because descend at short notice when the current potential of OEV1 circuit source signal line 18 when being high.Thereby, be to make the voltage that causes by control OEV1 circuit descend the high duration and will on amplitude, equate by control OEV1 circuit by the reach throught voltage that signal line 17a causes, might eliminate the effect effect of reach throught voltage fully.Therefore, in white the demonstration, can the full remuneration reach throught voltage.For being the white demonstration of characteristic with the high radiance coefficient, the motivational techniques work of compensating for reach throught voltage is good.
Thereby, can be according to motivational techniques of the present invention according to the compensation rate of visual video data adjusting to reach throught voltage.
By way of parenthesis, can change the OEV1 circuit according to visual video data is the high duration.For example, a kind of possible method comprises, amounts to visual video data, according to amount to determining screen intensity, and is the high duration based on determined screen intensity control OEV1 circuit.
By way of parenthesis, be adjustable if make open-grid period t1 and period t2, then can change compensation rate to reach throught voltage.This makes might be according to the characteristic optimizing of the panel compensation rate to reach throught voltage.Yet, needn't accurately determine period t2.
Although in the example of Figure 139, stated open-grid period t1 be provided when selecting signal line 17a by control OEV1 circuit.Yet, the invention is not restricted to this.Also might determine whether to provide open-grid period t1 to encourage for each horizontal scanning period or each pixel column.
For example, a kind of possible motivational techniques comprise does not provide the open-grid period when the pictorial data of pixel column almost completely is made up of black video data, the open-grid period is provided when the pictorial data of pixel column almost completely is made up of white video data, and the longer than usual open-grid period is provided when the pictorial data of pixel column is made up of white video data fully.
Figure 140 is a key diagram, and illustration is according to motivational techniques of the present invention.In 1H and 5H, do not provide the open-grid period.The open-grid period is provided in 2H and 4H, and therefore in source signal line 18, exists current potential to descend.
There is correlativity at open-grid period t1 (B among Figure 141 (a)) and between the current programmed period (among Figure 141 (a)).In the curve map of Figure 141 (b), Z-axis is represented poor (%) with predetermined luminance.Yet, represent numeral with absolute term.And the difference of predetermined luminance is object brightness and is subjected to precentagewise (%) poor between the intrinsic brilliance that reach throught voltage etc. influences during current programmed.As can from Figure 141 (b), seeing, when B/A is 0.02 or when bigger (wherein B=t1, A=1H, and C=2 microsecond), error almost reaches minimum value.Therefore, best, B/A is 0.02 or bigger.Yet, if B is too big, reduce current programmedly, cause not enough writing.Thereby preferably B/A is not more than 0.3.
By between the pattern of B/A, switching, might regulate the effect (wherein B is that the OEV1 circuit is the high duration, that is to say, the signal line 17a of selection is 1H (horizontal scanning period) for the duration A that ends) of panel reach throught voltage.Best, change B/A (seeing Figure 145) according to gray scale.Usually, preferably reduce be used for low gray scale (black demonstrations= gray scale 1,2,3 ...) B/A and increase be used for high gray scale (demonstration= gray scale 62,63,64 in vain ...) B/A.Best, provide about four B/A patterns between them, to switch according to visual scene, content etc.
Figure 145 illustrates MODE1 (pattern 1), MODE2 (pattern 2), MODE3 (mode 3) and MODE4 (pattern 4).MODE1 (pattern 1) is corresponding to B=0 (that is, the OEV1 circuit keeps signal line 17a remain off low and that select).MODE2 (pattern 2) is corresponding at the B=0 of low gray scale side (that is, OEV1 circuit keep low and the signal line 17a that selects keeps conducting) and at high gray scale side B/A=0.05H.MODE3 (mode 3) is corresponding to B/A=0.05 on all gray scales.MODE4 (pattern 4) is the pattern that changes the B/A value according to gray scale.
And, select the changeable pattern of B value by average gray level according to the pictorial data in each pixel column.And, can on certain gray scale, change OEV1 control.Also might stop using OEV1 below the grey level at certain.
Above example comprise the OEV1 circuit of control grid pumping circuit 12, thereby change the current potential of source signal line 18, thereby and the effect of processing reach throught voltage etc.Figure 143 illustrates and how from the outside square wave is put on source signal line 18 to handle the effect of reach throught voltage etc.
In Figure 143, capacitor driver 1431 produces square wave and (is called the source-coupled signal.See Figure 144.), by the coupling of coupling capacitance 1434 it is applied to source signal line 18.One end of each coupling capacitance 1434 is connected to capacitor signal line 1433.Square wave puts on capacitor signal line 1433.The source-coupled signal Synchronization puts on the source signal line in horizontal-drive signal.
For convenience of explanation, will provide description by concentrating on pixel current potential (2).In 3H, forward voltage puts on signal line 17a (2).When applying forward voltage, the transistor 11b of pixel (2) and 11c conducting and the electric current that puts on source signal line 18 are applied in driver transistor 11a (some A).At a B, the source-coupled signal that puts on capacitor signal line 1433 changes to Vsh from Vsl.
Therefore, source-coupled signal coupling (penetrating) causes that to source signal line 18 pixel current potential (2) jumps to voltage Va.Yet, by in period short time, compensating for this jump and pixel current potential (2) reaches target current potential Vb at a C at last by program current.
At a C, the source-coupled signal that puts on capacitor signal line 1433 changes to Vsl from Vsh.Therefore, source-coupled signal coupling (penetrating) causes that to source signal line 18 pixel current potential (2) drops to voltage Vc.At a C, because forward voltage puts on signal line 17a (2), so voltage Vc is changed by program current.Yet if the time between a C and some D is short, voltage Vc changes very little.
At a D, change to cut-off voltage owing to put on the voltage of signal line 17a (2) from forward voltage, so pixel (2) current potential is transferred to voltage Vb because of reach throught voltage.Therefore, in pixel 16, keep target voltage Vb.Thereby, by the source-coupled signal is coupled to source signal line 18, might compensate reach throught voltage.Much less, by changing the amplitude of source-coupled signal, might regulate the compensating proportion of reach throught voltage.
Top Figure 139 illustrates the current potential that how changes source signal line 18 by OEV1.Yet the current potential of source signal line 18 also can use source electrode exciting circuit 14 sides to change.As illustrative in Figure 147, source electrode exciting circuit 14 has the analog switch 752 that forms or place between terminal 1471 that is connected to source signal line 18 and current output circuit 1461 (seeing Figure 146).In source electrode exciting circuit 14, produce stray capacitance 1472 equally.
When switch 752 closures, program current Iw flows in the current output circuit 1461, as illustrative in Figure 147 (a).When switch 752 open circuit (seeing Figure 147 (b)), absorb program current Iw continuously as the current output circuit 1461 of constant-current circuit.Therefore, absorb the electric charge in the stray capacitance 1472, reduce the current potential of inner wire 1473.In this state, if connect switch 752 (seeing Figure 147 (c)), then program current Iw is diverted to stray capacitance 1472 being charged in it and current output circuit.This reduces the current potential of source signal line 18.If the situation that current potential descends in source signal line 18 is applied to the situation of Figure 139 mid point C to some D place, then the current potential of the reduction of source signal line 18 can be written in the pixel 16, as the situation of Figure 139.
Top Figure 143 illustrates by capacitor signal line 1433 signal is put on the configuration of source signal line 18 with the compensation reach throught voltage.Figure 151 is illustrated in the configuration of compensation reach throught voltage in each pixel column.
In Figure 151, an end of capacitor 19 is connected to driver transistor 11a and the other end is connected to common signal line 1511.Common signal line 1511 is signal wires of being shared by a pixel column.Common signal line 1511 is connected to public exciting circuit 1512.As illustrative in Figure 152, public exciting circuit 1512 is exported square-wave signals and it is put on every common signal line 1511.The other parts of this configuration identical with shown in Fig. 1, and thereby will the descriptions thereof are omitted.
With reference to Figure 152, the voltage waveform of the signal line 17a of signal line 17a (1) remarked pixel (1).Signal line 17a (2) expression is inferior to the voltage waveform of the signal line 17a of the pixel (2) of pixel (1).Signal line 17a (3) expression is inferior to the voltage waveform of the signal line 17a of the pixel (3) of pixel (2).
The voltage waveform of the common signal line 1511 of common signal line (1) remarked pixel (1).Equally, the voltage waveform of the common signal line 1511 of common signal line (2) remarked pixel (2), and the voltage waveform of the common signal line 1511 of common signal line (3) remarked pixel (3).
18 expressions of source signal line put on voltage (electric current) waveform of source signal line.The capacitor current potential of pixel current potential (2) illustration pixel (2) (voltage waveform of the gate terminal G of driver transistor 11a).Scan grid signal wire 17a:(1 in the following sequence) → (2) → (3) → (4) → (5) → ... (1) → (2) → ....Also scan common signal line 1511:(1 in the following sequence) → (2) → (3) → (4) → (5) → ... (1) → (2) → ....For convenience of explanation, the pixel current potential (current potential of the gate terminal G of driver transistor 11a) that will concentrate on pixel (2) provides description.At first, the pictorial data that in pixel 16, keeps all.
At an A, along with the current potential of signal line 17a changes to Vgl (forward voltage) from Vgh (cut-off voltage), the current potential at the gate terminal G place of the driver transistor 11a (Va → Vc) that descends.Because transistor 11b and 11c conducting, the current potential of source signal line 18 (electric current) are written to pixel 16 and capacitor 19 begins charging (discharge).By way of parenthesis, the current potential of common signal line 1511 supposition is Vcl (Vcl＜Vch) when 1H begins.
After period, the current potential of common signal line 1511 changes to Vch (seeing the some B Figure 152) from Vcl at the Ta that begins from 1H.Yet much less, top operation can be carried out when 1H begins.The variation of the current potential of common signal line 1511 causes the voltage Ve that the current potential (pixel current potential (2)) of capacitor 19 is transferred to.Because transistor 11b and 11c conducting, the current potential of source signal line 18 (electric current) is written in the pixel 16, capacitor 19 chargings (discharge), and when 1H finishes at a C place, target voltage Vb is written in the pixel 16.By way of parenthesis, time T a can be 0 second.(when the beginning of 1H).Best, with time T a be arranged on 0 and 1/5 (comprising both) of 1H between.This is because time expand Ta then reduces the current programmed period itself.
At a C, the current potential of signal line 17a changes to Vgh (cut-off voltage) from Vgl (forward voltage).The variation of this voltage changes pixel current potential (2) as reach throught voltage and by stray capacitance 1381.Along with this variation in the current potential, pixel current potential (2) becomes and equals voltage Vd.At a C, when the current potential of signal line 17a changed to Vgh (cut-off voltage), transistor 11b and 11c ended, capacitor 19 terminals and source signal line 18 are disconnected, and so sustaining voltage Vd.
After finishing 1H (the selection period of pixel (2)) process Tb, the current potential of common signal line 1511 changes to Vcl (seeing the some D Figure 152) from Vch.The change of the current potential of common signal line 1511 causes that the current potential (pixel current potential (2)) of capacitor 19 transfers to target voltage Vb.Therefore by top operation, capacitor 19 sustaining voltage Vb are based on the predetermined current flows driver transistor 11a of pictorial data.
As seeing that the reach throught voltage that is caused by stray capacitance 1318 grades compensates by a signal is put on common signal line 1511 from top operation.This compensation allows the accurately current programmed of pixel 16.By way of parenthesis, the current potential of having stated common signal line 1511 is changing to Vcl through after the Tb from Vch from finishing 1H.Yet Tb can be 0 second.(being right after after the end of 1H) or 1H or longer.
Like this, in the period current potential of common signal line changed to Vch (if before this selection period, change current potential, then no problem, because in this selection period, carry out current programmed) according to motivational techniques of the present invention from Vcl in pixel selection.Thereby, can be before finishing given pixel current programmed, the current potential of common signal line is changed to Vch from Vcl.After period (after perhaps and then should selecting the end of period), motivational techniques change to Vcl with the current potential of common signal line from Vch in pixel selection.
By way of parenthesis, the amplitude of common signal line 1511 (Vch and Vcl) is configured to and can be changed by the adjuster of voltage generator circuit (not shown).The configuration of the configuration of public exciting circuit 1512 and operation and grid pumping circuit 12 and operate same or similar, thereby will the descriptions thereof are omitted.And, the other parts of operation identical with shown in Figure 139, and thereby will the descriptions thereof are omitted.
Top Figure 151 and 152 illustrates the system by operation common signal line compensation reach throught voltage.Figure 153 illustrates by the signal line 17a in the prime of operation pixel and does not use grid pumping circuit 1512 to compensate the configuration of reach throught voltage.
In Figure 153, an end of capacitor 19 is connected to driver transistor 11a and the other end and is connected to signal line 17a in the prime (the last pixel of selecting).Electrode at an end of capacitor 19 is signal line 17a.Identical shown in other parts and Fig. 1 of configuration, 151 etc.
With reference to Figure 154, the voltage waveform of the signal line 17a of signal line 17a (1) remarked pixel (1).Signal line 17a (2) expression is inferior to the voltage waveform of the signal line 17a of the pixel (2) of pixel (1).Signal line 17a (3) expression is inferior to the voltage waveform of the signal line 17a of the pixel (3) of pixel (2).
18 expressions of source signal line put on voltage (electric current) waveform of source signal line.The capacitor current potential of pixel current potential (2) illustration pixel (2) (voltage waveform of the gate terminal G of driver transistor 11a).Scan grid signal wire 17a:(1 in the following sequence) → (2) → (3) → (4) → (5) → ... (1) → (2) → ....
For convenience of explanation, the pixel current potential (current potential of the gate terminal G of driver transistor 11a) that will concentrate on pixel (2) provides description.At first, the pictorial data that in pixel 16, keeps all.In the example of Figure 153, grid pumping circuit 12a applies a forward voltage (Vgl) and two cut-off voltages (Vgh2 and Vgh1) in signal line 17a.Suppose cut-off voltage Vgh2＞cut-off voltage Vgh1, satisfy following condition:
0.02(V)＜Vgh2-Vgh1＜0.4(V)。
At an A, along with the variation of current potential from Vgh1 (cut-off voltage) to Vgl (forward voltage) of the signal line 17a (1) in the prime, the current potential of the capacitor 19 of pixel (2) changes (the pixel current potential changes to Vd from Ve).Therefore, the current potential of the gate terminal G of driver transistor 11a descends.
At a B, along with the variation of current potential from Vgh1 (cut-off voltage) to Vgl (forward voltage) of the signal line 17a of pixel (2), the pixel current potential changes.Because transistor 11b and 11c conducting, the current potential of source signal line 18 (electric current) is written in the pixel 16 and capacitor 19 begins charging (discharge).In the selection period of 1H, reach target voltage Vb.By top operation, capacitor 19 feasible predetermined current based on pictorial data are set flow through driver transistor 11a.
At a C, the current potential of signal line 17a (2) changes to Vgh2 (cut-off voltage) from Vgl (forward voltage).The variation of this voltage changes pixel current potential (2) as reach throught voltage and by stray capacitance 1381.Along with this variation of current potential, pixel current potential (2) becomes and equals voltage Vc.At a C, when the current potential of signal line 17a was changed into Vgh (cut-off voltage), transistor 11b and 11c ended, capacitor 19 terminals and source signal line 18 are disconnected, and so sustaining voltage Vc.
After finishing 1H (the selection period of pixel (2)) process 1H, the current potential of signal line 17a2 changes to Vgh1 (seeing the some D Figure 152) from Vgh2.The variation of the current potential of signal line 17a (2) causes that the current potential (pixel current potential (2)) of capacitor 19 transfers to target voltage Vb.Therefore by top operation, capacitor 19 sustaining voltage Vb are based on the predetermined current flows driver transistor 11a of pictorial data.
As seeing that the reach throught voltage that is caused by stray capacitance 1381 grades is to compensate by three voltages (Vgh1, Vgh2 and Vgl) are put on signal line 17a from top operation.This compensation allows the accurately current programmed of pixel 16.By way of parenthesis, change to Vgh1 although stated the current potential of (the some D among Figure 154) signal line 17a2 after 1H goes over from Vgh2, this is not restrictive.For example, time T a can change current potential (seeing the some D among Figure 155) in the past in 1H.Can change it at 1H or longer time in the past for alternatively.
Although in Figure 153, the signal line 17a in the use prime the invention is not restricted to this as the terminal electrode of the capacitor 19 in the level of back.As illustrative in Figure 156, can use before prime the signal line 17a in the one-level as the electrode of capacitor 19.Sequential chart in this situation shown in Figure 157.
At an A, along with the variation of current potential from Vgh1 (cut-off voltage) to Vgl (forward voltage) of the signal line 17a (1) in the one-level before prime, the current potential of the capacitor 19 of pixel (3) changes (the pixel current potential changes to Ve from Va).Therefore, the current potential at the gate terminal G place of driver transistor 11a descends.
At a B, along with the variation of current potential from Vgl (forward voltage) to Vgh2 (cut-off voltage) of the signal line 17a (1) in the one-level before prime, the current potential of the capacitor 19 of pixel (3) changes (the pixel current potential changes to Va from Ve).Therefore, the current potential at the gate terminal G place of driver transistor 11a rises.
At a C, along with the variation of current potential from Vgh1 (cut-off voltage) to Vgl (forward voltage) of signal line 17a (3), the current potential of the capacitor 19 of pixel (3) changes.Because transistor 11b and 11c conducting, so the current potential of source signal line 18 (electric current) is written in the pixel 16 and capacitor 19 begins charging (discharge).In the selection period of 1H, reach target voltage Vc.
By top operation, capacitor 19 feasible predetermined current flows driver transistor 11a based on pictorial data are set.
At a D, the current potential of signal line 17a (3) changes to Vgh2 (cut-off voltage) from Vgl (forward voltage).The variation of this voltage changes pixel current potential (3) as reach throught voltage and by stray capacitance 1381.Along with this variation of current potential, pixel current potential (3) becomes and equals voltage Vb.At a C, when the current potential of signal line 17a was changed into Vgh (cut-off voltage), transistor 11b and 11c ended, capacitor 19 terminals and source signal line 18 are disconnected, and so sustaining voltage Vb.
After the 1H that finishes 1H (the selection period of pixel (3)) goes over, the current potential of signal line 17a (3) changes to Vgh1 (seeing the some D Figure 157) from Vgh2.Along with the variation of the current potential of signal line 17a (3), the current potential of capacitor 19 (pixel current potential (3)) is transferred to target voltage Vc.Therefore by top operation, capacitor 19 sustaining voltage Vc are based on the predetermined current flows driver transistor 11a of pictorial data.
As seeing that the reach throught voltage that is caused by stray capacitance 1381 grades is to compensate by three voltages (Vgh1, Vgh2 and Vgl) are put on signal line 17a from top operation.This compensation allows the accurately current programmed of pixel 16.
Above improvement or the invention of example by the excitation system effect that compensates reach throught voltage.Reach throught voltage also can use pixel 16 configurations to suppress.In Figure 148, use the p channel switch transistor 11b among p channel transistor 11bp and n channel transistor 11bn replacement Fig. 1.They constitute analog switch.Place phase inverter 1481 so that p channel transistor 11bp and n channel transistor 11bn conducting simultaneously.
When transistor 11b is made up of p channel transistor and n channel transistor,, puts on two transistorized voltages by signal line 17a and cancel each other out as illustrative in Figure 148.This makes might significantly reduce the potential transfer that causes because of reach throught voltage.Much less, as illustrative among Figure 149,, also can realize this effect if transistor 11bn etc. dispose with diode.
Thereby, by using the pixel arrangement shown in Figure 148,149 etc., might compensate the effect of reach throught voltage.And, when making in this way, might compensate reach throught voltage and realize that consistent image shows because of synergy in conjunction with method with reference to descriptions such as Figure 139.
Concentrate on signal line 17a (the WR side is selected signal wire) and described top example.The motivational techniques of signal line 17b (the EL side is selected signal wire) will be described now, in addition.Signal line 17b (the EL side is selected signal wire) is the signal wire that the electric current of EL element 15 is flow through in control.Yet in Figure 63, the electric current that flows through EL element 15 is controlled by switching on and off switch 631.Thereby the control method of the signal line 17b that is described below in addition (the EL side is selected signal wire) can be set fourth as sequential or the time method that Control current flows through EL element 15 again.For convenience of explanation, will quote signal line 17b (the EL side is selected signal wire) in the following description as proof as an example.Much less, the content application that describes below is in according to all excitation systems of the present invention.
Stated that with reference to Figure 15,18,21 etc. each horizontal scanning period (1H) signal line 17b (the EL side is selected signal wire) applies forward voltage (Vgl) and cut-off voltage (Vgh).Yet in the situation of steady current, the luminous quantity of EL element 15 was directly proportional with the duration of electric current.Thereby the duration is not limited to 1H.
Figure 158 illustrates 1/4-load excitation.Every 4H puts on forward voltage signal line 17a (the EL side is selected signal wire) and is synchronized with the position that horizontal-drive signal (HD) scanning has applied forward voltage.Thereby the unit length of conduction period is 1H.
Yet, the invention is not restricted to this.The duration of conduction period can be less than 1H (1/2H among Figure 161), and as shown in Figure 161, perhaps it can be equal to or less than 1H.In brief, the unit length of conduction period is not limited to 1H and can easily uses the OEV2 circuit that forms in the output stage of grid pumping circuit 12b (circuit of control grid signal wire 17b) to produce 1H unit length in addition.The OEV2 circuit is similar to previously described OEV1 circuit, and thereby with the descriptions thereof are omitted.
In Figure 159, the conduction period of the signal line 17b of signal line 17b (the EL side is selected signal wire) does not have the unit length of 1H.In the odd pixel row, in the short slightly time forward voltage put on signal line 17b (the EL side is selected signal wire) than 1H.In the even pixel row, in the very short period, forward voltage put on signal line 17b (the EL side is selected signal wire).The duration T 1 that forward voltage is put on signal line 17b (the EL side is selected signal wire) in the odd pixel row adds that the duration T 2 that forward voltage is put on signal line 17b (the EL side is selected signal wire) in the even pixel row is designed to 1H.Figure 159 illustrates first state.
In following first second, in the even pixel row, in the short slightly time forward voltage put on signal line 17b (the EL side is selected signal wire) than 1H.In the odd pixel row, in the very short period, forward voltage put on signal line 17b (the EL side is selected signal wire).The duration T 1 that forward voltage is put on signal line 17b (the EL side is selected signal wire) in the even pixel row adds that the duration T 2 that forward voltage is put on signal line 17b (the EL side is selected signal wire) in the odd pixel row is designed to 1H.
The total duration that forward voltage puts on signal line 17b in a plurality of pixel columns can be designed to constant.Can supply alternatively, the fluorescent lifetime of the EL element 15 in each pixel column of each can be designed to constant.
The conduction period that Figure 160 illustrates signal line 17b (the EL side is selected signal wire) is the situation of 1.5H.Be designed to overlapping in rising and the decline of the signal line 17b of A place.Signal line 17b (the EL side is selected signal wire) and source signal line 18 are coupled.Thereby any variation of the waveform of signal line 17b (the EL side is selected signal wire) is penetrated into source signal line 18.Therefore, any potential fluctuation of source signal line 18 reduces the accuracy of electric current (voltage) programming, and the scrambling of the characteristic of driver transistor 11a is appeared in the demonstration.
With reference to Figure 160, at an A, the voltage that puts on signal line 17B (the EL side is selected signal wire) (1) changes to cut-off voltage (Vgh) from forward voltage (Vgl).The voltage that puts on signal line 17B (the EL side is selected signal wire) (2) changes to forward voltage (Vgl) from cut-off voltage (Vgh).Thereby at an A, the signal waveform of the signal waveform of signal line 17B (the EL side is selected signal wire) and signal line 17B (the EL side is selected signal wire) is compensated for each other.Therefore, even signal line 17B (the EL side is selected signal wire) and source signal line 18 are coupled, the waveform of signal line 17b (the EL side is selected signal wire) does not penetrate source signal line 18 yet.This improves the accuracy of electric current (voltage) programming, produces consistent image and shows.
By way of parenthesis, in the example of Figure 160, the conduction period is 1.5H.Yet, the invention is not restricted to this.Much less, the duration that applies forward voltage can be 1H or still less, as illustrative in Figure 162.
By regulating the duration that forward voltage is put on signal line 17B (the EL side is selected signal wire), might regulate the brightness of display screen 50 linearly.This can easily finish by control OEV2 circuit.For example, with reference to Figure 163, low than among Figure 163 (a) of the display brightness in Figure 163 (b).And, low than among Figure 163 (b) of the display brightness among Figure 163 (c).
As shown in Figure 164, can in the period of 1H, apply many group forward voltage and cut-off voltage.Figure 164 (a) illustrates and applies six groups example.Figure 164 (b) illustrates and applies three groups example.Figure 164 (c) illustrates and applies one group example.In Figure 164, low than among Figure 164 (a) of the display brightness among Figure 164 (b).Display brightness among Figure 164 (c) low than among Figure 164 (b).Thereby, by the control quantity of conduction period, can easily regulate (control) display brightness.
And, might allow from selecting the different motivational techniques: as illustrative among Figure 98 (a), being used for controlling regularly the motivational techniques of non-display area 52 and viewing area 53, as illustrative among Figure 98 (c), being used for controlling randomly the motivational techniques of non-display area 52 and viewing area 53, and as illustrative among Figure 98 (b), being used for repeating every a frame (field) motivational techniques of non-display area 52 and viewing area 53.Also might under user's control or according to pictorial data, between the pattern of Figure 98 (a), 98 (b) and 98 (c), switch.
Figure 184 is a block scheme, and the source electrode excitation IC (circuit) 14 according to the current excitation of an example of the present invention is shown.Figure 184 illustrates the multistage current mirror circuit that comprises tertiary current source (1841,1842,1843).
In Figure 184, the current value of the current source 1841 in the first order copies to N current source 1842 (wherein N is an arbitrary integer) in the second level by current mirror circuit.The current value of the current source 1842 in the second level copies to M current source 1843 (wherein M is an arbitrary integer) in the third level by current mirror circuit.Therefore, this configuration makes the current value of first order current source 1841 be copied to the third level current source 1843 of N * M.
For example, when with a source electrode excitation IC 14 excitation source electrode signal wires 18, there are 176 outputs (because the source signal line requires to amount to 176 outputs that are used for R, G and B).Here suppose N=16 and M=11.Thereby, 16 * 11=176 and can cover 176 outputs.Like this, by using 8 or 16 multiple for N or M, the current source of wiring and design excitation IC becomes and is easy to.
Use according to the source electrode of the current excitation of multistage current mirror circuit of the present invention excitation IC (circuit) 14 can absorbing crystal pipe characteristic variation, because it has second level current source 1842 in the centre, use current mirror circuit to replace direct current value to copy to N * M third level current source 1843 with first order current source 1841.
Specifically, the invention is characterized in that first order current mirror circuit (current source 1841) and second level current mirror circuit (current source 1842) are placed very closely each other.If first order current source 1841 is connected (promptly with third level current source 1843, in the situation of two-stage current mirror circuit), second level current source 1843 quantity that then are connected to first order current source are very big, make first order current source 1841 and third level current source 1843 to be placed close to each otherly.
According to source electrode exciting circuit 14 of the present invention the current value of first order current mirror circuit (current source 1841) is copied to second level current mirror circuit (current source 1842), and the current value of second level current mirror circuit (current source 1842) is copied to third level current mirror circuit (current source 1842).Use this configuration, be connected to second level current mirror circuit (current source 1842) negligible amounts of first order current mirror circuit (current source 1841).Thereby first order current mirror circuit (current source 1841) and second level current mirror circuit (current source 1842) can be placed close to each other.
Can place close to each other if form the transistor of current mirror circuit, then reduce transistorized variation certainly, and also reduce the variation of current value.The quantity that is connected to the third level current mirror circuit (current source 1843) of second level current mirror circuit (current source 1842) also reduces.Therefore, second level current mirror circuit (current source 1842) and third level current mirror circuit (current source 1843) can be placed close to each other.
That is to say that the transistor in the electric current receiving unit of first order current mirror circuit (current source 1841), second level current mirror circuit (current source 1842) and third level current mirror circuit (current source 1843) can be placed basically close to each other.Like this, the transistor that constitutes current mirror circuit can be placed close to each other, reduces transistorized variation and reduces variation (high precision) from the current signal of lead-out terminal widely.
In the present invention, use term convertibly " current source (current sources) 1841,1842 and 1843 " and " current mirror circuit (current mirror circuits) ".That is to say that current source is a basic structure of the present invention and current source is specific in current mirror circuit.
Figure 185 is the structural drawing of source electrode excitation IC (circuit) 14 more specifically.The part of its illustration the 3rd current source 1843.This is the output that is connected to a source signal line 18.It by with afterbody in a plurality of current mirror circuits (unit transistor 484 (1 unit)) of current mirror configuration same size form.Their quantity is with the position weighting according to the data size of pictorial data.
By way of parenthesis, be not limited to the MOS type according to the transistor of formation source electrode of the present invention excitation IC (circuit) 14 and can be bi-polar type.And they are not limited to silicon semiconductor and can are gallium arsenide semiconductors.And they can be germanium semiconductors.Can use low temperature polycrystalline silicon technology or amorphous silicon technology directly in substrate, to form them for alternatively.
Figure 185 illustration example of the present invention, it handles the input of 6 bit digital.Six is two six powers, and thereby provides 64 gray scales to show.When this source electrode excitation IC 14 is installed on the array base plate,, mean about 260, the 000 kinds of colors of 64 * 64 * 64=for red (R), green (G) and blue (B) respectively provide 64 gray scales.
64 (64) individual gray scales need 1 D0 position unit transistor 1854, two D1 position unit transistors 1854, four D2 position unit transistors 1854, eight D3 position unit transistors 1854,16 D4 position unit transistors 1854, with 32 D5 position unit transistors 1854,63 unit transistors 1854 altogether.Thereby the unit transistor 1854 that use of the present invention and the quantity (being 64 gray scales in this example) of gray scale subtract 1 identical quantity produces an output.By way of parenthesis, even a unit transistor is divided into a plurality of subunit transistors, this means simply that also unit transistor is divided into the subunit transistor, and subtracts unit transistor true as broad as long of 1 identical quantity with the quantity of use of the present invention and gray scale.
In Figure 185, D0 represents LSB input and D5 represents the MSB input.When the D0 input terminal is high (positive logic), Closing Switch 1851a (switch 1851a is the on/off device and the analog switch that can be constituted or can be made up of p channel transistor and N channel transistor by single transistor).Then, electric current flows to the current source (single unit) 1854 that constitutes current mirror.Electric current flows through the inner wire 1853 among the IC 14.Because inner wire 1853 is connected to source signal line 18 by the terminal electrode of IC 14, the electric current that therefore flows through inner wire 1853 provides program current for pixel 16.
For example, when the D1 input terminal is high (positive logic), Closing Switch 1851b.Then, electric current flows to the current source (single unit) 1854 that constitutes current mirror.Electric current flows through the inner wire 1853 among the IC 14.Because inner wire 1853 is connected to source signal line 18 by the terminal electrode of IC 14, provides program current so flow through the electric current of inner wire 1853 for pixel 16.
Similarly be applied to other switch 1851.When the D2 input terminal is high (positive logic), Closing Switch 1851c.Then, electric current flows to four current sources (single unit) 1854 that constitute current mirror.When the D5 input terminal is high (positive logic), Closing Switch 1851f.Then, electric current flows to the individual current sources in 32 (32) (single unit) 1854 that constitute current mirror.
Like this, based on external data (D0 is to D5), electric current flows to corresponding current source (single unit).That is to say that electric current flows to 0 to 63 current source (single unit) according to data.
By way of parenthesis, for convenience of explanation, suppose to exist 63 gray scales to be used for 6 configurations, but this is not restrictive.In the situation of 8 configurations, can form (placement) 255 unit transistors 1854.For 4 configurations, can form (placement) 15 unit transistors 1854.The transistor 1854 of forming unit current source has channel width W and channel length L.Use the transistor that equates to make and to construct output stage with little variation.
In addition, not all unit transistor 1854 need flow through equal electric current.For example, can be to each unit transistor 1854 weightings.For example, can use the mixing of the unit transistor 1854 etc. of the unit transistor 1854 of single unit, the unit transistor 1854 that doubles size, four multiple lengths cun to construct current output circuit.Yet if to unit transistor 1854 weightings, the current source of weighting may not provide correct ratio, causes changing.Thereby, even add temporary, preferably construct each current source by the transistor corresponding to the current source of single unit separately in use.
Best, unit transistor 1854 is n channel transistors.The variation of P raceway groove unit transistor in output current has 1.5 times of the n channel transistor big.
Because preferably the unit transistor 1854 of source electrode excitation IC 14 is n channel transistors, so source electrode excitation IC 14 draws the program current from pixel 16.Thereby the driver transistor 11a of pixel 16 is p channel transistors.Switching transistor 11d among Fig. 1 also is the p channel transistor.
Thereby the unit transistor 1854 in the output stage of source electrode excitation IC (circuit) 14 is that the configuration of p channel transistor is a feature of the present invention for the driver transistor 11a of n channel transistor and pixel 16.By way of parenthesis, preferably all transistors 11 ( transistor 11a, 11b, 11c and 11d) that constitute pixel 16 are the p channel transistors.Because this can eliminate the process that forms the n channel transistor, therefore might realize low cost and high yield.
By way of parenthesis, although stated formation unit transistor 1854 in IC 14, this is not restrictive.Can form source electrode exciting circuit 14 by the low temperature polycrystalline silicon technology.In the sort of situation, again, the unit transistor 1854 that is preferably in the source electrode exciting circuit 14 is n channel transistors.
Use p channel transistor as the transistor 11 of pixel 16 and be used for grid pumping circuit 12.This feasible cost that might reduce base plate 71.Yet in source electrode exciting circuit 14, unit transistor 1854 must be the n channel transistor.Thereby source electrode exciting circuit 14 can directly not form on base plate 71.Thereby source electrode exciting circuit 14 is made independently and is installed on the base plate 71 by silicon chip etc.In brief, configuration the present invention is installed in the outside to source electrode excitation IC 14 (the input program current is as the device of vision signal).
If grid pumping circuit 12 is made of the p channel transistor, then it becomes and is easy to keep (keeping) cut-off voltage (Vgh).When driver transistor 11a, the 11b of pixel 16 and 11c can easily remain on stopping potential, grid pumping circuit 12 couplings were good, and realized and according to the synergy of the pixel arrangement that is made of the p channel transistor of the present invention.
By way of parenthesis, made by silicon chip although stated source electrode exciting circuit 14, this is not restrictive.For example, can use low temperature polycrystalline silicon technology etc. on glass substrate, to form a large amount of source electrode exciting circuits simultaneously, cut into chip, and be installed on the base plate 71.By way of parenthesis, although stated the source electrode exciting circuit is installed on the base plate 71, this is not restrictive.Can adopt any form, as long as the lead-out terminal of source electrode exciting circuit is connected to the source signal line 18 on the base plate 71.For example, source electrode exciting circuit 14 can use TAB technical battery to receive source signal line 18.By on silicon chip, forming source electrode exciting circuit 14 independently, might reduce the variation of output current and realize that suitable image shows and the minimizing cost.
Use the p channel transistor to be not limited to organic EL or other light emitting device (display panel or display) as the selection transistor of pixel 16 and the configuration that is used for grid pumping circuit.For example, also can be applicable to liquid crystal display and FED (electroluminescence demonstration).
If the switching transistor 11b of pixel 16 and 11c are the p channel transistors, then pixel 16 becomes when Vgh and selects, and becomes when Vgl and do not select.As previously described, when signal line 17a changes to disconnected (Vgh) from leading to (Vgl), voltage penetration (reach throught voltage).If the driver transistor 11a of pixel 16 is p channel transistors, then reach throught voltage is limited in more closely that electric current flows through transistor 11a in the black display mode.This makes might realize suitable black demonstration.The problem relevant with the current excitation system is to be difficult to realize black the demonstration.
According to the present invention, if use the p channel transistor as grid pumping circuit 12, then forward voltage is corresponding to Vgh.Thereby grid pumping circuit 12 is with good by pixel 16 couplings of p channel transistor structure.And for improving black the demonstration, importantly program current Iw flows to the unit transistor 1854 of source electrode exciting circuit 14, the situation of pixel 16 configurations as shown in figs. 1 and 2 by driver transistor 11a and source signal line 18 from anode voltage Vdd.Thereby, if use the p channel transistor as grid pumping circuit 12 and pixel 16, source electrode exciting circuit 14 is installed in the substrate, and uses the unit transistor 1854 of n channel transistor as source electrode exciting circuit 14, then can produce good synergistic action effect.In addition, the output current of the unit transistor 1854 that formed by the p channel transistor of the ratio of the unit transistor 1854 that is formed by the n channel transistor changes little.N raceway groove unit transistor 1854 have p raceway groove unit transistor 1854 output current variation 1/1.5 to 1/2, when they have equal area (WL).Reason is preferably used the unit transistor 1854 of n channel transistor as source electrode excitation IC 14 for this reason.
Figure 186 is an exemplary circuit diagram, and 176 outputs (N * M=176) of tertiary current mirror image circuit is shown.In Figure 186, the current source 1841 that is made of first order current mirror circuit is called father's current source (parentcurrent source), the current source 1842 that is made of second level current mirror circuit is called electron current source (childcurrent source), and is called grandson's current source (grandchild current source) by the current source 1843 that third level current mirror circuit constitutes.Use integral multiple for tertiary current mirror image circuit, the feasible variation minimum that might make 176 outputs, and the electric current output that produces high accuracy as the afterbody current mirror circuit.
By way of parenthesis, intensive placement means placement first current source 1841 and second current source 1842 (curtage output and curtage input) in the distance of 8mm at least.Preferably, place them in the 5mm.Illustrate when placing with this density by analysis, current source can be fitted to (Vt and mobility (the μ)) silicon chip of difference seldom that has transistor characteristic.Equally, at least, in the distance of 8mm, place second current source 1842 and the 3rd current source 1843 (electric current output and electric current input).Preferably, place them in the 5mm.Much less, top content also is applied to other example of the present invention.
Curtage output and curtage input mean relation of plane down.In the situation shown in Figure 187, place transistor 1841 (output) of (I) current source and the transistor 1842a (input) of (I+1) current source close to each other based on the conveying of voltage.In the situation shown in Figure 188, place transistor 1841a (output) of (I) current source and the transistor 1842b (input) of (I+1) current source close to each other based on the conveying of electric current.
By way of parenthesis, although supposition has a transistor 1841 in Figure 186,187 etc., this does not limit.For example, also might form a plurality of little sub-transistors 184 and transistorized source electrode of son or drain terminal be connected with register 491 to form unit transistor 1841.By a plurality of little sub-transistors that are connected in parallel, might reduce the variation of unit transistor 1854.
Equally, although supposition has a transistor 1842a, this is not restrictive.For example, also might form a plurality of little sub-transistor 1842a and the gate terminal of transistor 1842a is connected with the gate terminal of transistor 1841.By a plurality of little transistor 1842a that are connected in parallel, might reduce the variation of transistor 1842a.
Thereby, according to the present invention, configuration below can illustration: the configuration that a transistor 1841 is connected with a plurality of transistor 1842a, the configuration that a plurality of transistors 1841 are connected with a transistor 1842a, and the configuration that a plurality of transistors 1841 are connected with a plurality of transistor 1842a.Will be described in greater detail below these examples.
Top content also is applied to transistor 1843a and the 1843b among Figure 189.Possible configuration comprises the configuration that a transistor 1843a is connected with a plurality of transistor 1843b, the configuration that a plurality of transistor 1843a are connected with a transistor 1843b, and the configuration that a plurality of transistor 1843a are connected with a plurality of transistor 1843b.By a plurality of little transistors 1843 that are connected in parallel, might reduce the variation of transistor 1843.
Top content also is applied to the transistor 1842a of Figure 189 and the relation between the 1842b.And, be preferably in and use a plurality of transistor 1843b among Figure 185.
Be made up of silicon chip although stated source electrode excitation IC 14, this is not restrictive.Source electrode excitation IC 14 can be by other structure of semiconductor chip that forms in gallium substrate or germanium substrate.And unit transistor 1854 can be bipolar transistor, CMOS transistor, FET, Bi-CMOS transistor or DMOS transistor.Yet,, preferably use the CMOS transistor as unit transistor 1854 according to the variation of the output that reduces unit transistor 1854.
Best, unit transistor 1854 is N channel transistors.The unit transistor of being made up of p channel transistor has the output variation bigger 1.5 times than the unit transistor of being made up of the N channel transistor.
Because preferably the unit transistor 1854 of source electrode excitation IC 14 is N channel transistors, so the program current of source electrode excitation IC 14 is the electric current that draws from pixel 16.Thereby the driver transistor 11a of pixel 16 is p channel transistors.Switching transistor 11d among Fig. 1 also is a p channel transistor.0657-d thereby, the unit transistor 1854 in the output stage of source electrode excitation IC (circuit) 14 is that the driver transistor 11a of N channel transistor and pixel 16 is that the configuration of p channel transistor is a feature of the present invention.By way of parenthesis, all crystals pipe ( transistor 11a, 11b, 11c and 11d) of preferably forming pixel 16 is a p channel transistor.This eliminates the process that forms the N channel transistor, causes low cost and high yield.
By way of parenthesis, although stated formation unit transistor 1854 in IC 14, this is not restrictive.Can form source electrode exciting circuit 14 by the low temperature polycrystalline silicon technology.In the sort of situation, again, the unit transistor 1854 that is preferably in the source electrode exciting circuit 14 is N channel transistors.
Figure 188 illustrates the example that is used for based on the configuration of the conveying of electric current.Figure 187 also illustrates the example that is used for based on the configuration of the conveying of electric current.Figure 187 is similar with 188 according to circuit diagram, and in layout configurations, i.e. line layout, aspect difference.In Figure 187, reference number 1841 expression first order n channel current source transistors, 1842a represents second level n channel current source transistor, and 1842b represents second level p channel current source transistor.
In Figure 188, reference number 1841a represents first order N channel current source transistor, and 1842a represents second level N channel current source transistor, and 1842b represents second level P channel current source transistor.。
In Figure 187, the grid voltage of the first order current source of being made up of volatile register 491 (being used to change electric current) and N channel transistor 1841 is transported to the grid of the N channel transistor 1842a of second level current source.Thereby this is based on the layout configurations of the conveying type of voltage.
In Figure 188, the grid voltage of the first order current source of being made up of volatile register 491 and N channel transistor 1841a puts on the grid of the N channel transistor 1842a of the second level current source that adjoins, and therefore flows through the p channel transistor 1842b that transistorized current value is transported to second level current source.Thereby this is based on the layout configurations of the conveying type of electric current.
By way of parenthesis, although concentrate on relation between first current source and second current source for the ease of understanding this example of the present invention, but this is not restrictive, and much less this example is also used relation between (can be applied to) second current source and the 3rd current source and the relation between other current source.
In the layout configurations shown in Figure 187 based on the current mirror circuit of the conveying type of voltage, the N channel transistor 1842a that forms the N channel transistor 1841 of first order current source of current mirror circuit and second level current source be separately (more accurately, perhaps be easy to be separated), and thereby two transistors certainly will aspect characteristic, be different.Therefore, exactly the current value of first order current source is not sent to second level current source, and can has variation.
On the contrary, in the layout configurations shown in Figure 188 based on the current mirror circuit of the conveying type of electric current, form the N channel transistor 1841a of first order current source of current mirror circuit and the N channel transistor 1842a position of second level current source and adjoin (being easy to place to such an extent that adjoin each other) each other, and thereby two transistors aspect characteristic, almost do not have difference.Therefore, the current value of first order current source is sent to second level current source exactly, and has seldom variation.
Because top situation, therefore according to the variation that reduces, preferably use based on the conveying type of electric current to replace layout configurations, be used for circuit arrangement (according to the source electrode excitation IC (circuit) 14 of the conveying type based on electric current of the present invention) according to multistage current mirror circuit of the present invention based on the conveying type of voltage.Much less Shang Mian example can be applied to other example of the present invention.
By way of parenthesis, although quoted conveying as proof from first order current source to second level current source for the cause that illustrates, but this can be applicable to the conveying from second level current source to third level current source equally, the conveying from third level current source to fourth stage current source, or the like.And much less the present invention can adopt the configuration of single-stage current source.
Figure 189 illustrates the conveying version based on electric current of the tertiary current mirror image circuit (tertiary current source) shown in Figure 186 (therefore, it illustrates the circuit arrangement based on the conveying type of voltage).
In Figure 189, at first set up reference current by volatile register 491 and N channel transistor 1841.By way of parenthesis, although stated, in fact be provided with and adjust the source voltage of transistor 1841 by the electronic electronic that in source electrode excitation IC (circuit) 14, forms (or placement) by volatile register 491 adjusting reference currents.Can be for alternatively, regulate reference current by the source terminal that directly will offer transistor 1841, as shown in Figure 185 from the electric current of the electronic electronic output of the current type that constitutes by a large amount of unit transistors (single unit) 1854.
The grid voltage of the first order current source that is made of transistor 1841 puts on the grid of the N channel transistor 1842a of the second level current source that adjoins, and therefore flows through the p channel transistor 1842b that transistorized electric current is transported to second level current source.And, the grid voltage of the p channel transistor 1842b of second level current source puts on the grid of the N channel transistor 1843a of the third level current source that adjoins, and therefore flows through the N channel transistor 1843b that transistorized electric current is transported to third level current source.Form (placement) a large amount of N raceway groove unit transistors 1854 at the grid place of the N of third level current source channel transistor 1843b according to desired figure place, as illustrative in Figure 185.
Will be described below according to display panel of the present invention.In according to display panel of the present invention, use the polysilicon technology to form pixel and grid pumping circuit 12.By the IC chip structure source electrode exciting circuit made from silicon chip 14.Thereby source electrode exciting circuit 14 is source electrode excitation IC.Source electrode excitation IC 14 uses the COG technology to be installed on the array base plate 71.Thereby, between source electrode excitation IC 14, a space is arranged.In this space, form anode line (on the surface of array base plate).
As illustrative in Figure 83, anode line 832 is the wirings from the anode splicing ear, and is connected the anode line 832 of the both sides formation of source electrode excitation IC by the anode coupling line 835 that forms under IC 14 in the electronics mode.
On the outgoing side of IC 14, form or place public anode line 833.Anode line 834 is from public anode line 833 bifurcateds.528 (=176 * RGB) bar anode lines 834 are arranged in the QCIF panel.Be provided at illustrative voltage Vdd (anode voltage) among Fig. 1 etc. by anode line 834.If EL element 15 is made by low molecular wt material, the electric current that then reaches 200 μ A greatly flows through an anode line 834.Therefore, approximately the electric current of 100mA (200 μ A * 528) flows through public anode line 833.
For the voltage drop in the public anode line 833 is reduced in the 0.2V, the resistance value of maximum current path must be reduced to 2 Ω or still less (supposition 100mA electric current flow).
Form (placement) anode coupling line 835 14 times at the IC chip.Much less, its live width should be as far as possible slightly to reduce resistance.In addition, be preferably anode coupling line 835 the light shield function is provided.This is to want to prevent the fault that caused by the photoconductive phenomenon among the source electrode excitation IC 14, and this phenomenon is caused by EL element 15 issued lights.Much less, if anode coupling line 835 is to be formed by the metal material that reaches desired film thickness, then it will have the light shield function.
If anode coupling line 835 can not be done enough slightly or,, make as ITO by transparent material, then on (in fact, on the surface of array base plate 71) under the IC chip 14 and on the anode coupling line 835 with list or multiple-level stack light absorping film or optical reflection film.Anode coupling line 835 does not need complete shielded from light.It can have the space.And it can have diffracting effect or dispersion effect.And the optical screen film that is made of a plurality of photo interference films can form or place by piling up on anode coupling line 835.
Certainly, can in the space between array base plate 71 and the IC chip 14, place, insert or form reflecting plate (sheet) or the light absorption plate (sheet) made by metal forming, plate or sheet.Much less, also might place, insert or form non-metal forming is made by the organic or inorganic material reflecting plate (sheet) or light absorption plate (sheet).Can in the space between array base plate 71 and the IC chip 14, insert or be formed on light absorbing material or light reflecting material in gelinite or the liquid condition for alternatively.Best, by heating or by being exposed to light absorbing material or the light reflecting material that is solidificated in the light in gelinite or the liquid condition.By way of parenthesis, suppose that for convenience of explanation anode coupling line 835 made by optical screen film (optical reflection film).
On the surface of array base plate 71, (be not limited to the surface) and form anode coupling line 835.If light does not arrive the back side of IC chip 14, then can satisfy the thought of optical screen film or optical reflection film.Thereby, much less, can on the inside surface of array base plate 71 or internal layer, form anode coupling line 835 etc.It can on the back side of array base plate 71, form anode coupling line 835 (acting as the layout or the structure of reflectance coating or optical screen film) for alternatively, as long as can prevent or reduce light and enter IC14.
Although waited and stated the optical screen film that on array base plate 71, forms etc. with reference to Figure 83, this be not restrictive and can be directly at the back side of IC chip 14 formation optical screen film etc.Under the sort of situation, on the back side of IC chip 14, form the dielectric film (not shown) and on dielectric film, form optical screen film, reflectance coating etc.
When directly on array base plate 71, forming source electrode exciting circuit 14 (by the exciter structure of low temperature polycrystalline silicon technology, high temperature polysilicon technology, solid state growth technology or amorphous silicon technology), can on the optical screen film, light absorping film or the reflectance coating that form on the array base plate 71, form (placement) source electrode exciting circuit 14.
On IC chip 14, form transistor unit such as the current output circuit 1461 (in Figure 146) that flows through Weak current in a large number.When light entered the transistor unit that flows through Weak current, generations such as photoconductive phenomenon made unusual (causing variation etc.) such as output current values (program current Iw).Specifically, in the situation of organic EL or other self-emission device, the light diffuse reflection in array base plate 71 by EL element 15 produces makes light radiate from the position outside the viewing area 50.The light of radiation when the circuit that enters IC chip 14 forms parts 1461, causes photoconductive phenomenon.Thereby, be the distinctive measure of EL display device at the measure of photoconductive phenomenon.
For handling this problem, the present invention constructs anode coupling line 835 and uses it as optical screen film on array base plate 71.The formation zone of anode coupling line 835 covers circuit and forms parts 1461, as illustrative in Figure 83.By such formation optical screen film (anode coupling line 835), might prevent photoconductive phenomenon fully.When clear screen, electric current flows through the EL power lead, as anode coupling line 835, specifically, causes some variation of their current potential.Yet owing to each horizontal scanning period current potential changes gradually, so it can be considered as earthing potential (self-explanatory characters go up current potential in fact and do not change).Thereby anode coupling line 835 is not only finished the light shield function, but also finishes the electric shield function.
For the voltage that reduces public anode line 833 and anode line 834 descends, suggestion forms public anode line 833a at the upside of display screen 50, downside at display screen 50 forms public anode line 833b, and makes anode line 834 short circuits in top and bottom, as illustrative in Figure 84.
Same best be source electrode exciting circuit 14 to be placed on the top and the bottom of screen 50, as illustrative in Figure 85.And, as illustrative in Figure 86, display screen 50 might be divided into display screen 50a and display screen 50b, and encourage display screen 50a, and encourage display screen 50b with source electrode exciting circuit 14b with source electrode exciting circuit 14a.
In the situation of organic EL or other self-emission device, by light diffuse reflection array base plate 71 in that EL element 15 produces, 50 in addition positions radiate from the viewing area to make strong light.For preventing or reducing irreflexive light, be preferably in not by forming light absorping film 1011 in the non-effective coverage that shows effective light for image.On zone on the side of the inside surface of the outside surface of gland bonnet 85, gland bonnet 85, array base plate 71, the base plate except that the image displaying area territory etc., form light absorping film (light absorping film 1011b).By way of parenthesis, optical absorption film can be installed or the light absorption wall replaces light absorping film.In addition, the thought of light absorption also comprises scheme or the structure that light is dispersed by scattered light.In a broad sense, it also comprises scheme and the structure by reflection restriction light.
The possible material that is used for light absorping film comprises, for example, the acryl resin of organic material such as carbon containing, have black pigment be dispersed in wherein organic resin and with the black acid pigment as with painted gelatin or the casein of color filter.In addition, they also comprise independent generation black based on the pigment of fluorine and the green and the red pigment that when mixing, produce black.And they also comprise the PrMnO3 film that forms by sputter, the blue or green film of phthaleinization that forms by plasma polymerization etc.
Figure 94 is the block scheme according to power circuit of the present invention.Reference number 942 expression control circuits, its controlling resistance 945a and the midpoint potential of 945b and signal of output transistor 946.Power supply Vpc puts on the primary side of transformer 941 and under the on/off control of transistor 946 primary current is sent to primary side.Reference number 943 is represented commutation diodes and 944 expression filter capacitors.
Anode voltage Vdd has its output voltage that is adjusted to resistance 945b.Vss represents cathode voltage.Can optionally export one of two voltages as cathode voltage Vss, as illustrative in Figure 95.Use switch 951 to be used for selecting.In Figure 95, select-9 (V) by switch 951.
According to output function switch 951 from temperature sensor 952.When panel temperature is low, select-9 (V) as voltage Vss.When panel temperature equals or be higher than certain level, select-6 (V).This is to uprise in low temperature one side because EL element 15 has the terminal voltage of temperature dependency and EL element 15.By way of parenthesis, although stated one of two voltages of selection as Vss (cathode voltage) with reference to Figure 95, this is not restrictive, and can select voltage Vss from three voltages.Top content is applied to Vdd equally.
By allowing from a plurality of voltages, to select voltage,, might reduce the power consumption of panel as shown in Figure 95 based on panel temperature.This is because can reduce voltage Vss when temperature is equal to or less than certain level.Under the normal condition, can use lower Vss (=-6 (V)).By way of parenthesis, can be as deploy switch 951 illustrative among Figure 96.Can easily produce a plurality of voltage Vss by the centre tap that uses the transformer 941 among Figure 96.This is applied to anode voltage Vdd equally.
Figure 97 is the key diagram that the illustration current potential is provided with, and IC 14 is based on GND (ground connection) in the source electrode excitation.The power supply that is used for source electrode excitation IC 14 is Vcc.Can make Vcc consistent with anode voltage (Vdd).According to the present invention, from the viewpoint Vcc＜Vdd of power consumption.
The cut-off voltage Vgh that grid pumping circuit 12 is set equals or is higher than voltage Vdd.Best, satisfy Vdd+0.5 (V)＜Vgh＜Vdd+2.5 (V).Can make forward voltage Vgl consistent, but preferably satisfy Vss (V)＜Vgl＜-0.5 (V) with Vss.Top voltage is important when being arranged on the pixel arrangement of using among Fig. 1.
Although describe OLED display at this, the display panel that is used for OLED display is not limited to organic EL display panel.For example, as illustrative in Figure 99, display can be by forming with the organic EL display panel of the display panel of deciding with as the display panels 9991 of secondary display panel.
Figure 100 is to use the structural drawing that is used for the main array base plate 71a that shows and is used for the EL display panel of the secondary array base plate 71b that shows.Drying agent 107 is placed (sealing) between array base plate 71a and array base plate 71b (seeing Figure 101).
Reference number 1001 expression connector resins are as ACF.From the signal of source electrode exciting circuit 14 by be sent to the source signal line 18 on the array base plate 71b at the source signal line 18 on the array base plate 71a and connector resin 1001.
Reference number 1004 expression polarizing plate or circular polarizing plates.Between polarizing plate 1004 and array base plate 71, place or form spreading agent 1003.Spreading agent 1003 is also as the bonding agent that polarizing plate 1004 and array base plate 71 are combined.Spreading agent 1003 can be, for example, contain fine powderization titanium dioxide acryloid cement or contain the acryloid cement of the lime carbonate of fine powderization.Spreading agent 1003 improves the efficient of extracting the light that is produced by EL element 15.
Figure 101 is illustrated in the configuration of placing glass ring 1011 between array base plate 71a and the array base plate 17b.The feasible distance that might be provided with between array base plate 71a and the array base plate 17b of the use of glass ring 1011.
Figure 102 is the structural drawing according to panel module of the present invention.Flexible plate 1021 has the function that the signal of input in bonder terminal 1023 is sent to source electrode excitation IC 14 and grid pumping circuit 12.Reference number 1022 expression control IC.
The schematically illustrated signal flow of Figure 103.By controlling input serial data 1031 among the IC 1022 at the line on the flexible plate 1021.Control IC 1022 carries out the serial conversion to produce parallel video data 1032 and grid pumping circuit control data 1033.
Figure 104 illustrates the data that produced by control IC 1022.Input is serial video data DATA, Serial Control data ID and clock CLK.Output is parallel video data (RDATA (red data), GDATA (green data) and BDATA (blue data)), pre-charge voltage (RPV (red pre-charge voltage), GPV (green pre-charge voltage), and BPV (blue pre-charge voltage)), clock (CLK), inversion signal (UD), EL side grid circuit control signal (ELCNTL), WR side grid circuit control signal (WRCNTL) etc.
Figure 108 is the sequential chart of input data signal.When ID when low, DATA is a vision signal.As ID when being high, DATA is a control data.Rising edge at CLK detects data.It also is the example of the control data ID that imports serially that Figure 109 illustrates.Figure 110 illustrates the example that input signal is the LVDS signal.
Figure 105 is the structural drawing according to display panel of the present invention.Figure 105 (a) illustrates the behind of display panel and Figure 105 (b) is the sectional view that A-A ' along the line gets.Heat radiator 1051 is installed in the behind of display panel.And, the thin-film package of describing with reference to Figure 11 is provided.Use bonding agent (not shown) that heat radiator 1051 is attached to thin encapsulating film based on silicon.Bonding agent also is used as the conductor of the heat that is produced by EL element 15.In heat radiator, form a plurality of holes 1052.Air by hole 1052 with from the panel heat release.
As illustrative in Figure 106, on circuit board (printed circuit board (PCB)) 1062, surface mount component 1061 is arranged.Enclose circuit board 1062 by panel splicing ear and flexible plate 1021.Thereby, be sent to panel base plate 71 from the signal of circuit board 1062 by flexible plate 1021.
On printed circuit board (PCB), form bolster (buffering flange) 1063 and contact with base plate 71, damage thin encapsulating film 111 (Figure 106 (a)) to prevent printed circuit board (PCB) 1062.Bolster 1063 can be formed by acryl resin, poly-inferior peace fat resin or polyimide resin.By way of parenthesis, can on panel base plate 71, form bolster 1063, as illustrative in Figure 106 (b).When being placed on panel base plate 71 on the shell 573, bolster 1063 is placed in suggestion between shell 537 and panel base plate 71.
Then, will provide according to the description of the present invention's operation according to the example of the display device of excitation system of the present invention.Figure 57 is the cellular planimetric map as the example of information terminal.Antenna 571, numerical key 572 etc. are installed on the shell 573.Reference number 572 grades are represented the display color switch key, power key and frame rate switch key.
Configurable key 572 makes it to switch between following color mode: once enter 8 kinds of color display modes by it, once enter 256 kinds of color display modes by it again, and once enter 4,096 kinds of color display modes by it again.This key is toggle switch (toggle switch), switches between color display mode when pressing it at every turn.By way of parenthesis, can provide display color to change key individually.In the sort of situation, need three (or more a plurality of) keys 572.
Except that pushbutton switch, key 572 can be slide switch or other mechanical switch.Also can use speech recognition to switch.For example, can deploy switch making the display color of display screen 50 of display panel to change order (such as " high definition demonstrations ", " 256 kinds of color modes " or " hanging down the color display mode ") by speech input color with the user change.This can easily use speech recognition technology to realize.
And the available electron mode is switched display color.Also might use touch panel, it allows the user to select by touch the menu that presents on the display part 21 of display panel.In addition, can switch display color based on rotation or direction based on the number of times of pressing switch or under a situation of batting (click ball).
Can use key that changes frame rate and the key that between moving-picture and still picture, switches to replace display color switch key 572.A key can switch two or more projects at the same time: for example, and between the frame rate and between moving-picture and still picture.And key can being configured to when pressing and pin little by little, (continuously) changes frame rate.For this reason, in the capacitor C and resistance R of oscillator, can make resistance R variable or replace with electronic electronic.Can use the capacitor C of vernier capacitor for alternatively as oscillator.Also can select the one or more capacitors and the capacitor that is connected in parallel to realize a such key by in semi-conductor chip, forming a plurality of capacitors.
By way of parenthesis, be not limited to cell phone according to the technological thought of change frame rate such as display color, but be widely used in equipment, such as palmtop computer, notebook, desktop PC and portable timepiece with display screen.
Equip CCD camera with reference to the cell phone that Figure 57 describes at the back of shell according to the present invention, although not shown in the drawings.Image by the CCD camera can show on the display screen 50 of display panel immediately.The data of being picked up by the CCD camera can show on display screen 50.Can use the pictorial data of between 24 (16,700,000 kind of color), 18 (260,000 kinds of colors), 16 (65,000 kinds of colors), 12 (4,096 kinds of colors) and 8 (256 kinds of colors), switching the CCD camera from the input of key 572.
Figure 58 is the sectional view according to the view finder of embodiments of the invention.For convenience of explanation schematically illustration it.In addition, some part is exaggerated, dwindles and omits.For example, in Figure 58, omit eyepiece cap.Top content also is applied to other accompanying drawing.
The inside surface of fuselage 573 is dead color or black.This is will prevent from EL display panel (EL display) 574 parasitic lights that send diffuse reflection and reduction demonstration contrast in fuselage 573.Phase plate (λ/4) 108, polarizing plate 109 grades are placed on the outgoing side of display panel.This had also described with reference to Figure 10 and 11.
With emergent pupil (eye ring) 581 equipment amplifying lenses 582.The observer focuses on displayed image 50 on the display panel 574 by the position of adjusting emergent pupil 581 in the fuselage 573.
If on demand convex lens 583 are placed on the outgoing side of display panel 574, the chief ray that enters amplifying lens 582 is assembled.This makes the diameter might reduce amplifying lens 582, and thereby reduces the size of view finder.
Figure 59 is the skeleton view of video camera.Video camera has shooting (imaging) lens 592 and camera body 573.Capture lens 592 and view finder 573 lean against each other privately and install.View finder 573 (also seeing Figure 58) has been equipped eyepiece cap.The observer is by the image 50 of eyepiece cap observation on display panel 574.
Also use according to EL display panel of the present invention as display monitor.Display part 50 can optionally be rotated on support point 591.Display part 50 is left in the locker room 593 when not using.
Comprise according to motivational techniques of the present invention and to make the doubly big electric current of N flow through EL element 15 so that their luminous motivational techniques in the period of the 1/M that equals 1F.By changing this luminous period, might change brightness with digital form.For example, specify N=4, then four times of big electric currents flow through EL element 15.If the luminous period is 1/M, then, switch M between 3 and 4 by 1,2, might from 1 to 4 times of change brightness.By way of parenthesis, can switch M between 2,3,4,5,6 grades 1,1.5.
Above-mentioned blocked operation is used for cell phone, and it shows display screen 50 very brightly and reduce display brightness with saves energy after certain period when energising.Also can use it the brightness of being wanted to be set to allow the user.For example, increase the brightness of screen out of doors the time widely.This is because the bright environment of the system of Himdu logic can not be seen screen out of doors at all.Yet EL element 15 worsens rapidly under the condition of the continuous demonstration of high brightness.Thereby, if screen 50 be designed to show very brightly it then in the period of short time, return normal brightness.Should provide and to press to increase the button of display brightness, just in case the user wants once more with high intensity display screen curtain 50.
Thereby preferably the user can change display brightness with pushbutton switch 1594, can automatically change display brightness according to the pattern setting, perhaps can automatically change display brightness by the brightness that detects exterior light.Best, the user can use the display brightness setting, such as 50%, 60%, 80% etc.
Best, display screen 50 uses Gauss (Gaussian) to show.That is to say that the central authorities of display screen 50 are bright, and dark relatively on every side.On watching, if central authorities are bright, even be dark on every side, display screen 50 looks it also is bright.According to subjective assessment,, then there is not too big difference on every side as long as be 70% of central brightness.Even it is brightness on every side reduces to 50%, also almost no problem.Use the head-to-foot generation Gaussian distribution of above-mentioned N times pulse excitation (in the period of the 1/M that equals 1F, make the doubly big electric current of N flow through EL element 15 and make it luminous method) according to light-emitting display panel of the present invention from screen.
In particular, increase the M value in the upper and lower of screen, and reduce the M value in the central authorities of screen.This is to finish by the operating speed of the shift register of modulation grid exciting circuit 12.By video data be multiply by the table data modulate screen about the brightness located.By aforesaid operations brightness (visual angle with 0.9) is on every side reduced to 50%, might compare with 100% brightness and reduce by 20% power consumption.By brightness (visual angle with 0.9) is on every side reduced to 70%, might compare with 100% brightness and reduce by 15% power consumption.
Preferably provide switch to start and to forbid that Gauss shows.If this is because use Gauss shows then can not see around the screen out of doors.Thereby preferably the user can change display brightness with pushbutton switch, can automatically change display brightness according to pattern setting, perhaps can automatically change display brightness by the brightness that detects exterior light.Best, the user can use the display brightness setting, such as 50%, 60%, 80% etc.
Display panels uses back light to produce fixing Gaussian distribution.Thereby they can not start and forbid Gaussian distribution.Start and forbid that the ability of Gaussian distribution is that self-emitting display device is peculiar.
The fixing down frame rate of the illumination of fluorescent light etc. indoors can cause interference, causes flicker.In particular, if EL element 15 is worked on the 60Hz alternating current, then luminous fluorescent light can cause trickle interference on the 60Hz alternating current, and feasible looking seems that shielding is in flicker lentamente.For avoiding this situation, can change frame rate.The present invention has the ability that changes frame rate.And its allows the value of in N times of pulse excitation (equaling to make the doubly big electric current of N flow through the method for EL element 15 in period of 1/M of 1F) change N or M.
Realize top ability by switch 594.When pressing switch 594 more than once the time, according to switching between the superincumbent ability of the menu on the screen 50.
By way of parenthesis, top content is not limited to cell phone.Much less, they can be applicable to televisor, monitor etc.And being preferably in provides icon to know at a glance to allow the user what display mode he is on the display screen.Below top content is applied to equally.
But, and can be applicable to digital camera, the camera shown in Figure 60 according to Applied Photography machine not only such as EL display of this embodiment.Use display as the monitor 50 that is attached on the camera body 601.Camera body 601 equipment switch 594 and shutters 603.
Above-mentioned display panel has relatively little display area.Yet under the situation of 30 inches or bigger display area, display screen 50 certainly will be crooked.For handling this situation, the present invention places display panel framework 611 and encloses accessory, therefore can hanging frame 611, and as shown in Figure 61.It is first-class to use accessory 614 that display panel is installed in wall.
Screen sizes increases the weight of display panel.As measure at this situation, on shelf 613, display panel is installed, will enclose a plurality of legs 612 to support the weight of display panel.
Can from out to out mobile leg 612, as representing by A.And, can shorten them, as representing by B.Thereby, even display can be installed in the little space.
Televisor in Figure 61 has the surface that covers with diaphragm (perhaps fender).A purpose of diaphragm is to prevent the surperficial destroyed of display panel by preventing to be impacted by article.On the surface of diaphragm, form air layer (AIR coat).And, at decorative pattern on the surface pressure to reduce the dazzle that on display panel, causes by exterior light.
Between diaphragm and display panel, form the space by water spray pearl (bead) etc.Forming meticulous projection (projection) on the back side of diaphragm to keep the space between diaphragm and the display panel.This space prevents to impact and is sent to display panel from diaphragm.
And the space that the optocoupler mixture is injected between diaphragm and the display panel is useful.The optocoupler mixture can be a liquid, such as alcohol or ethylene glycol, gelinite, such as acryl resin or hard resin, such as epoxy resin.The optocoupler mixture can prevent boundary reflection and be used as padded coaming.
Diaphragm can be, for example, and polycarbonate membrane (plate), polypropylene (plate), acrylic film (plate), polyester film (plate), PVA film (plate) etc.In addition, much less can use engineering resin film (ABS etc.).And it can be made such as tempered glass by inorganic material.Available epoxy, phenolics and acryl resin are coated with 0.5mm and use diaphragm and produce similar effect to the thick replacement of 2.0mm (comprising both) on the surface of display panel.And, also be useful at the embossed surface of resin.
The surface that is coated with diaphragm or coating with fluorine also is useful.This makes wipes surperficial dirt with detersive easily.And, can make diaphragm thicker, and be used for headlight and be used for screen surface.
Can be in conjunction with the display panel of the empty configuration use of three sides according to example of the present invention.Especially the empty configuration of three sides is useful when using amorphous silicon technical construction pixel.And, using the amorphous silicon technology to form in the situation of panel, owing to be difficult to the variation of the characteristic of oxide-semiconductor control transistors element in process of production, therefore preferably use according to N pulse excitation of the present invention, reset excitation, virtual pixel excitation etc.That is to say, those that are not limited to produce according to transistor of the present invention by the polysilicon technology, and also they can be produced by the amorphous silicon technology.
By way of parenthesis, more effective than the display panel that comprises the transistor 11 that forms by the amorphous silicon technology according to N of the present invention times pulse excitation (Figure 13,16,19,20,22,24,30 etc.) etc. for the display panel that comprises the transistor 11 that forms by the low temperature polycrystalline silicon technology.This is because the transistor that adjoins when being formed by the amorphous silicon technology has almost equal characteristic.Thereby each transistorized exciting current approaches target current, even by come driver transistor (specifically, N times of pulse excitation in Figure 22,24 and 30 is effective for comprising the transistorized pixel arrangement of amorphous silicon) by the electric current that has increased access to.
The technological thought of describing in example of the present invention can be applied to video camera, projector, 3D televisor, projection TV set etc.It also can be applied to view finder, cell phone monitor, PHS, personal digital assistant and monitor thereof and digital camera and monitor thereof.
And this technological thought can be applicable to demonstration (head-mounteddisplay), direct viewing monitor (direct view monitor), notebook-sized personal computer, video camera, the Electrofax of electrophotographic system, head installation.And it can be applicable to ATM monitor, public telephone, visual telephone, personal computer and wrist-watch and display thereof.
And much less, this technological thought can be applied to the display monitor of household electrical appliance, pocket game machine and monitor thereof, is used for the back light of display panel or is used for family expenses or commercial light fixture.Best, the configuration light fixture makes and can change colour temperature.Can change colour temperature by forming rgb pixel at band or in dot matrix and regulating the electric current that flows through them.And this technological thought can be applied to be used for the display of advertisement or placard, RGB traffic lights, alarm lamp etc.
And organic EL display panel is useful as the light source of scanner.Use the RGB dot matrix as light source, read image with the light that is directed to object.Much less, light can be monochromatic.In addition, matrix is not limited to active matrix and can is simple matrix.Use adjustable colour temperature will change visual accuracy.
And organic EL display panel is useful as the back light of display panels.Can change colour temperature, and can also regulate the electric current that flows through them by the rgb pixel that in band or dot matrix, forms EL display panel (back light) and easily regulate brightness.In addition, provide the organic EL display panel of surface source of light, make to be easy to produce Gaussian distribution, this make the brighter and screen of the central authorities of screen around darker.And the organic EL display panel conduct is useful with the back light of the continuous display panels in the field of R, G and B photoscanning successively.And, pass through even can use them also to insert back light black, that be used for the display panels of film demonstration as the opening and closing back light.
Industrial applicability
According to the present invention, display floater, display etc. provides different effects according to their configurations separately, bag Draw together high-quality, high Cine mode performance, low-power consumption, low cost, high brightness etc.
By way of parenthesis, the present invention does not consume too many electric energy, because it can provide the energy-saving information display. And, It does not waste resource, because it can reduced in size and weight. And it can support high-resolution aobvious fully Show panel. Thereby the present invention is friendly for global environment and space environment.
Claims (16)
1. EL display device is characterized in that having:
Substrate with display frame, in described display frame, the configuration of pixels with EL element becomes rectangular;
Be formed on the selection circuit of substrate; And
Source electrode drive circuit,
Described source electrode drive circuit is from the signal output terminal output signal,
In described substrate, form the source signal line that the signal of described source electrode drive circuit is passed to described pixel,
Described selection circuit has input terminal that is connected with the signal output terminal of described source electrode drive circuit and the selection lead-out terminal that is connected with described source signal line,
Described selection circuit has a plurality of groups that comprise described input terminal and a plurality of selection lead-out terminals, and described selection lead-out terminal can be connected with described input terminal,
Described selection circuit is selected the signal of the described source electrode drive circuit of the more than one input terminal that is applied to described selection circuit from described a plurality of selection lead-out terminals, and is applied to the source signal line that is connected with the selection lead-out terminal of described selection.
2. EL display device as claimed in claim 1 is characterized in that,
Described group of described selection circuit comprises an input terminal and at least three selection lead-out terminals,
Connect source signal line, the source signal line that transmits green that transmits danger signal, the source signal line that reaches the transmission blue signal respectively at described three selection lead-out terminals.
3. EL display device as claimed in claim 1 is characterized in that,
In described pixel, form,
To the driving transistor of described EL element supplying electric current,
Supply with the switch transistor of the signal be applied to described source signal line to described driving with transistor, and
Be configured in described driving with transistorized gate terminal and described switch with the capacitor between the transistorized lead-out terminal.
4. EL display device as claimed in claim 1 is characterized in that,
Described source electrode drive circuit is to comprise semi-conductive IC chip,
On described substrate, utilize the polysilicon technology to form described selection circuit.
5. EL display device as claimed in claim 1 is characterized in that,
In described pixel, form to the driving of described EL pixel supplying electric current with transistor and the switch transistor that forms at the current path of described EL pixel,
By making described switch control described electric current with the transistor break-make,
Banded non-display area and viewing area take place in the display frame of described EL display device.
6. EL display device as claimed in claim 1 is characterized in that,
Described EL display device further possesses the detecting unit of the brightness that detects outer light.
7. EL display device as claimed in claim 1 is characterized in that,
Described EL display device also has the time quantum of holding the elapsed time.
8. EL display device as claimed in claim 1 is characterized in that,
In the display frame of described EL display device, red pixel, green pixel, blue picture element and white pixel are configured to rectangular.
9. EL display device as claimed in claim 1 is characterized in that,
In described EL display device, the 1st look pixel becomes rectangular with the 2nd look configuration of pixels,
Described the 1st look pixel size is different with described the 2nd look pixel size.
10. the driving method of an EL display device, described EL display device comprises: the configuration of pixels with EL element becomes rectangular display frame, source electrode drive circuit, and the source signal line that transmits the signal of described source electrode drive circuit to described pixel,
The time component selections from the signal of lead-out terminal output of described source electrode drive circuit, and be applied to a plurality of source electrode signal wires.
11. the driving method of EL display device as claimed in claim 10 is characterized in that,
Banded non-display area and viewing area take place in described display frame,
Described non-display area and viewing area can be moved display image to the above-below direction of display frame.
12. the driving method of EL display device as claimed in claim 10 is characterized in that,
Described EL display device also possesses the detecting unit of the brightness that detects outer light,
Banded non-display area and viewing area take place in described display frame,
According to the output valve of described detecting unit, change the ratio of described non-display area and viewing area or adjust the ratio of described non-display area and viewing area.
13. the driving method of EL display device as claimed in claim 10 is characterized in that,
Described EL display device also possesses the time quantum of holding the elapsed time,
Banded non-display area and viewing area take place in described display frame,
Through behind the certain hour, increase ratio to the described non-display area of described display frame.
14. the driving method of EL display device as claimed in claim 10 is characterized in that,
Banded non-display area and viewing area take place in described display frame,
Possess the unit of the operation that receives the user,, change the ratio of described non-display area and viewing area or be adjusted into the regulation ratio according to indication from described unit.
15. the driving method of EL display device as claimed in claim 10 is characterized in that,
In described pixel, form,
To the driving transistor of described EL element supplying electric current,
Supply with the switch transistor of the signal be applied to described source signal line to described driving with transistor, and
Be configured in described driving with transistorized gate terminal and described switch with the capacitor between the transistorized lead-out terminal.
16. the driving method of EL display device as claimed in claim 10 is characterized in that,
In described pixel, form,
To the driving transistor of described EL element supplying electric current, and
Be configured in the switch transistor between described EL element and the described driving usefulness transistor,
Control described switch transistor by break-make, change the ratio of non-display area and viewing area.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002127637 | 2002-04-26 | ||
| JP2002127532 | 2002-04-26 | ||
| JP2002127637 | 2002-04-26 | ||
| JP2002284393 | 2002-09-27 |
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| CN038150387A Division CN1662947A (en) | 2002-04-26 | 2003-03-06 | Exciting method for EL display panel |
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| CN1983363A true CN1983363A (en) | 2007-06-20 |
| CN100593805C CN100593805C (en) | 2010-03-10 |
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| CN113314073A (en) * | 2021-05-17 | 2021-08-27 | 上海天马微电子有限公司 | Display panel and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI423242B (en) * | 2011-03-01 | 2014-01-11 | Innolux Corp | Image display system and method |
-
2003
- 2003-03-06 CN CN200610168534A patent/CN100593805C/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113314073A (en) * | 2021-05-17 | 2021-08-27 | 上海天马微电子有限公司 | Display panel and display device |
| CN113314073B (en) * | 2021-05-17 | 2022-04-08 | 上海天马微电子有限公司 | Display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100593805C (en) | 2010-03-10 |
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Owner name: TOSHIBA MOBILE DISPLAY CO., LTD. Free format text: FORMER NAME: TOSHIBA MATSUSHITA DISPLAY TECHNOLOGY LTD. Owner name: JAPAN DISPLAY MIDDLE INC. Free format text: FORMER NAME: TOSHIBA MOBILE DISPLAY CO., LTD. |
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Address after: Saitama Prefecture, Japan Patentee after: Toshiba Mobile Display Co.,Ltd. Address before: Tokyo, Japan Patentee before: TOSHIBA MATSUSHITA DISPLAY TECHNOLOGY Co.,Ltd. |
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