CN1983201A - Method for testing CPU system performance - Google Patents

Method for testing CPU system performance Download PDF

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Publication number
CN1983201A
CN1983201A CN 200610087282 CN200610087282A CN1983201A CN 1983201 A CN1983201 A CN 1983201A CN 200610087282 CN200610087282 CN 200610087282 CN 200610087282 A CN200610087282 A CN 200610087282A CN 1983201 A CN1983201 A CN 1983201A
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memory
test
loop test
internal memory
cpu
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CN100478900C (en
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朱星海
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Abstract

A method for testing performance of central processor system includes continuously distributing internal memory module by CPU in utilizing character of using operation system to manage internal memory till all internal memories are exhausted, utilizing existed internal memory unit test means to carry out cyclic test on all internal memory block being distributed with internal memory for realizing to have high acquisition ratio of CPU and internal memory at long time in test course so as to raise quality and effect of performance test.

Description

A kind of central processing unit system performance test methods
Technical field
The present invention relates to a kind of method of testing, relate in particular to a kind of central processing unit system performance test methods.
Background technology
At present, along with development of Communication Technique, the veneer kind is more and more, and travelling speed is more and more faster, therefore to the demands for higher performance of veneer.Central processing unit on the veneer (CPU) system generally comprises: CPU, synchronous dynamic random access memory (SDRAM) and flash memory (FLASH), the FLASH here refer in particular to the FLASH that preserves Basic Input or Output System (BIOS) (BIOS).
Wherein, CPU is the core of veneer, is used to carry out the operations of board software appointment.SDRAM is a kind of dynamic storer, and after the veneer power down, the program or the data that are kept at SDRAM will be lost, and CPU can carry out read-write operation to SDRAM apace.FLASH is a kind of storer of electric erasable, even veneer power down, the program or the data that are kept at wherein can not lost yet, and CPU can read the content among the FLASH easily, and the content of preserving in only just can be to FLASH under specific situation is wiped and write operation.Here, SDRAM belongs to internal memory.
The characteristics of above-mentioned two kinds of storeies itself have determined that CPU is slower to the reading and writing data among the FLASH, and very fast to the reading and writing data among the SDRAM.So general board software all is to be stored among the FLASH, after Board Power up carries out necessary initialization, the program of preserving among the FLASH and data are read among the SDRAM moved again, can guarantee that like this veneer moves with fast speeds.
Cpu system is very important concerning veneer, therefore is necessary cpu system is carried out strict performance test, so that find the potential faults that it may exist.
Existing C PU system performance testing method generally all is to improve CPU usage by some programs of operation in cpu system, but never has good way for how improving memory usage, and therefore, in this case, the test effect also is difficult to guarantee.Such as, people often will carry out so-called " strike-machine ", the performance of coming test computer to it after buying new computer.Common method of testing is: some commercial testing softwares that consume very much internal memory of long-play test, or move some big games, allow computer keep under the situation of higher memory usage, the CPU running at full capacity checks that crashing can or can not appear in computer or abnormal conditions such as reset.These method of testings generally all need the very long test duration, and the test effect is difficult to guarantee.
As can be seen from the above description, though the method that cpu system is tested can satisfy the requirement of cpu system performance test to a certain extent in the prior art, but still there is following shortcoming:
1) how the common concern of commercial testing software makes the CPU running at full capacity, but is difficult to keep highest level for the occupancy of internal memory always.
2) commercial testing software needs the computer operating system support and could move, and can not directly be put on the veneer of communication facilities to move.
3) though adopt the mode of running game to seem effective, but thing very time-consuming, effort, in a single day and stopping recreation, the occupancy of CPU and internal memory will obviously reduce, can not guarantee to allow CPU keep long-time running at full capacity, internal memory can not take especially for a long time in a large number always.And this method can be used for the system test of computer, but can not use on the single-board testing of communication facilities.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of cpu system performance test methods, can guarantee CPU and internal memory long term maintenance under a kind of running at full capacity state, improves test mass and effect.
The invention discloses a kind of cpu system performance test methods, this method may further comprise the steps:
The internal memory of A, distribution central processing unit system, the memory block number that record distributes;
The state of B, preservation metadata cache is closed metadata cache;
C, invoke memory unit testing algorithm carry out loop test to all memory blocks that distribute;
D, determine that loop test finishes after, discharge all internal memories that distribute.
The described storage allocation of steps A is: according to identical memory block size storage allocation or different memory block size storage allocations.
The described storage allocation of steps A is: carry out Memory Allocation by the set memory array of pointers, the memory block size that the element number of described internal memory array of pointers adopts during by memory size and storage allocation is determined.
After finishing, the described definite loop test of step D further comprises: the state of restore data buffer memory.
The described internal storage location testing algorithm of step C further comprises: the state of the buffer memory of holding instruction, OPEN buffer memory before all memory blocks that distribute are carried out loop test.
After the described definite loop test of step D finishes, further comprise: the state that recovers Instructions Cache.
The described definite loop test of step D ends up being: whether cycle index or loop test time according to definition arrive to determine whether loop test finishes.
The described internal storage location testing algorithm of step C includes but not limited to: five-step approach, nine footworks or increment penalty method.
Described central processing unit system is: computer main board central processing unit system or communication equipment veneer central processing unit system.
This shows, in the present invention, the characteristics that cpu system can utilize the operating system management internal memory are the storage allocation buffer zone constantly, idle internal memory is constantly reduced, thereby make the CPU of system can keep high occupancy for a long time, and realized the high utilization rate of internal memory, thereby greatly improved the test mass and the effect of cpu system.
Cpu system method of testing of the present invention has range of application very widely, comprise: the cpu system performance test of various veneers, carry CPU veneer environmental test and aging in test, computer system test, be used to produce the busiest state of cpu system, the condition of creation reproduction problem and on-line testing or the routine test of carrying out cpu system in the system testing process.
Method of testing of the present invention can promote the effect of aging middle test, make cpu system in ageing process, keep running at full capacity always, can improve the aging quality of veneer, that is to say, can shorten the time that reaches identical aging effect, thereby reach the purpose that reduces aging cost.
Method of testing of the present invention can also be by distributing the memory block that surpasses the internal memory of single board size, and realization is to the hard disk of the veneer of computer main board and similar computer main board or the test of CF card.
Description of drawings
Fig. 1 is the process flow diagram of cpu system performance test methods of the present invention;
Fig. 2 is the process flow diagram of a preferred embodiment of the inventive method shown in Figure 1;
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with drawings and the specific embodiments.
Core concept of the present invention is: cpu system can utilize the mechanism of the operating system management internal memory that self has, storage allocation buffer zone constantly, idle internal memory is reduced, and the memory block that utilizes existing internal storage location testing algorithm loop test to be assigned to, thereby make that the CPU of system and internal memory can keep high occupancy for a long time when carrying out the cpu system test.
Referring to Fig. 1, Fig. 1 is the process flow diagram of cpu system performance test methods of the present invention.As shown in Figure 1, this flow process may further comprise the steps:
Step 101, the internal memory of distribution cpu system.
Here, described distribution can be carried out Memory Allocation by definition internal memory array of pointers or alternate manner.
Step 102, can judgement be assigned to memory block, if can, then return step 101, continue the storage allocation piece; Otherwise, execution in step 103.
Step 103, the memory block number that is assigned to of record so that to each memory block that distributes test and end of test (EOT) after discharge all memory blocks that distribute.
Step 104, the state of preservation metadata cache is closed metadata cache then.The purpose of closing metadata cache is to guarantee in the test data write memory unit, guarantees the validity of memory test.
In this step, may further include: the state of the buffer memory of holding instruction, OPEN buffer memory then.Here, the purpose of OPEN buffer memory is in order to improve test speed, because Instructions Cache can be used for storing test instruction, and more faster from the speed of Instructions Cache read test instruction than directly from the internal memory of cpu system, reading.
Step 105, invoke memory unit testing algorithm carries out loop test to all memory blocks that are assigned to previously.
Wherein, described internal storage location testing algorithm can be five-step approach, nine footworks or increment penalty method, also can be other internal storage location testing algorithm.How concrete internal storage location testing algorithm realizes it being those skilled in the art's known technology, repeats no more here.
Step 106 judges whether loop test finishes, and finishes if judge loop test, and then execution in step 107; Otherwise, return step 105 and proceed loop test.
Whether loop test finishes and can judge by the definition cycle index in this step, when reaching defined cycle index, judges that loop test finishes.Just can reach the purpose of adjusting the test duration by adjusting the loop test number of times.Extend the test duration if desired, can realize by increasing cycle index.In theory, the test duration can reach infinitely great.
Judge whether loop test finishes also can directly judge by setting the loop test time, the loop test that sets when arrival judges that loop test finishes during the time.
After loop test finishes, may further include the step of the state of the state of restore data buffer memory and Instructions Cache before the step 106.
Step 107 discharges all internal memories that distribute.
Referring to Fig. 2, Fig. 2 is the process flow diagram of a preferred embodiment of the inventive method shown in Figure 1.As shown in Figure 2, this flow process may further comprise the steps:
Step 201, according to the memory size of cpu system, definition internal memory array of pointers.
Step 202 is utilized the internal memory array of pointers of step 201 definition, according to the memory block of identical size storage allocation successively.
Step 203 judges whether can continue to be assigned to memory block, if can not, then execution in step 204; Otherwise, return step 202 and continue the storage allocation piece.
Step 204, the memory block number that record is assigned to.
The situation that with the memory size is 1G is an example: supposing that memory size is total up to 1G, is 1024 elements according to memory size definition internal memory array of pointers, distributes 1M then at every turn, can distribute the internal memory of 1G altogether, so just can guarantee internal memory is all distributed.
But, if have only the internal memory of 1G in the cpu system, and the test procedure that is moving has taken a part, therefore, unlikely the internal memory with 1G all distributes, promptly when the big or small summation of all memory blocks that distributed is less than 1G, just can not be redistributed to memory block, just can think that internal memory exhausts this moment.After confirming that internal memory has exhausted, the memory block number that record distributes.
Step 205, the state of preservation metadata cache is closed metadata cache; The hold instruction state of buffer memory, the OPEN buffer memory.
Closing metadata cache is not have in the write memory unit in order to prevent test data from just writing metadata cache, guarantees the validity of memory test; The OPEN buffer memory is in order to improve the speed of reading command, to improve testing efficiency before memory test.
Step 206, invoke memory unit testing algorithm carries out the loop test of predetermined number of times to all memory blocks that are assigned to.
Step 207 judges whether cycle index is finished, if finish, then execution in step 208; Otherwise return step 206 and proceed loop test.
Step 208, the original state of restore data buffer memory and Instructions Cache.
Step 209, the memory block number according to record in the step 204 discharges described pointer, promptly discharges all internal memories that distribute.
The described Memory Allocation mode of step 202 in the foregoing description is that the purpose of doing like this is that all internal memories all are assigned to, and conveniently carries out loop test according to the memory block of identical size storage allocation successively.But be not to adopt this mode to carry out Memory Allocation, can realize the distribution of internal memory by memory block not of uniform size yet, as long as the mode that all internal memories all can be assigned to can adopt.
Cpu system performance test methods provided by the invention can also be applied to communication facilities environmental test and aging in.The communication facilities environmental test is meant under the condition that high temperature or temperature cycles change, and the cpu system of communication facilities is carried out performance test, and can the checking cpu system satisfy the requirement of working under rugged surroundings.
Aging being meant of communication facilities powers on in hot environment the veneer of communication facilities for a long time, and veneer is carried out environmental stress screening.If in veneer aging, adopt method of testing of the present invention to allow CPU and internal memory in the ageing process keep running at full capacity always, in same digestion time, can improve the aging quality of veneer so, or under same aging quality, can shorten digestion time.Therefore adopt cpu system method of testing of the present invention, can improve aging effect.
Cpu system performance test methods of the present invention can be applied in the test of veneer of computer main board and similar computer main board.This type of veneer generally all has CPU, internal memory, hard disk or CF card, and hard disk or CF card can be set to the virtual memory of veneer.Can use method of testing of the present invention not only can test to this class veneer, can also stick into the row test the hard disk and the CF of veneer to CPU and internal memory.
Such as in the step 201 of embodiment shown in Figure 2, definition surpasses the array of pointers of internal memory of single board size, suppose that memory size is total up to 1G, definition internal memory array of pointers is 2048 elements, distribute 1M then at every turn, the internal memory that can distribute 2G altogether, the memory block that surpasses 1G that distributes like this is exactly to have pointed to hard disk or the CF card that virtual memory is provided for veneer.When utilizing the internal storage location method of testing that these memory blocks are carried out loop test, just realized test to hard disk or CF card.
Utilize method of testing of the present invention can also carry out the on-line testing or the routine test of cpu system.As computer in normal operation, move Windows operating system, VC++ supervisor on it, at this moment can utilize method of testing provided by the invention to carry out the cpu system test.In this case, computer can't reset or crash, and the speed when just moving other program descends, and significant reaction postpones.After test finished, system can recover normal operating conditions automatically.Therefore,, may influence system performance if utilize cpu system method of testing provided by the invention to carry out on-line testing, but can interrupting service, so can be with cpu system method of testing of the present invention as a kind of typical on-line testing method.
In addition, method of testing of the present invention also can be applied to the routine test to cpu system, promptly can utilize method of testing provided by the invention regularly cpu system to be tested.
In a word, the above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (9)

1, a kind of central processing unit system performance test methods is characterized in that, this method may further comprise the steps:
The internal memory of A, distribution central processing unit system, the memory block number that record distributes;
The state of B, preservation metadata cache is closed metadata cache;
C, invoke memory unit testing algorithm carry out loop test to all memory blocks that distribute;
D, determine that loop test finishes after, discharge all internal memories that distribute.
2, the method for claim 1 is characterized in that, the described storage allocation of steps A is: according to identical memory block size storage allocation or different memory block size storage allocations.
3, method as claimed in claim 1 or 2, it is characterized in that, the described storage allocation of steps A is: carry out Memory Allocation by the set memory array of pointers, the memory block size that the element number of described internal memory array of pointers adopts during by memory size and storage allocation is determined.
4, method as claimed in claim 1 or 2 is characterized in that, after the described definite loop test of step D finishes, further comprises: the state of restore data buffer memory.
5, method as claimed in claim 1 or 2 is characterized in that, the described invoke memory unit testing of step C algorithm further comprises: the state of the buffer memory of holding instruction, OPEN buffer memory before all memory blocks that distribute are carried out loop test.
6, method as claimed in claim 5 is characterized in that, after the described definite loop test of step D finishes, further comprises: the state that recovers Instructions Cache.
7, method as claimed in claim 1 or 2 is characterized in that, the described definite loop test of step D ends up being: whether cycle index or loop test time according to definition arrive to determine whether loop test finishes.
8, method as claimed in claim 1 or 2 is characterized in that, the described internal storage location testing algorithm of step C includes but not limited to: five-step approach, nine footworks or increment penalty method.
9, the method for claim 1 is characterized in that, described central processing unit system is: computer main board central processing unit system or communication equipment veneer central processing unit system.
CNB2006100872829A 2006-06-14 2006-06-14 Method for testing CPU system performance Expired - Fee Related CN100478900C (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103544098A (en) * 2012-07-10 2014-01-29 百度在线网络技术（北京）有限公司 Method and device for testing pressure
CN108781170A (en) * 2016-03-03 2018-11-09 华为技术有限公司 A kind of configuration device and method
CN111628902A (en) * 2019-02-28 2020-09-04 腾讯科技（深圳）有限公司 Rate testing method and apparatus, electronic device, and computer-readable storage medium

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103544098A (en) * 2012-07-10 2014-01-29 百度在线网络技术（北京）有限公司 Method and device for testing pressure
CN103544098B (en) * 2012-07-10 2017-12-12 百度在线网络技术（北京）有限公司 A kind of method and apparatus of pressure test
CN108781170A (en) * 2016-03-03 2018-11-09 华为技术有限公司 A kind of configuration device and method
CN108781170B (en) * 2016-03-03 2020-12-08 华为技术有限公司 Configuration device and method
CN111628902A (en) * 2019-02-28 2020-09-04 腾讯科技（深圳）有限公司 Rate testing method and apparatus, electronic device, and computer-readable storage medium

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