CN1967998A - Three-level double step-down full bridge inverter - Google Patents
Three-level double step-down full bridge inverter Download PDFInfo
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Abstract
The invention relates to a three-voltage dual-reduction full-bridge inverter, wherein it comprises power circuit (1), two reduction circuits (2, 3), filter capacitors and load circuit (4), and work-frequency switch circuit (5); the inputs of circuits (2, 3) are connected to circuit (1), while outputs are connected to filter capacitor and load circuit (4). The invention is characterized in that: the ground part of filter capacitor (Cf) via two switch tubes is connected to the anode and the cathode of bus voltage; the external bus voltage is reduced from 2Ud to Ud. The invention has simple structure and control method.
Description
One, technical field
The present invention relates to a kind of three-level double step-down full bridge inverter, belong to the inverter in the transformation of electrical energy device.
Two, background technology
Along with the development of power electronic technology, supply convertor develops towards high frequencyization and high efficiency direction, and simultaneously a lot of application scenarios such as Aero-Space, UPS etc. have proposed very high requirement to power supply reliability.There is the hidden danger of bridge arm direct pass in the conventional bridge inverter circuit because switching tube is directly connected, and need add control dead area in addition, and output voltage waveforms distortion distortion will be caused in this dead band.The body diode participation work of switching tube in the bridge circuit simultaneously.For MOS type device, the measure that improves the MOSFET performance tends to cause the body diode degradation, is difficult to take into account both optimization.Studies show that the raising along with switching frequency, the reverse-recovery problems of switching device body diode is tending towards seriously, and reverse recovery loss proportion in the converter total losses increases substantially.
At above problem, dual buck half bridge inverter (Dual Buck Half Bridge Inverter---hereinafter to be referred as DBHBI) is proposed and the inverter topology of a kind of novelty of big quantity research in recent years.Recommend relatively, conventional inverter such as half-bridge, full-bridge, DBHBI has the distinct advantages of no bridge arm direct pass and no switching tube parasitic diode reverse-recovery problems, and is especially suitable to the demanding occasion of power supply reliability; The DBHBI that works under the half cycle control model does not have the circulation existence, for high frequencyization and the high efficiency that realizes inverter simultaneously provides a kind of succinct approach.
Also there are following shortcoming in DBHBI and half-bridge inverter (hereinafter both being commonly referred to as the semi-bridge type inverter): device voltage stress is the twice of input voltage, and is difficult in high pressure input applications; Brachium pontis can only export+and 1 and-1 binary states level, work in the bipolarity modulation system, brachium pontis output waveform harmonic content is big, needs high switching frequency and big filter; DC side needs big electric capacity that busbar voltage is divided equally, and perhaps require input voltage itself that positive and negative busbar voltage and ground just are provided, and this all is ungratified in the major applications occasion.
Three, summary of the invention
The objective of the invention is to propose a kind of three-level double step-down full bridge inverter that can overcome the dual buck half bridge inverter weak point.
The three-level double step-down full bridge inverter that the present invention adopts comprises that single power supply constitutes external input power circuit, first buck circuit of conditioning work comprises that the negative electrode of first power diode is connected in the source electrode of first power switch pipe and an end of first filter inductance respectively when the half period of inverter output cathode electric current, and the drain electrode of first power switch pipe connects the positive pole of power circuit, and the anode of first power diode connects the negative pole of power circuit; Second buck circuit of conditioning work comprises that the drain electrode of second power switch pipe is connected in the anode of second power diode and an end of second filter inductance respectively when the half period of inverter output negative pole electric current, and the source electrode of second power switch pipe connects the negative pole of power circuit, the negative electrode of second power diode connects the positive pole of power supply power circuit, the other end of first filter inductance is connected with the other end of second filter inductance, and be connected to the filter capacitor that constitutes by filter capacitor and external load parallel connection and the anode of load circuit, it is characterized in that, also comprise the power frequency switching circuit, the formation of this work frequency circuit is that the drain electrode of the 3rd power switch pipe is connected with the source electrode of the 4th power switch pipe, this tie point links to each other with the negative terminal of filter capacitor and load circuit, the source electrode of the 3rd power switch pipe connects the negative pole of power circuit, and the drain electrode of the 4th power switch pipe connects the positive pole of power circuit.This circuit has kept the advantage of dual buck half bridge inverter: no bridge arm direct pass may; Freewheel current is passed through from power diode, and no switching device body diode reverse is recovered problem.On the basis of traditional dual buck half bridge inverter, carried out following improvement: the positive pole and the negative pole that the former ground connection place of filter capacitor are connect DC bus-bar voltage by two switching tubes respectively, and external DC bus-bar voltage is reduced to Ud by original 2Ud, promptly obtains the three-level double step-down full bridge inverter circuit that the present invention proposes.
Four, description of drawings
Accompanying drawing 1 is a three-level double step-down full bridge inverter electrical block diagram of the present invention.Label title in the accompanying drawing 1: 1. power circuit.2. first reduction voltage circuit.3. second reduction voltage circuit.4. filter capacitor and load circuit.5. power frequency switching circuit.
Accompanying drawing 2 is the dual buck half bridge inverter electrical block diagram.
Accompanying drawing 3 is each switch mode schematic diagram of three-level double step-down full bridge inverter of the present invention.
Accompanying drawing 4 is main waveform schematic diagrames of three-level double step-down full bridge inverter of the present invention.
Accompanying drawing 5 is control block diagrams that three-level double step-down full bridge inverter of the present invention adopts.
Main designation in the above-mentioned accompanying drawing: Cf---output filter capacitor.D1 ~ D2---power diode.Ir---Voltage loop output is current reference.IL1---filter inductance L1 current waveform.IL2---filter inductance L2 current waveform.L1 ~ L2---filter inductance.R---load impedance.S1 ~ S4---power switch pipe.Ud---inverter input DC bus-bar voltage.Uo---inverter output voltage.
Embodiment
Accompanying drawing 1 is the structural representation of three-level double step-down full bridge inverter circuit, the output that comprises power circuit 1 connects first reduction voltage circuit 2 and second reduction voltage circuit 3, the output of first reduction voltage circuit 2 and second reduction voltage circuit 3 links, connect filter capacitor and load circuit 4, power frequency switching circuit one termination filter capacitor and load end, two ends connect the positive and negative end of input power supply respectively in addition.It is characterized in that, constitute input power circuit 1 by single external power supply.First buck circuit 2 of conditioning work when the half period of inverter output cathode electric current, connect by the negative electrode of the first power switch pipe D1, the source electrode of first power switch tube S 1, an end of first inductance L 1, and the drain electrode of first power switch tube S 1 connects the positive pole of power supply Ud, and the anode of the first power diode D1 connects the negative pole of power supply Ud.Second buck circuit 3 of conditioning work when the half period of inverter output negative pole electric current, connect by the drain electrode of second power switch tube S 2, the anode of the second power diode D2, an end of second inductance L 2, and the source electrode of second power switch tube S 2 connects the negative pole of power supply Ud, and the negative electrode of the second power diode D2 connects the positive pole of power supply Ud.One end of first inductance L 1 is connected with an end of second inductance L 2, and be connected to the filter capacitor that constitutes by filter capacitor Cf and load R parallel connection and an end of load circuit 4, the other end of filter capacitor Cf and load R circuit 4 connects an end of power frequency switching circuit simultaneously, the drain electrode that constitutes the 3rd power switch tube S 3 of power frequency switching circuit is connected with the source electrode of the 4th power switch tube S 4, the source electrode of the 3rd power switch tube S 3 connects power cathode simultaneously, and the drain electrode of the 4th power switch tube S 4 connects the positive pole of power supply.
Operation principle of the present invention is: at output voltage greater than zero positive half cycle, switching tube S3 often opens, S4 is normally closed, C point current potential is 0, the output level of brachium pontis mid point A, B is+Ud or 0 at this moment, be added in the poor of voltage brachium pontis mid-point voltage on the filter and C point current potential, be designated as uAC, uBC, equal+Ud or 0; At the minus negative half period of output voltage, switching tube S3 is normally closed, and S4 often opens, and the current potential that C is ordered is+Ud that the voltage that be added on the filter this moment equals-Ud or 0.Output current is greater than 0 positive half cycle, the 1 conditioning work of buck circuit, and buck circuit 2 is not worked; Output current is less than 0 positive half cycle, the 2 conditioning work of buck circuit, and buck circuit 1 is not worked.Output has comprised+1,0 ,-1 ternary level before advancing the three-circuit double step-down full bridge inverter filtering after the above improvement, and device voltage stress is reduced to input voltage.S3, S4 are commonly referred to as power frequency switching circuit (5), and then inverter output voltage is the stack of power frequency switching circuit unit (5) output voltage and two buck circuit unit (2,3) output voltages.The output of power frequency switching circuit is that the C point voltage is the power frequency square wave of a 180o conducting, and the amplitude size is Ud.The function of this part circuit provides the fundametal compoment of output voltage, reduces the converter switches loss.Two buck circuit units then adopt the PWM modulation, to guarantee output voltage waveforms.Because hysteresis current control has the advantage of inherent current limliting, high accuracy and fast dynamic response, can guarantee that two buck circuit units (2,3) do not need any bias current when operate as normal, overcome the voltage distortion that inductive current intermittently causes simultaneously, guarantee that inverter moves under greater efficiency and frequency.Thereby in three-level double step-down full bridge inverter of the present invention, two buck circuit units are adopted hysteresis current PWM controlling schemes.
Be main circuit structure with accompanying drawing 1 below, 3 concrete operation principle and the operation modes of narrating three-level double step-down full bridge inverter of the present invention in conjunction with the accompanying drawings, corresponding circuit key waveforms is seen accompanying drawing 4.
Output current is greater than 0 positive half cycle, the 1 conditioning work of buck circuit, and buck circuit 2 is not worked; Output current is less than 0 positive half cycle, the 2 conditioning work of buck circuit, and buck circuit 1 is not worked.This moment, circuit comprised eight operation modes:
1. operation mode I
Shown in Fig. 3 (a), output voltage uo>0, inductive current iL1>0, inductive current iL2=0, power switch tube S 3 is often opened, and power switch tube S 4 is normally closed, and power switch tube S 2 is turn-offed, power switch tube S 1 is open-minded, and inductive current iL1 is linear to rise, and converter output level (before the filtering) is Ud.
2. operation mode II
Shown in accompanying drawing 3 (b), output voltage uo>0, inductive current iL1>0, inductive current iL2=0, power switch tube S 3 is often opened, and power switch tube S 4 is normally closed, power switch tube S 2 is turn-offed, inductive current iL1 is from power diode D1 afterflow, and linearity descends, and converter output level (before the filtering) is 0.
3. operation mode III
Shown in accompanying drawing 3 (c), output voltage uo>0, inductive current iL1=0, inductive current iL2>0, power switch tube S 3 is often opened, and power switch tube S 4 is normally closed, and power switch tube S 1 is turn-offed, power switch tube S 2 is open-minded, and inductive current iL2 is linear to rise, and converter output level (before the filtering) is 0.
4. operation mode IV
Shown in accompanying drawing 3 (d), output voltage uo>0, inductive current iL1=0, inductive current iL2>0, power switch tube S 3 is often opened, power switch tube S 4 is normally closed, power switch tube S 1 is turn-offed, and power switch tube S 2 is turn-offed, and inductive current iL2 is from power diode D2 afterflow, linear decline, converter output level (before the filtering) is Ud.
5. operation mode V
Shown in Fig. 3 (e), output voltage uo<0, inductive current iL1=0, inductive current iL2>0, power switch tube S 3 is normally closed, and power switch tube S 4 is often opened, and power switch tube S 2 is open-minded, power switch tube S 1 is turn-offed, and inductive current iL2 is linear to rise, and converter output level (before the filtering) is-Ud.
6. operation mode VI
Shown in Fig. 3 (f), output voltage uo<0, inductive current iL1=0, inductive current iL2>0, power switch tube S 3 is normally closed, and power switch tube S 4 is often opened, and power switch tube S 2 is turn-offed, inductive current iL2 is from power diode D2 afterflow, and linearity descends, and converter output level (before the filtering) is 0.
7. operation mode VII
Shown in Fig. 3 (g), output voltage uo<0, inductive current iL1>0, inductive current iL2=0, power switch tube S 3 is normally closed, and power switch tube S 4 is often opened, and power switch tube S 1 is open-minded, power switch tube S 2 is turn-offed, and inductive current iL1 is linear to rise, and converter output level (before the filtering) is 0.
8. operation mode VIII
Shown in Fig. 3 (h), output voltage uo<0, inductive current iL1>0, inductive current iL2=0, power switch tube S 3 is normally closed, power switch tube S 4 is often opened, power switch tube S 1 is turn-offed, and power switch tube S 2 is turn-offed, and inductive current iL1 is from power diode D1 afterflow, linear decline, converter output level (before the filtering) is-Ud.
For realizing above operation principle, adopt controlling schemes as shown in Figure 5: among the figure, ir is that Voltage loop output is current reference.The control of open pipe pipe S3 and S4 is very simple, adopts open loop control, at voltage reference greater than zero positive half cycle, power switch tube S 3 is often opened, and power switch tube S 4 is normally closed, the minus negative half period of voltage reference, make power switch tube S 3 normally closed, power switch tube S 4 is often opened and is got final product.Power switch tube S 3, S4 whole power frequency period all a switch once, the dead band influence can be ignored.Two buck circuit units 2,3 adopt hysteresis current PWM control, are the electric currents of two inductance L 1 and L2 of sampling respectively, advance the driving that obtains power switch tube S 1 and power switch tube S 2 pipes behind two hysteresis comparators respectively.
As seen from the above description, the present invention be a kind of on the dual buck half bridge inverter basis, improve three-level inverter, converter has following advantage:
1. kept the little advantage of the harmonic wave of output voltage content of three-level converter own, helped to reduce filter, can reduce the switching frequency of PWM modulating part simultaneously, reduced switching loss, raised the efficiency;
2. compare with the semi-bridge type inverter, DC side need not all to press big electric capacity, and power device voltage stress is low, makes the switching device of middle low power applicable to high pressure, powerful occasion;
3. having inherited two buck circuit does not have the advantage of bridge arm direct pass, no switching tube body diode reverse recovery problem;
4. entire circuit structure and controlling schemes are all comparatively simple, are easy to realize;
5. need the PWM modulation circuit unit to adopt hysteresis current control scheme, inverter dynamic performance is good.
Claims (1)
1. three-level double step-down full bridge inverter, comprise that single power supply constitutes external input power circuit (1), first buck circuit (2) of conditioning work comprises that the negative electrode of first power diode (D1) is connected in the source electrode of first power switch pipe (S1) and an end of first filter inductance (L1) respectively when the half period of inverter output cathode electric current, and the drain electrode of first power switch pipe (S1) connects the positive pole of power circuit (1), and the anode of first power diode (D1) connects the negative pole of power circuit (1); Second buck circuit (3) of conditioning work comprises that the drain electrode of second power switch pipe (S2) is connected in the anode of second power diode (D2) and an end of second filter inductance (L2) respectively when the half period of inverter output negative pole electric current, and the source electrode of second power switch pipe (S2) connects the negative pole of power circuit (1), the negative electrode of second power diode (D2) connects the positive pole of power supply power circuit (1), the other end of first filter inductance (L1) is connected with the other end of second filter inductance (L2), and be connected to by filter capacitor (Cf) and external load (R) filter capacitor that constitutes in parallel and the anode of load circuit (4), it is characterized in that, also comprise power frequency switching circuit (5), the formation of this work frequency circuit (5) is that the drain electrode of the 3rd power switch pipe (S3) is connected with the source electrode of the 4th power switch pipe (S4), this tie point links to each other with the negative terminal of filter capacitor (Cf) with load (R) circuit (4), the source electrode of the 3rd power switch pipe (S3) connects the negative pole of power circuit (1), and the drain electrode of the 4th power switch pipe (S4) connects the positive pole of power circuit (1).
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