CN1937758A - Low-cost digital television signal encryption method and system - Google Patents
Low-cost digital television signal encryption method and system Download PDFInfo
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Abstract
The invention discloses a kind of low-cost digital TV signal encrypting system, the details are: data receiving cache for receiving and memorizing original digital TV signal and data-delivering cache, frame synchronized detecting module for detecting frame information and outputting synchronized triggering signal and encrypting control module for rewriting the current data in the data-delivering cache. The invention also relates to the relative encrypting approach, its procedures are: A1)data-receiving cache and data-delivering cache receives one bite of original digital TV signal, and data-delivering cache outputs the last bite; A2)frame synchronized detecting module detects the data bite from data-receiving cache to check if it abides by synchronization conditions; A3)frame synchronized detecting module outputs synchronized triggering instruction, and the encrypting control module rewrites current data bite in the delivering cache. The encrypt system just needs a shifting register and logic estimation cell, the circuit is easy and cost is low.
Description
Technical field
The present invention relates to digital television system, particularly digital television system encryption method and system.
Background technology
The digital television program of China is just being prepared to go on the air at present, and it has been within sight that Digital Television replaces simulated television, but the programme signal of puzzlement China Digital Television development is encrypted and the technical problem of Conditional Access, never has fine solution.
Digital television signal transmits with the form of Frame, the code check of transmission is very high, high definition digital television (HDTV) particularly, code check is up to more than the 20MPS, so the encrypting and decrypting of signal generally all needs to realize with high speed data processing device such as RISC-CPU (as: ARM-CPU) that contains the DSP function or SOC or circuit.Use these devices also to need embedded OS software and middleware and data processing software to support.Therefore, hardware cost is very high, and the software development difficulty is also very big.
Therefore, to digital TV programme signal encryption and decryption method cost height, shortcoming such as the technological development difficulty is big is necessary to develop a kind of simple, program of digital TV system encryption system and method cheaply at above.
Summary of the invention
Technical problem to be solved by this invention provides a kind of encryption method of program of digital TV system cheaply and system.
The technical scheme that the present invention deals with problems is to construct a kind of low-cost digital television signal encryption method and system.Program of digital TV system encryption system cheaply, the original figure TV signal is converted to the enciphered digital TV signal, specifically comprise with described original figure TV signal and linking to each other, have the first in first out storage organization, the Data Receiving buffer memory and the data that receive and store the original figure TV signal send buffer memory; Be used for the original figure TV signal that data reception buffer memory is stored is carried out the frame synchronization detection module that frame information detected and exported synchronous triggering signal; Link to each other with the frame synchronization detection module, rewrite data sends the encryption control module of the current data in the buffer memory when synchronous triggering signal occurs; Data send buffer memory time-delay output enciphered digital TV signal, and time-delay equals the interval of twice synchronous triggering signal.The Digital Television model is transmitted with the form of frame, and common frame data comprise synchronization bit and data bit part, and synchronization bit can or comprise synchronous head and end code simultaneously for synchronous head, end code.The Design of length of Data Receiving buffer memory is the integral multiple of frame data, as just in time being the length of frame data, or the length of two frame data etc., data send buffer memory can be designed as identical with the length of Data Receiving buffer memory, also can be inequality.Forward delay interval is the time of digital television signal process Data Receiving buffer memory just.
It is the memory of first in first out form that Data Receiving buffer memory and data send buffer memory, and length is the integral multiple of a frame data length.
The frame synchronization detection module comprises the first memory that is used for the storage frame synchronizing information, also comprise linking to each other with the Data Receiving buffer memory with first memory and the data and the Data Receiving data in buffer of first memory being compared, and when the data of first memory are identical with the Data Receiving data in buffer, produce the bit comparator of synchronous triggering signal.
Encrypt control module and comprise the second memory that is used for when the described data of rewriting send buffer memory, providing enciphered data.
At low-cost digital television signal encryption method of the present invention, use Data Receiving buffer memory and data to send buffer memory and receive original figure TV signal frame signal; One frame signal comprises bit frame and data bit, uses frame synchronization detection module output synchronous triggering signal; Use encryption control module control rewrite data to send data cached, it all is push-up storage that described Data Receiving buffer memory and data send buffer memory, use first memory to preserve bit frame, use second memory to preserve the encryption synchronisation bit, relatively the first memory content is data cached with reception to use bit comparator, specifically comprises the steps:
A1) Data Receiving buffer memory and data send buffer memory according to first in first out, bring in constant renewal in cache contents, and data send bit of buffer memory every reception original figure TV signal, and data send buffer memory and just export a bit;
A2) whether the data bit that detects in the Data Receiving buffer memory of frame synchronization detection module satisfies synchronous condition, if satisfy synchronous condition, and execution in step A3 then), otherwise carry out A1;
A3) data bit in the current output transmission buffer memory is rewritten in frame synchronization detection module output synchronous triggering order, encryption control module when receiving synchronous triggering signal, return steps A 1 then.
Comprise also that in steps A 1 initialization data receives buffer memory and data send buffer memory, as all filling out " 0 " or all filling out " 1 ".
In steps A 2, also comprise:
A2.1) bit comparator receives the ad-hoc location bit of buffer memory with current data and the bit of first memory correspondence position compares, if all bits are relatively then exported synchronous triggering signal to all identical.Because that stores in the first memory is bit frame, the therefore border of aligned frame just of the data bit in Data Receiving buffer memory and the data transmission buffer memory when synchronous triggering.When being a frame, at this moment just in time the synchronization bit of frame data and the data bit of this frame in the metadata cache as data reception buffer storage length.
The rewriting that also comprises the steps: data in steps A 3 can specifically comprise for multiple mode
Method 1: do not change synchronization bit, a rewrite data bit is encrypted control module and is changed the precedence that data send data bit in the buffer memory.When data transmission buffer storage length is a frame data length, frame data can be divided into polylith, exchange according to specific order then, as be divided into two sections of front and back, leading portion and back segment place-exchange.Can revert to original data in decoding end according to opposite exchanging order.When data transmission buffer storage length is two frames, the content of two frame data before and after also can exchanging, and the like.
Method 2: do not change synchronization bit, a rewrite data bit, bit carries out code conversion in the encryption control module change data transmission buffer memory.The mode of coding also can be diversified, and as directly that data bit is anti-phase, promptly " 0 " becomes " 1 ", and 1 becomes " 0 ".
Method 3: do not change data bit, only rewrite synchronization bit, encrypt control module, use the bit frame in the encrypted frame synchronization bit replacement data transmission buffer memory of storing in the second memory.
Can use three kinds of above-mentioned methods to make up simultaneously.
Adopt method of the present invention, key is the data bit to be carried out the division of frame, only needs some shift registers of design and logic judgment unit to realize, therefore can use programmable logic device such as CPLD/EPLD/FPGA to realize, circuit is simple, cost is low.And encrypting and decrypting do not need software development, more do not need operating system platform, thereby the technological development difficulty is low, and reliability also can further improve.
The present invention is described in further details by implementation column below in conjunction with accompanying drawing.
Description of drawings
Figure 1 shows that the basic coding form of digital television signal in transmission course;
Figure 2 shows that the theory diagram of low-cost digital television signal encryption system of the present invention;
Figure 3 shows that the flow chart of low-cost digital television signal encryption method of the present invention;
Figure 4 shows that theory diagram according to a kind of preferred implementation of low-cost digital television signal encryption system of the present invention.
Embodiment
Fig. 1 is the basic coding form of digital television signal in transmission course, also is the basic transmission coded format of general digital signal.Comprise synchronous head in this coded format, transmit three chief components such as data and end code, synchronous head and end code are referred to as bit frame.This data structure, people call it " frame ", and digital signal one frame one frame ground transmits.Synchronous head and end code all are made up of some bits respectively, and the bit number of general frame is many more, and promptly the length of frame is long more, and the interval between two consecutive frames is short more, requires the number of bits of synchronous head and end code also many more.If the interval between two consecutive frames is very long, then synchronous head and end code only need one or two bit to get final product enough.The length of frame is mainly decided by data content, and the interval of frame and frame is then decided by the data conveying capacity.The amount of information of digital television signal is very big, so frame is obtained very long, also very short at interval.
In transmission process for digital signal, if lost synchronous head and end code, or mistaken synchronous head and end code, and signal just can't transmit data, because this is equivalent to make signal to lose sequential, there is not sequential just can't from signal, data to be separated and decode.If the order of data bit or carried out encryption in the frame, then receiving terminal also can't directly use.
Be illustrated in figure 2 as the theory diagram of low-cost digital television signal encryption system of the present invention.By the low-cost digital television signal encryption system, the original figure TV signal is converted to the enciphered digital TV signal, the low-cost digital television signal encryption system comprises with described original figure TV signal and linking to each other, have the first in first out storage organization, the Data Receiving buffer memory and the data that receive and store the original figure TV signal send buffer memory; Be used for the original figure TV signal that data reception buffer memory is stored is carried out the frame synchronization detection module that frame information detected and exported synchronous triggering signal; Link to each other with the frame synchronization detection module, rewrite data sends the encryption control module of the current data in the buffer memory when synchronous triggering signal occurs; Data send buffer memory time-delay output enciphered digital TV signal, and time-delay equals the interval of twice synchronous triggering signal.The Digital Television model is transmitted with the form of frame.The Design of length of Data Receiving buffer memory is the integral multiple of frame data, as just in time being the length of frame data, or the length of two frame data etc., data send buffer memory can be designed as identical with the length of Data Receiving buffer memory, also can be inequality.Forward delay interval is the time of digital television signal process Data Receiving buffer memory just.
Be illustrated in figure 3 as the flow chart of low-cost digital television signal encryption method of the present invention.Specifically comprise the steps:
S1) initialization data receives buffer memory and data transmission buffer memory;
S2) Data Receiving buffer memory and data send buffer memory and receive bit of original figure TV signal, according to first in first out, upgrade cache contents, and data send buffer memory and export last bit;
S3) whether be frame boundaries alignment to the frame synchronization detection module if relatively current data being received the bit in the buffer memory, if for frame boundaries aligns, and execution in step S4 then, otherwise return step S2.During the output synchronous triggering signal, if the Data Receiving buffer memory is a frame data length, then just be complete frame data this moment in the Data Receiving buffer memory;
S4) frame synchronization detection module output synchronous triggering order;
S5) encrypt control module to sending the complete frame in the metadata cache, carry out the bit frame displacement, or (with) the data bit conversion or (with) the bit order conversion, return step S2 then.
Be illustrated in figure 4 as theory diagram according to a kind of preferred implementation of low-cost digital television signal encryption system of the present invention.
Shift register 1 composition data input-buffer, shift register 2 composition data output bufferses, the length of shift register 1 and shift register 2 all is designed to the length of frame data.First memory is specially memory 1, because memory 1 storage is the bit frame of fixing, is synchronous head and end code, therefore can adopt ROM; Second memory is specially memory 2, because memory 2 storages is the bit frame of encrypting, may change, and therefore can adopt RAM; Memory 2 constitutes encrypts control module.Whether the data that bit comparator is monitored in the shift register 1 constantly are consistent with the data bit in the memory 1, when both are consistent, be in the shift register 1 just the position finish frame data the time, triggering signal of bit comparator output is given memory 2, synchronous head and end code in the original frame in the synchronous head of the encryption of the storage in the memory 2 and the end code information replacement shift register 2.Shift register 1 and shift register 2 all are connected to K switch, respectively the digital television signal frame data of time-delay output not encrypted and encryption.Select to select to export the digital television signal frame data of not encrypted or encryption through K switch.
Claims (10)
1, a kind of low-cost digital television signal encryption system, the original figure TV signal is converted to the enciphered digital TV signal, it is characterized in that, comprise with described original figure TV signal and linking to each other, have the first in first out storage organization, the Data Receiving buffer memory and the data that receive and store described original figure TV signal send buffer memory; Be used for the described original figure TV signal that described Data Receiving buffer memory is stored is carried out the frame synchronization detection module that frame information detected and exported synchronous triggering signal; Link to each other with described frame synchronization detection module, when described synchronous triggering signal occurs, rewrite the encryption control module that described data send the current data in the buffer memory; Described data send buffer memory time-delay output enciphered digital TV signal, and described time-delay equals the interval of twice synchronous triggering signal.
According to the described low-cost digital television signal encryption system of claim 1, it is characterized in that 2, it is the integral multiple of a frame data length that described Data Receiving buffer memory and data send buffer storage length.
3, according to the described low-cost digital television signal encryption system of claim 1, it is characterized in that, described frame synchronization detection module comprises the first memory that is used for the storage frame synchronizing information, also comprise linking to each other with described Data Receiving buffer memory with described first memory and the data and the described Data Receiving data in buffer of described first memory being compared, and when the data of described first memory are identical with described Data Receiving data in buffer, produce the bit comparator of synchronous triggering signal.
According to the described low-cost digital television signal encryption system of claim 1, it is characterized in that 4, described encryption control module comprises the second memory that is used for providing enciphered data when the described data of rewriting send buffer memory.
5, a kind of low-cost digital television signal encryption method is characterized in that, uses Data Receiving buffer memory and data to send buffer memory and receives original figure TV signal frame signal; One frame signal comprises bit frame and data bit, uses frame synchronization detection module output synchronous triggering signal; Use encryption control module control rewrite data to send data cached, it all is push-up storage that described Data Receiving buffer memory and data send buffer memory, use first memory to preserve bit frame, use second memory to preserve the encryption synchronisation bit, relatively the first memory content is data cached with reception to use bit comparator, specifically comprises the steps:
A1) Data Receiving buffer memory and data send buffer memory according to first in first out, bring in constant renewal in cache contents, bit of the every reception original figure of Data Receiving buffer memory TV signal, and data send buffer memory and just export a bit;
A2) whether the data bit that detects in the Data Receiving buffer memory of frame synchronization detection module satisfies synchronous condition, if satisfy synchronous condition, and execution in step A3 then), otherwise carry out A1;
A3) data bit in the current output transmission buffer memory is rewritten in frame synchronization detection module output synchronous triggering order, encryption control module when receiving synchronous triggering signal, return steps A 1 then.
6, according to the described low-cost digital television signal encryption method of claim 5, it is characterized in that described steps A 1) in also comprise:
A1.1) initialization data receives buffer memory and data transmission buffer memory.
7, according to the described low-cost digital television signal encryption method of claim 5, it is characterized in that described steps A 2) in also comprise:
A2.1) bit comparator relatively receives current data the ad-hoc location bit of buffer memory and the bit of first memory correspondence position compares, if all bits are relatively then exported synchronous triggering signal to all identical.
According to the described low-cost digital television signal encryption method of claim 5, it is characterized in that 8, described steps A 3 also comprises the steps:
A3.1) encrypt the precedence that the control module rewrite data sends data bit in the buffer memory.
According to the described low-cost digital television signal encryption method of claim 5, it is characterized in that 9, described steps A 3 also comprises the steps:
A3.2) data bit carries out code conversion in the encryption control module change data transmission buffer memory.
According to the described low-cost digital television signal encryption method of claim 5, it is characterized in that 10, described steps A 3 also comprises the steps:
A3.3) encrypt control module, use the bit frame in the encrypted frame synchronization bit replacement data transmission buffer memory of storing in the second memory.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2005101009146A CN100542266C (en) | 2005-10-31 | 2005-10-31 | A kind of digital television signal encryption method and system |
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| CNB2005101009146A CN100542266C (en) | 2005-10-31 | 2005-10-31 | A kind of digital television signal encryption method and system |
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| CN1937758A true CN1937758A (en) | 2007-03-28 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103139642A (en) * | 2013-02-20 | 2013-06-05 | 深圳创维数字技术有限公司 | Method, related device and system of signal encryption achieved in set top box |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103139642A (en) * | 2013-02-20 | 2013-06-05 | 深圳创维数字技术有限公司 | Method, related device and system of signal encryption achieved in set top box |
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