CN1906581A - Information processing apparatus, process control method, and computer program - Google Patents
Information processing apparatus, process control method, and computer program Download PDFInfo
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Abstract
A method and apparatus for processing data with optimum logical processor allocated to physical processor are provided. In data processing where a logical processor is allocated to a physical process, entry setting and updating process of a first conversion table and a second conversion table are performed. The first conversion table converts a logical partition address (virtual physical address) space into physical address space, and the second conversion table converts virtual address space into the physical address space. The allocation of the logical processor to the physical processor is thus updated. In this arrangement, data processing is performed so that the logical processor is allocated to the physical processor in an optimum manner with hardware workload and the form of data processing program taken into account.
Description
Technical field
The present invention relates to messaging device, process control method and computer program.More particularly, the present invention relates to such messaging device, process control method and computer program, they are used at the many OS environment that has a plurality of operating systems (OS) to work, and utilize the concurrent physical processor that is assigned to the logic processor in the logical partition of each OS with time division way to come deal with data.
Background technology
Have in individual system in many OS system of a plurality of operating systems (OS), each OS can carry out processing separately, and with time sequencing switch continuously such as CPU (central processing unit) (CPU) and storer to this system's general hardware.
For example, carry out the scheduling of the processing (task) of a plurality of OS by the partition management software program.If OS (α) and OS (β) coexist as in the individual system, wherein OS (α) be treated to subregion A and OS (β) be treated to subregion B, then the partition management software program is determined the scheduling of subregion A and subregion B, and utilizes the hardware resource that distributes based on determined scheduling to carry out the processing of OS.
In so many OS system, the entity handles data are set to subregion.More particularly, logical partition is set to the entity of the resource in the shared system.Will be such as the various resources allocations service time, virtual address space and the storage space of concurrent physical processor to logical partition.Using the resource of being distributed to carry out then handles.In this logical partition, be provided with and the corresponding logic processor of any concurrent physical processor, and carry out data processing based on this logic processor.Logic processor is always so that relation is corresponding with concurrent physical processor one to one.For example, single logic processor can be corresponding with a plurality of concurrent physical processors, and a plurality of logic processor can be corresponding to the single physical processor.
If use a plurality of processing of logic processor executed in parallel, then use concurrent physical processor by dispatching a plurality of logic processors.More particularly, a plurality of logic processors use concurrent physical processor with time division way.
When using a plurality of logic processors to utilize applied a plurality of concurrent physical processor deal with data, a kind of method that increases data-handling efficiency is the relations of distribution that are provided with and are updated between logic processor and the concurrent physical processor.If use a concurrent physical processor for a long time, then this physical treatment actuator temperature is raise as the result who heats.If used a plurality of concurrent physical processors, then be preferably and switch concurrent physical processor rightly.
[patent documentation 1] Japanese uncensored patented claim discloses 2003-345612 number
Summary of the invention
[the problem to be solved in the present invention]
The object of the present invention is to provide such messaging device, process control method and computer program, it is used for using a plurality of logic processors to come the data handling system of deal with data to utilize a plurality of applied concurrent physical processors, be provided with and upgrade the relations of distribution suitable between logic processor and the concurrent physical processor realizing data processing efficiently, and avoid time period of using concurrent physical processor long.
The present invention also aims to the messaging device, process control method and the computer program that provide such, it is used for by suitably being provided with and being updated in the form of the address space conversion application between virtual address space, (physical vlan address) space, logical partition address and the physical address space, be provided with by rights and upgrade the relations of distribution between logic processor and the concurrent physical processor, so that deal with data efficiently.
[device that addresses these problems]
In a first aspect of the present invention, messaging device comprises: control OS, carry out the processing that is used for time division way a plurality of logic processors being assigned to concurrent physical processor; And boarding OS, for it is provided with logical partition as the application entity of logic processor.Control OS is provided with and upgrades two address translation forms as the address translation form that is used for determining the relations of distribution between logic processor and the concurrent physical processor, first converting form in two address translation forms is provided with the relations of distribution between logical partition address space and the physical address space, and second converting form is provided with the virtual address space of boarding OS and the relations of distribution between the physical address space.
In the messaging device of one embodiment of the present of invention, control OS obtain with first conversion table in the corresponding physical address of index determined of logic-based partition address, and upgrade and second conversion table in based on virtual address and definite corresponding physical address of index.
In the messaging device of one embodiment of the invention, for the relations of distribution between switch logic processor and the concurrent physical processor, control OS obtain according in first conversion table with being assigned to the corresponding index of logic processor of concurrent physical processor definite physical address; Make the clauses and subclauses of all maintenance physical addresss that obtain in second conversion table invalid; Obtain with corresponding first conversion table of logic processor that newly is assigned to this concurrent physical processor in index, and will for its physical address information of concurrent physical processor that has distributed this logic processor as storing with the corresponding physical address of the index that is obtained.
In the messaging device of one embodiment of the invention, physical address comprises the physical address of the MMIO register in the concurrent physical processor.
In the messaging device of one embodiment of the invention, control OS is when the running time of the processing of using a concurrent physical processor reaches the predetermined threshold time, upgrade the relations of distribution between logic processor and the concurrent physical processor, to switch to another from a concurrent physical processor.
In the messaging device of one embodiment of the invention, OS is when the temperature of a concurrent physical processor reaches predetermined threshold in control, upgrades the relations of distribution between logic processor and the concurrent physical processor, to switch to another from a concurrent physical processor.
In the messaging device of one embodiment of the present of invention, control OS is provided with the relations of distribution between logic processor and the concurrent physical processor, so that the concurrent physical processor of a plurality of parallel work-flows is set to be connected to the concurrent physical processor group on same feeder road.
In the messaging device of one embodiment of the invention, control OS based on concurrent physical processor to being arranged in the access status of the storer at diverse location place in the messaging device, to the mode that the frequency of access the closer to the storer of this concurrent physical processor location becomes high more, the relations of distribution between logic processor and the concurrent physical processor are set with concurrent physical processor.
In a second aspect of the present invention, a kind of utilization comes the process control method of deal with data with a plurality of logic processors that time division way is assigned to concurrent physical processor, comprising: logical partition is set with the application entity as logic processor on boarding OS; And upgrading two address translation table, first conversion table wherein is provided with the relations of distribution between logical partition address space and the physical address space, and second conversion table is provided with the virtual address space of boarding OS and the relations of distribution between the physical address space.
In the process control method of one embodiment of the invention, the table update step comprises: obtain with first conversion table in logic-based partition address and definite corresponding physical address of index; And upgrade and second conversion table in based on virtual address and definite corresponding physical address of index.
In the process control method of one embodiment of the invention, for the relations of distribution between switch logic processor and the concurrent physical processor, this process control method also comprises: upgrade according in first conversion table with the corresponding index of logic processor that is assigned to concurrent physical processor definite physical address; Make the clauses and subclauses of the physical address that all maintenances are obtained in second conversion table invalid; Obtain the corresponding index of logic processor that in first conversion table and newly is assigned to this concurrent physical processor; And will store with the corresponding physical address of the index that is obtained for it has distributed the physical address information conduct of the concurrent physical processor of this logic processor.
In the process control method of one embodiment of the invention, in this process control method, be preferably the physical address that this physical address comprises the MMIO register in the concurrent physical processor.
In the process control method of one embodiment of the invention, described process control method comprises: reach moment of predetermined threshold time in the running time of the processing of using a concurrent physical processor, upgrade the relations of distribution between logic processor and the concurrent physical processor so that switch to another from a concurrent physical processor.
In the process control method of one embodiment of the invention, control OS comprises: reach moment of predetermined threshold at a physical treatment actuator temperature, upgrade the relations of distribution between logic processor and the concurrent physical processor so that switch to another from a concurrent physical processor.
In the process control method of one embodiment of the invention, control OS comprises: the relations of distribution between logic processor and the concurrent physical processor are set, so that the concurrent physical processor of a plurality of parallel work-flows is set to be connected to the concurrent physical processor group on same feeder road.
In the process control method of one embodiment of the invention, control OS comprises: based on the access situation of concurrent physical processor to the storer that is arranged in diverse location place in the messaging device, to the mode that the frequency of access of the storer arranged the closer to this concurrent physical processor becomes high more, upgrade the relations of distribution that are provided with between logic processor and the concurrent physical processor with concurrent physical processor.
In a third aspect of the present invention, a kind of utilization comes the computer program of deal with data with a plurality of logic processors that time division way is assigned to concurrent physical processor, comprising: logical partition is set with the step as the application entity of logic processor on the OS in boarding; And the step of upgrading two address translation table, first conversion table wherein is provided with the relations of distribution between logical partition address space and the physical address space, and second conversion table is provided with the virtual address space of boarding OS and the relations of distribution between the physical address space.
Computer program in the one embodiment of the invention is with the computer-readable recording medium such as CD, FD or MO, and perhaps the form of the communication media such as network offers the general-purpose computing system of carrying out various program codes.By providing computer program in computer-readable mode, computer system is carried out processing in response to computer program.
According to following description to the present invention and accompanying drawing, these and other feature of the present invention, and advantage will become obvious.In the context that the present invention describes, system is meant the logical collection of a plurality of equipment, and is not limited to the equipment that comprises a plurality of unit in same shell.
[advantage]
According to embodiments of the invention, logic processor is assigned to concurrent physical processor.Setting comprises the form of using in the address translation between the different address spaces of virtual address space, logical partition address (physical vlan address) and physical address.By suitably revising these conversion tables, the suitable relations of distribution between setting and renewal logic processor and the concurrent physical processor.Therefore carry out data processing efficiently.
According to embodiments of the invention, control OS uses two address translation table, promptly being used for logical partition address (physical vlan address) space conversion is first conversion table of physical address space, and second conversion table that is used for virtual address space is converted to physical address space.By being provided with and being updated in the clauses and subclauses in these forms, control OS upgrades the relations of distribution between logic processor and the concurrent physical processor.According to circumstances, the relations of distribution between modification logic processor and the concurrent physical processor.Concurrent physical processor is therefore according to data processing sequence, with the time division way deal with data.Consider working load on hardware and data processor and suitably carry out data processing.
According to embodiments of the invention, control OS carries out in turn concurrent physical processor and handles, promptly by upgrading the migration process of conversion table.This is arranged and controls the heating of using the concurrent physical processor that causes owing to long-time continuous.
According to embodiments of the invention, in system, be assigned to a plurality of logic processor parallel work-flows of different concurrent physical processors with one group of concurrent physical processor that is connected to different supply lines.By logic processor being assigned to the concurrent physical processor that is connected to the same feeder road, can removing and supply with the electric power that is in the concurrent physical processor group in the idle pulley.Therefore carried out energy-conservation.
According to embodiments of the invention, in this equipment, be furnished with in the system of a plurality of storeies in the diverse location, the scheduler conversion table is handled corresponding logic processor with handle and each and is disposed to more close it is had the concurrent physical processor of the storer of higher frequency of access.This processor distribution is handled and has been realized data access at a high speed, causes high efficiency data processing thus.
Description of drawings
Fig. 1 is the block diagram of the messaging device of one embodiment of the invention.
Fig. 2 illustrates the structure of the processor module in this messaging device.
Fig. 3 illustrates the structure of the operating system in the messaging device of one embodiment of the invention.
Fig. 4 illustrates with time division way logic processor is assigned to concurrent physical processor.
Fig. 5 illustrates the allocation process between logic processor and concurrent physical processor.
Fig. 6 illustrates address space and the converting form as the address transition mechanism in the messaging device of one embodiment of the invention.
Fig. 7 illustrates first conversion table of the messaging device that is applied to one embodiment of the invention.
Fig. 8 illustrates second conversion table of the messaging device that is applied to one embodiment of the invention.
Fig. 9 illustrates the process flow diagram that the renewal of the clauses and subclauses in the conversion table is handled.
Figure 10 illustrates particularly in conversion process the renewal of clauses and subclauses is handled.
Figure 11 is the process flow diagram that diagram is updated in the processing of the relations of distribution between logic processor and the concurrent physical processor.
Figure 12 specifically illustrates the process flow diagram of the processing that is updated in the relations of distribution between logic processor and the concurrent physical processor.
Figure 13 specifically illustrates the process flow diagram of the processing that is updated in the relations of distribution between logic processor and the concurrent physical processor.
Figure 14 specifically illustrates the processing that is updated in the relations of distribution between logic processor and the concurrent physical processor.
Figure 15 specifically illustrates the processing that is updated in the relations of distribution between logic processor and the concurrent physical processor.
Figure 16 illustrates the structure of the processor module with timer and temperature sensor.
Figure 17 illustrates the hand-off process that switches in the time dependent relations of distribution between logic processor and the concurrent physical processor.
Figure 18 illustrates the hand-off process that switches in the temperature-dependent relations of distribution between logic processor and the concurrent physical processor.
Figure 19 illustrates and removes from the distribution candidate of logic processor in the pre-operation stage or in the become processing of defective concurrent physical processor of operational phase.
Figure 20 illustrates such layout, wherein based on the relations of distribution of determining in the relation between the power supply of concurrent physical processor and use between logic processor and the concurrent physical processor.
Figure 21 illustrates based on to the access of concurrent physical processor and logic processor is assigned to the allocation process of concurrent physical processor.
Figure 22 illustrates based on to the access of concurrent physical processor and logic processor is assigned to the allocation process of concurrent physical processor.
Figure 23 illustrates based on to the access of concurrent physical processor and logic processor is assigned to the allocation process of concurrent physical processor.
Embodiment
Below with reference to accompanying drawing descriptor treatment facility, process control method and computer program.
The hardware configuration of the messaging device of one embodiment of the invention is described below with reference to Fig. 1.Processor module 101 comprises a plurality of processors (processing unit), and according to be stored among ROM (ROM (read-only memory)) 104 and the HDD 123, comprise operating system (OS) and the application program on this OS, moved at interior various program processing datas.To processor module 101 be described with reference to figure 2 after a while.
In response to order via processor module 101 input, graphics engine 102 generate will be on the screen of the display that forms output unit 122 data presented, for example carry out the 3D graphic plotting and handle.Primary memory (DRAM) 103 storages are by the program of processor module 101 execution and the parameter that changes along with the process of program execution.These unit interconnect via the host bus 111 that comprises central processing unit (CPU) bus.
HDD (hard disk drive) 123 drives the hard disk that is carried in wherein, and record or playback will be by the program and the information of processor module 101 execution thus.
The structure of processor module 101 is described below with reference to Fig. 2.As shown, processor module 200 comprises the primary processor group 201 that comprises a plurality of main processor unit, and a plurality of sub-processor group 202-20n, and each in these sub-processor groups comprises a plurality of sub-processor unit.Each group also comprises memory controller and auxiliary high-speed cache.The processor group 201-20n that for example comprises eight processor units separately is connected with one of packet switching network via the cross-bar body architecture.In response to the order of the primary processor in the primary processor group 201, select at least one sub-processor among a plurality of sub-processor group 202-20n to carry out preset program.
Memory stream controller in each processor group controls to the data input and the data output of the primary memory 103 among Fig. 1.Assist the effect that is used from the storage area of deal with data in each processor group that is cached at.
The operating system (OS) of the messaging device in the one embodiment of the invention is described below with reference to Fig. 3.Many OS messaging device has a plurality of operating systems (OS) of arranging with logical layered architecture as described in Figure 3.
As shown in Figure 3, main OS 301 is arranged in bottom.A plurality of sub-OS 302,303 and 304 are arranged in the upper strata.Sub-OS 302 and 303 is boarding (guest) OS, and sub-OS 304 is the control OS of system.Main OS 301 is together with the control OS 304 of system, formed logical partition as the performance element of 101 each processing carried out of determining by the described processor die of reference Fig. 1 and 2, and to each logical partition distribution system hardware resource primary processor, sub-processor, storer and the equipment of computational resource (for example, as).
Boarding OS (a) 302 uses the hardware device that comprises primary processor, sub-processor, storer and equipment that is assigned to the logical partition that is provided with by control OS 301 and the control OS of system 304, carries out the 302 corresponding application programs 305 with boarding OS (a) thus.Boarding OS (b) 303 uses the hardware resource that comprises primary processor, sub-processor, storer and equipment that is assigned to logical partition " n ", carries out the 303 corresponding application programs 306 with boarding OS (b) thus.Main OS 301 provides and has carried out the needed boarding of boarding OS OS DLL (dynamic link library).
The control OS of system 304 as one of sub-OS generates the system control program 307 that comprises the logical partition supervisory routine, and controls in response to system control program 307 executable operations together with main OS 301.System control program 307 using system control program DLL (dynamic link library) control system strategies.OS301 provides the system control program DLL (dynamic link library) to application program 306 by control.For example, system control program 307 allows to customize flexibly, for example resources allocation is provided with the upper limit.
The behavior of system control program 307 using system control program DLL (dynamic link library) control system.For example, system control program 307 produces new logical partition, and starts new boarding OS at this logical partition place.A plurality of therein boarding OS carry out in the operated system, with these boardings of order initialization OS of programming in system control program 307.System control program 307 can receiving and inspection this request before being received by main OS 301 from the resource allocation request sent of boarding OS, the modification system strategy, and refuse this request itself.In this way, there is not specific boarding OS exclusive resource.The program that realizes system strategy therein is a system control program.
Logical partition is the entity that receives resources allocation in the system.For example, primary memory 103 is divided into several zones (referring to Fig. 1), and authorizes the right of using respective regions to each logical partition.Listed the resource type that is assigned to logical partition below.
A) concurrent physical processor unit service time
B) virtual address space
C) can be by the storer of the routine access of operating in the logical partition
D) by the storer of control OS use with the management logic subregion
E) incident port
F) right of use equipment
G) high-speed cache subregion
H) right of use bus
As discussed previously, each OS operates in logical partition.This OS monopolize be assigned to this logical partition resource to handle various data.Under many circumstances, OS is unit (on a per guest OSbasis) with boarding, for the boarding OS that moves in this system produces a subregion.Distribute unique identifier to each logical partition.The control OS 304 of system is associated with identifier by making system control program, manages the system control program that generates as logical partition management information.
Logical partition is generated by main OS 301 and the control OS of system 304.Just after producing, logical partition does not have resource, and available resources is not provided with restriction.It is one of active state and done state that logical partition adopts two states.Just logical partition adopts active state immediately after producing.In response to the request of the boarding OS that operates in logical partition, this logical partition is transformed to done state, and stops to be assigned to all logic processors of this logical partition.
This logic processor is the logic processor that is assigned to logical partition, and corresponding to any concurrent physical processor, i.e. processor in the processor group of Fig. 2.Logic processor and concurrent physical processor always are not relative to each other to concern one to one.Single logic processor can be corresponding to a plurality of concurrent physical processors.Replacedly, a plurality of logic processors can be corresponding to the single physical processor.Corresponding relation between logic processor and the concurrent physical processor is determined by main OS 301.
Each logical partition comprises the control signal port.Exchanges data between the logical partition and shared needed various control signals arrive the control signal port.Control signal is listed as follows.
A) request of the incident port between the connection logical partition
B) request of the message channel between the connection logical partition
C) be connected to the request of shared memory area
The control signal that arrives each logical partition is lined up by the control signal port.Not to restriction being set by the queue depth in the scope that memory resource allowed.From the logical partition that receives control signal, keep the needed memory resource of queuing.In order to pick up control signal, call boarding OS DLL (dynamic link library) from port.When control signal arrives the empty control signal port, can be with event transmission to anything part port.By calling boarding OS DLL (dynamic link library) allocate event port.
Control OS provides the logical sub processor as resource (computational resource) with the abstract form of physics sub-processor to logical partition.As discussed previously, the physics sub-processor is not associated with the logical sub processor to concern one to one, and does not require that the physics sub-processor is quantitatively identical with the logical sub processor.As required, therefore control OS can make the single physical sub-processor corresponding to a plurality of logical sub processors.
If the number of logical sub processor, is then controlled OS greater than the number of physics sub-processor and is used the physics sub-processor with time division way.The logical sub processor can repeatedly stop and then recovery operation.Boarding OS can monitor such variation.
The entity of deal with data is set to subregion.More particularly, logical partition is set to the entity of the resource in the shared system.Will be such as the various resources allocations service time, virtual address space and the storage space of concurrent physical processor to logical partition.Using the resource of being distributed to carry out then handles.In this logical partition, be provided with and the corresponding logic processor of any concurrent physical processor, and carry out data processing based on this logic processor.Logic processor is always so that relation is corresponding with concurrent physical processor one to one.For example, single logic processor can be corresponding with a plurality of concurrent physical processors, and a plurality of logic processor can be corresponding to the single physical processor.
If use a plurality of processing of logic processor executed in parallel, then use concurrent physical processor by dispatching a plurality of logic processors.More particularly, a plurality of logic processors use concurrent physical processor with time division way.
Referring to Fig. 4, described as time division way how and used concurrent physical processor.Shown in Fig. 4 (a), will be assigned to the single physical processor corresponding to the single logic processor of one of main OS and sub-OS.Logic processor (a) is monopolized concurrent physical processor (1), and logic processor (b) is monopolized concurrent physical processor (2).
Shown in Fig. 4 (b), a plurality of logic processors that are assigned to the single physical processor are carried out processing with time division way.Order with logic processor (c) → (a) → (c) → (a) → (b) → (c) → (b) is shared concurrent physical processor 1 in time.Carry out corresponding each logic processor of processing with one of main OS and sub-OS.Order with logic processor (b) → (d) → (b) → (d) → (c) → (d) → (a) is shared concurrent physical processor (2) in time.Carry out corresponding each logic processor of processing with one of main OS and sub-OS.
As shown in Figure 5, the correspondence between concurrent physical processor and the logic processor is described below.Fig. 5 illustrates the structure of single primary processor 401 and physics sub-processor 411 to 414, and with the physics sub-processor (2) of time division way operation and the sequential of physics sub-processor (4).
As shown in Figure 5, as following listed, the logical sub processor is assigned to physics sub-processor (2) with the time-division form.
Time slot ta0-ta1: logical sub processor (a)
Time slot ta1-ta2: logical sub processor (b)
Time slot ta2-ta3: logical sub processor (c)
Time slot ta3-: logical sub processor (a)
Distribute in the time slot at each, each logical sub processor uses physics sub-processor (2) to carry out and handles.
As following listed, physics sub-processor (4) is shared by the logical sub processor.
Time slot tb0-tb1: logical sub processor (b)
Time slot tb1-tb2: logical sub processor (c)
Time slot tb2-tb3: logical sub processor (a)
Time slot tb3-: logical sub processor (b)
Distribute in the time slot at each, each logical sub processor uses physics sub-processor (4) to carry out and handles.
These concurrent physical processors of logical sub processor time-division are to carry out corresponding processing.Utilize the concurrent physical processor restore data to handle operation for during distributing time slot at the next one, each logical sub processor need keep the status information such as hardware state during the data processing intermission.Status information comprises the content of local storage of concurrent physical processor and the content of MMIO (memory mapped input and output) register.MMIO (memory mapped input and output) is the input and output controlling mechanism that is used for memory mapped mode control hardware.MMIO uses concrete memory location to carry out and writes processing and read processing, thus control hardware.
With the logical sub processor distribution in the concurrent physical processor, be responsible for MMIO zone in the concurrent physical processor of state of logical sub processor and local storage zone be mapped to the corresponding logical partition address space of this logical sub processor in the zone.
Be described in address space and address translation (mapping) mechanism that defines in the messaging device of one embodiment of the present of invention below with reference to Fig. 6.
Fig. 6 illustrates space 501, logical partition address (physical vlan address), virtual address space 502, physical address space 503 and space 501, logical partition address (physical vlan address) be converted to first conversion table 521 of physical address space 503 and virtual address space 502 be converted to second conversion table 522 of physical address space 503 as the address transition mechanism of address space.
Space 501, logical partition address (physical vlan address) is address spaces of the abstract form of physical address space 503, and produces when system control program produces logical partition.Logical partition address space (physical vlan address) 501 comprises can be by the zone of logic processor access.For each logical partition that is provided with corresponding to the boarding OS that before describes with reference to figure 3 is provided with space 501, logical partition address (physical vlan address).
Directly use virtual address space 502 by boarding OS.Boarding OS generates new virtual address as required.If necessary, boarding OS can generate a plurality of virtual address spaces in logical partition.Physical address space 503 is real address space.Address in the physical address space 503 is used for specifying access target on bus.
First conversion table 521 and second conversion table 522 are used for the space, reference address.First conversion table 521 is a physical address space 503 with logical partition address (physical vlan address) space conversion.The structure of first conversion table 521 is described below with reference to Fig. 7.
As shown in Figure 7, first conversion table has the page number in space, logical partition address (physical vlan address) as index, to quote the page in the corresponding physical address space.The physical address of the MMIO register of concurrent physical processor is set to the page number of physical address space.By being set, physical address identifies concrete concurrent physical processor.Page number as the space, logical partition address (physical vlan address) of index can be by the logic processor access.According to first conversion table, the logical sub processor distribution is arrived the physics sub-processor.
It is invalid effective physical address (null value) that the corresponding clauses and subclauses of indication are set at the page number place of the physical address of quoting in response to this index (page number in space, logical partition address (physical vlan address)) (physical address of the MMIO register in the concurrent physical processor).Upgrade the value of this physical address as required by control OS.
Below with reference to Fig. 8 second conversion table is described.Second conversion table is used for virtual address space 502 is converted to physical address space 503.Second conversion table comprises the page number of virtual address space as index, wherein utilizes the page number of this virtual address space to quote the page in the corresponding physical address space.The physical address of the MMIO register in the concurrent physical processor is set to the page number of physical address space.Based on the set concrete physics sub-processor of physical address sign.Page number as the virtual address space of index can be by boarding OS access.Execution is by the processing that the relations of distribution identified, the physics sub-processor in second conversion table.
The corresponding clauses and subclauses of indication (null value) are set at the page number place of the physical address of quoting in response to this index (page number of logical partition address space) (physical address of the MMIO register in the concurrent physical processor) are invalid effective physical address or value.Upgrade the value of this physical address as required by control OS.
Upgrade the processing sequence below with reference to Fig. 9 and 10 descriptions by first conversion table of control OS execution and the clauses and subclauses of second conversion table.Upgrade in the processing at this, will be assigned to concurrent physical processor with the corresponding logic processor of logical partition.
Upgrade the processing sequence below with reference to the clauses and subclauses of these forms of flow chart description among Fig. 9.At step S101, (physical vlan address) calculates the index of first conversion table from the logical partition address.Logical partition address (physical vlan address) is the address in the address space that is provided with for each subregion, and wherein each subregion is corresponding to being provided with reference to figure 3 described boarding OS.Determine index with corresponding first conversion table in this address.At step S102,, from first conversion table, determine physical address according to determined index.
Below with reference to Figure 10 this processing is described.Determine the index [qqqqq] 621 of first conversion table 620 according to logical partition address (physical vlan address) 610.Determine and index [qqqqq] 621 corresponding physical addresss [uuuuu] 622 then.Logical partition address 610 be with one of Fig. 3 boarding OS in address in the corresponding address space of logical partition that is provided with, and by using with the corresponding logical sub processor 600 of logical partition.
At step S103, from virtual address, calculate the index of second conversion table.At step S104, upgrade second conversion table.
Below with reference to Figure 10 this processing is described.Determine the index [aaaaa] 641 of second conversion table 620 according to virtual address 630.Upgrade and index [aaaaa] 641 corresponding physical addresss [uuuuu] 642.As a result, as shown in figure 10, physics sub-processor that can be by logical partition address (physical vlan address) 610 accesses with can be set to identical physics sub-processor 650 by the physics sub-processor of virtual address access.Virtual address 630 is the addresses in the virtual address space that is provided with in the logical partition of one of boarding OS in Fig. 3, and by using with the corresponding logical sub processor 600 of logical partition.
By upgrading conversion table the logical sub processor distribution is arrived the physics sub-processor.By using by first conversion table physics sub-processor related with second conversion table, the logical sub processor that is associated with logical partition can be carried out processing.
Hand-off process below with reference to the processing example description logic sub-processor of the process flow diagram of Figure 11 and Figure 12 and 13.In this hand-off process, with regard to with regard to the corresponding physics sub-processor of logical sub processor of carrying out data processing in corresponding to the logical partition of the boarding OS of Fig. 3, cancel the logical sub processor to the physics sub-processor relations of distribution, and another logical sub processor distribution is arrived new physics sub-processor.More particularly, the relations of distribution between renewal logical sub processor and the physics sub-processor.This is handled by control OS and carries out.
At step S201, obtain needed in distribute upgrading, with corresponding first conversion table of logical sub processor that is assigned to the physics sub-processor in index.At step S202, obtain physical address based on the index that is obtained.
Below with reference to Figure 12 this processing is described.Physics sub-processor a701 need distribute renewal.With the index of logical sub processor α 702 corresponding first conversion tables 703 that are assigned to physics sub-processor a701 be index [qqqqq] 704.At step S201, obtain index [qqqqq] 704, and, obtain physical address [uuuuu] 705 based on index [qqqqq] 704 at step S202.
At step S203, in second conversion table, all are kept invalid the turning to of clauses and subclauses [null value] of physical address [uuuuu].For example, with reference to Figure 12, will in second conversion table 710, keep clauses and subclauses 711 invalid the turning to [null value] of physical address [uuuuu].Figure 12 only shows the clauses and subclauses with physical address [uuuuu].Can there be a plurality of clauses and subclauses with physical address [uuuuu].If there are a plurality of clauses and subclauses, then these clauses and subclauses void in whole are turned to [null value] with physical address [uuuuu].Utilize this processing, logical sub processor α 702 can not use physics sub-processor a701 in data processing.
At step S204, obtain and the index that need be assigned in corresponding first conversion table of logical sub processor of new physics sub-processor.At step S205, the physical address of the MMIO register of the physics sub-processor that will need in new the distribution is stored in first conversion table.
Below with reference to Figure 13 this processing is described.Expectation is assigned to physics sub-processor a701 with logical sub processor β 721.At step S204, obtain with logical sub processor β 721 corresponding first conversion tables 703 in index, i.e. index [rrrrr] 722.At step S205, the physical address [uuuuu] of the MMIO register of physics sub-processor a701 is stored in first conversion table 703.
By this processing, logical sub processor β 721 is assigned to physics sub-processor a701, and the processing of actuating logic sub-processor β 721 continuously.
Execution is handled with reference to the renewal of the described clauses and subclauses of Figure 11.Below with reference to Figure 14 this processing is described.From virtual address 830, determine the index [bbbbb] 841 of second conversion table 840.To be updated to [uuuuu] 842 with index [bbbbb] 841 corresponding physical addresss.As a result, as shown in figure 14, physics sub-processor that can be by logical partition address (physical vlan address) 810 accesses and can be set to identical physics sub-processor a701 by the physics sub-processor of virtual address access.
In the superincumbent argumentation, be different from the current logic processor that is assigned to the logic processor of physical treatment new the distribution.As selection, replace with the concurrent physical processor that it has distributed this logic processor.As shown in figure 15, store in first conversion table 620, logical sub processor α 600 is assigned to physics sub-processor b651 by physical address [vvvvv] 622 with the MMIO register of physics sub-processor b651.
The blocked operation of carrying out concurrent physical processor is with handoff processor, thus prevent under the situation of the continuous deal with data of single physical processor, to cause overheated.Arrive maximum processor operations continuously during the time when the power lifetime of single physical processor, control OS carries out the processor blocked operation of discussing with reference to Figure 15.Revise logic and arrive the concurrent physical processor relations of distribution so that carry out processing with the new physics processor.
As shown in figure 16, processor module 200 all comprises timer units 252-25n in each sub-processor group 202-20n.Timer units 252-25n measures the processing time as the sub-processor group 202-20n of concurrent physical processor.In the past after the permanent time, upgrade the relations of distribution between logic processor and the concurrent physical processor.Temperature sensor 271-273 and 281-283 are arranged as the concurrent physical processor that approaches as the sub-processor unit among Figure 16, to detect the temperature rise in each processor.If the temperature that is detected reaches predetermined temperature threshold, then the relations of distribution between switch logic processor and the concurrent physical processor are to control excessive temperature rise.
For the relations of distribution between switch logic processor and the concurrent physical processor, can use the processor hand-off process that depends on the time, the processor hand-off process that depends on temperature or the combination of the two.In depending on the processor hand-off process of time,, switch these processors every the permanent time period in response to by the measured time of timer units 252-25n that is arranged in sub-processor group 202-20n place.In depending on the processor hand-off process of temperature, when reaching predetermined temperature threshold by each temperature sensor 271-273 that arranges near concurrent physical processor and the detected temperature rise of 281-283, the relations of distribution between switch logic processor and the concurrent physical processor.The hand-off process of the relations of distribution in the described processor blocked operation of reference Figure 15 between actuating logic processor and the concurrent physical processor.
Figure 17 illustrates the notion of the processor hand-off process relations of distribution, that depend on the time between permanent period switch logic processor and concurrent physical processor.Figure 17 (a)-(c) illustrates the relations of distribution of switching every the preferred time period (ti) between logic processor and the concurrent physical processor.
(a) relations of distribution between logic processor and concurrent physical processor when time T 0
Logic processor α=concurrent physical processor a
Logic processor β=concurrent physical processor b
Logic processor γ=concurrent physical processor c
(b) in the time T 1 of having gone over from 0 start time of time T after the ti, the relations of distribution between logic processor and the concurrent physical processor
Logic processor γ=concurrent physical processor a
Logic processor α=concurrent physical processor b
Logic processor β=concurrent physical processor c
(c) in the time T 2 of having gone over from 1 start time of time T after the ti, the relations of distribution between logic processor and the concurrent physical processor
Logic processor β=concurrent physical processor a
Logic processor γ=concurrent physical processor b
Logic processor α=concurrent physical processor c
Every time period (ti), to distribute these relations of distribution of the further repetitive cycling of order of (a) → (b) → (c).
Figure 18 illustrates the moment that reaches predetermined temperature threshold by each temperature sensor 271-273 that arranges near concurrent physical processor and the detected temperature rise of 281-283 (referring to Figure 16), the notion of the processor hand-off process that depends on temperature of the relations of distribution between switch logic processor and the concurrent physical processor.Shown in Figure 18 (a)-(c), the relations of distribution in response to the temperature of processor between switch logic processor and the concurrent physical processor.
Shown in Figure 18 (a), the relations of distribution between logic processor and the concurrent physical processor are as follows to be switched,
Logic processor α=concurrent physical processor a
Logic processor β=concurrent physical processor b
Logic processor γ=concurrent physical processor c
Surpass predetermined temperature threshold if concurrent physical processor a reaches and rises, then shown in Figure 18 (b), be inverted the relations of distribution that logical sub processor a is assigned to physics sub-processor α and logical sub processor b is assigned to physics sub-processor b.
Logic processor β=concurrent physical processor a
Logic processor α=concurrent physical processor b
Logic processor γ=concurrent physical processor c
In this hand-off process, mix at branch, the logical sub processor α that supposition has been carried out the processing that needs high-throughput switches to concurrent physical processor b from concurrent physical processor a.Therefore the processing of logic processor α is carried out continuously by another single concurrent physical processor, and has controlled excessive temperature rise.
The relations of distribution are switched in replacement in response to by temperature sensor the temperature rise of processor being detected, timer units can be used for switching every the permanent time period and has the concurrent physical processor of maximum temperature and have the relations of distribution between the concurrent physical processor of minimum temperature.By carrying out processor hand-off process (migration process), avoided the single processor of long-time use and the excessive temperature rise that causes.
As mentioned above, control OS is provided with and upgrades first conversion table and the clauses and subclauses that are used for virtual address space is converted to second conversion table of physical address space that two address translation table promptly are used for the logical partition address space is converted to physical address space, so that revise the relations of distribution between logic processor and the concurrent physical processor.According to these situations, be provided with and more new logic to the relations of distribution of concurrent physical processor.Concurrent physical processor is therefore according to data processing sequence, with the time division way deal with data.Consider working load on hardware and data processor and carry out suitable data processing.
If from the angle of the logical partition that is provided with, even changed concurrent physical processor, the also processing of actuating logic subregion continuously by upgrading conversion table corresponding to boarding OS.Boarding OS can carry out deal with data in the identical processing environment of the processing environment of same processing in fact with the single physical processor with conitnuous forms.
Get rid of beginning or the out of order concurrent physical processor of subsequent stage can be from logic to the concurrent physical processor relations of distribution in the length of service.Below with reference to Figure 19 this processing is described.
Equipment with a plurality of concurrent physical processors can comprise can not deal with data out of order concurrent physical processor.Such concurrent physical processor may have fault at first or become fault subsequently in the length of service.From the relations of distribution, remove out of order concurrent physical processor.
Figure 19 illustrates four concurrent physical processor a-d.Logic processor is assigned to these concurrent physical processors.Suppose that concurrent physical processor c is out of order at first or the fault that become subsequently in the length of service, and can not carry out data processing function or have low performance.
Logic processor α is assigned to concurrent physical processor a, b and d to δ.From these relations of distribution, get rid of concurrent physical processor c.As discussed previously, do not require logic processor and concurrent physical processor with relation distribution mutually one to one, and do not require that logic processor quantitatively equals concurrent physical processor.
The control OS that execution is used for logic processor is assigned to the allocation process of concurrent physical processor has got rid of out of order concurrent physical processor from the relations of distribution, and produce the address translation table of determining the relations of distribution between logic processor and the concurrent physical processor, logic processor only is assigned to the concurrent physical processor of normal running.If comprised initial out of order concurrent physical processor, then when beginning, produce the address translation table of from the relations of distribution, getting rid of that concurrent physical processor.The fault if any concurrent physical processor has become in the length of service subsequently, then the scheduler conversion table is to get rid of out of order concurrent physical processor from the relations of distribution.
Only use normal concurrent physical processor and got rid of out of order concurrent physical processor.Therefore this equipment does not have the mistake in the data processing.For example, on comprising it, be equipped with in the equipment of chip of n concurrent physical processor, only logic processor be assigned to m concurrent physical processor (n>m).Therefore this equipment work as having the equipment of m processor.
Comprise out of order processor if predict a plurality of concurrent physical processors with estimated rate, then be preferably and be developed as and only utilize the m (program of individual concurrent physical processor deal with data of n>m) having data processor in the equipment of n concurrent physical processor.Utilize this to arrange, the fault even the concurrent physical processor that number equates with difference between n and m has become subsequently also can be carried out data processing and without any problem.
As shown in figure 20, based in concurrent physical processor and the relation between the power supply used, the relations of distribution of logic to concurrent physical processor are set.In having the equipment of a plurality of concurrent physical processors, use the concurrent physical processor group of shared supply line from power supply.Shown in Figure 20 (A), concurrent physical processor a and concurrent physical processor b receive electric power via wall scroll supply line 901 from power supply A.Concurrent physical processor c and concurrent physical processor d receive electric power via another supply line 902 from power supply B.
If concurrent physical processor b and concurrent physical processor d deal with data and make concurrent physical processor a and c idle in this equipment during the same period, then power supply A and B provide electric power via supply line 901 and 902.
Compare with a supply line with using a power supply, the use of two power supplys and two supply lines has expended more electric power.If the concurrent physical processor number of operating simultaneously is few, then be preferably the number that minimizes power supply and supply line to save electric power.
Control OS based on the relation between concurrent physical processor and the employed power supply and actuating logic to the concurrent physical processor allocation process, and setting and scheduler conversion table.Shown in Figure 20 (B), equipment comprises concurrent physical processor c and the d that is connected to the concurrent physical processor a of single power supply and b and is connected to single power supply via supply line 902 via supply line 901.In this is arranged, only logic processor is assigned to two concurrent physical processors via supply line's supply power.
As shown in the figure, logic processor is assigned to concurrent physical processor c and d with deal with data.Concurrent physical processor a and b are in idle condition, i.e. inactive state, and do not need electric power.Therefore only provide electric power via supply line 902.Therefore carried out energy-conservation.
Actuating logic is quoted related table between each concurrent physical processor and the power supply to the control OS of concurrent physical processor allocation process, and the address translation table of logic to the concurrent physical processor relations of distribution determined in setting and renewal, so that be minimized in power supply number and the supply line's number of connecting during the processing time.Therefore carried out energy-conservation.
Referring to Figure 21-23, describe below in data processing, by the employed storer of concurrent physical processor that has distributed logic processor for it.The setting position, that logic arrives the concurrent physical processor relations of distribution based on concurrent physical processor has also been described.
Messaging device among Figure 21 comprises four concurrent physical processor a-d, and storer X and Y.In data processing, each concurrent physical processor a is to d access memory X and Y.Storer X and Y are positioned at this equipment discretely.Each processor via internal bus 911 with data storage in storer X and storer Y, perhaps reading of data therefrom.
From handling via the storage access of bus and the viewpoint of data transmission and processing, the short distance between concurrent physical processor and the storer has improved the bus service efficiency, and has shortened access time and processing time.
Control OS monitors to it and has distributed the storage access state of logic processor with the concurrent physical processor of carrying out various processing.Depend on access status, control OS is assigned to more close concurrent physical processor with arrangements of memory of high frequency of access with logic processor.
Monitor unit 921 monitor the logic processor that is provided with for various processing and carry out and the concurrent physical processor of the corresponding processing of this logic processor between the relations of distribution, and the storage access state of each concurrent physical processor.Monitor unit 921 is illustrated as being in single.In monitoring processing, monitor by the storage access that is arranged in the hardware cell counting in each independent concurrent physical processor by the supervisory programme of controlling OS.Describing this supervision below with reference to Figure 22 handles.
Figure 22 (B) illustrates the logic of carrying out with given data processing sequence and arrives the concurrent physical processor allocation process, and the storage access of concurrent physical processor.Concurrent physical processor a is to d access memory X and Y.Storer X and storer Y are spaced apart from each other in messaging device.Storer X is near concurrent physical processor a and b location, and storer Y is near concurrent physical processor c and d location.
Figure 22 (A) illustrates the data of obtaining as the result of the supervision processing of being carried out by control OS, wherein utilizes the logic among Figure 22 (B) to carry out data processing to the concurrent physical processor relations of distribution.The data that monitored comprise logic to the concurrent physical processor relations of distribution, and write down, each concurrent physical processor is to the data access frequency of storer X and storer Y.
Concurrent physical processor a carries out and the corresponding processing of logic processor α.These data illustrate concurrent physical processor a access memory X 20 times, and access memory Y 7 times.Similarly, about other concurrent physical processor, the logic processor and the frequency of access of being distributed have been listed.Monitor that the period of handling is not limited to any sequential.Monitor and handle in the concrete period of handling, to carry out always.As selection, monitor and handle and to carry out at the time place of any pre-programmed.
As described in reference Figure 22 (B), Y compares with storer, the more close storer X of concurrent physical processor a and concurrent physical processor b location.Compare the more close storer Y of concurrent physical processor c and d location with storer X.In order to realize high access efficiency, short access time and weakness reason time that each concurrent physical processor is preferably near the storer location with higher frequency of access.
The supervision result of Figure 22 (A) is depicted as its concurrent physical processor a that has distributed logic processor α the access count of storer X is [20], and is [7] to the access count of storer Y.Therefore the access count of the storer X of more close concurrent physical processor a is higher than access count to storer Y.By logic processor α is assigned to concurrent physical processor a, and carry out this processing efficiently.
For its concurrent physical processor b that has distributed logic processor γ is [2] to the access count of storer X, and be [25] to the access count of storer Y.To the access count of the storer X of more close concurrent physical processor b less than access count to farther storer Y.Be assigned in utilization that efficient might descend in the processing of logic processor γ of concurrent physical processor b.
For its concurrent physical processor c that has distributed logic processor β is [5] to the access count of storer X, and be [30] to the access count of storer Y.The access count of the storer Y of more close concurrent physical processor c is higher than access count to farther storer X.Therefore utilization is assigned to the logic processor β of concurrent physical processor c and carries out efficiently and handle.
For its concurrent physical processor d that has distributed logic processor δ is [12] to the access count of storer X, and be [5] to the access count of storer Y.To the access count of the storer Y of more close concurrent physical processor d less than access count to farther storer X.Be assigned in utilization that efficient might descend in the processing of logic processor δ of concurrent physical processor d.
Monitor the result based on these, control OS more new logic to the concurrent physical processor relations of distribution, so that the identical processing of execution next time.Depend on access status, will handle corresponding logic processor with this and be assigned to more close concurrent physical processor with storer of higher access count.As discussed previously, control OS is provided with any logic to the concurrent physical processor relations of distribution by the scheduler conversion table.Based on monitoring the result, the scheduler conversion table is so that be assigned to logic processor near the concurrent physical processor with storer of higher access count.
According to the supervision result of Figure 22 (A), the relations of distribution
Concurrent physical processor a: logic processor α and
Concurrent physical processor c: logic processor β
Work is excellent, but the relations of distribution
Concurrent physical processor b: logic processor γ and
Concurrent physical processor d: logic processor δ causes data transmission efficiency to reduce.Control OS more new logic is assigned to more close concurrent physical processor with storer of higher access count to the concurrent physical processor relations of distribution so that will handle corresponding logic processor with this.
Describe the logic of upgrading after handling below with reference to Figure 23 and arrive the concurrent physical processor relations of distribution and storage access frequency.Control OS comes more new logic to the concurrent physical processor relations of distribution by the scheduler conversion table.More particularly, the scheduler conversion table is assigned to the more close concurrent physical processor that has the storer of higher access count and locate so that will handle corresponding logic processor with this.
Shown in Figure 23 (C), logic is determined as follows to the concurrent physical processor relations of distribution
Concurrent physical processor a: logic processor α
Concurrent physical processor b: logic processor δ
Concurrent physical processor c: logic processor β, and
Concurrent physical processor d: logic processor γ.
If utilize this relations of distribution carry out with reference to the identical processing of the described processing of Figure 22, then the storage access of concurrent physical processor supervision result is shown in Figure 23 (D).
For it has distributed the concurrent physical processor a of logic processor α and for it has distributed each access count that farther storer Y is all compared in the access count of storer X near among the concurrent physical processor b of logic processor δ big, and therefore realize high treatment efficiency.
Similarly, for it has distributed the concurrent physical processor c of logic processor β and for it has distributed each access count that farther storer Y is all compared in the access count of storer X near among the concurrent physical processor d of logic processor γ big, and realize high treatment efficiency.
Actuating logic has distributed the storage access state scheduler conversion table of the concurrent physical processor of logic processor according to each for it to the control OS of concurrent physical processor allocation process.Control OS therefore more new logic to the concurrent physical processor relations of distribution.The scheduler conversion table is so that be assigned to more close concurrent physical processor with storer location of higher frequency of access with logic processor like this.Quickened data access, and the therefore efficient data processing of carrying out.
The present invention has been described with reference to specific embodiment.Modification and change to embodiment within spirit of the present invention are obvious for a person skilled in the art.Discussed embodiments of the invention only for purposes of example, limited the scope of the invention and be not used in.Scope of the present invention is only limited by accessory claim.
Series of steps described above can use software, hardware or their combination to carry out.If use software to carry out this series of steps, the program that then for example will form software from recording medium or via network installation on the computing machine of incorporating hardware configuration into or multi-purpose computer.
Program can be recorded in advance as on one of the hard disk of recording medium and ROM (ROM (read-only memory)).This program can also be temporarily or is for good and all stored (record) on removable recording medium.Recording medium comprises floppy disk, CD-ROM (compact disc read-only memory), MO (magneto-optic) dish, DVD (digital multi-purpose disk), disk, semiconductor memory etc.Such removable medium can be provided aspect software package.
This program can be installed to computing machine from removable recording medium.This program can be sent to computing machine from the download website with wireless mode.This program can also transmit via the network such as one of LAN (LAN (Local Area Network)) and Internet in wired mode.Program is received and is installed in by computing machine in the computing machine on the recording medium such as hard disk then.
The treatment step of discussing in this explanation is according to top described with the execution of time series sequence ground.As selection, can walk abreast or carry out these steps respectively.In this instructions, system is meant the flogic system that comprises a plurality of equipment, and the unit in each equipment is not must be included in the same shell.
Industrial applicibility
According to embodiments of the invention, logic processor is assigned to concurrent physical processor.Be arranged on the form of using in the address translation between the different address spaces that comprise virtual address space, logical partition address (physical vlan address) and physical address.By suitably revising these conversion tables, the suitable relations of distribution between setting and renewal logic processor and the concurrent physical processor.Therefore carried out data processing efficiently.
According to embodiments of the invention, control OS uses two address translation table, promptly being used for logical partition address (physical vlan address) space conversion is first conversion table of physical address space, and second conversion table that is used for virtual address space is converted to physical address space.By being provided with and upgrading clauses and subclauses in these forms, control OS upgrades the relations of distribution between logic processor and the concurrent physical processor.According to circumstances, the relations of distribution between modification logic processor and the concurrent physical processor.Concurrent physical processor is therefore according to data processing sequence, with the time division way deal with data.Therefore consider working load on hardware and data processor and suitably carry out data processing.
According to embodiments of the invention, control OS carries out in turn on concurrent physical processor and handles, be i.e. migration process by upgrading conversion table.This is arranged and controls the heating of using the concurrent physical processor that causes owing to long-time continuous.
According to embodiments of the invention, in system, be assigned to a plurality of logic processor parallel work-flows of different concurrent physical processors with one group of concurrent physical processor that is connected to different supply lines.By logic processor being assigned to the concurrent physical processor that is connected to same supply line, can remove to the electric power that is in the concurrent physical processor group in the idle pulley.Therefore carried out energy-conservation.
According to embodiments of the invention, in equipment, be furnished with in the system of a plurality of storeies in the diverse location, the scheduler conversion table is handled corresponding logic processor with handle and each and is distributed to and more close it is had the storer of higher frequency of access and the concurrent physical processor of locating.This processor distribution is handled and has been realized data access at a high speed, causes efficient data processing thus.
Claims (17)
1, a kind of messaging device comprises:
Control OS carries out the processing that is used for time division way a plurality of logic processors being assigned to concurrent physical processor; And
Boarding OS, for it is provided with logical partition as the application entity of logic processor,
Wherein, control OS is by being provided with and upgrading two address translation forms as the address translation form that is used for determining the relations of distribution between logic processor and the concurrent physical processor, be provided with and upgrade the relations of distribution between logic processor and the concurrent physical processor, first converting form in described two address translation forms is provided with the relations of distribution between logical partition address space and the physical address space, and second converting form is provided with the virtual address space of boarding OS and the relations of distribution between the physical address space.
2, messaging device as claimed in claim 1, wherein, described control OS obtain with first conversion table in logic-based partition address and definite corresponding physical address of index, and upgrade and second conversion table in based on virtual address and definite corresponding physical address of index.
3, messaging device as claimed in claim 1, wherein, for the relations of distribution between switch logic processor and the concurrent physical processor, described control OS obtain according in first conversion table with being assigned to the corresponding index of logic processor of concurrent physical processor definite physical address; Make the clauses and subclauses of the physical address that all maintenances are obtained in second conversion table invalid; Obtain the corresponding index of logic processor that in first conversion table and newly is assigned to this concurrent physical processor; And will store with the corresponding physical address of the index that is obtained for it has distributed the physical address information conduct of the concurrent physical processor of logic processor.
4, as the described messaging device of one of claim 1 to 3, wherein, physical address comprises the physical address of the MMIO register in the concurrent physical processor.
5, messaging device as claimed in claim 1, wherein, control OS upgrades the relations of distribution between logic processor and the concurrent physical processor, to switch to another from a concurrent physical processor when the running time of the processing of using a concurrent physical processor reaches the predetermined threshold time.
6, messaging device as claimed in claim 1, wherein, OS is when the temperature of a concurrent physical processor reaches predetermined threshold in control, upgrades the relations of distribution between logic processor and the concurrent physical processor, to switch to another from a concurrent physical processor.
7, messaging device as claimed in claim 1, wherein, control OS is provided with the relations of distribution between logic processor and the concurrent physical processor, so that a plurality of concurrent physical processors of parallel work-flow are set to be connected to the concurrent physical processor group on same feeder road.
8, messaging device as claimed in claim 1, wherein, described control OS based on concurrent physical processor to being arranged in the access status of the storer at diverse location place in the messaging device, to the mode that the frequency of access the closer to the storer of this concurrent physical processor location becomes high more, the relations of distribution between logic processor and the concurrent physical processor are set with concurrent physical processor.
9, a kind of process control method that is assigned to a plurality of logic processor deal with data of concurrent physical processor with time division way that utilizes, this method comprises:
On boarding OS, the step of logical partition as the application entity of logic processor is set; And
Upgrade the step of two address translation table, first conversion table in described two address translation table is provided with the relations of distribution between logical partition address space and the physical address space, and second conversion table is provided with the virtual address space of boarding OS and the relations of distribution between the physical address space.
10, process control method as claimed in claim 9, wherein the table update step comprises: obtain with first conversion table in logic-based partition address and definite corresponding physical address of index; And
Upgrade with second conversion table in based on virtual address and definite corresponding physical address of index.
11, process control method as claimed in claim 9, the relations of distribution between switch logic processor and the concurrent physical processor also comprise: upgrade according in first conversion table with the corresponding index of logic processor that is assigned to concurrent physical processor definite physical address; Make the clauses and subclauses of the physical address that all maintenances are obtained in second conversion table invalid; Obtain the corresponding index of logic processor that in first conversion table and newly is assigned to this concurrent physical processor; And will store with the corresponding physical address of the index that is obtained for it has distributed the physical address information conduct of the concurrent physical processor of logic processor.
12, as the described process control method of one of claim 9 to 11, wherein, physical address comprises the physical address of the MMIO register in the concurrent physical processor.
13, process control method as claimed in claim 9, also comprise: reach moment of predetermined threshold time in the running time of the processing of using a concurrent physical processor, upgrade the relations of distribution between logic processor and the concurrent physical processor so that switch to another from a concurrent physical processor.
14, process control method as claimed in claim 9, also comprise: reach moment of predetermined threshold in the temperature of a concurrent physical processor, upgrade the relations of distribution between logic processor and the concurrent physical processor so that switch to another from a concurrent physical processor.
15, process control method as claimed in claim 9 also comprises: the relations of distribution between logic processor and the concurrent physical processor are set, so that the concurrent physical processor of a plurality of parallel work-flows is set to be connected to the concurrent physical processor group on same feeder road.
16, process control method as claimed in claim 9, also comprise: based on concurrent physical processor to being arranged in the access status of the storer at diverse location place in the messaging device, to the mode that the frequency of access the closer to the storer of this concurrent physical processor location becomes high more, the relations of distribution between logic processor and the concurrent physical processor are set with concurrent physical processor.
17, a kind of computer program that is assigned to a plurality of logic processor deal with data of concurrent physical processor with time division way that utilizes, this computer program comprises:
On boarding OS, the step of logical partition as the application entity of logic processor is set; And
Upgrade the step of two address translation table, first conversion table in described two address translation table is provided with the relations of distribution between logical partition address space and the physical address space, and second conversion table is provided with the virtual address space of boarding OS and the relations of distribution between the physical address space.
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JP2977688B2 (en) * | 1992-12-18 | 1999-11-15 | 富士通株式会社 | Multi-processing device, method, and processor used for the same |
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CN104516769B (en) * | 2013-10-01 | 2017-09-19 | 国际商业机器公司 | For the method for the switching between verifying logic zone configuration, medium and system |
CN104618414A (en) * | 2013-11-05 | 2015-05-13 | 阿里巴巴集团控股有限公司 | Implementation method of distributed service, service agent device and distributed system |
CN104618414B (en) * | 2013-11-05 | 2018-05-04 | 阿里巴巴集团控股有限公司 | A kind of implementation method of Distributed Services, service broker's device and distributed system |
CN105980994A (en) * | 2014-02-21 | 2016-09-28 | Arm 有限公司 | Invalidating stored address translations |
CN105980994B (en) * | 2014-02-21 | 2019-08-16 | Arm 有限公司 | The invalid of address conversion is deposited |
CN112667318A (en) * | 2020-12-31 | 2021-04-16 | 京信网络系统股份有限公司 | Binding method, device, equipment and storage medium of logic core |
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