CN1881560A - Wafer cutting method - Google Patents
Wafer cutting method Download PDFInfo
- Publication number
- CN1881560A CN1881560A CN 200510077940 CN200510077940A CN1881560A CN 1881560 A CN1881560 A CN 1881560A CN 200510077940 CN200510077940 CN 200510077940 CN 200510077940 A CN200510077940 A CN 200510077940A CN 1881560 A CN1881560 A CN 1881560A
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- Prior art keywords
- layer
- mask pattern
- wafer
- intermediate layer
- openings
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 69
- 238000005520 cutting process Methods 0.000 title claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000003892 spreading Methods 0.000 claims description 17
- 230000007480 spreading Effects 0.000 claims description 17
- 238000005530 etching Methods 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 9
- 230000004224 protection Effects 0.000 claims description 9
- 229920002120 photoresistant polymer Polymers 0.000 claims description 8
- 238000000926 separation method Methods 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 claims description 5
- 238000001035 drying Methods 0.000 claims description 5
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000004642 Polyimide Substances 0.000 claims description 3
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical group C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 claims description 3
- 229920001721 polyimide Polymers 0.000 claims description 3
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims description 2
- 229910002092 carbon dioxide Inorganic materials 0.000 claims description 2
- 239000001569 carbon dioxide Substances 0.000 claims description 2
- 229910001882 dioxygen Inorganic materials 0.000 claims description 2
- 239000003822 epoxy resin Substances 0.000 claims description 2
- 229920000647 polyepoxide Polymers 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 50
- 238000005516 engineering process Methods 0.000 description 15
- 238000010586 diagram Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 4
- 230000001771 impaired effect Effects 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000002390 adhesive tape Substances 0.000 description 1
- 230000009172 bursting Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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Abstract
The invention relates to a chip cutting method, which comprises: first, providing a chip, which contains one substrate layer and a device layer from up to down; then, using the first mask pattern to remove the device layer that not protected by the first mask pattern; forming one middle layer on the surface of device layer and adhering the surface of middle layer on one carrying chip; using the second mask pattern to remove the substrate layer that not protected by the second mask pattern; at last, separating the middle layer form the carrying chip, adhering the substrate layer on one expanding film, and removing the middle layer.
Description
Technical field
The present invention relates to a kind of method for cutting chip, relate in particular to a kind of method for cutting chip that after the wafer cutting finishes, can directly expand sheet automatically and pick up crystalline substance.
Background technology
Wafer experienced tens of produce a plurality of integrated circuits or micro electromechanical structure that are arrayed to hundreds of roads semiconductor technologies after, promptly can utilize cutting technique that wafer is cut out a plurality of tube cores (die), so that carry out follow-up packaging technology, and then produce the chip (chip) that can be electrically connected with circuit board.
Please refer to Fig. 1, Fig. 1 is a known method schematic diagram that utilizes cutting machine to carry out cutting technique.As shown in Figure 1, the device wafer 10 that will cut is attached on the film spreading 12, an adhesive tape for example, and film spreading 12 is attached on the support frame 14 simultaneously, the position of immobilising device wafer 10 by this.Will utilize cutter 16 finish the aligning of device wafer 10 when cutting machine after,, device wafer 10 be cut into a plurality of tube cores 18 according to pre-set Cutting Road (scribe line).Wherein after forming a plurality of tube cores 18 then the live width of visual Cutting Road expand blade technolgy, promptly make the pitch enlargement of tube core 18, in order to carrying out the follow-up brilliant technology of picking up by stretching film spreading 12.
The above-mentioned cutter 16 that utilize cutting machine carry out the mode of cutting technique, it is the most widely used cutting mode at present, yet when the tube core number of device wafer 10 surface configuration was too much, the mode of utilizing cutter 16 to carry out cutting technique can seriously reduce production capacity (throughput).In addition, because cutter 16 have certain width,, utilize the cutting technique of cutter 16 easily to cause tube core 18 edges to produce (chipping) phenomenon of bursting apart along with the live width of semiconductor technology descends and the wafer integrated level rises gradually.Therefore, the method for utilizing etching mode to carry out cutting technique is the another kind selection of present cutting technique.
Please refer to Fig. 2, Fig. 2 is a known method schematic diagram that utilizes etching mode to carry out cutting technique.As shown in Figure 2, at first, provide a device wafer 30, and utilize an adhesion layer 32 to be attached on the supporting carrier 34 device wafer 30, the surface of device wafer 30 includes a photoresist pattern 36 in order to definition Cutting Road pattern simultaneously.Then carry out an anisotropic etching process, remove not the device wafer 30 that covered by photoresist pattern 36 until eating thrown device wafer 30, to form a plurality of tube cores 38.
The another kind of method of prior art utilizes etching mode to carry out the live width that cutting technique no doubt can reduce Cutting Road, increase the tube core configured number on device wafer 30 surfaces, yet because supporting carrier 34 is rigid objects, a bearing wafer for example, under the situation that the live width of Cutting Road narrows down, can't successfully carry out the follow-up brilliant technology of picking up after finishing cutting technique, therefore can't utilize aforesaid expansion blade technolgy, directly utilize the mode of stretching adhesion layer 32 that the spacing of tube core 38 is strengthened.In the case, the present known practice is that the photoresist pattern 36 on tube core 38 surfaces is removed, and adhesion layer 32 removed with after separating tube core 38 and supporting carrier 34, adopt manual type to pick up brilliant technology again, to have a strong impact on production capacity thus, and may descend because of human factor causes the tube core 38 impaired acceptance rates that make.
In view of this, the applicant intends providing a kind of method for cutting chip, applicable to cutting and follow-up automatic expansion sheet with pick up brilliant technology, reaching the purpose of the production automation, and then improve production capacity and acceptance rate.
Summary of the invention
Therefore, main purpose of the present invention is providing a kind of method for cutting chip, to overcome the insurmountable difficult problem of known technology.
According to one preferred embodiment of the present invention, provide a kind of method for cutting chip.At first provide a device wafer, and this device wafer from bottom to top includes a substrate layer and a device layer in regular turn.Form one first mask pattern subsequently on the surface of this device layer, and this first mask pattern includes the surface that a plurality of first openings expose this device layer of part, this device layer that removal is not simultaneously protected by this first mask pattern.Then remove this first mask pattern, and form an intermediate layer in the surface of this device layer.Surface with this intermediate layer is attached on the bearing wafer subsequently, and forms one second mask pattern on the surface of this substrate layer, and this second mask pattern includes a plurality of second openings, and the position of these second openings is corresponding to the position of this first opening.Then remove not by this substrate layer of this second mask pattern protection, remove this second mask pattern again.At last this intermediate layer is separated with this bearing wafer, and this substrate layer is attached on the film spreading, remove this intermediate layer simultaneously.
Because method for cutting chip of the present invention utilizes the intermediate layer that device wafer is attached on the bearing wafer, and carry out anisotropic etching process by substrate layer, then again device wafer is changeed and be affixed on the film spreading, expand sheet and the carrying out of picking up brilliant technology in order to follow-up automation, simultaneously the intermediate layer utilizes dry process to be removed, therefore unlikely pollution device layer and can not damage film spreading.
Your, see also following about detailed description of the present invention and accompanying drawing in order to make auditor a nearlyer step understand feature of the present invention and technology contents.Yet accompanying drawing is only for reference and aid illustration usefulness, is not to be used for the present invention is limited.
Description of drawings
Fig. 1 is a known method schematic diagram that utilizes cutting machine to carry out cutting technique.
Fig. 2 is a known method schematic diagram that utilizes etching mode to carry out cutting technique.
Fig. 3 to Figure 13 is the method for cutting chip schematic diagram of one embodiment of the present invention.
The main element symbol description
10 device wafers, 12 film spreadings
14 support frames, 16 cutter
18 tube cores, 30 device wafers
32 adhesion layers, 34 supporting carrier
36 photoresist patterns, 38 tube cores
50 device wafers, 52 substrate layers
54 insulating barriers, 56 device layers
58 first mask patterns, 60 first openings
62 intermediate layers, 64 adhesion layers
66 bearing wafers, 68 second mask patterns
70 second openings 72 the 3rd opening
74 film spreadings, 76 support frames
Embodiment
Please refer to Fig. 3 to Figure 13.Fig. 3 to Figure 13 is the method for cutting chip schematic diagram of one embodiment of the present invention.As shown in Figure 3, at first provide a device wafer 50, and device wafer 50 from bottom to top includes a substrate layer 52, an insulating barrier 54 and a device layer 56 in regular turn, wherein device layer 56 includes a plurality of packaged device (not shown) to be cut.In addition in the present embodiment, device wafer 50 is a silicon-on-insulator (SOI) wafer, but application of the present invention is not limited to this, and device wafer 50 also can be general semiconductor wafer.
As shown in Figure 4, then form one first mask pattern 58 on the surface of device layer 56, and first mask pattern 58 includes the surface that a plurality of first openings 60 expose part of devices layer 56, wherein first mask pattern 58 can be a photoresist pattern or other material as the hard mask of Chang Zuowei, and the position that first opening 60 is exposed is the position in the predetermined cuts road of device wafer 50.
As shown in Figure 5, carry out an anisotropic etching process, for example a plasma etch process is removed not by the device layer 56 and insulating barrier 54 of 58 protections of first mask pattern.As shown in Figure 6, remove first mask pattern 58 subsequently, and form an intermediate layer 62 in the surface of device layer 56.Intermediate layer 62 is fixed in the media of a bearing wafer as follow-up with device wafer 50, brings into play the effect of protection device wafer 50 simultaneously.In addition, because intermediate layer 62 must removal, therefore selecting for use to have easy removal characteristic person for good at material in subsequent technique.In the present embodiment, the material in intermediate layer 62 is selected from benzocyclobutene (BCB), polyimides (polyimide), epoxy resin (epoxy), photoresist and dry film (dry film) etc., also utilizes modes such as coating or attaching to be formed at the surface of device layer 56 simultaneously.
As shown in Figure 7, utilize an adhesion layer 64 intermediate layer 62 to be fixed in the surface of a bearing wafer 66.Adhesion layer 64 is selected thermal separation gel band or ultraviolet tape etc. for use in the present embodiment, wherein thermal separation gel band can utilize mode of heating to be removed, ultraviolet tape then can utilize the irradiation ultraviolet radiation mode to be removed, adhesion layer 64 also can use other material in addition, and utilize other can not cause device layer 56 and intermediate layer 62 impaired modes to remove, and be not limited to the cited material of present embodiment.66 of bearing wafers can be selected general semiconductor wafer, chip glass or quartz wafer etc. for use, wherein it should be noted that if adhesion layer 64 is selected ultraviolet tape for use, then bearing wafer 66 need make the chip glass or the quartz wafer of apparatus light transmitting property, is beneficial to the removal of follow-up adhesion layer 64.In addition, method of the present invention also can optionally be carried out a wafer grinding technology at this moment, substrate layer 52 is reduced to suitable normal thickness.
As shown in Figure 8, form one second mask pattern 68 on the surface of substrate layer 52.Second mask pattern 68 includes a plurality of second openings 70, and the position of second opening 70 is corresponding to the position of the first opening (not shown).Second mask pattern 68 can be the material of a photoresist pattern or the hard mask of other Chang Zuowei.It should be noted that the difference along with the part category of device layer 56 in addition, the pattern of second mask pattern 68 also can adjust, to produce desired structure.For instance, if the device desiring to cut is a pressure resistance type pressure-sensing assembly, then second mask pattern 68 includes the 3rd opening 72 in addition, produces the pedestal (stand) of pressure resistance type pressure-sensing assembly by this.
As shown in Figure 9, carry out anisotropic etching process, for example plasma etch process is removed second mask pattern, 68 unprotected substrate layers 52.As shown in figure 10, remove second mask pattern 68.
As shown in figure 11, removing adhesion layer 64 makes intermediate layer 62 separate with bearing wafer 66.The method of removing adhesion layer 64 is then looked the material of adhesion layer 64 and different.For instance, when adhesion layer 64 is thermal separation gel band, then utilize mode of heating that temperature is increased on the separation temperature of thermal separation gel band, and when adhesion layer 64 is a ultraviolet tape, then utilizes by bearing wafer 66 below irradiation ultraviolet radiation modes and remove adhesion layer 64.
As shown in figure 12, subsequently substrate layer 52 is attached on the film spreading 74, and film spreading 74 is fixed on the support frame 76.As shown in figure 13, the surface of intermediate layer 62 from device layer 56 removed, wherein intermediate layer 62 removes that to look material behavior different with effect, select for use different modes to be removed, and polluted for fear of device layer 56, remove the method preferred dry technology in intermediate layer 62, for example utilize oxygen gas plasma cleaning procedure or supercritical carbon dioxide cleaning procedure.According to method for cutting chip of the present invention, after substrate layer 52 is attached at film spreading 74, can directly utilizes film spreading 74 to carry out automation and expand sheet and pick up brilliant technology.
From the above, method for cutting chip of the present invention utilizes the intermediate layer that device wafer is attached on the bearing wafer, use from substrate layer and carry out anisotropic etching process, then again device wafer is changeed and be affixed on the film spreading, be beneficial to follow-up automation and expand sheet and the carrying out of picking up brilliant technology, simultaneously the intermediate layer utilizes dry process to be removed, therefore unlikely pollution device layer and can not damage film spreading.In addition, many micro electro mechanical devices, for example pressure-sensing device (pressure sensor), infrared ray sensor (IR sensor) and micro-electro-mechanical microphone (MEMS microphone) etc., all have suspension structure, and can when substrate layer carries out anisotropic etching, be made easily by the cutting method of wafer of the present invention.By contrast, known technology can't expand blade technolgy after utilizing etching mode to finish cutting technique, pick up crystalline substance and must rely on manual type, influences process time and production acceptance rate significantly.Therefore, method for cutting chip of the present invention can effectively promote production capacity, and reduces and manually to pick up crystalline substance and cause the impaired risk of tube core.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claims of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (17)
1. method for cutting chip comprises:
One device wafer is provided, and this device wafer from bottom to top includes a substrate layer and a device layer in regular turn;
Form one first mask pattern in the surface of this device layer, and this first mask pattern includes the surface that a plurality of first openings expose this device layer of part;
Remove not by this device layer of this first mask pattern protection;
Remove this first mask pattern, and form an intermediate layer in the surface of this device layer;
The surface in this intermediate layer is attached on the bearing wafer;
Form one second mask pattern on the surface of this substrate layer, this second mask pattern includes a plurality of second openings, and the position of these a plurality of second openings is corresponding to the position of this first opening;
Remove not by this substrate layer of this second mask pattern protection;
Remove this second mask pattern;
This intermediate layer is separated with this bearing wafer; And
This substrate layer is attached on the film spreading, and removes this intermediate layer.
2. the method for claim 1, the step that wherein this substrate layer is attached on this film spreading was carried out before the step of removing this intermediate layer.
3. the method for claim 1 is wherein removed the step in this intermediate layer and was carried out before the step that this substrate layer is attached on this film spreading.
4. the method for claim 1, wherein this intermediate layer is attached on this bearing wafer by an adhesion layer.
5. method as claimed in claim 4, wherein this adhesion layer is a thermal separation gel band.
6. method as claimed in claim 4, wherein this adhesion layer is a ultraviolet tape.
7. the method for claim 1 is not wherein removed and is realized by anisotropic etching process by the step of this device layer of this first mask pattern protection.
8. method as claimed in claim 7, wherein this anisotropic etching process is a plasma etch process.
9. the method for claim 1 is not wherein removed and is realized by anisotropic etching process by the step of this substrate layer of this second mask pattern protection.
10. method as claimed in claim 9, wherein this anisotropic etching process is a plasma etch process.
11. the method for claim 1, wherein this second mask includes a plurality of the 3rd openings in addition, and the position of these a plurality of the 3rd openings is not corresponding with these a plurality of first openings.
12. the method for claim 1, wherein this device wafer includes an insulating barrier in addition, is located between this substrate layer and this device layer.
13. method as claimed in claim 12 when also being included in removal not by the step of this device layer of this first mask pattern protection, is removed simultaneously not by this insulating barrier of this first mask pattern protection.
14. the method for claim 1, wherein the material in this intermediate layer is selected from benzocyclobutene, polyimides, epoxy resin, photoresist and dry film.
15. the method for claim 1 is wherein removed the step in this intermediate layer and is utilized dry process to realize.
16. the method for claim 1, wherein this dry process is the oxygen gas plasma cleaning procedure.
17. the method for claim 1, wherein this dry process is the supercritical carbon dioxide cleaning procedure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100779401A CN100382280C (en) | 2005-06-15 | 2005-06-15 | Wafer cutting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100779401A CN100382280C (en) | 2005-06-15 | 2005-06-15 | Wafer cutting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1881560A true CN1881560A (en) | 2006-12-20 |
| CN100382280C CN100382280C (en) | 2008-04-16 |
Family
ID=37519681
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100779401A Expired - Fee Related CN100382280C (en) | 2005-06-15 | 2005-06-15 | Wafer cutting method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100382280C (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101734613B (en) * | 2009-12-03 | 2011-08-24 | 西北工业大学 | SOI wafer-based MEMS structure manufacturing and dicing method |
| CN101383276B (en) * | 2007-09-04 | 2011-09-14 | 株式会社迪思科 | Processing device |
| CN105575870A (en) * | 2014-10-13 | 2016-05-11 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, preparation method thereof and electronic device with semiconductor device |
| CN108615706A (en) * | 2018-07-04 | 2018-10-02 | 南通沃特光电科技有限公司 | A kind of wafer singualtion method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2763441B2 (en) * | 1992-02-06 | 1998-06-11 | 三菱電機株式会社 | Method for manufacturing semiconductor device |
| WO1994026081A1 (en) * | 1993-04-26 | 1994-11-10 | P.A.C. Di Bezzetto Sandro & C.S.N.C. | Process for producing printed circuit boards |
| US5552345A (en) * | 1993-09-22 | 1996-09-03 | Harris Corporation | Die separation method for silicon on diamond circuit structures |
| US6642127B2 (en) * | 2001-10-19 | 2003-11-04 | Applied Materials, Inc. | Method for dicing a semiconductor wafer |
| KR20040004768A (en) * | 2002-07-05 | 2004-01-16 | 삼성전기주식회사 | Dicing method micro electro-mechanical system chip |
-
2005
- 2005-06-15 CN CNB2005100779401A patent/CN100382280C/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101383276B (en) * | 2007-09-04 | 2011-09-14 | 株式会社迪思科 | Processing device |
| CN101734613B (en) * | 2009-12-03 | 2011-08-24 | 西北工业大学 | SOI wafer-based MEMS structure manufacturing and dicing method |
| CN105575870A (en) * | 2014-10-13 | 2016-05-11 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device, preparation method thereof and electronic device with semiconductor device |
| CN108615706A (en) * | 2018-07-04 | 2018-10-02 | 南通沃特光电科技有限公司 | A kind of wafer singualtion method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100382280C (en) | 2008-04-16 |
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