CN1881119A - Intelligent apparatus for checking fault of numerical control machine tool - Google Patents
Intelligent apparatus for checking fault of numerical control machine tool Download PDFInfo
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- CN1881119A CN1881119A CNA2005100768322A CN200510076832A CN1881119A CN 1881119 A CN1881119 A CN 1881119A CN A2005100768322 A CNA2005100768322 A CN A2005100768322A CN 200510076832 A CN200510076832 A CN 200510076832A CN 1881119 A CN1881119 A CN 1881119A
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Abstract
The invention discloses an intelligent checking equipment of digital control machine accident, which comprises the following parts: teacher computer, switchboard and multiple student computers, wherein the teacher computer communicates with student computers through Ethernet and switchboard, which sends accident order data to student computer and receives checking result data from student computer; the equipment also contains multiple accident generators to receive accident order data from student computers, which generates corresponding true accident data to digital control machine circuit; wherein each accident generator contains receiving circuit of accident order data, decoding circuit to transmit the accident order data into control relay matrix bit, signal generating circuit of interference signal, synthesizing circuit to combine relay matrix bit and interference signal into data array, accident generating device to generate accident according to synthesized data array.
Description
Technical field
The present invention relates to a kind of intelligent apparatus for checking fault, particularly a kind of intelligent apparatus for checking fault of numerical control machine tool.
Background technology
In vocational education particularly in the vocational education at numerically-controlled machine, adopting apparatus for checking that student's technical ability is examined is very important, it can spend less fund training of students and grasp the technical ability of getting rid of the numerically-controlled machine generic failure, for enterprise provides skilled numerical control machine tool technique workman.
Prior art related to the present invention is CN136623A disclosed " Electrical Control of Machinery Tools line fault equipment and an appraisal system ", this system is made of main frame, unit machine, slave computer and examination platform, its examination platform has a configuration to be made into the cabinet of Electrical Control of Machinery Tools circuit mimic panel by electric elements, and slave computer is by the 89C52 type single-chip microcomputer that disposes EEPPROM storer and 8279 chips that are connected LED dot matrix display screen and input keyboard respectively.Though the general electric fault that this appraisal system can simulated machine tool, the technical ability of fixing a breakdown with the check student.But this appraisal system can not be simulated the numerically-controlled machine true fault, for example, can not simulate the fault that external disturbance causes numerically-controlled machine.
Summary of the invention
The purpose of this invention is to provide a kind of intelligent apparatus for checking fault of numerical control machine tool that can simulate the numerically-controlled machine true fault.
According to one aspect of the invention, a kind of intelligent apparatus for checking fault of numerical control machine tool is provided, comprise: teacher's computers, switch and a plurality of student's machine, wherein teacher's computers communicates by Ethernet and switch and each student's machine, issues failure instruction data and receives the result of appraisal data of sending out on student's machine to student's machine; It is characterized in that also comprising:
A plurality of fault makers, each fault maker receive the failure instruction data that corresponding student's computing machine sends, and produce corresponding true fault data and send to the numerically-controlled machine circuit, and each fault maker comprises:
Receive the receiving circuit of the failure instruction data of student's machine transmission;
Failure instruction data is decoded as the decoding scheme of pilot relay matrix byte;
Produce the undesired signal signal generating circuit of undesired signal;
The address/data of relay matrix byte and undesired signal is synthesized the combiner circuit of data array; And
Comprise the fault generating apparatus that seals in the corresponding undesired signal in undesired signal address according to synthetic data array generation.
Wherein, described fault maker also comprises the identification circuit that sends the correct/error code, is used to judge whether the failure instruction data of student's machine transmission is effective.
Wherein, described fault maker also comprises the printed circuit board (PCB) self-checking circuit of the component wear situation of checking printed circuit board (PCB).
Wherein, described fault maker comprises that also data processing is from supervising signal transmission/receiving circuit.
Wherein, described undesired signal generation circuit is the square-wave signal generator.
Wherein, described undesired signal produces the maker that circuit is six kinds of different frequency square-wave signals of generation.
According to a further aspect of the invention, a kind of fault maker that is applicable to intelligent apparatus for checking fault of numerical control machine tool is provided, this fault maker receives the failure instruction data that corresponding student's computing machine sends, and produce corresponding true fault data and send to the numerically-controlled machine circuit, described fault maker comprises:
Receive the receiving circuit of the failure instruction data of student's machine transmission;
Failure instruction data is decoded as the decoding scheme of pilot relay matrix byte;
Produce the undesired signal signal generating circuit of undesired signal;
The address/data of relay matrix byte and undesired signal is synthesized the combiner circuit of data array; And
Comprise the fault generating apparatus that seals in the corresponding undesired signal in undesired signal address according to synthetic data array generation.
Wherein, described fault maker also comprises the identification circuit that sends the correct/error code, is used to judge whether the failure instruction data of student's machine transmission is effective.
Wherein, described fault maker also comprises the printed circuit board (PCB) self-checking circuit of the component wear situation of checking printed circuit board (PCB).
Wherein, described undesired signal generation circuit is the square-wave signal generator.
Wherein, described undesired signal produces the maker that circuit is six kinds of different frequency square-wave signals of generation.
Technique effect of the present invention is, can utilize computer networking technology, the fault numbering that the transmission teacher's computers is provided with, thereby generate the common actual phenomenon of the failure that can observe, measure of numerically-controlled machine, to train and to improve the ability to work of students ' actual situation troubleshooting, maintenance, the student can be cut off the power supply, and measure also can on-line measurement, and the on-line measurement that is difficult to that solves true machine failure is difficult to show the technical barrier of various phenomena of the failure comprehensively.
The present invention is described in detail below in conjunction with accompanying drawing.
Description of drawings
Fig. 1 is the arrangement plan of intelligent apparatus for checking fault of numerical control machine tool of the present invention;
Fig. 2 is the circuit block diagram of the fault maker of intelligent apparatus for checking fault of numerical control machine tool of the present invention;
Fig. 3 shows the data layout of the character string of the valid data fault numbering that student's computing machine of the present invention sends;
Fig. 4 shows 64 fault number format of the present invention;
Fig. 5 is the waveform of the interrupted interference of undesired signal maker generation of the present invention;
Fig. 6 is the waveform that the Electromagnetic Continuous of undesired signal maker generation of the present invention is disturbed;
Fig. 7 a and Fig. 7 b are respectively the synoptic diagram that undesired signal directly seals in and seals in indirectly;
Fig. 8 is the oscillogram of working signal, undesired signal and composite signal;
Fig. 9 has shown the synoptic diagram that produces simulated failure on a lead-out terminal of numerically-controlled machine, has wherein increased the fault measuring end Y ' corresponding with actual terminal;
Figure 10 is the fault measuring synoptic diagram that seals in the terminal of the numerically-controlled machine of simulating the extraneous interference signal.
Embodiment
At first referring to the arrangement plan of intelligent apparatus for checking fault of numerical control machine tool of the present invention shown in Figure 1.Intelligent apparatus for checking fault of numerical control machine tool of the present invention, comprise: teacher's computers 1, switch 2, a plurality of student's machine 3, a plurality of fault maker 4 and a numerically-controlled machine circuit 5, wherein teacher's computers communicates with each student's machine 3 by Ethernet and switch 2, issues failure instruction data and receives the result of appraisal data of sending out on student's machine 3 to student's machine 3.
Particularly, communicating by letter between teacher's computers 1 and the student's computing machine 3 is that TCP/IP by Ethernet realizes that student's computing machine 3 is communicated by letter by RS232 with fault maker 4 and realized exchanges data.Teacher's computers 1 sends content, answer, the standards of grading of paper to student's computing machine 3 with the form of character string.Student's computing machine 3 extracts the content, answer, standards of grading of paper and they are existed in the internal memory from the character string that receives: student's computing machine 3 changes into certain one contents of test question the scale-of-two of 8 bytes, the protocol contents F7 that adds a byte again before 8 bytes sends to fault maker 4 with these 9 bytes at last; The answer of this topic of input on student's computing machine 3 if answer is identical with the answer that teacher's computers 1 sends, then sends the order (F7 adds that 8 bytes are 0 entirely) of removing this fault and gives fault maker 4; When examination finished, student's computing machine 3 was marked, and appraisal result is issued teacher's computers 1 with the form of character string.The character string that 1 pair of reception of teacher's computers is come is handled, and the result is left in lane database.
In addition, the damaged condition of the element of the printed wiring board of the automatic at any time monitoring failure generation of fault maker 4 hardware is pointed out at display.Can directly not number yet, directly generate hardware fault, improve the self-debugging capability of fault maker, be convenient to produce with the keyboard input fault by student's computing machine 3.
In addition, standards of grading are that numerically controlled lathe fixes a breakdown is the process of a complexity, so the present invention carries out three layers of standards of grading.Three layers of A between answer and standards of grading zone, interval B, interval C: A interval, B interval, C are answered questions all will give and are divided for interval every layer, and every topic score is exactly the summation of three layers of interval score; Whether whether any one interval answered mistake and wanted back-off to divide and answer wrong number of times and will deduct points and determined by teacher fully.The for example stepping X-axis CP+/CP-pulse driver inside fault that is short-circuited.Phenomenon of the failure is that the stepping X-axis can not feeding.Should answer interval A, X-axis step actuator XPG should answer interval B, and CP+/CP-should answer interval C, is short circuit.
Below in conjunction with the circuit block diagram of the fault maker of intelligent apparatus for checking fault of numerical control machine tool of the present invention shown in Figure 2, describe the structure of fault maker 4 of the present invention in detail.
Each fault maker 4 receives the failure instruction data (fault numbering) that corresponding student's computing machine sends, and produces corresponding true fault data and send to numerically-controlled machine circuit 5.
Each fault maker 4 comprises:
Receive the receiving circuit 41 of the failure instruction data of student's machine transmission;
Failure instruction data is decoded as the decoding scheme 43 of pilot relay matrix byte; This decoding scheme 43 also generates corresponding undesired signal address byte according to the corresponding failure director data that student's machine sends.Comprise in some failure instruction data that student's machine sends seal in undesired signal instruction (just, the fault of some fault number comprise seal in undesired signal), therefore decoding scheme 43 also generates the undesired signal address byte, and this in fact also is to finish by the decoding to fault number;
Produce the undesired signal signal generating circuit 45 of undesired signal;
The address/data of relay matrix byte and undesired signal is synthesized the combiner circuit 44 of data array; And
Comprise the fault generating apparatus 48 that seals in the corresponding undesired signal in undesired signal address according to synthetic data array generation.
Described fault generating apparatus 48 comprises: control the control device of a plurality of relay change actions according to synthetic data array, wherein, described control device is I
2The C bus.
Wherein, described fault maker 4 also comprises the identification circuit 42 that sends the correct/error code, is used to judge whether the failure instruction data of student's machine 3 transmissions is effective.
Wherein, described fault maker 4 also comprises data processing circuit 46, is used to control identification circuit 42 and judges whether the failure instruction data of student's machine transmission is effective, and described generated data array is transferred to described fault generating apparatus 48.
Wherein, described fault maker 4 also comprises the identification circuit 42 that sends the correct/error code, is used to judge whether the failure instruction data of student's machine 3 transmissions is effective.Although in the embodiment shown in Figure 2, identification circuit 42 separates setting with data processing circuit, but also identification circuit 42 can be incorporated in the data processing circuit 46, data processing circuit 46 is had simultaneously judge whether effectively function of failure instruction data that student's machine 3 sends, thereby omit identification circuit 42.The data processing circuit 46 of after a while detailed description being incorporated into the recognition function of identification circuit 42.
Wherein, described fault maker 4 also comprises the printed circuit board (PCB) self-checking circuit 49 of the component wear situation of checking printed circuit board (PCB).
Wherein, described undesired signal generation circuit 45 is square-wave signal generators.
Wherein, described undesired signal produces the maker that circuit 45 generates six kinds of different frequency square-wave signals.
Below, further specify the principle of work of fault maker 4 of the present invention by way of example.Need to prove, should only be used to understand the present invention for example, rather than limitation of the present invention, those of ordinary skill in the art also can adopt other similar fashion to implement the fault maker according to this for example, for example can adopt other coded format to send failure instruction data and adopt other codec format that failure instruction data is decoded.
The receiving circuit 41 of the fault maker 4 of this example receives the valid data fault numbering that student's computing machine 3 sends, and the data layout of the byte serial of this fault numbering as shown in Figure 3.
The present invention can have 64 fault number format, and as shown in Figure 4, wherein the D7 to D0 of data DATA1 represents fault 64 to No. 57; The D7 to D0 of data DATA2 represents fault 56 to No. 49; The D7 to D0 of data DATA3 represents fault 48 to No. 41; The D7 to D0 of data DATA4 represents fault 40 to No. 33; The D7 to D0 of data DATA5 represents fault 32 to No. 25; The D7 to D0 of data DATA6 represents fault 24 to No. 17; The D7 to D0 of data DATA7 represents fault 16 to No. 9; The D7 to D0 of data DATA7 represents fault 8 to No. 1.
D
xThe bit number form:
D
x=1 expression fault exists
D
x=0 expression fault does not exist
Adopt single-chip microcomputer asynchronous communication hardware, whether interrupt mode is differentiated the guiding character correct, Eight characters joint under the correct reception, and incorrect then abandoning receives; The Eight characters symbol that receives, consistent through the check and correction of three secondary data, deposit internal memory in.
Decoding scheme 43 periodically extracts fault Eight characters joint in the internal memory, and (represent 64 faults for totally 64) by turn differentiating is 1 or 0.Be that 1 expression has syndrome decoding, the relay matrix data byte that then is decoded as this fault (comprises I
2The C address/data)
For example: DATA2=
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Be that DATA2-D0=1 represents fault No. 49
Then decipher back calculated address 74H data DAT1 DAT2
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 |
Promptly form 741018H 000000H and deposit internal memory in
For example: DATA6=
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
Be DATA6-D
2No. 19 faults of=1 expression
Then decipher calculated address, back 44H data
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
Address 74H data
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
Form 442200H 740040H and deposit internal memory in.
For example: DATA2=
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Be that DATA2-D2=1 represents fault No. 54.
Calculated address, decoding back 76H data
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Promptly form 760701H 000000H and deposit internal memory in.
Failure instruction data is decoded as the decoding scheme of pilot relay matrix byte.
Concrete analysis is to carry out in two steps:
The first step is that the fault director data is decoded as the relay kind that specifically will move, says it is the element code of relay on software.
For example shown in Figure 9, show four kinds of faults, at failure instruction data is DATA1～DATA3=00H DATA4=20H DATA5～DATA8=00H, be called the G38 fault, it embodies Y10 → Y10 that " true parts XS20 female component " is transferred to " true parts XS20 lead-out terminal parts " "; Y05 → Y05 " dislocation of circuit intersection occurs, Y10 → Y05 promptly appears "; " it respectively is called P40P1 by relay element software to Y05 → Y10, P40P2, P40P3, the action of P40P4 realizes the software decoding process in this step, come down to a kind of look-up routine, on the table position of G38, place P40P1, P40P2, P40P3, the title of P40P4.
Form a matrix element namelist by fault G1～G64, the first step of decoding is looked into news with the character string code in the matrix element namelist and is come out, put on the internal memory assigned address, it reflects the relation of fault numbering and phenomenon of the failure, fault numbering and phenomenon of the failure relation as constant, even the hardware of printed wiring board changes, this section decode procedure can not change yet.
The second step decode procedure is that the character string code of file name table is one by one found out it at I
2Address/data position in the C bus, specific design is P40P1 → 74H/0001H, P40P2 → 74H/0002H, P40P3 → 74H/0004H, P40P4 → 74H/0008H, it reflects the mutual relationship of the hardware of the dbase of element and printed wiring board, changes the hardware configuration of printed wiring board, will change this relational expression.
If adopt identical printed wiring board hardware, though dissimilar numerically-controlled machines, the numerical control device of different model, the relational expression of its this step decoding remains unchanged.
74H represents it is I among the 74H/0002H
2The equipment address of C hardware SAA1064 model, this equipment address is 7XH, 0002H is the I/O mouth position of SAA1064 model hardware.
74H/0001H and 74H/0002H, 74H/0004H, 74H/0008H are merged into 74H/000FH data processor (single-chip microcomputer) and send three bytes of 74H00H0FH continuously to I
2On the C data bus, the I of 74H address
2C hardware equipment, with automatic reception data 00H0FH, the 0001H I/O mouth on the hardware equipment, 0002H I/O mouth, 0004H I/O, 0008H I/O mouth present high level, make the relay on the relevant position produce the adhesive action, finish the hardware performance of phenomenon of the failure.
More than be the decode procedure that the fault director data is decoded as relay matrix, and the decode procedure of undesired signal is similar with above method, but owing to is by I
2Another type of hardware PCF8574 equipment address is that 4XH forms in the C equipment.The selection of undesired signal kind (six kinds) simultaneously, constitute by the 4XH address, and be to constitute by the 7XH address in directly sealing in/sealing in indirectly of concrete abort situation, so the generated data array is 76H07H01H4AH08H00H with regard to the data array that forms as G54 fault band undesired signal among Figure 10, single-chip microcomputer sends to I with 76H07H01H4AH08H00H as a same reason
2On the C bus, the I of 76H address
2C hardware receives 07H01H data, the I of 4AH address
2C hardware receives the 08H00H data, makes it corresponding I/O mouth and high level occurs, finishes the hardware setting task of fault.
The present invention mainly simulates six kinds of common interference modes, and interference signal amplitude can be regulated.
The undesired signal that is produced can be interrupted as shown in Figure 5 undesired signal, and time several seconds produces undesired signal several times, interference signal pulse width 40 μ s～0.5ms.It also can be continuous undesired signal shown in Figure 6.
Sealing in of undesired signal can adopt directly sealing in the screen layer shown in Fig. 7 b shown in Fig. 7 a to seal in the respective terminal that two bell formulas seal in numerically-controlled machine.
For example, No. 54 faults in the last example produce the continuous undesired signal to the CP+/CP-working signal of numerically-controlled machine stepping Y-axis.This undesired signal is that frequency (2ms)=500KHZ square-wave signal is through address 4AH data
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
Directly seal in, then synthetic fail-safe control array becomes 760701H4A0800H.Former working signal CP+/CP-is frequency change with the variation of the speed of feed of Y-axis stepping, but the working signal after synthetic, a kind of is that high reject signal suppresses former working signal, it only is undesired signal, another kind just becomes the unequal square-wave signal of frequency, make the Y-axis feeding sometimes fast and sometimes slow, and step-out work takes place, machining precision does not reach requirement.Fig. 8 shows the signal waveform after synthesizing.
One, data processing:
1, generates relevant data processing with fault: 1. regularly accept the fault numbering that student's machine is sent by asynchronous communication, carry out correction, the inspection of data, the character string code of the synthetic fail-safe control array of decoding deposits internal memory in.Proofread and correct, checking process: the data of eight that receive for the first time effective faults numberings are deposited in first core position, and the byte that receives for the first time in eight bytes that receive for the second time and the internal memory compares, and is all correct, deposits second core position in.Incorrect if any a byte, then eight bytes that will receive for the second time deposit first core position in, and cancellation just receives for the first time data.Eight bytes that receive for the third time and eight bytes of first core position relatively, equate again with eight bytes of second internal memory relatively, equate that put into the core position of effective fault numbering, it is effective that expression receives byte.Where unequal, just deposit this position in, promptly cancel the data of original position.
Can get rid of the appearance part mistake that student's machine sends data procedures and fault maker receiving course like this.
2. during asynchronous communication and teacher's computers arrange a paper and can have manyly to 64 exercise questions, but each exercise question has only a fault numbering, that is: " No. 1 " fault～" No. 64 " fault one of them.So data processing will effectively receive byte, check.All the other all are " 0 " or be deciphering for correct reception byte of " 0 " entirely to have only one " 1 ", syntheticly wait work.Otherwise rewrite first internal memory, second internal memory, valid memory data and be " 00H " entirely.
The result of the 3. timed sending adjustment of data, inspection is correct transmission " 7FH ", " AAH ".Be wrong transmission " 7FH ", " 55H " information.Keep in touch with student's computing machine.Newline is above to be formed and judges whether effective process of failure instruction data that student's machine sends.
The character string of 4. timed sending fail-safe control array is given the I on nine printed wiring boards
2C hardware equipment, the fault content of the fault numbering that generation student machine is sent here.
2, generating irrelevant auxiliary data with fault handles
According to the keyboard input, be presented at charactron after the data processing.
The phenomenon of the failure of 64 faults of 1. routine keyboard input self check, when " Gou-00 " appears in charactron, with adding 1 key or subtracting 1 key, make the data pipe show " Gou-01 " ... " Gou-64 ", " Gou-* * ", the fault maker generates automatically * * number hardware fault, make things convenient for the fault debugging and the maintenance of fault maker.
2. routine keyboard is imported the manual surveillance scenarios of nine bar printing plates, and plate ground of a plate after the data processing shows not hardware problem.
3. example is numbered for the fault that procuratorial theory life sends over, behind the input keyboard, charactron shows " * * * * 14 ", " * * * * 58 " at twice continuously, the segment encode of previous six byte representation DATA1～DATA4 and " 14 " expression DATA1～DATA4 position.The segment encode of one the six byte representation DATA5～DATA8 in back and " 58 " expression DATA5～DATA8 position.Segment encode represent eight sections of a, b, c, d, e, f, g, h each DATA D0～D7 0/1,0 do not show this segment encode.1 shows this segment encode.
Two, in the automatic generative process of fault, timing supervision printed wiring board return signal, because I
2The C bus is data processor and I
2Mutual transmission/the receiving course of C hardware equipment has transmission, no response.Can cause I
2The wait situation of C bus perhaps claims " deadlock ".So must at first check the I of printed wiring board
2C equipment whether bar is gone into or is not intact; so not insertion or not intact; then data processor does not just send the data of its hardware; this is in debug process; owing to be the debugging of a plate; the phenomenon that occurs through regular meeting; therefore design the transmission of three I/O mouths and the reception of three I/O mouths; article three, the I/O mouth is formed 8 bit data, 0～6 numeral; represent motherboard and remaining seven plate printed board/one mutual exchanges data of nothing plate; when main frame sends " 000 " binary code; No. 0 printed board will be formed the state of hardware automatically with three I/O mouths code " 0～7 " returns main frame; when No. 0 plate returns " 000 " expression non-fault, 7 kinds of malfunctions of " 001 "～" 111 " expression.2 kinds of malfunctions only are provided at present, and No. 0 plate of " 111 " expression is not installed, and receives No. 0 plate I of data " 001 " expression that original state appears in three I/O mouths
2The C equipment, error in address.Main frame sends No. 1 plate of " 001 " code and returns " 001 " code, and the expression non-fault is returned " 010 " expression I
2C equipment error in address ..., No. 6 plates of code return " 110 " expression non-fault, return " 000 " expression I
2C equipment error in address.And the transmission/reception of printed wiring board is made up of hardware circuit.
More than be exactly from the groundwork process of supervising the signal transmission circuit.
Three, regularly change the high level/low level of table six kind of undesired signal output pin, form six kinds of disturbing pulse waveforms.Because the disturbing pulse great majority constitute for the continuous impulse that high-frequency spark forms interrupting pulse and low frequency.Three kinds of interrupting pulses and three kinds of continuous impulse oscillograms such as Fig. 5, shown in Figure 6.
Fault generating apparatus 48:, adopt I in the plate because the CNC milling machine system is made up of nine printed wiring boards
2C Integration Bus and monitor hardware such as integrated and relay matrix certainly and form. in general, fault generating apparatus 48 is by I
2C bus and I
2A plurality of relays of the total line traffic control of C (80) are formed, wherein I
2The generated data array that the C bus is sent according to data processing circuit 46 is controlled connected corresponding relay work, thereby produces the open circuit/short circuit/cross faults of numerically-controlled machine respective terminal, and undesired signal is sealed in the respective terminal of numerically-controlled machine.This present invention is decomposed into the relation between each terminal in the system with short circuit, open circuit, the crossover phenomenon of common CNC milling machine fault, forms the short circuit between end points and the end points, and open circuit between the end points and end points seal in the short circuit of undesired signal.Since be decomposed into minimum end points normally closed/often open, adopt the normally closed/normally open contact of relay to combine, so nearly all fault can form, and relay can be constituted the arranged form of economizing relay most by different fault numbering repeated uses.
The most common failure of CNC milling machine, the components interior distress condition of most of generation systems.This equipment is on the basis that does not change former components interior hardware, designing the method for true/false parts demonstrates out with the system unit internal fault, and all end points of false parts are all opened to the student, can use the universal meter on-line testing, can be with oscillograph on-line measurement (real CNC milling machine in running order be to be difficult to on-line measurement).
For example, as shown in Figure 9, the PLC lead-out terminal XS20 pole socket failure condition of the numerical control HNM of system:
1. Y
10Inner open circuit: the P40P1 actuating of relay;
2. Y
10And Y
05The outside intersection: P40P2, P40P3, P40P4, the P40P5 actuating of relay;
3. Y
10And Y
05External short circuit: P40P3, P40P4, P40P1, the P40P6 actuating of relay;
4. Y
05Inner open circuit: the P40P6 actuating of relay.
For example, as shown in figure 10, the stepping of the numerical control HNM of system output XS31 pole socket
Failure condition: 1. CP+/CP-is outside opens a way: P52P9, P51P1
2. CP+/CP-is inner opens a way: P62P10, P62P11,
3. CP+/CP-internal short-circuit: P62P10, P62P11, P62P2
4. CP+/CP-internal interference: P62P10, P62P11, P62P9, P61P1, P20P4
5. CP+/CP-external disturbance: P62P9, P61P1, P20P4
Above-described preferred embodiment of the present invention is not to be used for limiting the scope of the invention, all parts of doing according to content of the present invention are revised, and does not run counter to spirit of the present invention, all should belong to protection scope of the present invention.
Claims (20)
1. fault of numerical control machine tool apparatus for checking, comprise: teacher's computers, switch and a plurality of student's machine, wherein teacher's computers communicates by Ethernet and switch and each student's machine, issues failure instruction data and receives the result of appraisal data of sending out on student's machine to student's machine; It is characterized in that also comprising:
A plurality of fault makers, each fault maker receive the failure instruction data that corresponding student's computing machine sends, and produce corresponding true fault data and send to the numerically-controlled machine circuit, and each fault maker comprises:
Receive the receiving circuit of the failure instruction data of student's machine transmission;
Failure instruction data is decoded as the decoding scheme of pilot relay matrix byte;
Produce the undesired signal maker of undesired signal;
Relay matrix byte and undesired signal address byte are synthesized the combiner circuit of data array; And
Generate the fault generating apparatus of numerically-controlled machine electric fault according to synthetic data array, the numerically-controlled machine electric fault that is wherein generated comprises and sealing in and the corresponding undesired signal in undesired signal address.
2. fault of numerical control machine tool apparatus for checking according to claim 1 is characterized in that, described decoding scheme also generates corresponding undesired signal address byte according to the corresponding failure director data that student's machine sends.
3. fault of numerical control machine tool apparatus for checking according to claim 1 is characterized in that, described fault generating apparatus comprises: the control device of controlling a plurality of relay change actions according to synthetic data array.
4. fault of numerical control machine tool apparatus for checking according to claim 3 is characterized in that described control device is I
2The C bus.
5. intelligent apparatus for checking fault of numerical control machine tool according to claim 1 is characterized in that, described fault maker also comprises the identification circuit that sends the correct/error code, is used to judge whether the failure instruction data of student's machine transmission is effective.
6. intelligent apparatus for checking fault of numerical control machine tool according to claim 1 is characterized in that, described fault maker also comprises the printed circuit board (PCB) self-checking circuit of the component wear situation of checking printed circuit board (PCB).
7. intelligent apparatus for checking fault of numerical control machine tool according to claim 1 is characterized in that, it is the square-wave signal generator that described undesired signal produces circuit.
8. intelligent apparatus for checking fault of numerical control machine tool according to claim 1 is characterized in that, it is the maker that generates six kinds of different frequency square-wave signals that described undesired signal produces circuit.
9. fault of numerical control machine tool apparatus for checking according to claim 1, it is characterized in that, described fault maker also comprises data processing circuit, be used to control identification circuit and judge whether the failure instruction data of student's machine transmission is effective, and described generated data array is transferred to described fault generating apparatus.
10. fault of numerical control machine tool apparatus for checking according to claim 1 is characterized in that, the failure instruction data that described student's machine sends is a fault number.
11. fault of numerical control machine tool apparatus for checking according to claim 1 is characterized in that, described undesired signal maker is the maker that generates six kinds of different frequency square-wave signals.
12. fault maker that is applicable to the fault of numerical control machine tool apparatus for checking, this fault maker receives the failure instruction data that corresponding student's computing machine sends, and produce corresponding true fault data and send to the numerically-controlled machine circuit, it is characterized in that described fault maker comprises:
Receive the receiving circuit of the failure instruction data of student's machine transmission;
Failure instruction data is decoded as the decoding scheme of pilot relay matrix byte, and this decoding scheme also generates corresponding undesired signal address byte according to the corresponding failure director data that student's machine sends;
Produce the undesired signal maker of undesired signal;
Described relay matrix byte and described undesired signal address byte are synthesized the combiner circuit of data array; And
Generate the fault generating apparatus of numerically-controlled machine electric fault according to synthetic data array, the numerically-controlled machine electric fault that is wherein generated comprises and sealing in and the corresponding undesired signal in undesired signal address.
13. fault maker according to claim 12 is characterized in that, described decoding scheme also generates corresponding undesired signal address byte according to the corresponding failure director data that student's machine sends.
14. fault maker according to claim 12 is characterized in that, described fault generating apparatus comprises: the control device of controlling a plurality of relay change actions according to synthetic data array.
15. fault maker according to claim 14 is characterized in that described control device is I
2The C bus.
16. fault maker according to claim 12 is characterized in that, described fault maker also comprises the identification circuit that sends the correct/error code, is used to judge whether the failure instruction data of student's machine transmission is effective.
17. fault maker according to claim 12 is characterized in that, described fault maker also comprises the printed circuit board (PCB) self-checking circuit of the component wear situation of checking printed circuit board (PCB).
18. fault maker according to claim 12 is characterized in that, it is the square-wave signal generator that described undesired signal produces circuit.
19. fault maker according to claim 12 is characterized in that, it is the maker that generates six kinds of different frequency square-wave signals that described undesired signal produces circuit.
20. fault of numerical control machine tool apparatus for checking, comprise: teacher's computers, switch and a plurality of student's machine, wherein teacher's computers communicates by switch and each student's machine, issues failure instruction data and receives the result of appraisal data of sending out on student's machine to student's machine.
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Cited By (5)
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| CN101950506A (en) * | 2010-09-09 | 2011-01-19 | 广州亚普机电设备科技有限公司 | Checking platform and checking method for resetting and maintenance training of intelligent numerical control machine |
| CN103295459A (en) * | 2013-05-03 | 2013-09-11 | 徐州工业职业技术学院 | Numerical control maintaining test bed wireless remote control failure setting device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US4168527A (en) * | 1978-02-17 | 1979-09-18 | Winkler Dean A | Analog and digital circuit tester |
| CN1160625C (en) * | 2002-02-20 | 2004-08-04 | 浙江亚龙教仪有限公司 | System for setting up failures in electric control circuit of machine-tool and examinating training achivement |
| KR100443066B1 (en) * | 2003-08-28 | 2004-08-05 | 샬롬엔지니어링 주식회사 | A Testing System for Train Control Apparatus |
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| CN101950506A (en) * | 2010-09-09 | 2011-01-19 | 广州亚普机电设备科技有限公司 | Checking platform and checking method for resetting and maintenance training of intelligent numerical control machine |
| CN101950506B (en) * | 2010-09-09 | 2012-07-18 | 广州亚普机电设备科技有限公司 | Checking platform and checking method for resetting and maintenance training of intelligent numerical control machine |
| CN103295459A (en) * | 2013-05-03 | 2013-09-11 | 徐州工业职业技术学院 | Numerical control maintaining test bed wireless remote control failure setting device |
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