CN1864405A - Data sequence sample hold method, apparatus and semiconductor integrated circuit - Google Patents

Abstract

To provide a sample-and-hold method, device, and semiconductor integrated circuit which can limit the storage capacity of storage media needed to a bare minimum and can independently manage a series of data contained in a predetermined interval before the arrival time of a trigger signal and a series of data contained in a predetermined interval after the arrival time of the trigger signal by separating them clearly. The present invention comprises an area definition data storage means for storing area definition data that defines a first storage area which corresponds to the interval before the arrival time and a second storage area which corresponds to the interval after the arrival time in the primary storage medium; a first write control means for continuing to write a series of incoming data into the first storage area defined by the area definition data, using wrap around addressing until the trigger signal arrives; and a second write control means for writing a series of data arriving after the arrival of the trigger signal into the second storage area defined by the area definition data instead of ceasing to write data into the first storage area when the trigger signal arrives.

Description

The sample hold method of data sequence, device and semiconductor integrated circuit

Technical field

The present invention relates to be applicable to the sample hold method of various data analysis purposes etc., particularly, relate to and only being used among a series of data that arrive continuously before the arrival regularly of the triggering signal of regulation and be present in the method that the series data in the regulation interval is sampled reliably and kept afterwards respectively.

Background technology

If be present in the maintenance of sampling of series data in regulation interval before or after can be in the series data that arrives continuously only arriving regularly respectively, be easily then for various data analysis purposes to the triggering signal of regulation.

For example, the strick precaution video camera is installed to monitor under the such situation of visitor at entry, detect visitor's arrival based on the transducer that is provided with separately and the variation of video image itself etc., and with its as only trigger by preserve during certain after detecting from this technology of video image of strick precaution video camera (with reference to the flat 4-32390 communique of Japan Patent Publication Laid-Open) as everyone knows.If this moment can be not only to interior view data during certain after detecting, but also the view data in during certain before detecting is preserved, just can observe visitor's manner thus in more detail based on these two cover view data video images of regenerating that are saved.

In addition, on one side based on the state that comes the monitored object thing from the instrumentation data of a plurality of testers, on one side consistent this is true as triggering with the characteristic value of the characteristic quantity of these instrumentation data representations when the thing of imagination takes place in advance, and preserve afterwards necessarily during this technology of instrumentation data well-known in field of surveillance systems.At this moment, if can be not only to the instrumentation data in triggering during certain after taking place, but also the instrumentation data in during certain before trigger taking place are preserved, then these two cover instrumentation data that are saved are just very effective to the prediction of the checking of thing generation accuracy of detection and thing generation.

And then, if can be on one side based on the state that comes monitoring vehicle from the instrumentation data of a plurality of testers, consistent this fact of characteristic value when on one side the characteristic quantity of these instrumentation data representations being taken place with the accident of imagining in advance is as triggering, not only to the instrumentation data in during certain after trigger taking place, but also the instrumentation data in during certain before trigger taking place are preserved, then these two cover instrumentation data that are saved are just very effective to finding out of accident cause.

Summary of the invention

The problem that desire of the present invention solves just provides a kind of sample hold method and device, is present in the maintenance of sampling reliably of series data in regulation interval before or after can be in a series of data that arrive continuously only arriving regularly to the triggering signal of regulation respectively.

Another problem that desire of the present invention solves provides a kind of sample hold method and device, can will be suppressed to Min. for the memory capacity that reaches the needed storage medium of above-mentioned problem, and a series of data that comprised in a series of data that comprised in the regulation interval before arriving triggering signal regularly and the regulation interval after triggering signal arrives are regularly separated clearly, and manage independently respectively.

The another problem that desire of the present invention solves provides the high semiconductor integrated circuit of a kind of versatility, only is suitable for being used in a series of data that arrive continuously triggering signal to regulation to be present in sample the reliably purposes of maintenance of series data in regulation interval before or after arriving regularly respectively.

About other problems of the present invention, by with reference to following record so long as those skilled in the art just can easily obtain understanding.

Sample hold method of the present invention is a kind of being used among the series data that arrives continuously, is present in the method for the series data in the predetermined interval after only sampling keeps respectively before the arrival regularly of predetermined triggering signal.This method comprises: first step, prepare to have defined corresponding to first storage area between the arrival region of the front side regularly of above-mentioned triggering signal with corresponding to a storage medium of second storage area in the arrival rear side interval regularly of above-mentioned triggering signal; Second step, the addressing that continues on one side to unroll write the action of series data of arrival till above-mentioned triggering signal arrival in first storage area; And third step, wait for that above-mentioned triggering signal arrives, the series data that is arrived after above-mentioned triggering signal is arrived writes rather than stops to write to the data of above-mentioned first storage area to second storage area.

According to such formation, the series data that arrived before triggering signal arrives is stored in first storage area of a storage medium, and triggering signal arrives second storage area that series data afterwards is stored in a storage medium.Thereby, this method can limit the required memory capacity of storage medium only for minimum, and be included in triggering signal and arrive the series data in the predetermined interval before the data by clearly separately managing them independently, and be included in triggering signal and arrive series data in the predetermined interval after the data.

At this moment, if one time storage medium is a non-volatile memory medium, such as the optical memory that is suitable for high speed storing, or volatile storage medium, such as the DRAM that stand-by power supply is housed, even when the arrival of triggering signal under the adventitious circumstances of power cut-off, before triggering signal arrives regularly and the series data that is present in predetermined interval afterwards respectively also can be sampled maintenance in reliable mode.

Above-mentioned sample hold method of the present invention can also comprise the 4th step, and this step is to wait for that third step arrives the secondary storage medium to the data transcription of first and second storage areas that write an above-mentioned storage medium after finishing.

According to such formation, before triggering signal arrives, arrive and be stored in the series data of storage medium first storage area, and the series data that arrives and be stored in storage medium second storage area after triggering signal arrives is transferred to the secondary storage medium.Like this, this method can limit the required memory capacity of storage medium only for minimum, and by clearly separately can be independently them and safely supervisory packet be contained in triggering signal and arrive the series data in the predetermined interval before the data, and be included in triggering signal and arrive series data in the predetermined interval after the data.In addition, because the series data that sampling keeps finally is stored in the secondary storage medium, can not hinder next sampling to keep the wait operation of operation.

At this moment, if one time storage medium is a volatile storage medium, such as the DRAM that is suitable for high speed storing, and the secondary storage medium is a non-volatile memory medium, such as flash memory or hard disk, then can guarantee the high speed of storage speed and preserve safety of data.

In addition, in above-mentioned two sample hold methods, the memory capacity of first storage area is the integral multiple of the memory capacity of second storage area (preferably the former is the latter's a twice) preferably.So, so that unit institute's divided image data or speech data etc. are object frame by frame, the control treatment that is kept at the data of first storage area and is kept at the data sequence (frame) of the data of second storage area just becomes easy.

Yet, the series data that imagination arrives continuously respectively the do for oneself situation and the random length data conditions of fixed length data.For the former, initial data such as temperature, humidity, speed just are equivalent to this.For the latter, MPEG4 etc. just are equivalent to this to the different packed data of each frame data length.Make that random length data and memory address are corresponding one to one to be managed, not ideal from the viewpoint that memory span is reduced.In this case, can also in first and second step, comprise the step of the data length of each random length data of arrival before and after the phase being carried out instrumentation; With step at the random length data of the storage area to be written control data of the additional data length that comprises institute's instrumentation in separately.According to such formation,,, just can reduce memory span so random length data and memory address are irrespectively filled thick and fast owing to can determine the beginning and the end of random length data by means of control data.

In addition, the series data that arrives is continuously respectively done for oneself, and to have carried out the data conditions distinguished also many for unit frame by frame.In the data of such frame form, because at the end of frame and beginning is additional has the necessary control data of this data reproduction, so, then when regenerating, two files are combined and just become essential if regularly be that data that the boundary will belong to a frame were carried out two fens and as separately file with the arrival of triggering signal.The purposes of the data file that keeps as sampling by this sample hold method, the evidence when also imagining as traffic accident offers the situation of insurance company, handles so just require the file before and after the accident separated individually fully.In this case, can also in first step,, be continued before the frame end in the moment that triggering signal arrives writes while make the addressing of unrolling in first storage area, write the action of the series data of arrival; And in second step, make will be above-mentioned the action that writes to second storage area of the series data that arrived after arriving of triggering signal, begun after the frame end in the moment that triggering signal arrives writes.According to such formation, because two separated files separate at the gap of frame, so just do not need two files are combined when data reproduction, the result just can be to regularly being that the data file that the boundary has write down the situation of its front and back manages fully independently to trigger.

Sampling holding device of the present invention is a kind of being used among the series data that arrives continuously, is present in the device of the series data in the predetermined interval after only sampling keeps respectively before the arrival regularly of predetermined triggering signal.This device comprises: a storage medium; The region definition data storage device is used in an above-mentioned storage medium storage and is used to define corresponding to first storage area between the arrival region of the front side regularly of above-mentioned triggering signal with corresponding to the region definition data of second storage area in the arrival rear side interval regularly of above-mentioned triggering signal; First into control device, the addressing that continues on one side to unroll write the action of series data of arrival till above-mentioned triggering signal arrival in defined above-mentioned first storage area by the above-mentioned zone definition of data; And second into control device, wait for that above-mentioned triggering signal arrives, the series data that is arrived after above-mentioned triggering signal is arrived is to being write by defined above-mentioned second storage area of above-mentioned zone definition of data rather than stopping to write to the data of above-mentioned first storage area.

According to such formation, the series data that arrived before triggering signal arrives is stored in first storage area of a storage medium, and triggering signal arrives second storage area that series data afterwards is stored in a storage medium.Thereby, just the memory capacity of needed storage medium can be suppressed to Min. according to this method, and a series of data that comprised in a series of data that comprised in the regulation interval before arriving triggering signal regularly and the regulation interval after triggering signal arrives are regularly separated clearly, and manage independently respectively.

At this moment, if one time storage medium is a non-volatile memory medium, such as the optical memory that is suitable for high speed storing, or volatile storage medium, such as the DRAM that stand-by power supply is housed, even power supply breaks under such situation in the arrival of triggering signal, also can make before triggering signal arrives regularly and the maintenance of sampling reliably of the series data that is present in predetermined interval afterwards respectively.

Sampling holding device of the present invention can and then comprise a secondary storage medium; And the data control-transferring device, be used for the data that write first and second storage areas of a storage medium are transferred to the secondary storage medium.

According to such formation, before triggering signal arrives, arrive and be stored in the series data of storage medium first storage area, and the series data that arrives and be stored in storage medium second storage area after triggering signal arrives is transferred to the secondary storage medium.Like this, this method can limit the required memory capacity of storage medium only for minimum, and by clearly separately can be independently them and safely supervisory packet be contained in triggering signal and arrive the series data in the predetermined interval before the data, and be included in triggering signal and arrive series data in the predetermined interval after the data.In addition, because the series data that sampling keeps finally is stored in the secondary storage medium, can not hinder next sampling to keep standby operation.

At this moment, if a storage medium is a volatile storage medium, such as the DRAM that is suitable for high speed storing, and the secondary storage medium is a non-volatile memory medium, such as flash memory or hard disk, then can guarantee the safety of high storage speed and storage data.

In sampling holding device of the present invention, also can comprise the region definition data generating apparatus, be used for producing region definition data in inside based on data from the outside input.Here, " region definition data " is as discussed previously like that, is to be used at an above-mentioned storage medium, and definition is corresponding to first storage area between above-mentioned region of the front side with corresponding to the data of second storage area in above-mentioned rear side interval.For example region definition data means this regional initial address (beginning address) or end address (end address), from maximum number of byte of initial address etc.According to such formation, just can come suitably setting regions definition of data by the input data are provided from the outside.

At this moment, above-mentioned from can also both comprising the data of indicating the first storage area capacity in the input data of outside, comprise the data of indicating the second storage area capacity again, and above-mentioned zone definition of data generating apparatus generates region definition data based on these two data set.Just make it possible to the capacity of first storage area and the capacity individual settings of second storage area be become size arbitrarily according to such formation by the input data are provided from the outside.

In addition, can comprise the data of indicating the first storage area capacity from the data of outside input, but do not comprise the data of indicating the second storage area capacity, and the region definition data generating apparatus can be only produces region definition data based on the data of the indication first storage area capacity.The suitable correlation of having supposed between the first storage area capacity and the second storage area capacity predefined, then this configuration makes by providing the input data that the capacity of first storage area and the capacity of second storage area can suitably be set simply.

In addition, in above-mentioned two sampling holding devices, the memory capacity of first storage area is preferably the integral multiple (better the former is the latter's a twice) of the memory capacity of second storage area.When processing is divided into the view data of frame or speech data, if the capacity of second storage area size for example prior and frame is mapped, this will be easy to data that are stored in first storage area and the data that are stored in second storage area are carried out control treatment.

In addition, as before be associated with sample hold method illustrated, the series data that arrives continuously for the correspondence random length data conditions of respectively doing for oneself can also comprise the device that the data length of each random length data of arriving before and after is mutually carried out instrumentation in first and second into control device; With device at the random length data of the storage area to be written control data of the additional data length that comprises institute's instrumentation in separately.

And then, unit has carried out the data conditions of distinguishing for the continuous series data that arrives of correspondence is respectively done for oneself frame by frame, can also be in first into control device, while writing the action of the series data of arrival in first storage area, the addressing of unrolling continued before the frame end in the moment that triggering signal arrives writes; And in second into control device, the series data that is arrived after above-mentioned triggering signal arrived is begun after the action that second storage area writes is frame end in the moment that triggering signal arrives writes.

From another angle, the invention provides a kind of high semiconductor integrated circuit of versatility that is suitable for implementing said method and device.This semiconductor integrated circuit comprises: first port is transfused to the series data as sample objects; Second port is transfused to predetermined triggering signal; The 3rd port is connected to predetermined storage medium; The 4th port is used for exporting the series data that is sampled maintenance; The region definition data storage device, the region definition data of area definition first storage area and second storage area in the storage medium that is used on the 3rd port, being connected; First into control device writes in first storage area of the storage medium that addressing is connected on the 3rd port while continuation is unrolled from the action of the series data of first port input, up to till second port input triggering signal; Second into control device is waited for from second port input triggering signal, and the series data that is arrived after triggering signal is arrived writes rather than stops to write to the data of first storage area of storage medium to second storage area of storage medium; And the data read-out control device, administer first storage area that is used for a storage medium will on the 3rd port, being connected and the data that second storage area is stored and send to the control of the 4th port.

According to such formation, a storage medium is being connected under the state of the 3rd port, only by providing the series data that becomes sample objects to first port respectively, provide predetermined triggering signal to second port again, first and second storage areas are just appropriately defined in a storage medium.And then, when triggering signal arrives, certain interval data sequence is kept at first storage area of a storage medium before respectively triggering signal being arrived, the data sequence in the certain interval after the close contact signalling arrival is kept at second storage area of a storage medium, and is arrived secondary by further transcription as required in these data sequences and store.Afterwards, be kept at these data sequences in the storage medium and just be read the outside from the 4th port.

At this moment, if one time storage medium is a non-volatile memory medium, such as the optical memory that is suitable for high speed storing, or volatile storage medium, such as the DRAM that stand-by power supply is housed, even when triggering signal arrives under the adventitious circumstances of power cut-off (for example, in semiconductor integrated circuit is used as automobile during data logger since automobile smash etc.), before triggering signal arrives regularly and the series data that is present in predetermined interval afterwards respectively can be sampled maintenance in reliable mode.

In addition, above-mentioned first to the 4th port is not necessarily independent of each other.Single port can be realized the function of two or more ports.For example, the input capable of being combined of single physical port is sampled the function of first port of series data, with second port function of input predetermined trigger signal.

In semiconductor integrated circuit of the present invention, also can comprise a power control part, be used for not only the in-line power of semiconductor integrated circuit but also storage medium and the outside oscillator power supply that connects and Action clock is provided to semiconductor integrated circuit that the outside is connected.According to such formation since not needs prepare power supply in storage medium and clock oscillator one side, thereby just correspondingly simplified design.At this moment, if semiconductor integrated circuit is equipped with the outside terminal that is used to connect ultracapacitor, this ultracapacitor is used for keeping at the fixed time when power failure from the electric power of above-mentioned power control part supply, then by the ultracapacitor outside with suitable capacity is connected to this outside terminal, even then power down when triggering signal arrives (power failure), also can normally keep the function of Action clock oscillator and storage medium, thereby guarantee that sampling keeps handling the reliability of action.

In semiconductor integrated circuit of the present invention, also can comprise the five-port of control data input; And a region definition data generating apparatus, be used for the inner region definition data that produces based on control data by the five-port input.This configuration makes it possible to according to various sampled datas, by importing suitable control data from the outside to five-port, suitable memory block is set.

At this moment, can both comprise the data of indicating the first storage area capacity in above-mentioned control from the outside in data, comprise the data of indicating the second storage area capacity again, above-mentioned zone definition of data generating apparatus generates region definition data based on these two data set.Just can the capacity of first storage area and the capacity of second storage area individually be set at size arbitrarily according to such formation by the input data are provided from the outside.

In addition, also can comprise the data of indicating the first storage area capacity in above-mentioned control from outside input with data, but do not comprise the data of indicating the second storage area capacity, and the region definition data generating apparatus only produces region definition data based on the indication first storage area capacity.According to such formation, by between the first storage area capacity and the second storage area capacity, suitable correlation being set in advance, just can only set first memory capacity and second memory capacity rightly with data by the control that the expression first storage area capacity is provided.

From another angle, the invention provides a kind of semiconductor integrated circuit, comprising: first port is transfused to the series data as sample objects; Second port is transfused to predetermined triggering signal; The 3rd port is connected to a predetermined storage medium; The 4th port is connected to predetermined secondary storage medium; Five-port is used for reading the data that are sampled maintenance; The region definition data storage device, the region definition data of area definition first storage area and second storage area in the storage medium that is used on the 3rd port, being connected; First into control device writes in first storage area of the storage medium that addressing is connected on the 3rd port while continuation is unrolled from the action of the series data of first port input, up to till second port input triggering signal; Second into control device, wait is from second port input triggering signal, and the series data that is arrived after triggering signal is arrived writes rather than stops to write to the data of first storage area of a storage medium to second storage area of a storage medium; Data transcription control device, the data that write in first and second storage area of a storage medium that will be connected on the 3rd port are carried out transcription to the secondary storage medium that is connected on the 4th port; And the data read-out control device, administer the data that are used for the secondary storage medium that is connected is stored and send on the 4th port to the control of five-port.

According to such formation, respectively a storage medium is being connected to the connection of the 3rd port, be connected under the state of the 4th port reaching the secondary storage medium, only by providing the series data that becomes sample objects to first port respectively, provide predetermined triggering signal to second port, first and second storage areas are just appropriately defined in a storage medium, and then, when triggering signal arrives, certain interval data sequence is kept at first storage area of a storage medium before respectively triggering signal being arrived, the data sequence in the certain interval after close contact signal arrived is kept at second storage area of a storage medium, and these data sequences by further transcription to the secondary storage medium.Afterwards, these data sequences that are kept in the secondary storage medium just are read out the outside from the 4th port.

At this moment, if a storage medium is a volatile storage medium, such as the DRAM that is suitable for high speed storing, and the secondary storage medium is a non-volatile memory medium, such as flash memory or hard disk, then can guarantee the safety of high storage speed and storage data.

In semiconductor integrated circuit of the present invention, also can comprise a power control part, be used for not only in-line power to semiconductor integrated circuit, but also to the outside connect once with the secondary storage medium and outsidely be connected and provide the oscillator of Action clock to power to semiconductor integrated circuit.According to such formation, owing to need once not prepare power supply with secondary storage medium and clock oscillator one side, thereby just correspondingly simplified design.At this moment, if semiconductor integrated circuit is equipped with the outside terminal that is used to connect ultracapacitor, this ultracapacitor is used for keeping at the fixed time the electric power supplied with from power control part during power down, then by the ultracapacitor with suitable capacity is connected to above-mentioned terminal, even then power down when triggering signal arrives, also can normally keep the Action clock oscillator and once with the function of secondary storage medium, thereby guaranteed that sampling keeps the reliability of operation.For example, even when triggering signal arrives under the adventitious circumstances of power cut-off (for example, in semiconductor integrated circuit is used as automobile during data logger since automobile smash etc.), before triggering signal arrives regularly and the series data that is present in predetermined interval afterwards respectively can be sampled in reliable mode and keep in storage medium, and shift and be kept at the secondary storage medium then.

In semiconductor integrated circuit of the present invention, also can comprise the 6th port of control data input; And a region definition data generating apparatus, be used for the inner region definition data that produces based on control data by the input of the 6th port.This configuration makes it possible to according to various sampled datas, by importing suitable control data from the outside to the 6th port, suitable memory block is set.

At this moment, can both comprise the data of indicating the first storage area capacity in above-mentioned control from outside input with data, comprise the data of indicating the second storage area capacity again, and the region definition data generating apparatus produces region definition data based on these two data set.According to such formation, just can individually set the capacity of first storage area and the capacity of second storage area for size arbitrarily by the control data are provided from the outside.

In addition, control data from the outside can comprise the data of indicating the first storage area capacity, but do not comprise the data of indicating the second storage area capacity, and the region definition data generating apparatus only produces region definition data based on the indication first storage area capacity.The suitable correlation of having supposed between the first storage area capacity and the second storage area capacity predefined, then this configuration makes by the control data of only representing the first storage area capacity is provided simply, just can set the capacity of first storage area and the capacity of second storage area rightly.

In addition, in above-mentioned two sampling holding devices, the memory capacity of first storage area is the integral multiple of the memory capacity of second storage area (preferably twice) preferably.So, so that unit institute's divided image data or speech data etc. are object frame by frame, by with the capacity of second storage area for example corresponding to the size of frame, the control treatment that just can make the data that are kept at first storage area and be kept at the data sequence (frame) of the data of second storage area becomes easy.

In addition, as before be associated with sample hold method illustrated, the series data that arrives continuously for the correspondence random length data conditions of respectively doing for oneself can also comprise the device that the data length of each random length data of arriving before and after is mutually carried out instrumentation in first and second into control device; With device at the random length data of the storage area to be written control data of the additional data length that comprises institute's instrumentation in separately.

And then, unit has carried out the data conditions of distinguishing for the continuous series data that arrives of correspondence is respectively done for oneself frame by frame, can also be in first into control device, while writing the action of the series data of arrival in first storage area, the addressing of unrolling continued before the frame end in the moment that triggering signal arrives writes; And in second into control device, the series data that is arrived after above-mentioned triggering signal arrived is begun after the action that second storage area writes is frame end in the moment that triggering signal arrives writes.

According to sample hold method of the present invention and device, just can only make among the series data that arrives continuously before predetermined triggering signal arrives timing and be present in the maintenance of sampling reliably of a series of data in the predetermined interval afterwards respectively.

In addition, according to sample hold method of the present invention and device, just the memory capacity of needed storage medium can be suppressed to Min., and a series of data that comprised in a series of data that comprised in the regulation interval before arriving triggering signal regularly and the regulation interval after triggering signal arrives are regularly separated clearly, and manage independently respectively.

And then, the semiconductor integrated circuit of the maintenance usefulness of sampling according to the present invention, under the state of the port that storage medium and/or secondary storage medium is connected respectively to regulation, by only providing a series of data that become sample objects to first port respectively, again second port is provided the triggering signal of regulation, just can in a storage medium, define first and second storage areas rightly, in addition, when triggering signal arrives, certain interval data sequence is kept at first storage area of a storage medium before respectively triggering signal being arrived, to arrive second storage area that the certain interval data sequence in back is kept at a storage medium immediately following triggering signal, and these data sequences are arrived the secondary storage medium by transcription as required, after this, these data sequences that are stored in storage medium or the secondary storage medium just can be got the outside from predetermined port reads.

Description of drawings

Fig. 1 relates to the pie graph of sampling holding device of the present invention.

Fig. 2 is the overview flow chart of expression control with the action of CPU.

Fig. 3 is the detail flowchart that various settings are handled.

Fig. 4 is the schematic diagram of storage medium stores map of expression and storage data format.

Fig. 5 is the overview flow chart of the action of expression storage control part.

Fig. 6 is the detail flowchart that sampling keeps processing.

Fig. 7 is Action Specification figure of the present invention.

Fig. 8 has used to relate to the pie graph that sampling of the present invention keeps the data logger of IC.

Fig. 9 has used to relate to the pie graph that sampling of the present invention keeps the monitoring arrangement of IC.

Figure 10 relates to the pie graph (the 2nd embodiment) of sampling holding device of the present invention.

Figure 11 is the key diagram of the data arrangement of primary memory.

Figure 12 is the key diagram of unit data form.

Figure 13 is the overview flow chart that sampling keeps processing.

Figure 14 is the detail flowchart that handle in B (BEFORE) zone.

Figure 15 is the detail flowchart that utilizes the Interrupt Process of external trigger.

Figure 16 is the detail flowchart that handle in A (AFTER) zone.

[explanation of Reference numeral]

1,1a semiconductor integrated circuit

2 DRAM

3 flash memories (FLASH)

4 clock oscillators

5 ultracapacitors

101～105 interfaces

110 memory controllers

110a DAM controller (DAMC)

110b flash memory (FLASH)

120 control CPU

120a flash memory (FLASH)

130 titles add control part

140 data bit control parts

150 serial converter sections

160 serial switch control portion

170 OR doors

180 power control parts

401 first storage areas

402 second storage areas

403 data divisions

404 title divisions

The CLK0 Action clock

CLK1～n control clock

H-DATA (OUT) sampling keeps data

P11, P12, P2～P7 port

PW1 body power supply

PW2 DRAM power supply

PW3 flash memory (FLASH) is used power supply

PW4 oscillator power supply

P-DATA (IN) parallel input data

S-DATA (IN) serial input data

T1 power vd D outside terminal

T2, T3 ultracapacitor outside terminal

The TRG triggering signal

801 detectors

802 input circuits

803 AD/I2S change-over circuits

804 samplings keep IC

805 DRAM

806 flash memories

807 I2S/USB change-over circuits

808 personal computers

809 trigger the generation circuit

S1～Sk status signal

901 cameras (containing lens and imageing sensor)

902 signal processing circuits

903 codecs

904 DATA/I2S change-over circuits

905 samplings keep IC

906 DRAM

907 flash memories

908 I2S/USB change-over circuits

909 personal computers

910 trigger the generation circuit

1001 CPU

1002 working storage

1003 set information memories

1004 communication control units

1005 serial data input interfaces

1006 parallel data input interfaces

1007 data output interfaces

1008 trigger input interface

1009 primary memory interfaces

1010 secondary memory interfaces

1101,1102 unit datas

1101a, 1102a start bit

1101b, 1102b data

1101c, 1102c terminal address

The 1102d control data

1103 BEFORE zones

1104 AFTER zones

Embodiment

Describe the preferred embodiments of the present invention in detail hereinafter with reference to accompanying drawing.Should be noted that scope of the present invention is not limited to the following stated embodiment, and only define by claims.

Block diagram according to sampling holding device of the present invention is shown in Fig. 1.As shown in the figure, this sampling holding device mainly is made up of following, for sampling keeps specially designed semiconductor integrated circuit 1, function is the DRAM 2 of a storage medium, function is the flash memory (FLASH) 3 of secondary storage medium, and the clock oscillator 4 that operating clock is provided to semiconductor integrated circuit 1.

Semiconductor integrated circuit 1 is provided with a plurality of outside ports.Port P11 is the port as the parallel input of series data quilt of sample objects.Among the figure, what be designated as mark P-DATA (IN) is parallel input data.Port P12 is the port of being imported by serial as the series data of sample objects.Among the figure, what be designated as S-DATA (IN) is serial input data.So, on semiconductor integrated circuit 1, all can import series data as sample objects with in parallel data and the serial data any one.

Port P2 is the port that is transfused to predetermined triggering signal.Among the figure, what be designated as TRG is triggering signal.As will describing in detail in the back, among a series of sample objects data sequences of importing from arbitrary port of port P11 or P12, semiconductor integrated circuit 1 can only sample remain on triggering signal TRG arrive before with predetermined interval afterwards during the data sequence that exists.

Port P3 is used for connecting DRAM 2, i.e. a storage medium.As described in detail later, the result who keep to handle as sampling at first was stored in DRAM 2 as a storage medium with the data sequence that is present in predetermined interval afterwards respectively before triggering signal TRG arrives.In addition, the power supply PW2 for DRAM 2 supplies with from semiconductor integrated circuit 1.

Port P4 is used for connecting flash memory (FLASH), i.e. secondary storage medium.As described in detail later, the sampling that is stored among the DRAM 2 keeps data when sampling keeps finishing dealing with, is saved in this flash memory (FLASH) 3 by transcription.In addition, the power supply PW3 for flash memory (FLASH) 3 also supplies with from semiconductor integrated circuit 1.

Port P5 is used for reading to the outside data of maintenance.Among Fig. 1, H-DATA (OUT) indication sampling keeps reading of data.According to this embodiment, sampling keeps data H-DATA (OUT) to read from flash memory (FLASH) 3, and is output to the outside by port P5.

Port P6 is used for sending control data etc. from personal computer (PC) to semiconductor integrated circuit 1.According to this embodiment, USB is used for communicating by letter with personal computer (PC), but communication means is not limited to use USB.

Port P7 is used for providing the operating clock CLK0 that is produced by clock oscillator 4 to semiconductor integrated circuit 1.In other words, semiconductor integrated circuit 1 is made up of the clock synchronization wired logic circuitry that describes in detail after a while, and the required operating clock CLK0 of clock synchronization wired logic circuitry operation provides by port P7 from clock oscillator 4.Clock oscillator 4 is also obtained power supply PW4 from semiconductor integrated circuit 1.

Secondly, representational outside terminal is described.Outside terminal T1 is used for providing power vd D to semiconductor integrated circuit 1.The power vd D that provides by outside terminal T1 offers the power control part 180 in the semiconductor integrated circuit 1.Power control part 180 carries out the stable and voltage adjustment of voltage based on these resulting power vd D, exports the power supply PW1～PW4 of four systems thus, and wherein power supply PW1 offers each circuit in the semiconductor integrated circuit 1.As previously discussed, power supply PW2 offers the DRAM2 that is connected to port P3, and power supply PW3 offers the flash memory (FLASH) 3 that is connected to port P4, and power supply PW4 offers the clock oscillator 4 that is connected to port P7.Outside terminal T2 and T3 are used for the outside ultracapacitor 5 that is connected.During power down, be stored in electric charge in the ultracapacitor 5 and be used for keeping four systems PW1 power supply from power control part 180 outputs in the PW4 and reach predetermined period of time.In this example, power vd D interrupts immediately after triggering signal TRG arrives even the capacity of ultracapacitor 5 is determined like this, till power supply PW1 will normally keep keeping operation and transcription to operate finishing at least to sampling to PW4.

Secondly, the inside that describes semiconductor integrated circuit 1 in detail is constituted.Comprise memory controller 110 in the inside of semiconductor integrated circuit 1, control CPU 120, title adds control part 130, data bit control part 140, serial transducer 150, serial switch control portion 160, OR door 170, power control part 180 (before stating) also comprises interface circuit 101～105 corresponding to the above interface P12, P11, P2～P7 in addition.

Memory controller 110 is made up of the wired logic circuitry of clock synchronization type, it is realized from port P11 parallel input data P-DATA (IN) or the controlled function that shifts to the DMA of first and second storage areas (details aftermentioned) of DRAM 2 from port P12 serial input data S-DATA (IN), the DMA of the fate in flash memory (FLASH) 3 of the data in first and second storage areas that are stored in DRAM 2 is passed on the controlled function of (transcription), to read controlled function that is stored in the data of fate among flash memory (FLASH) 3 etc. to the outside by port P5.Memory controller 110 comprises dma controller (DMAC) 110a and flash memory (FLASH) 110b.Dma controller (DMAC) 110a is used for above-mentioned data forwarding function.Flash memory (FLASH) 110b storage is used to define the region definition data of first and second storage areas in the DRAM 2, is used for defining the region definition data of flash memory (FLASH) 3 storage areas etc.As describing in detail after a while, these storage area definition of data can be rewritten from the PC of outside with CPU 120 by control.In view of the above, semiconductor integrated circuit 1 just is endowed and can keeps the corresponding versatility of standard with data sequence and sampling arbitrarily.In addition, the function of memory controller 110 will describe with reference to the flow chart in Fig. 5 and 6 after a while in more detail.

Control constitutes based on a microprocessor with CPU 120, administer (1) on one side and be connected between the PC (PC) of port P6 and communicate via usb 1 05, on one side based on carrying out the function that various settings are handled from user's input data, (2) carry out the function etc. of various system supporting sections reasons by memory controller 110, the additional control part 130 of title and data bit control part 140 being carried out unified management.Be built-in with flash memory (FLASH) 120a in the inside of controlling with CPU 120.The various data that storage is taken into from the user via PC in this flash memory (FLASH) 120a.In addition, will at length describe at the flow chart with reference to Fig. 2 and 3 after a while with the function of CPU120 about control.

The additional control part of title 130 is made up of wired logic circuitry, its data P-DATA to the parallel input that provides by port P11 (IN), and serial input data S-DATA (IN) the interpolation heading message (referring to Fig. 4 (b)) that provides by port P12.Among Fig. 4 (b), label 403 flag data parts, and label 404 indicia headings parts.Here the heading message of Tian Jiaing comprises the digital information of expression input series data order at least.Digital information circulation between predetermined minimum and maximum is added.Then, read sampling and keep data, and organize this data based on this digital information of expression data order.

Data bit control part 140 with under the control of CPU 120, adds control part 130 with respect to title in control, serial transducer 150, parallel interface 101, and serial line interface 102 control data positions.Data bit control allows title to add the position of control part 130 interpolation heading messages to regulation, allows serial transducer 150 correctly to carry out the serial conversion of data bits, and permission interface 101 and 102 correct identification input data bit.

Serial transducer 150 is circuit that the serial input data S-DATA (IN) that offers port P12 and provide serial line interface 102 to obtain are converted to parallel data.The parallel data of gained offers title by OR door 170 and adds control part 130 (as above-mentioned).

Serial switch control portion 160 is under the control of data bit control part 140, selectively or activate parallel interface 101 or activate serial line interface 102.Serial switch control portion 160 intrinsic functions allow semiconductor integrated circuit 1 not only can handle serial input data but also can handle parallel input data.

Clock control portion 190 is based on the operating clock CLK0 that provides from clock oscillator 4 by port P7, the clock CLK (P) that obtains by parallel interface 101, and, produce and export n class control clock CLK1 to CLKn by the clock CLK (S) that serial line interface 102 is obtained.The clock CLK1 of Huo Deing offers each circuit in the semiconductor integrated circuit 1 as required to CLKn like this, for the wired logic circuitry regular event of clock synchronization type.A built-in phase-locked loop (PLL) circuit 190a in clock control portion 190.This phase-locked loop (PLL) circuit 190a be used to obtain between each clock synchronously or help the frequency synthesis effect.

Secondly, with reference to the flow chart in Fig. 2 and 3 function of control with CPU120 is described in more detail.As before illustrated, control is designed to main executive system support processing with CPU 120 and various setting is handled.

Expression control is illustrated in Fig. 2 with the overall procedure of CPU operation.Among this figure, if make the processing beginning by power connection (Power on), then control communicates with the personal computer (PC) that is connected to port P6 by usb 1 05 with CPU 120, receives the information of sending here from PC, and it is stored among the flash memory 120a (step 201).In this information, also comprise the control information of operator scheme sign, in view of the above just can be by the operator scheme of PC one side switching controls with CPU 120.And then receive and handle (step 201) control CPU120 implement either operational mode determination processing (step 202).If being judged to be operator scheme at this is the setting pattern, then control is carried out various settings with CPU 120 and is handled (step 203).Relative therewith, be operational mode if be judged to be operator scheme, then control is handled (step 204) with CPU 120 executive system supports.Handle in (step 203) in various settings, control with CPU120 carry out with the arrival rate of sample objects data, data format, triggering before hold period, trigger the back hold period and other various samplings keep standards to set processing accordingly.As the back describes in detail, comprise also that in various settings processing (step 203) region definition data relevant with second storage area with first storage area generates processing.On the other hand, in system supporting section reason (step 204), as before illustrated, control storage control part 110, title interpolation control part 130 and data bit control part 140 are carried out unified management, support that thus the processing of the system in the semiconductor integrated circuit 1 is carried out.

Various settings are handled (step 203) detailed process and are illustrated in Fig. 3.This flow chart only illustrates in the various settings processing, the generation of storage area definition of data is handled.In the drawings when handling beginning, control with CPU 120 from from sense command language among the reception data of PC, and with its decoding (step 301).Here, have only when institute's decoded instruction is judged as the storage area defined instruction (step 302 "Yes"), control is just carried out follow-up processing with CPU 120, with respect to this, being judged to be is under the situation of other instructions (step 302 "No"), and then the processing of corresponding other instruction is carried out respectively.

If be judged to be storage area defined instruction (step 302 "Yes"), then next control uses CPU 120 to judge the classification of designation methods.In the present embodiment, when sampling remain resident in trigger regularly before and afterwards during the data sequence of predetermined interval, can select one of two designation methods: a method is the situation of specifying front side and rear side both sides interval to come the definition memory territory individually, other method is only to specify between the region of the front side, and the rear side interval is then automatically set by system according to predefined algorithm.Specify (step 303) if be judged to be both sides, then next control use the judgement (step 304) of the classification of data with CPU 120.In this example, about to triggering between region of the front side regularly and the data sequence in rear side interval is sampled, can select to come the situation of appointment and come the situation of appointment with " data volume " with " time ".Here, be " time ", then carry out,, be " data volume ", then use data to be set as original state if be judged to be the use data category with respect to this from the conversion process (step 305) of time to data volume if be judged to be the classification of using data.Then, in DRAM 2, define first storage area (step 306) based on resulting like this front side data volume.Shown in Fig. 4 (a), carry out the definition of first storage area by initial address AD11 and the end address AD12 that calculates first storage area 401.Then, in DRAM 2, define second storage area based on the rear side data volume.Shown in Fig. 4 (a), carry out the definition of second storage area by initial address AD21 and the end address AD22 that finds the solution second storage area 402 in the DRAM 2.More than handle the storage area definition of data (AD11, AD12, AD21, AD22) that (step 306 and 307) obtained and be sent to memory controller 110, and be kept among the flash memory 110b in the memory controller 110.After, in memory controller 110, be stored in storage area definition of data (AD11, AD12, AD21, AD22) among the flash memory 110b by suitable reference, carry out from data-in port P11, P12 and pass on processing to the data of DRAM 2; Pass on processing from DRAM 2 to the data of flash memory (FLASH) 3; And pass on processing to the data of data-out port P5 from flash memory (FLASH) 3.

Then, the action with regard to memory controller 110 describes.The general flow chart of the action of expression memory controller is shown in Fig. 5.Among this figure, when handling beginning, memory controller 110 judges it is to provide sampling hold instruction (step 501) from control with CPU 120, has also provided sense order (step 502).Under the situation that the sampling hold instruction is provided (step 501 "Yes"), memory controller 110 is carried out sampling and is kept handling (step 503).With respect to this, under the situation that sense order is provided (step 502 "Yes"), then carry out the maintenance data and read processing (step 504).Keeping data to read in the processing (step 504), the maintenance data H-DATA (OUT) that is stored in the flash memory 3 is transferred to data-out port P5.

The detailed process that sampling keeps handling is illustrated in Fig. 6.Among this figure, when handling beginning, at first format processing, so that format DRAM 2 and flash memory (FLASH) 3 (steps 601).

Then, in dma controller (DMAC) 110a, be provided with after the initial address AD11 and end address AD12 of first storage area, memory controller 110 starts dma controller (DMAC) 110a (step 603), thereby begins to add first storage area 401 transfers of data sequence to DRAM 2 that control part 130 is obtained from title.If selected parallel input port P11 by serial switch control portion 160, then parallel input data P-DATA (IN) transfers to first storage area 401 among the DRAM 2.On the other hand, if selected serial input terminal mouth P12, then serial input data S-DATA (IN) transfers to first storage area 401 among the DRAM 2.So, a series of data sequences from parallel input port P11 or serial input terminal mouth P12 arrival begin to write in proper order to end address AD12 towards the initial address AD11 from first storage area 401 shown in Fig. 4 (a).On the other hand, in DMA passed on the execution of handling, memory controller 110 was confirmed consistent (step 605) between the arrival (step 604) of triggering signal TRG and jump address AD and the end address AD12 often.Whenever jump address AD consistent with the end address AD12 of first storage area 401 (step 605 "Yes"), then carry out restart (step 603) of dma controller (DMAC) 110a.Its result when the data from initial address AD11 to end address AD12 write and carry out one time for first storage area 401, writes the address and just is back to initial address AD11 once more and handles to carry out repeatedly for the overwrite of first storage area 401.In other words, pass through the effect of memory controller 110 from the data sequence of data-in port P11 or P12 arrival, to defined first storage area 401 in the DRAM 2, on one side advance in (wrap-around) mode of unrolling and write on one side, promptly carry out so-called FIFO (first-in first-out) and handle writing address AD.

Under this state, if triggering signal TRG arrives port P2 and has verified the arrival (step 604 "Yes") of triggering signal, then memory controller 110 is provided with the initial address AD21 and the end address AD22 (step 606) of second storage area 402 in dma controller (DMAC) 110a, and this dma controller (DMAC) 110a made its starting (step 607), begin DMA for second storage area 402 thus and pass on processing.In view of the above, the data sequence that is supplied to data-in port P11 or P12 is passed on and is stored into second storage area 402 in the DRAM 2 adding control part 130 backs via title.After, when passing on destination address AD when consistent with the end address AD22 of second storage area 402 (step 608 "Yes"), the processing of passing on of second storage area 402 in DRAM 2 finishes.

Like this, the series data before triggering signal TRG arrives in the predetermined interval is stored in first storage area 401, and the series data in the predetermined interval is stored in second storage area 402 after the triggering signal TRG arrival.

Then, extract and be stored in first storage area 401 DRAM 2 and the series data of second storage area 402, be transferred and be kept at predetermined zone among flash memory (FLASH) 3 at predetermined interval before trigger arriving and afterwards.Next, even under the adventitious circumstances of power supply power-fail, series data is still kept reliably among flash memory (FLASH) 3.

Afterwards, return Fig. 5, if provide sense order (step 502 "Yes") from PC etc., then memory controller 110 is carried out and is kept data to read processing (step 504), so that read the data H-DATA (OUT) of the maintenance that is stored in the presumptive area in the flash memory (FLASH) 3 from output port P5 to the outside.At this moment, if after pressing the data that arrive order rearrangement flash memory 3 based on heading message (title division 403), as keeping data H-DATA (OUT) to read to the outside from output port P5, then this will save the trouble that later maintenance data are reset, thus the processing that is easy to keep data.

In addition, in the present embodiment, because ultracapacitor 5 is connected between outside terminal T2 and the T3, even the power vd D that provides to outside terminal T1 interrupts, keep at least after triggering signal arrives to PW4 is normal from the power supply PW1 of four systems that power control part is exported, to second storage area, 402 data write and from DRAM 2 till the data transcription of flash memory (FLASH) 3 is finished, therefore, adopt under such situation even if for example wait as the accident record device of vehicle at sampling holding device, dump simultaneously takes place when triggering because of accident, the front and back that various data in the time of also can be with accident the spread all over triggering maintenance of sampling specified time limit, and it is transferred in the flash memory 3 preserves, thereby help finding out of accident cause.

Fig. 7 is a schematic diagram of expression the present invention operation.Suppose that analogue data arrives by the time series shown in Fig. 7 (a) arbitrarily.If for example input data values surpass to produce the predetermined threshold TH of the triggering signal shown in Fig. 7 (b), shown in Fig. 7 (c), only before triggering signal arrives T1 second or afterwards between T2 inner region in second during the data sequence that arrives be sampled maintenance.In this example, the interval has been arranged so that to satisfy and has concerned T1=2 * T2.Therefore, if adopt as accident recorder of vehicle etc., then take place by the air bag initiating signal triggering signal to take place simultaneously with accident, if make sampling holding device starting just to accident before the sample maintenance and being kept in the flash memory (FLASH) 3 of the series data relevant T1 second with the T2 second after the accident, if, just can help finding out of accident cause by the preservation data of after accident, reading flash memory (FLASH) 3 so device is accommodated in the housing of comparatively robust.

In addition, though in above embodiment, by flash memory (FLASH) 3 being set as the secondary storage medium, the preservation reliability that keeps data with the guarantee sampling, but for example if the capacity of ultracapacitor 5 is increased, for example storage data among the DRAM 2 can be kept just may not necessarily the secondary storage medium need being set about week～one month.In this case, handling (step 609) from the transcription of 2 pairs of flash memories of DRAM (FLASH) 3 just can omit from the detail flowchart that sampling shown in Figure 6 keeps handling.

As above illustrated such, according to this embodiment, by simply the data sequence that is sampled being connected to port P11 or P12, triggering signal is connected to port P2, DRAM 2 is connected to port P3, flash memory (FLASH) 3 is connected to port P4, and clock oscillator 4 is connected to port P7, when triggering signal TRG arrives, can first storage area 401 of DRAM 2 and 402 samplings of second storage area keep triggering signal TRG arrive before and the series data that arrives during the predetermined afterwards interval, and in flash memory (FLASH) 3, preserve this content immediately.Then, if provide read command from PC, the sampling that is stored in the flash memory (FLASH) 3 keeps data to read into port P5 by memory controller 110.Heading message is added control part 130 by title and is brought each data item of reading into, and this heading message comprises the numerical value of expression data order.The sampling of reading like this, keeps data can be easy to by the time sequencing storage based on numerical value.

In addition, DRAM 2, and flash memory (FLASH) 3 and the clock oscillator 4 all power control part from semiconductor integrated circuit 1 180 are powered, simultaneously, on power control part 180, connecting ultracapacitor 5, be used for after power failure, keeping power supply PW1 and reach certain hour to PW4.Like this, for example in sampling holding device is used as automobile during accident recorder etc., even and under the adventitious circumstances that triggers as the accident power down result of power vd D, DRAM 2, flash memory (FLASH) 3 and clock oscillator 4 also can keep normal running, and this has guaranteed that the sampling that is ranked keeps operation to carry out in reliable mode.

And semiconductor integrated circuit 1 includes the control 120 of the microprocessor of packing into, allows to communicate by letter with PC.This makes and time position counting is set pack into switching between the input port (P11 and P12) of various settings, the configuration store district, and other setting can be easy to carry out from PC, the result obtains a kind of very general semiconductor integrated circuit.

Specifically, as shown in Figure 3, present embodiment is equipped with the port P6 of input control data, and the control CPU 120 as the region definition data generating apparatus is housed, and is used for producing region definition data based on the control data by port P6 input in inside.This makes it possible to according to various sampled datas, by importing suitable control data from the outside to port P6, sets up suitable memory block.

Promptly, by in the data that both comprised the capacity of indicating first storage area from the control of outside in data, comprise the data of indicating the second storage area capacity again, and pass through the region definition data generating apparatus based on these two data set generation region definition data (step 303: " both sides "), just can be by providing control data from the outside, setting first storage area and second storage area respectively is any required capacity.In addition, the suitable correlation between the first storage area capacity and the second storage area capacity of having supposed predefined, comprise the data of indicating the first storage area capacity by the control data that is provided with from the outside, but do not comprise the data of indicating the second storage area capacity, and just generate region definition data (step 303: " front side ") based on the data of the indication first storage area capacity by setting area definition of data generating apparatus, can the capacity of first storage area and the capacity of second storage area suitably be set by the control data of only representing the first storage area capacity is provided simply.About being used for the unit in regulation interval,, can select suitable unit according to analyzed data class owing to can select to use " time " and " data volume ".

About first storage area 401 respect to one another among Fig. 4 and second storage area, 402 capacity, the memory capacity of first storage area 401 is the integral multiple of the memory capacity of second storage area 402 (better the former is latter's twice) preferably.This will make when handling the view data be divided into frame or voice data, if the capacity of second storage area is associated with the size of frame in advance, be easy to put in order the data that are stored in the data of first storage area and are stored in second storage area by data sequence unit.

Secondly, other embodiment (the 2nd embodiment) that relate to sampling holding device of the present invention are described with reference to Figure 10～Figure 16.The pie graph (the 2nd embodiment) that relates to sampling holding device of the present invention (semiconductor integrated circuit) is shown in Figure 10.In this embodiment, realize function by CPU with software mode as sampling holding device.

As shown in Figure 10, this semiconductor integrated circuit 1a has: the CPU 1001 of embedded micro-processor and the ROM of system etc.; Working storage 1002 with the RAM formation; Set information memory 1003 with the flash memory formation; In order to support the communication control unit 1004 of USB with communicating by letter of PC (personal computer); The Data Input Interface 1005 that is used for input serial data; Be used to import the Data Input Interface 1006 of parallel data; Be used to make the data output interface 1007 of the data sequence of the maintenance of sampling to outside output; Be used to import triggering input interface 1008 from the triggering signal TRG of outside; Be used to carry out the primary memory interface 1009 that is connected with outside DRAM 2; Be used for the secondary memory interface 1010 that is connected with outside flash memory (flash memory) 3.In addition, the 1011st, cpu bus.

In DRAM 2, be provided with the BEFORE shown in the temporary storage area shown in Figure 11 (a) and Figure 11 (b) (following, abbreviate as " B ") zone and AFTER (following, abbreviate as " A ") zone as primary memory.In this example, the B zone is configured to 2 pairs 1 pair about 0.5 to the a-quadrant to the ratio of the memory capacity of temporary storage area.

As described in detail later, in the temporary storage area just shown in Figure 11 (a), the unit data 1101 of random length does not stay the gap, is stored thick and fast from its beginning, and equally so the unit data 1102 of random length does not stay the gap, stored thick and fast from its beginning in B zone 1103 and a-quadrant 1104.

Unit data 1101 in the temporary storage area has the form of arranging start bit 1101a, data 1101b and terminal address 1101c in order shown in Figure 12 (a).Unit data 1102 in B zone and the a-quadrant has the form of arranging start bit 1102a, data 1102b, terminal address 1102c and control data 1102d in order shown in Figure 12 (b).The triggering code of triggering signal TRG, the arrival order of this unit long data etc. have been imported in the code, the expression that contain the data length of representing this unit long data in control data 1102d from the outside.These codes are carried out reading of data and even the control of regenerating as clue.

The sampling that CPU shown in Figure 13 carries out keeps the overview flow chart of processing.In the figure, if begun by power connection (Power on) processing, pack into processing (step 1301) and initialization process (step 1302) of executive program in order then, thus, carry out handling and the initialization process of DRAM2 and flash memory 3 etc. from the reading of the control program of set information memory 1003, expansion on working storage 1002.

Next, on one side with reference to internal trigger (step 1304), not being in open mode with it on one side is condition (step 1305 "No"), carries out the B zone repeatedly and handles (step 1303).If internal trigger is opened and is identified (step 1305 "Yes") betwixt, then then carry out the a-quadrant and handle (step 1306) with the stipulated time.Finish if (step 1306) handled in the a-quadrant, then then carry out to preserve and handle (step 1307), sampling keeps finishing dealing with.

Handle the details of (step 1303) in the zone of B shown in the flow chart of Figure 14.In the figure, begun if handle, then wait for the input data arrivals ( step 1401,1402 "Yes") that become sample objects, and judge the classification (MPEG4, TCP/IP, CDMA etc.) (step 1403) of these data, and then carry out at the automatic setting that constitutes with the data category corresponding device thereof of being judged and handle (step 1404).

Next, monitor the input data (step 1405) that arrive on one side, if starting point arrives (step 1406 "Yes"), then carry out on one side being taken into processings (step 1407), handling (step 1408) to the preservation of temporary storage area (with reference to Figure 11 (a)), of input data repeatedly Yi Bian carry out instrumentation (counting) processing (step 1409) of data length.If the arrival of terminating point is identified betwixt (step 1410 "Yes"), then generate control data (data length that comprises institute's instrumentation) (step 1411), and it is added (step 1412) to the data that are kept at the temporary storage area, and write (step 1403) to the B zone by the FIFO processing.Above processing (step 1401～1413) is carried out repeatedly up to internal trigger becomes open mode (step 1305 "Yes").

Utilize the detail flowchart of the Interrupt Process of external trigger shown in Figure 15.For example, if outer triggering signal TRG opens in the execution that handle in above-mentioned B zone, then proceed to import the supervision (step 1501) of data by Interrupt Process, if there is no import data (step 1502 "No"), then internal trigger is set as open mode (step 1508) immediately, with respect to this, exist under the input data conditions, promptly under the situation that external trigger in the way of 1 frame data has been opened (step 1502 "Yes"), what data were imported in recovery is taken into processing (step 1503), (step 1504) handled in preservation to the temporary storage area, data length Ah counting (instrumentation) is handled (step 1505), after, (step 1506 "No") carries out these processing (step 1503～1505) repeatedly between arriving up to terminating point.Then, if the arrival of terminating point is identified (step 1506 "Yes") betwixt, then handle (Figure 14) equally with the B zone of previous illustrated mistake, carrying out control data in order generates processing (step 1507), control data additional treatments (step 1508), handles (step 1509) to the FIFO in B zone, till this frame end, the data that arrive are all write the B zone, and then, the internal trigger sign is opened and end process.That is,, not to write immediately to transfer to the a-quadrant, but proceed to write till this frame end to the data in B zone when to the writing under the situation that external trigger in the way opened of the frame data in B zone.

On the other hand,, then turn back to Figure 13 and it is detected by determination processing (step 1305) if so the internal trigger sign is opened, after, just carry out the a-quadrant and handle (step 1306).

The detail flowchart that handle a-quadrant shown in Figure 16.In the figure, begun if handle, then at first, after having started the timer that time of implementation that the a-quadrant is handled monitors (step 1601), monitor input gathering data arrival (step 1602) on one side, wait for that the arrival of starting point is identified (step 1603 "Yes") on one side, and execution input data are taken into processing (step 1604), handle (step 1606) to preservation processing (step 1605), the data length counting (instrumentation) of temporary storage area repeatedly.If the arrival of terminating point is identified (step 1607) betwixt, the generation of then carrying out control data is in order handled the additional treatments (step 1609) of (step 1608), control data, is write processing (step 1610) to the a-quadrant.Above processing (step 1602～1610) is carried out repeatedly up to timer till time is up, and time is up as if timer (step 1611 "Yes"), then whole processing end.

According to this 2nd embodiment, even if the sample objects data be the random length data (for example, the MPEG4 data that arrive from video camera etc.), also the data length to each data carries out instrumentation, and store in the memory after its instrumentation value is additional to each data as control data, even if so in memory, data sequence is filled thick and fast, can on it is read and even regenerates, not bring obstacle yet, can apply flexibly memory span effectively.In addition, even if 1 frame write the way in outer triggering signal open, it writes and also proceeds till the end that arrives this frame for the data that are in the frame in writing this moment, so the last data in BEFORE zone and the initial data in AFTER zone just all are stored with state completely, the data in BEFORE zone and the data in AFTER zone are just become possibility as different files fully, just under the situation about can in the reason of traffic accident is found out etc., utilize, before the assurance accident and the reliability of the data analysis after the accident.

At last, will keep some concrete examples of applications of IC to provide explanation to sampling according to the present invention.Fig. 8 illustrates application keeps the data logger of IC according to a sampling of the present invention block diagram.Number in the figure 801 marks one detector, it detects the characteristic value of measurand, such as voltage, temperature, pressure and flow rate; 802 marks, one input circuit, it is based on the signal of telecommunication of the signal generation that obtains from detector corresponding to characteristic value; 803 marks, one AD/I2S change-over circuit, it is a digital signal from the analog signal conversion that input circuit obtains, and transmits this digital signal to the I2S bus; 804 marks keep IC according to sampling of the present invention; 805 marks, one DRAM, its function is as a storage medium; 806 marks, one flash memory, it has as the similar function of secondary storage medium; 807 marks, one I2S/USB change-over circuit, it receives from sampling and keeps IC804 to keep data to I2S bus transmission sampling, and keeps sampling data to send out a usb bus; 808 marks, one personal computer, its reception is also handled sampling maintenance data; And 809 marks one trigger circuit take place, when various status signal S1 to Sk (for example, expression is around the temperature of detected object, pressure, volume, the signal of vibration etc.) when satisfying predetermined condition, its generation triggering signal TRG.

According to this example application, addressing (wrap-around addressing) is stored in first storage area of DRAM805 while the characteristic quantity data that detected by detector 801 are unrolled.When status signal S1 when Sk satisfies predetermined condition, circuit 809 takes place produce triggering signal TRG and offer sampling and keep IC by triggering.Next, the series of features amount data of arrival just are written to second storage area rather than first storage area.The data sequence that is stored in first and second storage areas then is transferred to the flash memory 806 as the secondary storage medium.Then, be stored in data sequence in the flash memory 806 (before triggering signal arrives regularly and the data sequence of predetermined interval) afterwards and be read out and be loaded into personal computer 808.If this data logger is installed in the automobile, provide speed, accelerator opening with suitable detector record automobile, engine status, on-position etc., and the air bag activating signal of use and motor-vehicle accident height correlation produces triggering signal, the data of preciousness during the accident that just can preserve.

Secondly, Fig. 9 illustrates application keeps the IC monitoring arrangement according to a sampling of the present invention block diagram.Among the figure, label 901 marks one camera, it comprises photographic lens and imageing sensor; 902 marks, one signal processing circuit, it handles the vision signal from camera; 903 marks, one codecs (compressor circuit), it carries out data compression to the signal from signal processing circuit; 904 mark DATA/I2S change-over circuits, it is sent to the I2S bus from the data that compression/decompression circuit obtains; 905 marks keep IC according to sampling of the present invention; 906 marks, one DRAM, its function is as a storage medium; 907 marks, one flash memory, it has similar function as the secondary storage medium; 908 marks, one I2S/USB change-over circuit, it receives from sampling and keeps IC904 to keep data to I2S bus transmission sampling, and keeps sampling data to send out a usb bus; 909 marks, one personal computer, its reception is also handled sampling maintenance data; And 910 marks, one triggering generation circuit, when satisfying predetermined condition, it produces triggering signal TRG to Sk (for example, the signal of the temperature of expression detected object periphery, pressure, volume, vibration etc.) as various status signal S1.In this example, can enumerate the focus error signal that obtains from camera 901 as status signal, from placing surveillance zone and by the signal of the switch 911 of invador operation, from being built in the camera and the signal of the acceleration transducer (not shown) that detection camera itself is moved, from the signal of the microphone (not shown) of collecting the sound in the monitored object zone, and from the video signal of camera itself etc.

According to this application examples, the common sound of view data that obtains by camera 901 first storage area of addressable storage that unroll at DRAM 906.Make status signal S1 satisfy predetermined condition to Sk when appear at the monitored object zone owing to the invador, then circuit 910 generations take place and offer sampling to keep IC 905 by triggering in triggering signal TRG.Next, the image sequence data of input are written to second storage area rather than first storage area.Then, be stored in the image data sequence in first and second storage areas, be transferred to flash memory 907 as the secondary storage medium.Then, be stored in image data sequence in the flash memory 907 (image data sequence in the predetermined interval before triggering signal reaches the time and afterwards) and be read out and be taken into personal computer 909.If this monitoring arrangement for example is used for the anti-surveillance of usurping on doorway, then when the invador appears at the place ahead of door, just can preserve a series of images of the movement that comprises invador up to now.

[utilizability on the industry]

As described above, according to the present invention, just can be for example entry install take precautions against video camera with Monitor in the such situation of visitor, based on the sensor that arranges separately and video image itself Change to wait detect visitor's arrival, not only to detecting the view data in the rear certain hour, and And also the view data in the certain hour before detecting is preserved, thereby just can be by base In these two cover view data video images of regenerating that are saved, observe in more detail visiting Person's manner.

In addition, according to the present invention, just can be on one side based on the instrumentation data from a plurality of testers Come the state of monitored object thing, on one side with the characteristic quantity of these instrumentation data representations with in advance the imagination The characteristic value of thing when taking place consistent this is true as triggering, not only to trigger take place after Certain hour in the instrumentation data, but also to the instrumentation in the certain hour before trigger taking place Data are preserved, thus the two cover instrumentation data that just these can be saved effectively apply flexibly in The prediction that the checking of thing generation accuracy of detection and thing take place.

And then, according to the present invention, just can be on one side based on the instrumentation data from a plurality of testers Monitor the state of vehicle, on one side with the characteristic quantity of these instrumentation data representations with in advance the imagination Consistent this true conduct of characteristic value when accident takes place triggers, after not only triggering being taken place Instrumentation data in the certain hour, but also to triggering the instrumentation number in the certain hour before taking place According to preserving, thereby the two cover instrumentation data that just these can be saved are effectively applied flexibly in thing So finding out of reason.

Claims (33)

1. the sample hold method of a data sequence is used among the series data that arrives continuously, is present in the series data in the predetermined interval after only sampling keeps respectively before the arrival regularly of predetermined triggering signal, it is characterized in that, comprising:

First step is prepared to have defined corresponding to first storage area between the arrival region of the front side regularly of above-mentioned triggering signal with corresponding to a storage medium of second storage area in the arrival rear side interval regularly of above-mentioned triggering signal;

Second step, the addressing that continues on one side to unroll write the action of series data of arrival till above-mentioned triggering signal arrival in first storage area; And

Third step waits for that above-mentioned triggering signal arrives, and the series data that is arrived after above-mentioned triggering signal is arrived writes rather than stops to write to the data of above-mentioned first storage area to second storage area.

2. the sample hold method of the data sequence of putting down in writing according to claim 1 is characterized in that, also comprises:

The 4th step wait for that above-mentioned third step finishes, and the data that write in first and second storage area with an above-mentioned storage medium is carried out transcription to the secondary storage medium.

3. the sample hold method of the data sequence of putting down in writing according to claim 1 is characterized in that:

An above-mentioned storage medium is the non-volatile memory medium that optical memory etc. is suitable for high speed storing, and the volatile storage medium such as DRAM of stand-by power supply perhaps are housed.

4. the sample hold method of the data sequence of putting down in writing according to claim 2 is characterized in that:

An above-mentioned storage medium is the volatile storage medium that DRAM etc. is suitable for high speed storing, and above-mentioned secondary storage medium is non-volatile memory mediums such as flash memory, hard disk.

5. according to the sample hold method of any data sequence of being put down in writing in the claim 1 to 4, it is characterized in that:

The memory capacity of first storage area is set as the integral multiple of the memory capacity of second storage area.

6. the sample hold method of the data sequence of putting down in writing according to claim 5 is characterized in that:

The memory capacity of first storage area is set as the twice of the memory capacity of the mat woven of fine bamboo strips two storage areas.

7. the sample hold method of the data sequence of putting down in writing according to claim 1 is characterized in that:

The continuous series data that arrives random length data of respectively doing for oneself, and,

In first and second step, comprise:

The data length of each random length data of arrival before and after the phase is carried out the step of instrumentation; With

Step at the random length data of the storage area to be written control data of the additional data length that comprises institute's instrumentation in separately.

8. the sample hold method of the data sequence of putting down in writing according to claim 1 is characterized in that:

Continuously the series data that arrives does for oneself respectively frame by frame that unit has carried out the data of distinguishing, and,

In first step, while writing the action of the series data of arrival in first storage area, the addressing of unrolling continued before the frame end in the moment that triggering signal arrives writes,

In second step, the series data that is arrived after above-mentioned triggering signal arrived is begun after the action that second storage area writes is frame end in the moment that triggering signal arrives writes.

9. the sampling holding device of a data sequence is used among the series data that arrives continuously, is present in the series data in the predetermined interval after only sampling keeps respectively before the arrival regularly of predetermined triggering signal, it is characterized in that, comprising:

A storage medium;

The region definition data storage device is used in an above-mentioned storage medium storage and is used to define corresponding to first storage area between the arrival region of the front side regularly of above-mentioned triggering signal with corresponding to the region definition data of second storage area in the arrival rear side interval regularly of above-mentioned triggering signal;

First into control device, the addressing that continues on one side to unroll write the action of series data of arrival till above-mentioned triggering signal arrival in defined above-mentioned first storage area by the above-mentioned zone definition of data; And

Second into control device, wait for that above-mentioned triggering signal arrives, the series data that is arrived after above-mentioned triggering signal is arrived is to being write by defined above-mentioned second storage area of above-mentioned zone definition of data rather than stopping to write to the data of above-mentioned first storage area.

10. the sampling holding device of the data sequence of putting down in writing according to claim 9 is characterized in that, also comprises:

The secondary storage medium; And

Data transcription control device, the data that write in first and second storage area with an above-mentioned storage medium are carried out transcription to above-mentioned secondary storage medium.

11. the sampling holding device of the data sequence of putting down in writing according to claim 9 is characterized in that:

An above-mentioned storage medium is the non-volatile memory medium that optical memory etc. is suitable for high speed storing, and the volatile storage medium such as DRAM of stand-by power supply perhaps are housed.

12. the sampling holding device of the data sequence of putting down in writing according to claim 10 is characterized in that:

An above-mentioned storage medium is the volatile storage medium that DRAM etc. is suitable for high speed storing, and above-mentioned secondary storage medium is non-volatile memory mediums such as flash memory, hard disk.

13. the sampling holding device according to any data sequence of being put down in writing in the claim 9 to 12 is characterized in that, comprising:

The region definition data generating apparatus is based on the inner generation of the input data region definition data from the outside.

14. the sampling holding device of the data sequence of putting down in writing according to claim 13 is characterized in that:

Comprise the data of the capacity of representing first storage area and the data both sides of the capacity of expression second storage area in above-mentioned input data from the outside, above-mentioned zone definition of data generating apparatus generates region definition data based on this two number formularies certificate.

15. the sampling holding device of the data sequence of putting down in writing according to claim 13 is characterized in that:

The data that in above-mentioned input data, comprise the capacity of representing first storage area from the outside, but the data that do not comprise the capacity of representing second storage area, above-mentioned zone definition of data generating apparatus only generate region definition data based on the data of the capacity of representing first storage area.

16. the sampling holding device according to any data sequence of being put down in writing in the claim 9 to 15 is characterized in that:

The memory capacity of first storage area is set as the integral multiple of the memory capacity of second storage area.

17. the sampling holding device of the data sequence of putting down in writing according to claim 16 is characterized in that:

The memory capacity of first storage area is set as the twice of the memory capacity of second storage area.

18. the sampling holding device of the data sequence of putting down in writing according to claim 9 is characterized in that:

The continuous series data that arrives random length data of respectively doing for oneself, and,

In first and second into control device, comprise:

The data length of each random length data of arrival before and after the phase is carried out the device of instrumentation; With

Device at the random length data of the storage area to be written control data of the additional data length that comprises institute's instrumentation in separately.

19. the sampling holding device of the data sequence of putting down in writing according to claim 9 is characterized in that:

Continuously the series data that arrives does for oneself respectively frame by frame that unit has carried out the data of distinguishing, and,

In first into control device, while writing the action of the series data of arrival in first storage area, the addressing of unrolling continued before the frame end in the moment that triggering signal arrives writes,

In second into control device, the series data that is arrived after above-mentioned triggering signal arrived is begun after the action that second storage area writes is frame end in the moment that triggering signal arrives writes.

20. a semiconductor integrated circuit is characterized in that, comprising:

First port is transfused to the series data as sample objects;

Second port is transfused to predetermined triggering signal;

The 3rd port is connected to predetermined storage medium;

The 4th port is used for exporting the series data that is sampled maintenance;

The region definition data storage device, the region definition data of area definition first storage area and second storage area in the storage medium that is used on the 3rd port, being connected;

First into control device writes in first storage area of the storage medium that addressing is connected on the 3rd port while continuation is unrolled from the action of the series data of first port input, up to till second port input triggering signal;

Second into control device is waited for from second port input triggering signal, and the series data that is arrived after triggering signal is arrived writes rather than stops to write to the data of first storage area of storage medium to second storage area of storage medium; And

The data read-out control device is administered first storage area that is used for a storage medium will being connected on the 3rd port and the data that second storage area is stored and is sent to the control of the 4th port.

21. the semiconductor integrated circuit according to claim 20 is put down in writing is characterized in that:

Above-mentioned storage medium is the non-volatile memory medium that optical memory etc. is suitable for high speed storing, and the volatile storage medium such as DRAM of stand-by power supply perhaps are housed.

22. the semiconductor integrated circuit according to claim 20 is put down in writing is characterized in that, comprising:

Power control part, not only to the inside of this semiconductor integrated circuit, and also supply power of the storage medium that the outside is connected and the outside oscillator that connects and Action clock is offered this semiconductor integrated circuit.

23. the semiconductor integrated circuit according to claim 22 is put down in writing is characterized in that, comprising:

Outside terminal is used for connecting and is used for will keeping the ultracapacitor of stipulated time from the power supply that above-mentioned power control part is supplied with when having a power failure.

24. according to any semiconductor integrated circuit of being put down in writing in the claim 20 to 23, it is characterized in that, also comprise:

Five-port is transfused to the control data; And

The region definition data generating apparatus generates the above-mentioned zone definition of data based on the control from above-mentioned five-port input with data inside.

25. a semiconductor integrated circuit is characterized in that, comprising:

First port is transfused to the series data as sample objects;

Second port is transfused to predetermined triggering signal;

The 3rd port is connected to a predetermined storage medium;

The 4th port is connected to predetermined secondary storage medium;

Five-port is used for reading the data that are sampled maintenance;

The region definition data storage device, the region definition data of area definition first storage area and second storage area in the storage medium that is used on the 3rd port, being connected;

First into control device writes in first storage area of the storage medium that addressing is connected on the 3rd port while continuation is unrolled from the action of the series data of first port input, up to till second port input triggering signal;

Second into control device, wait is from second port input triggering signal, and the series data that is arrived after triggering signal is arrived writes rather than stops to write to the data of first storage area of a storage medium to second storage area of a storage medium;

Data transcription control device, the data that write in first and second storage area of a storage medium that will be connected on the 3rd port are carried out transcription to the secondary storage medium that is connected on the 4th port; And

The data read-out control device is administered the data that are used for the secondary storage medium that is connected is stored and is sent to the control of five-port on the 4th port.

26. the semiconductor integrated circuit according to claim 25 is put down in writing is characterized in that:

One time storage medium is the volatile storage medium that DRAM etc. is suitable for high speed storing, and the secondary storage medium is non-volatile memory mediums such as flash memory, hard disk.

27. the semiconductor integrated circuit according to claim 25 is put down in writing is characterized in that, comprising:

Power control part not only to the inside of this semiconductor integrated circuit, and once reaches also supply power of secondary storage medium and the outside oscillator that connects and Action clock is offered this semiconductor integrated circuit to what the outside connected.

28. the semiconductor integrated circuit according to claim 27 is put down in writing is characterized in that, comprising:

Outside terminal is used for connecting and is used for will keeping the ultracapacitor of stipulated time from the power supply that above-mentioned power control part is supplied with when having a power failure.

29., it is characterized in that according to any semiconductor integrated circuit of being put down in writing in the claim 25 to 28:

The memory capacity of first storage area is set as the integral multiple of the memory capacity of second storage area.

30. the semiconductor integrated circuit according to claim 29 is put down in writing is characterized in that:

The memory capacity of first storage area is set as the twice of the memory capacity of second storage area.

31. according to any semiconductor integrated circuit of being put down in writing in the claim 24 to 30, it is characterized in that, also comprise:

The 6th port is transfused to the control data; And

The region definition data generating apparatus generates the above-mentioned zone definition of data based on the control from above-mentioned the 6th port input with data inside.

32., it is characterized in that according to claim 20 or 25 semiconductor integrated circuit of being put down in writing:

The continuous series data that arrives random length data of respectively doing for oneself, and,

In first and second into control device, comprise:

The data length of each random length data of arrival before and after the phase is carried out the device of instrumentation; With

Device at the random length data of the storage area to be written control data of the additional data length that comprises institute's instrumentation in separately.

33., it is characterized in that according to claim 20 or 25 semiconductor integrated circuit of being put down in writing:

Continuously the series data that arrives does for oneself respectively frame by frame that unit has carried out the data of distinguishing, and,

In first into control device, while writing the action of the series data of arrival in first storage area, the addressing of unrolling continued before the frame end in the moment that triggering signal arrives writes,

In second into control device, the series data that is arrived after above-mentioned triggering signal arrived is begun after the action that second storage area writes is frame end in the moment that triggering signal arrives writes.

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