CN1829058A - DC/DC controller for realizing self-adaptive voltage adjustment technique - Google Patents

Abstract

The present invention refers to DC/DC controller to realize self adaptation voltage regulation. Said controller is composed of one filter, one comparer, and one filter Hand PWM circuit. Said structure does not sample load current information to proceed compensation to reference voltage, making total system only adopting feedback voltage loop circuit to realize AVP, without designing high precision current sample circuit, effectively reducing design costs, without using any simplification in design process, to ensure excellent control performance.

Description

A kind of DC/DC controller of realizing self-adaptive voltage adjustment technique

Technical field

The invention belongs to the self-adaptive voltage adjustment technique field, be specifically related to a kind of DC/DC controller of realizing the self adaptation adjustment technology.

Background technology

Adaptive voltage is adjusted (AVP, Adaptive Voltage Positioning) claims optimal voltage adjustment (OptimalVoltage Positioning) again, be a kind of when load changing, make full use of the output voltage range that is allowed, thereby effectively reduce a kind of technology [2] that output capacitance reduces cost.It is that high-performance CPU, communication equipment, DSP, image processor etc. exist in the POL DC/DC converter (Point-of-load DC/DCRegulator) of big current transients that this technology is widely used in load, explicitly calls for this technology of use to design voltage regulator module [1] to the CPU power supply such as the VRD standard of Intel.

The AVP principle as shown in Figure 1, Fig. 1 (a) does not use the AVP technology, when load current was undergone mutation, output voltage can produce spike.In order to ensure that load performance can not descend or damage, spike must be controlled in Vmax and the Vmin scope, for the very big application of some load currents, such as CPU, requires load current to change when reaching 95A, and overshoot is less than 50mv[1].Certainly will require abundant high-performance filter capacitor in order to reach this target, thereby cause cost to increase.Fig. 1 (b) has adopted the AVP technology, output voltage changes in Vmax～Vmin scope according to the load current size, and when not using AVP, must the control spike (in the scope of Vmax～Vmin)/2, thereby enlarged the scope that can change, reduced requirement, reduced cost output capacitance.

The converter equivalent electric circuit of employing AVP technology as shown in Figure 2.During maximum load current, Vo=Vmin, load current hour, Vo=Vmax.At this moment, the converter equivalence is an ideal voltage source and the connecting of resistance, and this resistance sizes is:

$R_O=\frac{\mathrm{\Δ}{V}_O}{\mathrm{\Δ}{I}_O}.$ Therefore, realize that the AVP technology promptly requires the closed loop output impedance of controller to equal resistance R o.

In order to realize that the closed loop output impedance that AVP requires equals resistance R o, current academic circle and each large power supply management supplier have proposed many solutions.Such as the sampling of [2-5] utilization, realize AVP to inductive current.Position according to current loop is divided into Active Droop Mode Control and Current Mode Control again.[6] utilize the sampling to load current to realize AVP, [7] sampling input electric current is realized AVP.The common feature of these schemes is that the electric current of load or input current information are joined in the control loop.Because these current informations directly have influence on the levels of precision of control, thus the designing requirement of current sampling circuit than higher, yet several factors has limited the accuracy of sample circuit, and inevitable [8].[2] propose, if sample rate current information not only realizes that with the feedback voltage loop AVP is impossible realization.Paper subsequently and product have also been abandoned the effort to this direction.

List of references

[1]Intel，Voltage?Regulator-Down(VRD)10.1?Design?Guide?For?Desktop?LGA?775?Socket.

[2]K.Yao，M.Xu，Y?Meng?and?F.C.Lee“Design?considerations?for?VRM?transientresponse?based?on?the?output?impedance”IEEE?Trans?Power?Electronics，vol?18?pp?1270-1277，Nov.2003

[3]STMicroelectronics?GROUP?OF?COMPANIES，L6710，L6917B，L6918A?datasheet.

[4]K.Yao，Y.Meng，P.Xu?and?F.C?Lee，“Optimal?design?of?the?active?droop?control?designmethod?for?the?transient?response，”in?Proc.IEEE?APEC，2002，pp.14-20

[5]Intersil?Corporation?ISL6556B?datasheet.

[6]X.Zhang，G.Yao，A.Q.Huang，“A?novel?VRM?control?with?direct?load?current?feedback”Applied?Power?Electronics?Conference?and?Exposition，2004.APEC′04.Nineteenth?AnnualIEEE?Volume?1，2004?Page(s)：267-271

[7]J?Sun；J?Zhou；M?Xu；Lee，F.C，“A?novel?input-side?current?sensing?method?to?achieveAVP?for?future?VRs”Applied?Power?Electronics?Conference?and?Exposition，APEC?2005.Twentieth?Annual?IEEE?March?2005?Page(s)：287-293?Vol.1

[8]C?F?Lee；Mok，P.K.T.；“A?monolithic?current-mode?CMOS?DC-DC?converter?with?on-chip?current-sensing?technique”Solid-State?Circuits.IEEE?Journal?ofVolume?39，Issue?1，Jan.2004?Page(s)：3-14

Summary of the invention

The objective of the invention is to propose a kind of any current information of can not sampling, thereby the DC/DC controller of the high realization AVP technology of control precision.

The DC/DC controller of the realization AVP technology that the present invention proposes, structure is shown in Fig. 3 (a).It is connected to form through circuit successively by a filter X, comparator, filters H and pwm circuit, and filter X meets reference signal Vref,, comparator is connected with the output voltage V o signal of feedback; This structure any current information of not sampling, by filter X reference signal Vref is compensated, the signal after the compensation and the output voltage V o of feedback compare, produce error signal Verr, this error signal is sent filters H, and the output of filters H send pwm circuit to produce the pwm pulse of certain duty ratio of regulating usefulness.

Fig. 3 (b) is the DC/DC application system example of the controller of this structure of employing.The controller sampling and outputting voltage produces pwm pulse and obtains just anti-phase two paths of signals through driver (Driver), send upper and lower two power tubes respectively, the conducting of power controlling pipe and ending, also i.e. discharging and recharging the time of control output LC filter.It is stable that final system reaches, Vo=Vref.

The realization of filters H, X:

The S domain model of DC/DC system shown in Fig. 3 (b) as shown in Figure 4.Wherein, G _Vd(s) be the transfer function of BUCK converter input duty cycle, Z to output voltage _O(s) be output impedance, F (s) is the PWM multiplication factor, and D (s) is the system delay transfer function.The each several part expression formula is as follows:

$G_{\mathrm{vd}}\left(s\right)=V_{\mathrm{in}}\frac{\mathrm{SC}{R}_C+1}{{\mathrm{<figure-callout\; id="2"\; label="S"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">S</figure-callout>}}^2\mathrm{CL}+\mathrm{SC}(R_L+R_C)+1}---\left(1\right)$

Wherein, C, L are respectively output filter electric capacity, inductance.R _CWith R _LBe respectively the equivalent series resistance of electric capacity and inductance, Vin is an input voltage;

$Z_O\left(s\right)=\frac{S^2{R}_C\mathrm{CL}+S(L+R_L{R}_{C}C)+{\mathrm{<figure-callout\; id="2"\; label="R\; L\; S"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">R</figure-callout>}}_L}{S^{}}---\left(2\right)$

$F=\frac{1}{V_{\mathrm{ramp}}}---\left(3\right)$

Vramp is the PWM ramp voltage.

D(s)＝e ^-sT (4)

T is the system switching cycle.

Can obtain the closed loop transmission function is:

$V_O=\frac{\mathrm{KDH}{G}_{\mathrm{vd}}}{1+\mathrm{KDH}{G}_{\mathrm{vd}}}X{V}_{\mathrm{ref}}-\frac{Z_O}{1+\mathrm{KDH}{G}_{\mathrm{vd}}}{I}_O---\left(5\right)$

According to the AVP requirement, Vo must satisfy:

V _O＝V _ref-R _OI _O (6)

Contrast (5), (6) require:

$\frac{Z_O}{1+\mathrm{KDH}{G}_{\mathrm{vd}}}=R_O---\left(7\right)$

$\frac{\mathrm{KDH}{G}_{\mathrm{vd}}}{1+\mathrm{KDH}{G}_{\mathrm{vd}}}X=1$

(1)～(4) are updated to (7), and can to obtain the expression formula of H, X as follows:

$H\left(s\right)=\frac{\frac{\mathrm{CL}(R_C-R_o)S^3}{2/\mathrm{fsw}}+[\mathrm{CL}(R_C-R_o)+\frac{L+R_L{R}_{C}C-C{R}_O{R}_L-C{R}_{\mathrm{<figure-callout\; id="2"\; label="O\; R\; C"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">O</figure-callout>}}{R}_C{}_{}}{2/\mathrm{fsw}}]{\mathrm{<figure-callout\; id="2"\; label="S"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">S</figure-callout>}}^2+[L+R_L{R}_{C}C-C{R}_O{R}_L-C{R}_O{R}_C+\frac{R_L-{\mathrm{<figure-callout\; id="2"\; label="R\; O"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">R</figure-callout>}}_O}{2/\mathrm{fsw}}]S+R_L-R_O}{R_O{V}_{\mathrm{in}}F(\mathrm{SC}{R}_C+1)}$

$X\left(s\right)=\frac{\mathrm{CL}{\mathrm{<figure-callout\; id="2"\; label="R\; C\; S"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">R</figure-callout>}}_C{S}^{}{}^2+(L+R_L{R}_{C}C)S+R_L}{\mathrm{CL}(R_C-R_o){\mathrm{<figure-callout\; id="2"\; label="S"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">S</figure-callout>}}^2+(L+R_L{R}_{C}C-C{R}_O{R}_L-C{R}_O{R}_C)S+R_L-R_O}---\left(8\right)$

Wherein, Ro output resistance, fsw are switching frequency, and S is a system parameters.

Na advantage of the present invention is: the current information of this load of not sampling, reference voltage is compensated, and make whole system only adopt the feedback voltage loop to realize AVP.Do not need to be designed for the high-precision current sampling circuit of control, effectively reduced design cost; Do not use any simplification in the design process, guaranteed excellent control performance.

Adopt the controller of this structure can be applied to exist the POL DC/DC converter of big current transients to comprise fields such as high-performance CPU, communication equipment, DSP, image processor.

Description of drawings

Fig. 1, the output voltage waveforms that do not use the AVP technology and use the AVP technology are relatively.Output voltage waveforms when wherein, Fig. 1 (a) does not use the AVP technology.Output voltage waveforms when Fig. 1 (b) uses the AVP technology.

Fig. 2, AVP technical equivalences circuit.

Control structure and application system example that Fig. 3, the present invention propose.Wherein, the controller architecture of Fig. 3 (a) the present invention proposition.Fig. 3 (b) adopts the application system example of the controller architecture of the present invention's proposition.

The S territory equivalent model of Fig. 4, controller.

The experimental circuit structure chart of the control structure that Fig. 5, a kind of the present invention of realization propose.

Fig. 6, when the speed of load with 2A/us, the output voltage waveforms when 0.2A changes to 20A.

Embodiment

The invention is further illustrated by the following examples.Among this embodiment, adopt digital form to realize described DC/DC controller, structure chart is seen Fig. 5.Switching frequency fsw=1MHz.Output voltage is controlled by Vref, and Vref represents that with 8 digit numeric codes scope is from 0～2v, and input voltage is 12v, output current 0～20A, C=8mF, L=390nH, equivalent R _C=2m Ω, equivalent R _L=29.12m Ω.Get Ro=2m Ω.Owing to adopt digital form to realize, output voltage is through the adc circuit sampling, and pwm circuit usage counter structure, so the F in (3) formula is expressed as the product of ADC and PWM multiplication factor here, size is:

$F=\frac{1}{{\mathrm{<figure-callout\; id="2"\; label="q\; ADC"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">q</figure-callout>}}_{\mathrm{ADC}}{2}^{\mathrm{nPWM}}}---\left(9\right)$

Wherein, q _ADCBe the ADC precision, nPWM is the PWM figure place, is respectively 7.8mv, 11bit.

With above information substitution (8) formula, obtain: (during calculating can by the MATLAB instrument)

$H\left(s\right)=\frac{1.79e-013{\mathrm{<figure-callout\; id="2"\; label="s"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">s</figure-callout>}}^2+3.716e-007s+0.02712}{2.462e-008s+0.001538}---\left(10\right)$

$X\left(s\right)=\frac{6.24e-012{\mathrm{<figure-callout\; id="2"\; label="s"\; filenames="A20061002475300092.png"\; state="\{\{state\}\}">s</figure-callout>}}^2+8.559c-007s+0.02912}{3.58e-007s+0.02712}---\left(11\right)$

Utilize " Tustin " method to transform to the Z territory (10), (11): (also can use other transform methods, such as, the back is to Euler, zero limit coupling etc.)

$H\left(z\right)=\frac{29.27z^2-27.14z-4.739w-015}{z^2+0.06061z-0.9394}---\left(12\right)$

$X\left(z\right)=\frac{35.93z^2-67.1z+31.32}{z^2+0.07299z-0.927}---\left(13\right)$

After process MATLAB/SIMULINK carries out system emulation, on Virtex II Pro Development System development board, realize this controller.Experimental system is made up of oscilloscope, DC electronic load, stabilized voltage power supply, PC power supply, DC-DC system testing plate, FPGA development board and PC.

Fig. 6 shows when the speed of load with 2A/us, and the output voltage waveforms when 0.2A changes to 20A can be seen, output voltage saltus step 66mv, and the about 3.3m Ω of closed loop output impedance is with the design load basically identical.

Claims (3)

1, a kind of DC/DC controller of realizing self-adaptive voltage adjustment technique, it is characterized in that connecting to form through circuit successively by a filter X, comparator, filters H and pwm circuit, filter X meets reference signal Vref, and comparator is connected with the output voltage V o signal of feedback; This structure any current information of not sampling, by filter X reference signal Vref is compensated, the signal after the compensation and the output voltage V o of feedback compare, produce error signal Verr, this error signal is sent filters H, and the output of filters H send pwm circuit to produce the pwm pulse of certain duty ratio of regulating usefulness.

2, the DC/DC controller of realization self-adaptive voltage adjustment technique according to claim 1 is characterized in that the expression formula of described filters H and filter X is as follows:

$H\left(s\right)=\frac{\frac{\mathrm{CL}(R_C-R_o)S^3}{2/\mathrm{fsw}}+[\mathrm{CL}(R_C-R_o)+\frac{L+R_L{R}_{C}C-C{R}_O{R}_L-C{R}_O{R}_C}{2/\mathrm{fsw}}]S^2+[L+R_L{R}_{C}C-C{R}_O{R}_L-C{R}_O{R}_C+\frac{R_L-R_O}{2/\mathrm{fsw}}]S+R_L-R_O}{R_O{V}_{\mathrm{in}}F(\mathrm{SC}{R}_C+1)}$

$X\left(s\right)=\frac{\mathrm{CL}{R}_C{S}^2+(L+R_L{R}_{C}C)S+R_L}{\mathrm{CL}(R_C-R_o)S^2+(L+R_L{R}_{C}C-C{R}_O{R}_L-C{R}_O{R}_C)S+R_L-R_O}---\left(8\right)$

Wherein, C, L are respectively output filter electric capacity, inductance, R _CWith R _LBe respectively the equivalent series resistance of electric capacity and inductance, Vin is an input voltage; Ro is an output resistance, and fsw is a switching frequency, and S is a system parameters, $F=\frac{1}{V_{\mathrm{ramp}}},$ Vramp is the PWM ramp voltage.

3, the DC/DC controller of realization self-adaptive voltage adjustment technique according to claim 1 is characterized in that adopting digital form, and at this moment, output voltage is sampled through adc circuit, pwm circuit usage counter structure, $F=\frac{1}{q_{\mathrm{ADC}}{2}^{\mathrm{nPWM}}}$ Here, q _ADCBe the precision of adc circuit, nPWM is the PWM figure place.

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