CN1822334A - Method for producing polycrystalline thin film transistor - Google Patents
Method for producing polycrystalline thin film transistor Download PDFInfo
- Publication number
- CN1822334A CN1822334A CN 200510051939 CN200510051939A CN1822334A CN 1822334 A CN1822334 A CN 1822334A CN 200510051939 CN200510051939 CN 200510051939 CN 200510051939 A CN200510051939 A CN 200510051939A CN 1822334 A CN1822334 A CN 1822334A
- Authority
- CN
- China
- Prior art keywords
- silicon island
- island
- silicon
- gate
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 32
- 239000010409 thin film Substances 0.000 title abstract description 17
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 94
- 239000010703 silicon Substances 0.000 claims abstract description 94
- 238000000034 method Methods 0.000 claims abstract description 79
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 75
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 55
- 229920005591 polysilicon Polymers 0.000 claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000000059 patterning Methods 0.000 claims abstract description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 66
- 229910052751 metal Inorganic materials 0.000 claims description 33
- 239000002184 metal Substances 0.000 claims description 33
- 230000003647 oxidation Effects 0.000 claims description 19
- 238000007254 oxidation reaction Methods 0.000 claims description 19
- 150000003376 silicon Chemical class 0.000 claims description 19
- 239000011248 coating agent Substances 0.000 claims description 16
- 238000000576 coating method Methods 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 11
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 239000011521 glass Substances 0.000 claims description 6
- 238000005660 chlorination reaction Methods 0.000 claims description 4
- 229910052724 xenon Inorganic materials 0.000 claims description 4
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 claims description 4
- 229910021419 crystalline silicon Inorganic materials 0.000 abstract 3
- 235000010627 Phaseolus vulgaris Nutrition 0.000 abstract 1
- 244000046052 Phaseolus vulgaris Species 0.000 abstract 1
- 235000021251 pulses Nutrition 0.000 abstract 1
- 239000013078 crystal Substances 0.000 description 47
- 108091006146 Channels Proteins 0.000 description 40
- SBEQWOXEGHQIMW-UHFFFAOYSA-N silicon Chemical compound [Si].[Si] SBEQWOXEGHQIMW-UHFFFAOYSA-N 0.000 description 36
- 239000012528 membrane Substances 0.000 description 19
- 238000002425 crystallisation Methods 0.000 description 15
- 238000004093 laser heating Methods 0.000 description 15
- 239000002245 particle Substances 0.000 description 14
- 238000012545 processing Methods 0.000 description 13
- 238000009826 distribution Methods 0.000 description 12
- 238000005499 laser crystallization Methods 0.000 description 12
- 230000008025 crystallization Effects 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 9
- 238000011161 development Methods 0.000 description 7
- 239000010408 film Substances 0.000 description 6
- 239000013081 microcrystal Substances 0.000 description 6
- 230000005855 radiation Effects 0.000 description 6
- 238000010923 batch production Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 230000006911 nucleation Effects 0.000 description 5
- 238000010899 nucleation Methods 0.000 description 5
- 238000013461 design Methods 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000001143 conditioned effect Effects 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000005496 tempering Methods 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000008602 contraction Effects 0.000 description 2
- 238000006356 dehydrogenation reaction Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 2
- 239000007790 solid phase Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 108090000862 Ion Channels Proteins 0.000 description 1
- 102000004310 Ion Channels Human genes 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02686—Pulsed laser beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Optics & Photonics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Thin Film Transistor (AREA)
Abstract
Said polysilicon thin film transistor making method makes patterning to non-crystalline silicon layer after forming non-crystalline silicon layer on substrate to form silicon island graphic, advance defining out assembly active area. Then said method utilizes single shot long pulse laser bean to radiate silicon island graphic, to induce silicon island generating super transverse direction long glittering acting, converting non-crystalline silicon to polysilicon, finally according to sequence to proceed follow-up thin film transistor making process to complete polysilicon thin film transistor manufacture.
Description
Technical field
The invention relates to a kind of manufacture method of polycrystalline SiTFT, and particularly a kind of polysilicon membrane manufacture method with super horizontal long Jingjing grain of regular distribution, in the manufacturing that is applied to the large tracts of land TFT thin film transistor monitor.
Background technology
Polysilicon (poly-silicon) is because of having the electrical characteristic that is better than amorphous silicon, and the cost advantage that is lower than monocrystalline silicon, thereby on the film crystal pipe manufacturer, extensively paid attention in recent years, especially drive in the application of LCD (TFT-LCD) at thin-film transistor.
Yet, the particle diameter of polysilicon crystal (grain size) size directly has very big influence for electron mobility (mobility) and component characteristic, therefore, how to increase the crystallization size of microcrystal of polysilicon, to promote the lifting of thin-film transistor component characteristic, be exactly considerable development trend in the polysilicon membrane manufacturing technology now.With the display technology is example, makes dynamical thin-film transistor, to develop more high performance flat-panel screens, is exactly the pointer of display technology development at present.
To make the method for polysilicon membrane be solid phase crystallization method (Solid PhaseCrystallization) to tradition in the past, yet because the highest bearing temperature of glass substrate has only 650 ℃ approximately, so kind method and be not suitable for flat-panel screens and make.In addition, the method that also has direct vapour deposition polysilicon membrane.No matter but be above-mentioned solid phase crystallization method the or directly crystal grain of the formed polysilicon of vapour deposition process is all quite little, particle diameter has only 100nm approximately, and is therefore not good with the formed polysilicon membrane characteristic of these methods.
In the making of polysilicon membrane, that the most generally use is excimer laser tempering (Excimer Laser Anneal at present; ELA) technology is though getable polysilicon grain particle diameter Yue Keda 600nm still is apparent not enough for developing more high performance flat-panel screens.Simultaneously, general existing excimer laser tempering technology all must improve the unstable shortcoming of laser energy skewness and energy output by the radiation modality of high-repetition-rate, produces with the phenomenon that reduces the size of microcrystal skewness.
Wherein, size of microcrystal problem of uneven distribution, direct electrical uniformity and the critical voltage of inter-module or the consistency of the subcritical value of swinging of infringement assembly, and the making quality when influencing display towards the large tracts of land development.In addition, the excimer laser tempering manufacturing process of high-repetition-rate irradiation also can cause the raising of cost of manufacture and productivity ratio to reduce, thereby be unfavorable for the batch process of large tracts of land display more.
Summary of the invention
One of purpose of the present invention is that a kind of manufacture method of polycrystalline SiTFT is being provided, the polysilicon membrane that has super horizontal long Jingjing grain with formation, and the polysilicon grain that forms also has the uniform characteristic of queueing discipline and particle size distribution simultaneously, thereby the thin-film transistor electrical quality of producing is significantly improved.The present invention utilizes the formation of amorphous silicon silicon island figure, and cooperates selecting for use of single-shot Long Pulse LASER bundle, to bring out the brilliant behavior of super horizontal length takes place in the amorphous silicon silicon island, and produces polysilicon membrane.
According to above-mentioned purpose, the present invention proposes a kind of manufacture method of polycrystalline SiTFT.According to preferred embodiment of the present invention is to form an amorphous silicon layer earlier on substrate, then, amorphous silicon layer is carried out patterning, makes to form amorphous silicon silicon island figure on substrate, to define the assembly active area.Wherein, the material of substrate is for example to be glass.Then, utilize single-shot Long Pulse LASER bundle, irradiation amorphous silicon silicon island figure makes to bring out to produce the brilliant behavior of super horizontal length in the figure of amorphous silicon silicon island, so amorphous silicon promptly changes polysilicon into.
Above-mentioned amorphous silicon silicon island figure is for example to be a long strip type structure, after amorphous silicon silicon island figure forms molten state by LASER HEATING, will be then by the long side position of silicon island figure, cool off toward the silicon island central interior gradually, so, crystallization behavior in the figure of amorphous silicon silicon island just for crystallizing into epipole by producing earlier on the long side of amorphous silicon silicon island figure, carries out laterally long brilliant then gradually toward the inside of this silicon island figure.So, promptly form polysilicon membrane, and polysilicon grain also presents the arrangement of rule with super horizontal long Jingjing grain.
Light source as for single-shot Long Pulse LASER bundle is an excimer laser of for example using chlorination xenon (XeCl) ultraviolet source, simultaneously, the laser beam of also selecting about 100～200ns of burst length for use is as the Long Pulse LASER bundle, so that significantly increase the heating time of amorphous silicon, and the time of prolongation amorphous silicon fusion-crystallization, and then impel crystal grain-growth.
In addition, before above-mentioned amorphous silicon layer forms, also can form a resilient coating earlier on substrate, with isolated substrate itself to establishment of component the pollution that may cause, and, make after the amorphous silicon silicon island changes polysilicon in LASER HEATING, can then carry out general thin-film transistor and make flow process, to finish complete thin-film transistor component manufacturing; For example, the formation of gate pole oxidation layer, the making of gate metal, ion implantation step, dielectric layer form, contact window defines and source/steps such as drain metal making.
In addition, have channel region, source area and drain area in the silicon island figure in order to the definitions component active area, the silicon island figure that belongs to channel region then for example can be single long strip type structure or a plurality of strip structure.Wherein, if have the channel region of a plurality of strip structures, promptly be represented as the design of multiple channel kenel, and, the minor face of each the long strip type structure that is connected with source area or drain area all must be less than the twice of the brilliant length of horizontal length of the brilliant behavior of the super horizontal length of polysilicon, so, the brilliant behavior of horizontal length of the polysilicon in can regular control channel district, and obtain particle size distribution very evenly and crystal grain arrange the quite polysilicon of rule.
Production method according to the polycrystalline SiTFT of the invention described above, be with general assembly active region definition step, before carrying out, finishes the LASER HEATING processing procedure in advance, therefore, when carrying out laser radiation, nature produces the different temperature province of heat radiation situation and distributes in the structure of silicon island, and is controlled crystal grain nucleation site and crystal grain-growth direction, and impels the brilliant behavior of horizontal length to take place.Simultaneously, because the use of Long Pulse LASER bundle can impel more thermal energy to be passed on the material of amorphous silicon below, thereby not only can prolong the crystal grain-growth time, and, also be able to and then improve laser energy be distributed in uniformity in the crystal silicon layer.So, the particle diameter that more helps to promote the crystal silicon layer crystallization behavior is significantly grown up, in addition, also can reduce the phenomenon of laser energy transmission and skewness, and promote the homogeneity of crystal silicon layer crystallization behavior, to form the polysilicon membrane that crystal grain is evenly distributed.So the present invention only need use the single-shot laser beam, can reach good laser crystallization effect, so, will exempt the demand of laser beam palpus reirradiation, and effectively reduce cost of manufacture, and then help the batch process development of large tracts of land display.
In addition, if in the laser crystallization processing procedure, adopt general short pulse laser beam, not only can't bring out crystal silicon layer and produce the good brilliant behavior of horizontal length, even can cause the variations in temperature that takes place in the figure of silicon island rapidly, and the phenomenon of contraction distortion appears, so that influences the dimension definitions of assembly active area, and then destroys the quality that the subsequent thin film transistor component makes and the electrical performance of product.Therefore, the present invention proposes the employing of Long Pulse LASER bundle especially, also have can make the laser crystallization processing procedure after, the silicon island figure is still kept good purpose.
So, adopt method of the present invention, need not change or influence the conditioned disjunction number that general polycrystalline SiTFT is made flow process, can make the good polycrystalline SiTFT assembly of electrical quality.Even, channel architecture can be designed to the kenel of multiple channel, by the control of each channel width, make promote more that polysilicon grain particle diameter and crystal grain arranges all once.Therefore, if the manufacture method of polycrystalline SiTFT of the present invention is applied in the manufacturing of display product, the subassembly product of high-performance, high additive value be must help to produce, simultaneously, the development and the batch process of display large tracts of landization also very helped.
Description of drawings
For above-mentioned feature of the present invention, method, purpose and advantage can be become apparent, conjunction with figs. is illustrated as follows:
Fig. 1 is the flow chart of steps according to a kind of polycrystalline SiTFT manufacture method of the present invention's first preferred embodiment;
Fig. 2 A is the part flow process generalized section of making according to a kind of polycrystalline SiTFT of the present invention's first preferred embodiment;
Fig. 2 B amplifies schematic top plan view according to the crystalline texture in a kind of polycrystalline SiTFT of the present invention's first preferred embodiment;
Fig. 3 is the flow chart of steps according to a kind of polycrystalline SiTFT manufacture method of the present invention's second preferred embodiment;
Fig. 4 A～4B is the making flow process generalized section according to a kind of polycrystalline SiTFT of the present invention's second preferred embodiment;
Fig. 5 A amplifies schematic top plan view according to the assembly active area of a kind of polycrystalline SiTFT of the present invention's second preferred embodiment;
Fig. 5 B is that the assembly active area of the not good polycrystalline SiTFT of a kind of crystallization control is amplified schematic top plan view; And
Fig. 5 C amplifies schematic top plan view according to a kind of assembly active area with double-channel structural design of the present invention's second preferred embodiment.
Description of reference numerals:
111～114,311～319: step
200,400: substrate 202,503: silicon island
202a: edge, long limit 210,410: laser beam
401: resilient coating 402: amorphous silicon layer
403: polysilicon silicon island 403s, 503s: source area
403d, 503d: drain area 404: gate pole oxidation layer
405: gate metal 406: dielectric layer
407: contact window 409: source/drain metal
503a: small grains district 503b: crystal boundary
503c, 503c ': channel region
Embodiment
The present invention proposes a kind ofly can to increase the polysilicon crystal particle diameter simultaneously, and the manufacture method that improves the polycrystalline SiTFT of crystallization particle diameter distribution consistency degree.Before the laser crystallization processing procedure carries out, finish the graphical definition step of assembly active area earlier, to form amorphous silicon silicon island structure, and then utilize the laser beam of long pulse (long pulse), LASER HEATING is carried out in the amorphous silicon silicon island, impel the brilliant behavior of super horizontal length takes place in the amorphous silicon silicon island, and change polysilicon structure into, last directly the cooperation gone up general thin-film transistor manufacturing process, can produce a polycrystalline SiTFT.Below will be described in detail method of the present invention with embodiment.
Embodiment 1:
The invention discloses a kind of manufacture method of polycrystalline SiTFT, cooperation is with reference to shown in Fig. 1, Fig. 2 A and Fig. 2 B, wherein, Fig. 1 is the flow chart of steps according to a kind of polycrystalline SiTFT manufacture method of the present invention's first preferred embodiment, Fig. 2 A then is the part flow process generalized section of making according to a kind of polycrystalline SiTFT of the present invention's first preferred embodiment, then is to amplify schematic top plan view according to the crystalline texture in a kind of polycrystalline SiTFT of the present invention's first preferred embodiment as for Fig. 2 B.
At first, the amorphous silicon layer that carries out among Fig. 1 forms step 111, then, amorphous silicon layer is carried out the patterning step 112 of definitions component active area, to form amorphous silicon silicon island figure; Cooperation is and forms amorphous silicon silicon island 202 on substrate 200 with reference to Fig. 2 A.Wherein, substrate 200 for example is a glass material, and the manufacture method of amorphous silicon silicon island 202 is for example to adopt plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Phase Deposition earlier; PECVD) or physical vapour deposition (PVD) (Physical Vapor Deposition; PVD) technology forms amorphous silicon layer, and then with traditional gold-tinted etch process, amorphous silicon layer is carried out the patterning step of definitions component active area, to finish the making of amorphous silicon silicon island 202.In addition, can after amorphous silicon layer forms, carry out a dehydrogenation step, the quick-fried phenomenon of hydrogen can not occur in order to follow-up laser processing procedure.
Then, carry out the LASER HEATING step 113 among Fig. 1, and cooperate shown in Fig. 2 A, utilize the laser beam 210 of single-shot long pulse especially, amorphous silicon silicon island 202 is shone, make to bring out to produce the brilliant behavior of super horizontal length in the amorphous silicon silicon island 202, wherein, the light source of laser beam 210 then is an excimer laser of for example using chlorination xenon (XeCl) ultraviolet source.
Because the silicon island structure that amorphous silicon silicon island 202 is had, can make amorphous silicon receive laser energy, and after the formation molten state, the edge by amorphous silicon silicon island 202 begins earlier, cools off towards central authorities gradually, so, after LASER HEATING is carried out, the edge generation that crystallization nucleation is named a person for a particular job and is controlled in amorphous silicon silicon island 202, then, laterally long brilliant behavior takes place by the past center direction in the edge of amorphous silicon silicon island 202 in beginning.
Simultaneously, because the present invention finds to select for use the laser beam 210 of long pulse to carry out the LASER HEATING processing procedure, will be because of the prolongation of laser pulse duration (pulse duration), and significantly increased the heating time of amorphous silicon, to increase the time of amorphous silicon fusion-crystallization, and, also be enough to make the obtainable laser energy of crystal silicon layer institute to increase; In addition, also can impel more thermal energy to be passed on the material of amorphous silicon below, and and then improve laser energy and be distributed in uniformity in the crystal silicon layer.So, the particle diameter that can not only help to promote the crystal silicon layer crystallization behavior is grown up, and effectively increase the brilliant scope of horizontal length in the amorphous silicon silicon island 202, to obtain to have the polysilicon membrane of super horizontal long Jingjing grain, in addition, also can reduce the phenomenon of laser energy transmission and skewness, and promote the homogeneity of crystal silicon layer crystallization behavior, to form crystal grain distribution polysilicon membrane comparatively uniformly.So in laser crystallization process of the present invention, only need to use the single-shot laser beam, can reach good laser crystallization effect.
In addition, if in the laser crystallization processing procedure, directly adopt general short pulse laser beam, for example the burst length is less than the laser beam of 50ns, can't bring out crystal silicon layer and produce the good brilliant behavior of horizontal length, and as easy as rolling off a log at the most tiny crystal grain of the edge of amorphous silicon silicon island 202 appearance, cause forming polysilicon membrane with irregular nucleation density, reduce crystalline quality, even influence the uniformity that size of microcrystal distributes.Even more serious is, in case after adopting short pulse laser beam to carry out LASER HEATING, the silicon island figure will be because of variations in temperature rapidly, produce the phenomenon of contraction distortion, so that cause the shape of silicon island figure and size to change, and influence the dimension definitions of assembly active area, and then destroy the quality that the subsequent thin film transistor component makes and the electrical performance of product.
Therefore, the present invention proposes to adopt the laser beam of long pulse especially, being preferably and for example selecting the burst length for use is the laser beam of 100～200ns, to carry out the laser crystallization processing procedure of amorphous silicon silicon island 202, make amorphous silicon silicon island 202 when the good brilliant behavior of horizontal length takes place, still keep fixing silicon island figure and size.
Usually the silicon island structure of definitions component active area is a long strip type structure, as shown in Fig. 2 A, promptly presents three-dimensional cross-section structure for minor face (width) the W side by silicon island 202.Wherein, because the long limit (not shown) length of silicon island 202 is much larger than the length of minor face W, therefore, betide the laser crystallization behavior in the silicon island 202, with main nucleating point master control by the long side that comes across silicon island 202, and produce the brilliant behavior of length of laterally growing up toward central interior by long limit, 202 both sides, silicon island, for example shown in the arrow points among Fig. 2 A.
If cooperate B again with reference to Fig. 2, can obviously find out the polysilicon crystal state in the silicon island 202, the plan structure that is Fig. 2 A shown in Fig. 2 B, wherein, therefore the long limit L of silicon island 202, is presented in the crystal grain crystallization direction in the silicon island 202 greater than broadside W, as one man be to grow limit edge 202a towards internal growth, and make the crystal grain in the silicon island 202 regularly arranged by the silicon island.
At last, recall Fig. 1, when finishing LASER HEATING step 113, and amorphous silicon silicon island 202 is transformed into after the polysilicon kenel, just can then carry out step 114, that is proceed the manufacturing process of general thin-film transistor, to finish the making of polycrystalline SiTFT.
Method according to above-mentioned present embodiment, because before the LASER HEATING processing procedure, just define the assembly active area of silicon island figure in advance, therefore, can make and produce the different temperature province of rate of heat dispation in the silicon island after the laser radiation and distribute, and well control crystal grain nucleation site in the silicon island, and the horizontal growth direction of crystal grain, simultaneously, in conjunction with selecting for use of Long Pulse LASER bundle, so can produce polysilicon membrane, for example can obtain the polysilicon membrane that particle diameter reaches several micron grade, and the polysilicon membrane of producing also have crystal grain queueing discipline and the uniform characteristic of grain size distribution with super horizontal long Jingjing grain.
So, by method of the present invention, need not change or influence the conditioned disjunction number that general polycrystalline SiTFT is made flow process, can make the good polycrystalline SiTFT assembly of electrical quality.
Embodiment 2:
The present invention discloses the manufacture method of another kind of polycrystalline SiTFT again, is preferred embodiment with the transistor of upper strata gate (topgate) structure, cooperates with reference to shown in Fig. 3 and Fig. 4 A～4B.Wherein, Fig. 3 is the flow chart of steps according to a kind of polycrystalline SiTFT manufacture method of the present invention's second preferred embodiment, and Fig. 4 A～4B then is the making flow process generalized section according to a kind of polycrystalline SiTFT of the present invention's second preferred embodiment.
At first, carry out the resilient coating among Fig. 3 and the formation step 311 of amorphous silicon layer, cooperate shown in Fig. 4 A, be and form resilient coating 401 and amorphous silicon layer 402 respectively in regular turn on substrate 400; Wherein, substrate 400 equally for example is a glass material, and resilient coating 401 then for example can be silicon oxide film.Then, carry out the patterning step 312 of definitions component active area, that is to amorphous silicon layer 402 patternings to form amorphous silicon silicon island figure on resilient coating 401.In addition, also can after amorphous silicon layer 402 forms, carry out a dehydrogenation step immediately, the quick-fried phenomenon of hydrogen can not occur in order to follow-up laser processing procedure.
Then, carry out the LASER HEATING step 313 among Fig. 3, utilize the laser beam 410 of single-shot long pulse, the amorphous silicon silicon island is shone, as described in first embodiment, produce the brilliant behavior of super horizontal length in the amorphous silicon silicon island to bring out, so, the amorphous silicon silicon island is promptly changed the polysilicon attitude into, and becomes the polysilicon silicon island 403 among Fig. 4 B.Wherein, amorphous silicon silicon island figure is a long strip type structure, and the length of the long limit L of silicon island figure must be obviously greater than the length of the minor face of silicon island figure, therefore, by 403 inside, polysilicon silicon island that the amorphous silicon silicon island is transformed into, will have regularly arranged super horizontal long Jingjing grain (as the grainiess shown in Fig. 2 B).The structure that Fig. 4 A and Fig. 4 B are illustrated, i.e. sectional structure chart for blocking by the long limit L side of silicon island.
When finishing LASER HEATING step 313, and amorphous silicon is transformed into after the polysilicon, can follows the follow-up making flow process of carrying out thin-film transistor again, and cooperate with reference to the structure shown in Fig. 4 B.The processing procedure of continuation after step 313, formation step 314 for gate pole oxidation layer (gate oxide), for example utilize the mode of chemical vapour deposition (CVD) to form a gate pole oxidation layer 404, make to be covered on polysilicon silicon island 403 figures and the resilient coating 401, the material of gate pole oxidation layer 404 generally is for example to be silicon oxide film.
Then, carry out step 315, on gate pole oxidation layer 404, form gate metal (gatemetal) 405, wherein, gate metal 405 is to utilize the mode of physical gas phase deposition technology and graphical definition to be produced, the material of gate metal 405 then is the good metal of conductivity, for example aluminium (Al), molybdenum (Mo) or molybdenum tungsten compound (MoW).Then, carry out the step 316 that ion is implanted again, use the method for implanting ions, with gate metal 405 is the cover curtain, respectively ion implantation is carried out in the polysilicon silicon island 403 of gate metal 405 both sides, to define source region (source region) 403s and drain zone (drain region) 403d.
After source/drain zone definitions is finished, promptly carry out the formation step 317 of dielectric layer, for example utilize plasma enhanced chemical vapor deposition method dielectric layer 406 on gate metal 405 and gate pole oxidation layer 404; Then, carry out step 318, simultaneously with dielectric layer 406 giving graphically, to form the contact window (contact hole) 407 that can expose source area 403s and drain area 403d with gate oxide 404, wherein, the material of dielectric layer 406 is the preferable silicon oxide films that for example can be.
At last, carry out the making step 319 of source/drain metal again, source/drain metal 409 is formed on the dielectric layer 406, and among the contact window 407, contacting with source area 403s and drain area 403d.Here the material of the source of indication/drain metal 409 is the good metal of conductivity too, for example can be aluminium, molybdenum or molybdenum tungsten compound.By above-mentioned making flow process, just can finish the making of a polycrystalline SiTFT.
Employed Long Pulse LASER bundle in above-mentioned LASER HEATING step 313 wherein, promptly as first embodiment, be that preferable to select the burst length for use be the laser beam of 100～200ns, so that the laser crystallization processing procedure is carried out in the amorphous silicon silicon island, so, can not only impel the amorphous silicon silicon island that the good brilliant behavior of horizontal length takes place, and acquisition has the polysilicon membrane of the size of microcrystal of super horizontal long crystalline substance, simultaneously, also can be after LASER HEATING, still keep fixing silicon island figure and size, to help promoting quality and the product yield that thin-film transistor component is made.
With reference to Fig. 5 A, Fig. 5 A amplifies schematic top plan view according to the assembly active area of a kind of polycrystalline SiTFT of the present invention's second preferred embodiment in addition.Shown in Fig. 5 A, the direction of polysilicon crystal, be that the long side that presents by silicon island 503 carries out the side direction growth toward central interior, thereby, crystal grain in assembly channel region (channel region) 503c is arranged quite rule, and, add that present embodiment is used the laser beam of long pulse, so particle size distribution is also very even.So, but just homogeneous control carrier (carrier) the channel region 503c that flows through, and when being to and between source area 503s and the drain area 503d, the required crystal boundary 503b number that passes through, and then effectively improve the electrical performance of assembly.
In addition, if when channel width W (silicon island minor face) occurring, when obviously laterally growing up the situation of length g, will influence the effect of the above-mentioned super horizontal growth of crystal grain, shown in Fig. 5 B greater than polysilicon grain.In Fig. 5 B, because channel width W is obviously greater than the crystal grain length g that laterally grows up, therefore, the polysilicon grain that produces in the channel region 503c is only on the long side of silicon island, single time super horizontal growth behavior occurs,, form pycnomorphous small grains (fine grains) district 503a then promptly gradually towards channel inside, cause in silicon island 503, to form the super horizontal growth structure of good polysilicon, even reduce the systematicness of crystal grain arrangement and the uniformity of particle size distribution simultaneously.
For the bad crystalline polamer that prevents to be occurred as among above-mentioned Fig. 5 B, the present invention even also propose the geometry of channel region 503c to be designed to the kenel of multiple channel (multi-channel) is to replace original single channel structure, shown in Fig. 5 C.
In Fig. 5 C, be depicted as the assembly active area schematic top plan view of a pair of channel architecture design, wherein, the first channel region 503c and second channel district 503c ' have independently channel width W1 and channel width W2 separately, if channel width W1 is added that channel width W2 is the overall channel width W of actual component.In addition, no matter be that channel width W1 or channel width W2 all are designed to less than the crystal grain of twice laterally grow up length g (that is W1, W2＜2g).
Because the channel width of each channel is designed to less than the crystal grain of the twice length g that laterally grows up, so, the inside of each channel, with well controlled one-tenth only by two row super horizontal long Jingjing grains complete being covered with of queueing discipline, so, just can have particle size distribution evenly and the polysilicon membrane channel of crystal grain queueing discipline, and then impel carrier in channel, to pass through the crystal boundary 503b number of quantity homogeneous, with the uniformity of effective lifting subassembly electrical performance, make the batch process development of the display that helps large tracts of landization.
Certainly, Fig. 5 C is the illustration model just at one stroke, and the structural design of multiple channel kenel is not limited to the setting of channel number, and emphasis is the notion of dividing by channel width, makes the behavior of laterally growing up of crystal grain in each channel of control.
By the embodiment of the invention described above as can be known, use method of the present invention, be with general assembly active region definition step, before the LASER HEATING processing procedure carries out, promptly finished in advance, therefore, can be utilized the silicon island figure of active area definition, make when laser radiation, nature produces the different temperature province of heat radiation situation and distributes in the structure of silicon island, and is well controlled the crystal grain nucleation site, and the horizontal growth direction of crystal grain.Simultaneously, also in conjunction with the selecting for use of Long Pulse LASER bundle, thus can produce polysilicon membrane with super horizontal long Jingjing grain, and also have the crystal grain queueing discipline by manufactured polycrystalline silicon film of the present invention, and the uniform characteristic of grain size distribution.
So, adopt method of the present invention, need not change or influence the conditioned disjunction number that general polycrystalline SiTFT is made flow process, can make the good polycrystalline SiTFT assembly of electrical quality.In addition,, in crystal silicon layer, transmits phenomenon with skewness so can reduce laser energy also because the use of Long Pulse LASER bundle is to have the effect that can prolong the crystal silicon layer fusion-crystallization time, with so that form the comparatively uniform polysilicon membrane of crystal grain distribution; Therefore, in laser crystallization process of the present invention, only need to use the single-shot laser beam just can reach good laser crystallization effect.
In addition, even channel architecture can be designed to the kenel of multiple channel, utilize the control of each channel width, make promote more size of microcrystal and arrangement all once.Therefore, if the manufacture method of polycrystalline SiTFT of the present invention is applied in the manufacturing of display product, the subassembly product of high-performance, high additive value be must help to produce, simultaneously, the development and the batch process of display large tracts of landization also helped more.
Method of the present invention is not only limited on the film crystal pipe manufacturer that is used in flat-panel screens, and the manufacturing of any polycrystalline SiTFT driven unit all can utilize method of the present invention and significantly promote product usefulness.Though the present invention with embodiment openly as above; right its is not that any people who is familiar with this technology is not in breaking away from creation thought of the present invention and scope in order to qualification the present invention; when can doing various changes and modification, so protection scope of the present invention should be with being as the criterion that claims were defined.
Claims (20)
1. the manufacture method of a polycrystalline SiTFT comprises at least:
Form an amorphous silicon layer on a substrate;
This amorphous silicon layer of patterning forming at least one silicon island figure on this substrate, and defines at least one assembly active area; And
Utilize a single-shot Long Pulse LASER bundle, shine this silicon island figure, make to bring out to produce the brilliant behavior of a super horizontal length in this silicon island figure, so this silicon island figure is transformed into a polysilicon.
2. the method for claim 1 is characterized in that, before the formation step of described amorphous silicon layer, also comprises formation one resilient coating on this substrate.
3. the method for claim 1 is characterized in that, the material of described substrate is a glass.
4. the method for claim 1 is characterized in that, described silicon island figure is a long strip type structure.
5. method as claimed in claim 4, it is characterized in that, the brilliant behavior of the super horizontal length of this that produces in the figure of described silicon island is to form a plurality of epipoles that crystallize on the long side by this silicon island figure, carries out laterally long brilliant then gradually toward the inside of this silicon island figure.
6. the method for claim 1 is characterized in that, figure defined this assembly active area in described silicon island comprises a channel region, one source pole district and a drain area.
7. method as claimed in claim 6 is characterized in that, the silicon island figure of described channel region is single long strip type structure or a plurality of strip structure.
8. method as claimed in claim 7, it is characterized in that, channel region with this long strip type structure is a multiple channel kenel, and connects the minor face of each this long strip type structure of this source area and this drain area, must laterally grow the twice of brilliant length less than one of the brilliant behavior of this super horizontal length.
9. the method for claim 1 is characterized in that, the light source of described single-shot Long Pulse LASER bundle is for using the excimer laser of chlorination xenon (XeCl) ultraviolet source.
10. the method for claim 1 is characterized in that, described single-shot Long Pulse LASER bundle is a laser beam of selecting about 100～200ns of burst length for use.
11. the method for claim 1 is characterized in that, also comprises at least:
Form a gate pole oxidation layer, be covered on this silicon island figure and this substrate;
Form a gate metal on this gate pole oxidation layer, make be positioned at this silicon island figure directly over;
Ion is implanted in the silicon island figure of these gate metal both sides;
Form a dielectric layer on this gate metal and this gate pole oxidation layer;
This dielectric layer of patterning and this gate pole oxidation layer respectively form a contact window with the both sides in this gate metal, and expose this silicon island figure in this contact windows; And
Make two sources/drain metal on this dielectric layer, simultaneously, each this source/drain metal is to be arranged in each this contact window, and is connected with this silicon island figure.
12. the manufacture method of a polycrystalline SiTFT comprises at least:
Form a resilient coating on a substrate;
Form an amorphous silicon layer on this resilient coating;
This amorphous silicon layer of patterning forming at least one rectangular silicon island figure on this resilient coating, thereby defines at least one assembly active area, wherein comprises a channel region, one source pole district and a drain area in this rectangular silicon island figure; And
Utilize a single-shot Long Pulse LASER bundle, shine this rectangular silicon island figure, make to bring out and produce the brilliant behavior of a super horizontal length in this rectangular silicon island figure, wherein, the brilliant behavior of this super horizontal length that is produced in this rectangular silicon island figure, be to form a plurality of epipoles that crystallize on the long side by this rectangular silicon island figure, carry out laterally long brilliant then gradually toward the inside of this rectangular silicon island figure.
13. method as claimed in claim 12 is characterized in that, the material of described substrate is a glass.
14. method as claimed in claim 12 is characterized in that, this channel region in the figure of described rectangular silicon island is to have single long strip type structure or a plurality of strip structure.
15. method as claimed in claim 14, it is characterized in that, this channel region with this long strip type structure is a multiple channel kenel, and connects the minor face of each this long strip type structure of this source area and this drain area, must laterally grow the twice of brilliant length less than one of the brilliant behavior of this super horizontal length.
16. method as claimed in claim 12 is characterized in that, the light source of described single-shot Long Pulse LASER bundle is for using the excimer laser of chlorination xenon (XeCl) ultraviolet source.
17. method as claimed in claim 12 is characterized in that, described single-shot Long Pulse LASER bundle is a laser beam of selecting about 100～200ns of burst length for use.
18. method as claimed in claim 12 is characterized in that, also comprises at least:
Form a gate pole oxidation layer, be covered on this rectangular silicon island figure and this resilient coating;
Form a gate metal on this gate pole oxidation layer, make the channel region that is positioned at this rectangular silicon island figure directly over;
Ion is implanted in the rectangular silicon island figure of these gate metal both sides;
Form a dielectric layer on this gate metal and this gate pole oxidation layer;
This dielectric layer of patterning and this gate pole oxidation layer respectively form a contact window with the both sides in this gate metal, and expose this rectangular silicon island figure in this contact windows; And
Make two sources/drain metal on this dielectric layer, simultaneously, each this source/drain metal is to be arranged in each this contact window, thereby is connected with this rectangular silicon island figure.
19. the manufacture method of the polycrystalline SiTFT assembly of a upper strata gate (top gate) structure comprises at least:
Form a resilient coating on a substrate;
Form an amorphous silicon layer on this resilient coating;
This amorphous silicon layer of patterning forming at least one silicon island figure on this resilient coating, thereby defines at least one assembly active area, wherein comprises a channel region, one source pole district and a drain area in this silicon island figure;
Utilize a single-shot Long Pulse LASER bundle, shine this silicon island figure, make to bring out to produce the brilliant behavior of a super horizontal length in this silicon island figure, so this silicon island figure is transformed into a polysilicon;
Form a gate pole oxidation layer, be covered on this silicon island figure and this resilient coating;
Form a gate metal on this gate pole oxidation layer, make this channel region of being positioned at this silicon island figure directly over;
Ion is implanted in this silicon island figure of these gate metal both sides;
Form a dielectric layer on this gate metal and this gate pole oxidation layer;
This dielectric layer of patterning and this gate pole oxidation layer respectively form a contact window with the both sides in this gate metal, and expose this silicon island figure in this contact windows; And
Make two sources/drain metal on this dielectric layer, simultaneously, each this source/drain metal is to be arranged in each this contact window, thereby is connected with this silicon island figure.
20. method as claimed in claim 19 is characterized in that, described single-shot Long Pulse LASER bundle is a laser beam of selecting about 100～200ns of burst length for use.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510051939 CN100511606C (en) | 2005-02-17 | 2005-02-17 | Method for producing polycrystalline thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510051939 CN100511606C (en) | 2005-02-17 | 2005-02-17 | Method for producing polycrystalline thin film transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1822334A true CN1822334A (en) | 2006-08-23 |
| CN100511606C CN100511606C (en) | 2009-07-08 |
Family
ID=36923532
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200510051939 Expired - Fee Related CN100511606C (en) | 2005-02-17 | 2005-02-17 | Method for producing polycrystalline thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100511606C (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9190278B2 (en) | 2013-04-12 | 2015-11-17 | Everdisplay Optronics (Shanghai) Limited | Device and method for improving crystallization |
| CN106033707A (en) * | 2015-03-10 | 2016-10-19 | 上海和辉光电有限公司 | Preparation method for polysilicon film |
| WO2017124603A1 (en) * | 2016-01-21 | 2017-07-27 | 武汉华星光电技术有限公司 | Method for manufacturing low-temperature polysilicon tft substrate and low-temperature polysilicon tft substrate |
| DE112020003824B4 (en) | 2019-09-23 | 2024-03-28 | International Business Machines Corporation | Method for producing MRAM devices containing a hardened gap filler dielectric material |
-
2005
- 2005-02-17 CN CN 200510051939 patent/CN100511606C/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9190278B2 (en) | 2013-04-12 | 2015-11-17 | Everdisplay Optronics (Shanghai) Limited | Device and method for improving crystallization |
| CN106033707A (en) * | 2015-03-10 | 2016-10-19 | 上海和辉光电有限公司 | Preparation method for polysilicon film |
| WO2017124603A1 (en) * | 2016-01-21 | 2017-07-27 | 武汉华星光电技术有限公司 | Method for manufacturing low-temperature polysilicon tft substrate and low-temperature polysilicon tft substrate |
| DE112020003824B4 (en) | 2019-09-23 | 2024-03-28 | International Business Machines Corporation | Method for producing MRAM devices containing a hardened gap filler dielectric material |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100511606C (en) | 2009-07-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1078014C (en) | Semiconductor device and process for fabricating the same | |
| CN1252796C (en) | Method for making amorphous silicon crystalize using mask | |
| KR100274293B1 (en) | Crystalline semiconductor film forming method, thin film transistor manufacturing method, solar cell manufacturing method and active matrix liquid crystal device | |
| CN1187791C (en) | Method for crystallizing silicon layer | |
| CN1311563C (en) | Thin film transistor and method for manufacturing the same | |
| JP4190798B2 (en) | Thin film transistor and manufacturing method thereof | |
| KR20010039865A (en) | Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film | |
| US7087964B2 (en) | Predominantly <100> polycrystalline silicon thin film transistor | |
| US6015720A (en) | Method of forming polycrystalline semiconductor thin film | |
| CN100356509C (en) | Method for forming polycrystalline silicon film | |
| CN1929151B (en) | Thin film transistor and method of manufacturing the same, semiconductor device and display | |
| US20020117666A1 (en) | Method of forming thin film transistors on predominantly <100> polycrystalline silicon films | |
| CN1822334A (en) | Method for producing polycrystalline thin film transistor | |
| CN1157765C (en) | Method for manufacturing crystal semiconductor material and method for making semiconductor device | |
| JPH06275806A (en) | Semiconductor circuit and its manufacture | |
| JP4316149B2 (en) | Thin film transistor manufacturing method | |
| CN1126154C (en) | Method of manufacturing semiconductor device | |
| JP3403994B2 (en) | Semiconductor circuit | |
| TW200841474A (en) | Method for fabricating thin film transistors | |
| KR100634541B1 (en) | Fabrication method of poly crystalline si | |
| TWI229386B (en) | Method for manufacturing polysilicon film on substrate | |
| JPS6288365A (en) | Manufacture of thin film transistor | |
| JPH06275805A (en) | Semiconductor circuit and its manufacture | |
| JP4701467B2 (en) | Polycrystalline film manufacturing method and semiconductor device manufacturing method | |
| KR20120106030A (en) | Selective thin film crystalization method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090708 Termination date: 20180217 |