CN1811719A - Method for detecting and intervening deadlock of single-threading microprocessor - Google Patents
Method for detecting and intervening deadlock of single-threading microprocessor Download PDFInfo
- Publication number
- CN1811719A CN1811719A CN 200610055169 CN200610055169A CN1811719A CN 1811719 A CN1811719 A CN 1811719A CN 200610055169 CN200610055169 CN 200610055169 CN 200610055169 A CN200610055169 A CN 200610055169A CN 1811719 A CN1811719 A CN 1811719A
- Authority
- CN
- China
- Prior art keywords
- task
- cpu
- time
- deadlock
- timer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Debugging And Monitoring (AREA)
Abstract
Present invention relates to a simple microprocessor deadlock detection and intervene method, for solving deadlock in system. It contains opening timer resource and initialisation utilized physics internal storage location timer before initiating task obtaining CPU time, proceeding accumulation clocking to physics internal storage location timer in timer interruption service program according to current task running status, continuously circular checking CPU occupied utilized time unless current operational task normal ending, if exceeding configured maximal operation time, then regarding deadlock occurring, thereby ending deadlock task and taking CPU time to followed task to continue execute. Said technology only uses less resource, such as a whole flag bit, a physics memory timer and timer resource.
Description
Technical field
The present invention relates to the microprocessor technology field, relate in particular to a kind of Deadlock Detection and the interference method of the typical case of single-threading microprocessor system as single-chip microcomputer.
Background technology
The thread of microprocessor is meant an implementation of program, and in single-threading microprocessor such as single-chip microcomputer, program is current can only carry out an instruction.This single-threading microprocessor advantages such as little, powerful, cheap and exploitation is convenient because of its volume have been widely used in some portable, long-range unattended duty instrument and meter systems.
Described deadlock, it has been generally acknowledged that be present in more with the corresponding multithreaded microprocessor of single-threading microprocessor in, be that each thread in two or more threads is all waiting for that another one thread wherein discharges certain common resource of using and is blocked, and makes each thread all can't continue next step implementation.It has been generally acknowledged that, the generation of deadlock must be satisfied four necessary conditions: (resource can only be distributed to certain task or free time of determining in mutual exclusion, resource can not be that two tasks occupy simultaneously), must seize that (resource is seized, can only be occupied its task discharge voluntarily), take and wait for and (occupy the other new resources of task requests of some resource, and these resources occupy for other tasks), circular wait (exists one group of resource request { P1, P2, Pn}, wherein P1 waits for the resource that P2 occupies, P2 waits for the resource that P3 occupies,, Pn waits for the resource that P1 occupies).The generation meeting of deadlock has brought great danger to system, directly causes system crash, can't normally move.Since nineteen sixty-five Dijkstra proposes the deadlock problem, through years of development, on multithreaded microprocessor, accumulated some reasonable Deadlock Detection and interventions, the method for software aspect is arranged, the method that hardware aspect is also arranged is as Petri net, automat and graph theory etc.; These methods are mainly reflected in three aspects: prevention, and to avoid and detect and recover, these are handled all is that resource with the consumption microprocessor is a cost as thread, internal memory etc.
The structures shape of single-threading microprocessor its satisfied most of conditions in deadlock four key elements, can not seize and take also wait task as mutual exclusion, resource finishes, and because software systems and hardware are closely related, every next execution in step often depends on the state of outside level signal, and this has satisfied the another one condition of deadlock again: circular wait.Therefore, the deadlock of this type of microprocessor needs a detection method efficiently, and can carry out the mechanism that the oneself intervenes, recovery system function after deadlock takes place.But because the resource of single-threading microprocessor is less, as typical MCS-51 single-chip microcomputer, 256 byte RAM and 2 timers are only arranged in the sheet, the PIC series monolithic of Microchip company, 1K left and right sides byte RAM and 2-4 timer etc. only in its sheet, can't mention in the same breath with multithreaded microprocessor, so in the multi-threaded system be that the Deadlock Detection and the interfering system of cost obviously can not be applied in the single-threading microprocessor system with the resource.
In sum, need a kind of simple and practical, single-threading microprocessor deadlock detection method that resource requirement is few.
Summary of the invention
The purpose of this invention is to provide a kind of with task run maximum time demand as the main Rule of judgment of Deadlock Detection, thereby can carry out Deadlock Detection to task in the system of this type of clue execution, the deadlock detection method of the single-threading microprocessor of the normal operation of safeguards system simple and effectively.
The objective of the invention is by the following technical solutions to realize with step.
1) chip external memory is preserved maximum working time of the demand of each specific tasks of single-threading microprocessor, read-write modification according to its system configuration.
2) single-threading microprocessor system on-chip timer resource, as task timing resource, when regularly interrupting taking place, interrupt service routine is to n task timing of current operation.
When 3) n task takies CPU time and handle, be interrupted maximum working time of the demand of checking whether its CPU time that has taken surpassed that this task allows.If surpassed, think that then deadlock situation has taken place n task, intervene then and recover the resource that n task used.
Because the present invention has adopted above-mentioned measure, make the present invention compared with prior art, effectively having overcome in the multi-threaded system with the resource is the Deadlock Detection and the interfering system shortcoming of cost, and be successfully applied to the Deadlock Detection and the interference method of single-threading microprocessor single-chip microcomputer in the single-threading microprocessor system, both simple and practical, save a large amount of resources again, performance is significantly improved, thereby solves the deadlock situation in this type systematic.
Description of drawings
Fig. 1 is a single-threading microprocessor deadlock detection method structural representation of the present invention.
Fig. 2 is a single-threading microprocessor task module deadlock detection method process flow diagram of the present invention.
Fig. 3 is a single-threading microprocessor Deadlock Detection timing process flow diagram of the present invention.
Embodiment
Fig. 1 is a Deadlock Detection structural representation of the present invention, and data storage device 101 is preserved the maximum CPU time demand of each specific tasks among the figure, can set in advance, also can dynamically adjust in program operation process.N task run of single-threading microprocessor 102 expression current tasks take the All Time of CPU; only when processor interrupts taking place; just give interrupt service routine CPU time uses temporarily; interrupt service routine carries out processing such as scene protection; after finishing, give current n task CPU time again and continue to use CPU time.Resource 103 is important physical resources of the present invention during the microprocessor physical set, is operated in interrupt mode, the CPU service time of depriving current task when interrupting taking place.
Fig. 2 is a task module deadlock detection method process flow diagram of the present invention.The present invention is described in more detail below in conjunction with accompanying drawing 2.
Step 201: before n the task run, global flag position of system assignment and physical memory timer, wherein the global flag position is used to refer to that n task is current to have obtained CPU service time, and the physical memory timer is used for CPU time timing that this task is used.
Step 202: outside sheet, read maximum working time the data-carrier store, and be saved in the appointment physical memory addresses corresponding to n task.Be used for the Rule of judgment parameter that this task is used CPU time this maximum working time.
Step 203:, pick up counting from the numerical value of some settings to the physical memory timer initializing resource of system assignment.
Step 204: the global flag position to system assignment is provided with, and the indication CPU time is used by n task.In the timer interrupt service routine, whether this zone bit has determined CPU timing service time to n task.
Step 205: allow maximum CPU to compare service time to the CPU time of n task use and this task of setting, deadlock situation has taken place if the timing result of current physical memory timer resource greater than the maximum time demand of setting, then illustrates; If do not surpass the maximum time demand, then continue to carry out the code operation of this task.
Step 206: n task used the CPU time of microprocessor, finishes corresponding task, withdraws from up to normally finishing.If circulation is carried out once normally not finish and withdrawed from, then jump to step 205.
Step 207: when n task generation deadlock, force to finish this task, in this step n the employed resource of task reinitialized, be convenient to the continuation operation of next order n task by step 205.Fig. 3 is a single-threading microprocessor Deadlock Detection timing process flow diagram of the present invention.Among the figure, the CPU working time that current task has been deprived in step 301 expression timing interruption, handing to regularly, interrupt service routine uses.In the step 302, the n task physical memory timer resource of normal operation is added up to handle, thereby obtain the CPU time that this task is used.
Claims (5)
1. a single-threading microprocessor system deadlock detects and interference method, it is characterized in that described method comprises following steps:
[1] task obtained CPU before service time, and the timer of initialization task running mark and physical memory unit is complied with the maximum cpu demand time that its system configuration reads setting from data-carrier store;
[2] in the timing interrupt service routine of little processing, according to the task run state flag bit, to the timing that adds up of the task timer of physical memory unit;
[3] task obtains CPU time, unless normal termination, otherwise in task circular test its take CPU time and whether surpass the maximum cpu demand time of setting, if surpass, illustrate that then deadlock situation has taken place current task, finish its CPU service time by force, give follow-up work and continue to carry out.
2. according to described detection of claim 1 and interference method, it is characterized in that data-carrier store preserves the maximum cpu demand time of each task.
3. according to described detection of claim 1 and interfering system, it is characterized in that each independently task all have one independently, be used to indicate current task whether to obtain the CPU global flag position of working time.
4. according to described detection of claim 1 and interfering system, it is characterized in that each independently task all have one independently, be used to indicate current task to take the timer of the physical memory unit of CPU service time.
5. according to described detection of claim 1 and interfering system, it is characterized in that the timing course of current task use CPU time is finished in the timing interrupt service routine of microprocessor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200610055169 CN1811719A (en) | 2006-02-22 | 2006-02-22 | Method for detecting and intervening deadlock of single-threading microprocessor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 200610055169 CN1811719A (en) | 2006-02-22 | 2006-02-22 | Method for detecting and intervening deadlock of single-threading microprocessor |
Publications (1)
Publication Number | Publication Date |
---|---|
CN1811719A true CN1811719A (en) | 2006-08-02 |
Family
ID=36844656
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 200610055169 Pending CN1811719A (en) | 2006-02-22 | 2006-02-22 | Method for detecting and intervening deadlock of single-threading microprocessor |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1811719A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008025198A1 (en) * | 2006-08-28 | 2008-03-06 | Huawei Technologies Co., Ltd. | Method, system, and apparatus for communication between a terminal and a server |
CN101295266B (en) * | 2008-06-05 | 2010-06-16 | 成都市华为赛门铁克科技有限公司 | Method, device and system for detecting and removing deadlock |
CN101290595B (en) * | 2007-04-17 | 2011-04-20 | 国际商业机器公司 | System and method for probing system management program task in asynchronous environment |
CN102819466A (en) * | 2012-06-29 | 2012-12-12 | 华为技术有限公司 | Method and device for processing operating system exceptions |
CN104252538A (en) * | 2014-09-22 | 2014-12-31 | 可牛网络技术(北京)有限公司 | Web page processing method and web page processing device |
CN104391754A (en) * | 2014-10-13 | 2015-03-04 | 北京星网锐捷网络技术有限公司 | Method and device for processing task exception |
CN104636259A (en) * | 2015-03-18 | 2015-05-20 | 厦门雅迅网络股份有限公司 | Function execution timeout and deadlock detection method based on dynamic tracking of operating period |
CN108052391A (en) * | 2017-11-30 | 2018-05-18 | 努比亚技术有限公司 | Memory Optimize Method, mobile terminal and readable storage medium storing program for executing based on thread deadlock |
CN110083456A (en) * | 2019-03-13 | 2019-08-02 | 浙江工商大学 | A kind of deadlock prevention technique for multi-thread software |
-
2006
- 2006-02-22 CN CN 200610055169 patent/CN1811719A/en active Pending
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008025198A1 (en) * | 2006-08-28 | 2008-03-06 | Huawei Technologies Co., Ltd. | Method, system, and apparatus for communication between a terminal and a server |
CN101290595B (en) * | 2007-04-17 | 2011-04-20 | 国际商业机器公司 | System and method for probing system management program task in asynchronous environment |
US8209683B2 (en) | 2007-04-17 | 2012-06-26 | International Business Machines Corporation | System and method for probing hypervisor tasks in an asynchronous environment |
CN101295266B (en) * | 2008-06-05 | 2010-06-16 | 成都市华为赛门铁克科技有限公司 | Method, device and system for detecting and removing deadlock |
CN102819466B (en) * | 2012-06-29 | 2015-08-19 | 华为技术有限公司 | The disposal route of operating system exception and device thereof |
CN102819466A (en) * | 2012-06-29 | 2012-12-12 | 华为技术有限公司 | Method and device for processing operating system exceptions |
CN104252538A (en) * | 2014-09-22 | 2014-12-31 | 可牛网络技术(北京)有限公司 | Web page processing method and web page processing device |
CN104391754A (en) * | 2014-10-13 | 2015-03-04 | 北京星网锐捷网络技术有限公司 | Method and device for processing task exception |
CN104391754B (en) * | 2014-10-13 | 2017-08-25 | 北京星网锐捷网络技术有限公司 | A kind of processing method and processing device of task abnormity |
CN104636259A (en) * | 2015-03-18 | 2015-05-20 | 厦门雅迅网络股份有限公司 | Function execution timeout and deadlock detection method based on dynamic tracking of operating period |
CN104636259B (en) * | 2015-03-18 | 2020-05-22 | 厦门雅迅网络股份有限公司 | Function execution timeout and deadlock detection method based on dynamic tracking of operation period |
CN108052391A (en) * | 2017-11-30 | 2018-05-18 | 努比亚技术有限公司 | Memory Optimize Method, mobile terminal and readable storage medium storing program for executing based on thread deadlock |
CN110083456A (en) * | 2019-03-13 | 2019-08-02 | 浙江工商大学 | A kind of deadlock prevention technique for multi-thread software |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1811719A (en) | Method for detecting and intervening deadlock of single-threading microprocessor | |
US10909006B2 (en) | Main processor error detection using checker processors | |
US7631307B2 (en) | User-programmable low-overhead multithreading | |
EP2431876B1 (en) | Method and device for exception handling in embedded system | |
CN100549943C (en) | Multithreaded microprocessor with the optimization thread scheduler that is used to promote the streamline service efficiency | |
US20060117316A1 (en) | Hardware multithreading systems and methods | |
CN1828544B (en) | Mechanism to exploit synchronization overhead to improve multithreaded performance | |
US20040215720A1 (en) | Split branch history tables and count cache for simultaneous multithreading | |
CN100361081C (en) | Method for processing multi-thread, multi-task and multi-processor | |
JP2015111439A (en) | Primitives to enhance thread-level speculation | |
US20030135720A1 (en) | Method and system using hardware assistance for instruction tracing with secondary set of interruption resources | |
US20070180322A1 (en) | Debug support device, and program for directing computer to perform debugging method | |
EP1934749A2 (en) | Profiling using a user-level control mechanism | |
CN102222015A (en) | System and method for detecting deadlock in multithreaded program | |
CN101334744B (en) | Multiprocessor system fault checking method, system and device | |
CN1109976C (en) | Monitoring timer system | |
US20080059723A1 (en) | Detecting and resolving locks in a memory unit | |
JP5628434B2 (en) | Processor, prevention method and system | |
EP1967950A2 (en) | Multiprocessor system for continuing program execution upon detection of abnormality | |
US8214574B2 (en) | Event handling for architectural events at high privilege levels | |
KR101892273B1 (en) | Apparatus and method for thread progress tracking | |
WO2016092346A1 (en) | Conditional pattern detector for detecting hangs | |
CN100557576C (en) | The method and apparatus that operating system failure detects | |
US20070162723A1 (en) | Technique for reducing traffic in an instruction fetch unit of a chip multiprocessor | |
JPH0245838A (en) | Program execution condition monitoring method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |