CN1794176A - Energy-saving compiling method based on dynamic frequency modulation technology - Google Patents
Energy-saving compiling method based on dynamic frequency modulation technology Download PDFInfo
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- CN1794176A CN1794176A CNA2006100489371A CN200610048937A CN1794176A CN 1794176 A CN1794176 A CN 1794176A CN A2006100489371 A CNA2006100489371 A CN A2006100489371A CN 200610048937 A CN200610048937 A CN 200610048937A CN 1794176 A CN1794176 A CN 1794176A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
A compiling method of energy-saving based on dynamic frequency modulation technique includes using parameter generated at scanning period of compiler to section object code, judging whether code section is suitable to operation of dynamic voltage frequency modulation or not according to said parameter and carrying out processing on code section not suitable to operation of dynamic voltage frequency modulation.
Description
Technical field
The present invention relates to DVS is Dynamic Voltage Scaling, and the dynamic electric voltage frequency modulation technology relates in particular to a kind of energy-saving compiling method based on dynamic frequency modulation technology.
Background technology
At present, the energy-conservation algorithm of built-in field mainly contains two kinds:
DPM is Dynamic Power Management, the dynamic power management technology: other power management policy of operating system grade comprises the scheduling to peripheral hardware, to the scheduling of storer.
The DVS technology: this mode is divided into two kinds again: 1. other DVS dispatching algorithm of operating system grade; 2. the DVS dispatching algorithm of software level.The DVS algorithm of software level such as other DVS algorithm of compiler level, can be understood the details of code exactly according to the result that the compiler scan code obtains, thus frequency modulation accurately.But the application of the DVS algorithm of compilation phase is frequency modulation unit often with the individual instructions, and the cost that frequency is switched is very large.
As can be seen, other DVS technology of DPM technology and operating system grade all will depend on the support of embedded OS, such as a series of DPM and the DVS algorithm of the real time operating system that has proposed at present.Other DVS algorithm of operating system grade and DPM algorithm all are to be based upon operating system on the base of prediction of the task of current operation, and the DVS algorithm of compilation phase can obtain some details of generating code by grammer scanning, carries out frequency modulation exactly by these details.
The optimization of traditional compilation phase, most target are time and the space performances that promotes code, and fewer to the consideration of power consumption.Though the performance optimization meeting in part-time and space brings the reduction of power consumption, these optimizations all do not have the The Application of Technology at DVS, make DVS can't bring tangible Power Cutback in the application of compiling layer.
Summary of the invention
In order to obtain better Power Cutback, to improve the compiler performance,, the object of the present invention is to provide a kind of energy-saving compiling method based on dynamic frequency modulation technology in order to make DVS technology better application in the middle of compiler.
The technical scheme that technical solution problem of the present invention is adopted is:
1) code segment disposal route:
The intermediate code segmentation module:
In the code scans stage, target is carried out segmentation, mark is carried out at the section two ends, and sets up parameter list for each section, prepares against and handles;
Circulation in the object code and function call all are relatively independent modules, are fit to the candidate as section, and for jump instruction, because the unpredictability of redirect is not suitable for the standard as segmentation;
The code segment processing module: according to the parameter list of each section, the substitution mathematical model is judged whether this section two ends are fit to insert the DVS instruction, and the section that can not insert the DVS instruction is further processed;
The inspection of function segment is by carrying out parameter substitution mathematical model.For the program segment that can carry out DVS, function call is inserted at two ends; For the section that can not carry out DVS, be optimized by the loading of the filling in the peephole optimization or the like optimization means, and then judge;
2) mathematical model of determining program section
Under the perfect condition of certain hypothesis, model is divided into two parts, the one, time model, the one, power consumption model.Two models limit from two aspects, if temporal loss surpasses certain boundary, this section program just can not be used the DVS technology so; If can meet the demands the loss of time just, very few but power consumption is saved, can not use the DVS technology so;
3) insert the DVS instruction
For the section that is fit to the DVS instruction, insert the DVS instruction at the section two ends.The form that is inserted through function call of DVS instruction is carried out.Function call is inserted at two ends in section, and the function call the inside system call of the change frequency of calling system again.
The beneficial effect that the present invention has is: two newly-increased collectors are the better suitable use DVS technology of compiler.At first, the segmentation of program allows the unit that uses the DVS technology become big, and the unit that has corrected DVS frequency modulation too introductory note plays the shortcoming of battery lifetime.Secondly, the inspection of program segment and adjustment make the saving of power consumption quantize, and directly do not abandon for the program segment that can not save power consumption, can make it be fit to DVS frequency modulation by adjustment as far as possible.Can not cause on the one hand to cause using after the DVS on the contrary that power consumption becomes big situation because segment section is not suitable for DVS, avoid much not have the program segment of optimization to be abandoned and do not carry out DVS and operate on the other hand yet.The mathematical analysis model that last the present invention introduces quantizes the estimation of power consumption, and the power consumption that can avoid the DVS technology to cause increases.
Description of drawings
Fig. 1 is based on the workflow of the energy-saving compiling method of dynamic frequency modulation technology
The untreated example procedure of Fig. 2
Fig. 3 has marked the example procedure of program segment
Embodiment
The present invention handles source code according to the compiling flow process based on the energy-saving compiling method of dynamic frequency modulation technology of Fig. 1.
1) use the code segment disposal route to code segmentation:
The candidate of circulation and the function call section of being.
Circulation in the function is an independently code segment, and in intermediate code was represented, there was concrete sign at the round-robin two ends, by scanning, can obtain the round-robin two ends, inserts function call at the round-robin two ends, and this function call is used for carrying out the operation of DVS frequency modulation.
Same, for function call, also can insert function call, as alternative disconnected at the function two ends.
For the jump instruction on the program critical path, the insertion of DVS may cause significantly performance change, so do not choose this instruction segment program segmenting the time.
Be the scanning process of function in the time of segmentation, in scanning, compiler writes down the parameter in the above-mentioned mathematical model, sets up parameter list, checks and the adjusting module use for section.
2) use the mathematics judgment models to carry out the inspection and the processing of function segment.
1. suppose and limit:
A) compiler is not discussed branch instruction is carried out the DVS operation, because dynamic instruction flow is in the difficult analysis of compile duration
B) do not consider under the condition of multithreading the situation that the section after a DVS crosses just was suspended before executing
C) memory operation and CPU work is asynchronous
D) every instruction can operate under the different voltage.
Consider the program segment in the accompanying drawing 2 for example, check out one time, add the later program segment of mark following (with flag as gauge point) as shown in Figure 3.Afterwards, compiler just can be judged each independent section, at first gets parms, then and then advance to calculate it and whether be fit to the DVS technology.
Model is divided into two parts, the one, time model, the one, power consumption model.Two models limit from two aspects, if temporal loss surpasses certain boundary, this section program just can not be used the DVS technology so; If can meet the demands the loss of time just, very few but power consumption is saved, can not use the DVS technology so.Suppose not adopt under the situation of DVS, executing the needed time of program segment P is T, and power consumed is E, has inserted after the DVS switching command, and the needed time is T
Switch, power consumption is E
SwtichThe ratio loss of time that insertion DVS instruction is allowed is δ, and the Power Cutback that expectation obtains is ρ.
For the instruction in the program segment, be divided into two kinds, a kind of is cpu instruction, a kind of is access instruction, and in current high speed processor, the execution time of access instruction is with the execution frequency-independent of CPU, memory access the waiting period, streamline CPU carries out the cpu instruction that does not need memory access.Suppose t
InvariantBe the time that access instruction will be carried out, t
InvariantFrequency-independent with CPU; Suppose N
OverlapUnder the parallel situation of cpu instruction and access instruction, the number of times that cpu instruction is carried out; N
NonoverlapBe the independent number of times of carrying out of cpu instruction.
Suppose that f is the current frequency of processor, f0 is the highest frequency under the processor default situations, and (R, the f) time of moving under frequency f for program segment R, Num (R) was the number of times of program segment operation, P to T
fBe the power under the frequency f, the part of P-R representation program section except R, P
SwitchRepresent the power of DVS switching command oneself when switching.
2. mathematics judgment models
I. obtain the function information of last scan.
Comprised: t
Invariant, N
Overlap, N
Nonoverlap, these can obtain Num (R) by the instruction analysis in the scanning process.F, f0, P
SwitchIt is self parameter of processor
II. parameter substitution formula, calculate this function segment and whether insert the DVS instruction.
At first be T and the formula of power consumption E computing time
T＝max(t
invariant，N
overlap/f0)+N
nonoverlap/f0
E＝P
f0*T(p，f0)
After section R has been used DVS:
T
switch＝max(t
invariant，N
overlap/f)+N
nonoverlap/f0
E
switch＝E
R+E
p-R+E
switch＝P
f*T(R，f)+P
f0*T(P-R，f0)+P
switch*2*Num(R)
Judge whether this section satisfies the restrictive condition of time and power consumption:
T
switch/T＜＝1+δ
E/E
switch＞＝1+ρ
To sum up,, can satisfy top two conditions, so just can carry out the DVS operation section R if in the calculating after code scans is finished.
Whole procedure is inserted the model of DVS instruction:
For one section program, can mark off a plurality of sections that can carry out the DVS instruction, the model of T and E has just become so:
E
switch＝E
1+E
2+E
3+……+E
n
T
swtich＝T
1+T
2+T
3+……+T
n
The condition that satisfies remains:
T
switch/T＜＝1+δ
E/E
switch＞＝1+ρ。
III. give the two sections function calls that add DVS frequency modulation of program segment that are fit to insert DVS, be not suitable for inserting the program segment of DVS instruction with tense marker.
3. the adjustment of function segment
For not satisfying the program segment that inserts the DVS instruction,, judge whether to be fit to insert the DVS instruction once more by some special Optimizing operation;
I. for the section that does not satisfy DVS frequency modulation, the filling loading principle according to peephole optimization is optimized the code in the section, the parameter list of the section of rebuliding internal program;
II. recomputate this program segment according to parameter list and model, judge within performance descends the scope that allows whether have the frequency that to use.
III. this program segment of mark.
3) insert the DVS instruction
For the section that is fit to the DVS instruction, insert the DVS instruction at the section two ends.The form that is inserted through function call of DVS instruction is carried out.Function call is inserted at two ends in section, and the function call the inside system call of the change frequency of calling system again.
Embodiment
For the effect of the energy-conservation compiler checked, use the Wukong emulator of revising to experimentize.The Wukong emulator is the general-purpose built-in type system emulation device that embedded software research and development centre of Zhejiang University researched and developed since in October, 2004, support main flow embedded system external unit, realized total system simulation, can directly move the binary file of embedded system embedded system.Simultaneously, realizing sky provides debugging to support and operational data collection, for the embedded development person provides perfect support.Realize the sky emulator not at specific architecture Design, general bottom-layer design is for supporting the operation frame of main flow embedded type CPU architecture, comprises ARM, MIPS, PowerPC, Coldfire and even 51 single-chip microcomputers, 8086 etc.
Experimental situation is to support the Intel XScale processor of DVS technology, and development board is chosen IntelPXA25xLubbock, and the hardware adaptor of support has clock, internal memory and FFUART.Owing to there is not the battery of peripheral hardware, by revising the code of wukong, increase the battery class, judge the calculating electric weight according to the instruction of carrying out on the hardware.
Experimental procedure:
Choose and comprise instruction than more comprehensive code segment, as shown in Figure 2;
Use compiling of energy-conservation compiler, open DVS compile optimization option and close DVS compile optimization option and respectively compile a machine code;
On the wukong emulator, move respectively, contrast the effect of the energy-conservation compiler algorithm of energy-conservation compiler by the calculation consumption electric weight.
Experimental result:
Through contrast, energy-conservation compiler can be in the power consumption of performance loss 5% with interior energy-conservation 10%-20% to different code segments.
Claims (1)
1, a kind of energy-saving compiling method based on dynamic frequency modulation technology in the middle of code scans and code generation step, adds collector, it is characterized in that:
1) code segment disposal route:
The intermediate code segmentation module:
In the code scans stage, target is carried out segmentation, mark is carried out at the section two ends, and sets up parameter list for each section, prepares against and handles;
Circulation in the object code and function call all are relatively independent modules, are fit to the candidate as section, and for jump instruction, because the unpredictability of redirect is not suitable for the standard as segmentation;
The code segment processing module: according to the parameter list of each section, the substitution mathematical model is judged whether this section two ends are fit to insert the DVS instruction, and the section that can not insert the DVS instruction is further processed;
The inspection of function segment is by carrying out parameter substitution mathematical model.For the program segment that can carry out DVS, function call is inserted at two ends; For the section that can not carry out DVS, be optimized by the loading of the filling in the peephole optimization or the like optimization means, and then judge;
2) mathematical model of determining program section
Under the perfect condition of certain hypothesis, model is divided into two parts, the one, time model, the one, power consumption model.Two models limit from two aspects, if temporal loss surpasses certain boundary, this section program just can not be used the DVS technology so; If can meet the demands the loss of time just, very few but power consumption is saved, can not use the DVS technology so;
3) insert the DVS instruction
For the section that is fit to the DVS instruction, insert the DVS instruction at the section two ends.The form that is inserted through function call of DVS instruction is carried out.Function call is inserted at two ends in section, and the function call the inside system call of the change frequency of calling system again.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110045951A (en) * | 2019-04-22 | 2019-07-23 | 国网山西省电力公司电力科学研究院 | A kind of developing instrument that neural network hardware low-power consumption customizes |
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|---|---|---|---|---|
| CN100361109C (en) * | 2001-08-29 | 2008-01-09 | 模拟设备公司 | Generic serial port architecture and system |
| KR101035077B1 (en) * | 2004-02-20 | 2011-05-19 | 삼성전자주식회사 | Semiconductor system capable of reducing consumption of power according to Dynamic Voltage Scaling |
| US7437580B2 (en) * | 2004-05-05 | 2008-10-14 | Qualcomm Incorporated | Dynamic voltage scaling system |
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| CN110045951A (en) * | 2019-04-22 | 2019-07-23 | 国网山西省电力公司电力科学研究院 | A kind of developing instrument that neural network hardware low-power consumption customizes |
| CN110045951B (en) * | 2019-04-22 | 2022-04-15 | 国网山西省电力公司电力科学研究院 | Development tool for low-power-consumption customization of neural network hardware |
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