CN1790903A - Frequency multiplication method and frequency multiplier - Google Patents
Frequency multiplication method and frequency multiplier Download PDFInfo
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- CN1790903A CN1790903A CN 200510120531 CN200510120531A CN1790903A CN 1790903 A CN1790903 A CN 1790903A CN 200510120531 CN200510120531 CN 200510120531 CN 200510120531 A CN200510120531 A CN 200510120531A CN 1790903 A CN1790903 A CN 1790903A
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Abstract
The invention discloses a frequency multiplication method and frequency multiplier. Wherein, first, accessing input signal into comparator to output square wave signal; second, outputting delayed square wave signal by AND gate delayer with delay time in nano-second level; third, inputting said two signals into two input end of logic AND gate correlator for calculation and output; fourthly, filtering and amplifying the narrow impulse from said correlator to complete the frequency multiplication. Wherein, it also comprises a linear amplifier and a power amplifier. This invention is simple and low cost, and had small phase noise in output signal.
Description
Technical field
The present invention relates to a kind of frequency-doubling method, also relate to frequency multiplier simultaneously, can be widely used in fields such as radar, communication, quantum frequency marking and frequently steady measurement.
Background technology
The method of realization frequency multiplication has varied, but can be divided into two classes substantially, and a class is to utilize phase-locked loop that the higher output frequency of voltage controlled oscillator is locked on the lower reference incoming frequency, thereby realizes frequency multiplication; Another kind of is to utilize nonlinear device, as transistor, rectifier, snap-off diode, make the waveform generation nonlinear transformation of input signal, insert band pass filter again or have suitably optionally tuned amplifier and select needed harmonic wave and realize frequency multiplication, the typical circuit of this class frequency multiplier has triode Class C frequency multiplication, current switch frequency multiplication and snap-off diode frequency multiplication.Triode Class C frequency multiplication is because there is phase difference in the phase place of the output signal after input signal phase place zero point and the process frequency-selecting zero point, thereby the phase noise height, and frequency stability is poor, adds frequency multiplication output pulse broad, and high order harmonic component is abundant, and shg efficiency is low.The current switch frequency multiplier by accurately determining pulse position zero point, has improved phase noise and phase jitter, reached the purpose of low noise frequency multiplication, but be subjected to the restriction of differential loop distribution parameter, when incoming frequency is higher, the relative broadening of double frequency pulse, shg efficiency obviously reduces.Step-diode frequency multipliers can produce the abundant burst pulse of harmonic wave, have higher shg efficiency, but limit the use of in incoming frequency greater than the high band more than tens megahertzes.
Summary of the invention
The object of the present invention is to provide a kind of frequency-doubling method, easy to implement the method, implementation is simple, has reduced phase noise, can adapt to the broad input band, has high frequency doubling efficiency simultaneously.Another object of the present invention is to provide auto-correlation frequency multiplier circuit, and it is simple in structure, and is with low cost, and the phase of output signal noise is little, the shg efficiency height.
The object of the present invention is achieved like this:
1. utilize high-speed digital integrated circuit to form the required spike of frequency multiplication, the zero point of this pulse and phase of input signals close-coupled at zero point have guaranteed very low phase noise together, and the equivalence of the phase noise second additional instability of level is because 5～6E-13/1S;
2. adopt different circuit forms, spike can be that periodic single pulse also can be the periodicity dipulse, and the pulsewidth of spike can be narrow to 8～10 nanoseconds, the shg efficiency height.
Purpose performing step of the present invention is:
1. comparator (M1) is made up of comparator (1), input signal V
fInsert the input of comparator (M1), reference voltage V
oInsert the level reference edge of comparator (M1), comparator (M1) output two-way square-wave signal T
1And T
2, because T
1And T
2Be by V
fPass through V
oTrigger, so T
1, T
2Frequency all equal V
fFrequency, and their phase place zero point all with V
fClose-coupled together;
2. delayer (M2) is formed T by AND gate delayer (2)
2Access delay device (M2) is exported time-delay square-wave signal T behind delay time τ
τ, delay time τ can change and can be as short as for 8～10 nanoseconds;
3. gate correlator (M3) is formed T by AND gate correlator (3)
1With T
1Two inputs that input to gate correlator (M3) respectively are after the high speed logic computing, at the output output burst pulse T of gate correlator (M3)
τ, T
τPulsewidth equal delay time τ, T
τFrequency equal V
fFrequency, and T
τPhase place zero point and T
1And T
2Close-coupled is and V together
fClose-coupled together;
4. burst pulse T
τPulsewidth τ can be narrow to 8～10 nanoseconds, so the high order harmonic component of this pulse is very abundant, have very high shg efficiency, frequency-selecting amplifier module (M4) is made up of filter (4) (6), linear amplifier (5), power amplifier (7), with T
τSend into frequency-selecting amplifier module (M4) and finally export a N doubly to input signal V
fOutput signal nV
f, finish frequency multiplication.
The present invention compared with prior art has the following advantages:
1, in the auto-correlation frequency-doubling method, input signal can produce a good zero-crossing pulse through comparator, the zero point of output pulse and the close-coupled at zero point of input signal is in the same place, thereby has reduced phase noise.
2, in the auto-correlation frequency-doubling method, the road signal that comparator produces is sent into delayer, send time delayed signal with without the signal of time-delay into correlator again, produce needed burst pulse, can artificially control time of delay according to the position of selected harmonic wave in the delay pulse frequency spectrum, therefore can form narrow pulse to nanosecond, this pulse high order harmonic component is very abundant, has good shg efficiency.
3, the auto-correlation frequency-doubling method can adapt to the broad frequency range, the auto-correlation frequency multiplier circuit form that Using such method is made is various, circuit structure is simple, components and parts are few, the phase of output signal noise is little, main side frequency rejection ratio is excellent, the shg efficiency height especially has good shg efficiency in radio band and higher-order frequency multiplication section.
Description of drawings
Fig. 1 is a kind of frequency-doubling method block diagram;
Fig. 2 is a kind of frequency multiplier structural representation:
Fig. 3 is a kind of frequency multiplier signal waveform schematic diagram;
Wherein:
The M1-comparator; The M2-delayer;
M3-gate correlator; M4-frequency-selecting amplifier module;
The 1-comparator; 2-AND gate delayer;
3-AND gate correlator; The 4-filter;
The 5-linear amplifier; The 6-filter;
The 7-power amplifier;
Embodiment
Parts are chosen:
* comparator (1) is selected MAX913 for use.
* AND gate delayer (2) is selected 74F08 for use.
* AND gate correlator (3) is selected 74F08 for use.
* filter (4), (6) are selected 200MHzLC filter or crystal filter for use.
* linear amplifier (5) is selected UT0-250 for use.
* power amplifier (7) is selected A74-1 for use.
By shown in Figure 1, a kind of implementation step of frequency-doubling method is as follows:
1. input signal V
fInsert the input of comparator (M1), reference voltage V
oInsert the level reference edge of comparator (M1), comparator (M1) output two-way square-wave signal T
1And T
2, because T
1And T
2Be by V
fPass through V
oTrigger, so T
1, T
2Frequency all equal V
fFrequency, and their phase place zero point all with V
fClose-coupled together;
2. T
2Access delay device (M2) is exported time-delay square-wave signal T behind delay time τ
τ, delay time τ can change and can be as short as for 8～10 nanoseconds;
3. T
1With T
1Two inputs that input to gate correlator (M3) respectively are after the high speed logic computing, at the output output burst pulse T of gate correlator (M3)
τ, T
τPulsewidth equal delay time τ, T
τFrequency equal V
fFrequency, and T
τPhase place zero point and T
1And T
2Close-coupled is and V together
fClose-coupled together;
4. burst pulse T
τPulsewidth τ can be narrow to 8～10 nanoseconds, so the high order harmonic component of this pulse is very abundant, have very high shg efficiency, with T
τSend into frequency-selecting amplifier module (M4) and finally export a N doubly to input signal V
fOutput signal nV
f, finish frequency multiplication.
It comprises following parts a kind of device of realizing said method:
As shown in Figure 2, this device is made of comparator (1), AND gate delayer (2), AND gate correlator (3), filter (4) (6), linear amplifier (5), power amplifier (7);
According to Fig. 2 and Fig. 3 as can be known, the annexation between each parts and the effect of each parts are:
Two outputs " Q " of comparator (1) are connected with the input IN1 of AND gate delayer (2), AND gate correlator (3) respectively with "/Q "; Input signal V wherein
fWith reference voltage V
oInput to comparator (1), comparator (1) is exported the synchronous and mutual anti-phase square-wave signal T of two-way by " Q " respectively with "/Q " end
1And T
2
AND gate delayer (2) is connected with correlator (3) input IN2 with the output "/Q " of comparator (1) respectively; The effect of AND gate delayer (2) is with signal T
2Postpone τ and export time-delay square-wave signal T after the time
1
AND gate correlator (3) is connected with filter (4) with output " Q ", AND gate delayer (2) output of comparator (1) respectively; The effect of AND gate correlator (3) is that the square-wave signal that two-way differs time τ zero point is carried out the high speed logic AND operation, its output waveform presents high level in the delay time τ of correspondence, and present low level in all the other times, promptly AND gate correlator (3) is output as spike and its cycle that pulsewidth is τ and equals input signal V
fCycle.
Filter (4) is connected with linear amplifier (5) with AND gate correlator (3) respectively; The effect of filter (4) is the nV to obtaining
fFrequency is carried out first order filtering.
Linear amplifier (5) is connected with filter (6) with filter (4) respectively; The effect of linear amplifier (5) is the nV to obtaining
fFrequency is carried out the first order and is amplified.
Filter (6) is connected with power amplifier (7) with linear amplifier (5) respectively; The effect of filter (6) is the nV to obtaining
fFrequency is carried out second level filtering.
Power amplifier (7) is connected with filter (6); The effect of power amplifier (7) is the nV to obtaining
fFrequency is carried out the second level and is amplified, and makes signal reach required power; Power amplifier (7) output nV
f, finish frequency multiplication.
Experimental result
In experiment, V
fFrequency is 10MHz, observes the 200Mz frequency spectrum at the device output with frequency spectrograph, and the result is: main side frequency rejection ratio is better than 65dBc, and amplitude is 25dBm/50 Ω; Test its additional instability with the frequency stability tester according to the homology method, the result is: a second level stability is 5E-13/1S.
The result shows that this method is effective, and this device phase of output signal noise is little, and main side frequency rejection ratio is excellent, and the shg efficiency height especially has good shg efficiency in radio band and higher-order frequency multiplication section.
Claims (2)
1, a kind of frequency-doubling method, it comprises the following steps:
A, input signal V
fInsert the input of comparator (M1), reference voltage V
oInsert the level reference edge of comparator (M1), comparator (M1) output two-way square-wave signal T
1And T
2, T
1And T
2Be by V
fPass through V
oTrigger T
1, T
2Frequency all equal V
fFrequency, phase place zero point and V
fClose-coupled together;
B, T
2Access delay device (M2) is exported time-delay square-wave signal T behind delay time τ
t, delay time τ was as short as for 8～10 nanoseconds;
C, T
1With T
tTwo inputs that input to gate correlator (M3) respectively are after the high speed logic computing, at the output output burst pulse T of gate correlator (M3)
τ, T
τPulsewidth equal delay time τ, T
τFrequency equal V
fFrequency, T
τPhase place zero point and T
1And T
2Close-coupled together;
D, burst pulse T
τPulsewidth τ can be narrow to 8～10 nanoseconds, with T
τSend into frequency-selecting amplifier module (M4) and finally export a N doubly to input signal V
fOutput signal nV
f, finish frequency multiplication.
2, a kind of device that is used to realize frequency-doubling method is characterized in that:
Two output Q of comparator (1) and/Q respectively with gate delay device (2), be connected with the input IN1 of door correlator (3);
Be connected with correlator (3) input IN2 with the output/Q of comparator (1) respectively with gate delay device (2);
With door correlator (3) respectively with the output Q of comparator (1), be connected with filter (4) with gate delay device (2) output;
Filter (4) is connected with linear amplifier (5) respectively with door correlator (3);
Linear amplifier (5) is connected with filter (6) with filter (4) respectively;
Filter (6) is connected with power amplifier (7) with linear amplifier (5) respectively;
Power amplifier (7) is connected with filter (6).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510120531 CN1790903A (en) | 2005-12-27 | 2005-12-27 | Frequency multiplication method and frequency multiplier |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510120531 CN1790903A (en) | 2005-12-27 | 2005-12-27 | Frequency multiplication method and frequency multiplier |
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| Publication Number | Publication Date |
|---|---|
| CN1790903A true CN1790903A (en) | 2006-06-21 |
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|---|---|---|---|
| CN 200510120531 Pending CN1790903A (en) | 2005-12-27 | 2005-12-27 | Frequency multiplication method and frequency multiplier |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102857216A (en) * | 2012-08-25 | 2013-01-02 | 成都方拓科技有限公司 | Resonant exclusive-OR gate oscillation integrated system |
| CN103207386A (en) * | 2013-04-19 | 2013-07-17 | 南京莱斯信息技术股份有限公司 | Radar azimuth pulse frequency multiplication system and using method thereof |
| CN103314524A (en) * | 2010-09-30 | 2013-09-18 | 意法爱立信有限公司 | Dutycycle adjustment to improve efficiency of a digital RF-PA |
| CN111290193A (en) * | 2020-02-21 | 2020-06-16 | 西北工业大学 | Frequency doubling device and all-fiber autocorrelation instrument |
-
2005
- 2005-12-27 CN CN 200510120531 patent/CN1790903A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103314524A (en) * | 2010-09-30 | 2013-09-18 | 意法爱立信有限公司 | Dutycycle adjustment to improve efficiency of a digital RF-PA |
| CN103314524B (en) * | 2010-09-30 | 2016-04-27 | 意法爱立信有限公司 | Adjustment duty ratio is to improve the efficiency of digital radio frequency power amplifier |
| CN102857216A (en) * | 2012-08-25 | 2013-01-02 | 成都方拓科技有限公司 | Resonant exclusive-OR gate oscillation integrated system |
| CN102857216B (en) * | 2012-08-25 | 2015-07-15 | 国家电网公司 | Resonant exclusive-OR gate oscillation integrated system |
| CN103207386A (en) * | 2013-04-19 | 2013-07-17 | 南京莱斯信息技术股份有限公司 | Radar azimuth pulse frequency multiplication system and using method thereof |
| CN111290193A (en) * | 2020-02-21 | 2020-06-16 | 西北工业大学 | Frequency doubling device and all-fiber autocorrelation instrument |
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