CN1758534A - Integrated transfer resistance amplifier with auto-gain control - Google Patents

Abstract

This invention relates to an IC transimpedance amplifier automatically controlling the gain in the optical communication field including a primary amplifier unit for amplifying input signals, an initial gain circuit as the feedback loop of the primary amplifier unit is connected with a N-type field effect transistor M6 as the feedback resistance, an automatic gain control circuit as the feedback loop of the primary amplifier unit connected with the N-type field effect transistor M7 as the feedback resistance.

Description

The integrated transfer resistance amplifier of band automatic gain control

Technical field

The present invention relates to optical communication field, relate in particular to the integrated transfer resistance amplifier of the band automatic gain control in a kind of optical communication field.

Background technology

Both at home and abroad the researcher has done a large amount of research to integrated TIA (trans-impedance amplifier), but the TIA that is used for optical communication field must have AGC (automatic gain control), with the photo-signal of reception great dynamic range.And the integrated TIA of band AGC rarely has report in present result of study.The invention solves two problems in the integrated TIA design of the optical communication application: 1. this TIA comprises the AGC function of great dynamic range.2. this TIA less depends on the variation of integrated circuit fabrication process.

Summary of the invention

The object of the present invention is to provide a kind of integrated transfer resistance amplifier with automatic gain control, the AGC function that it has comprised great dynamic range has also reduced the influence of changes in process parameters to it.

A kind of integrated transfer resistance amplifier provided by the invention with automatic gain control, comprising: the main amplifier unit is used to amplify the signal of input; The initial gain initialization circuit as the feedback control loop of main amplifier unit, is connected with n type field effect transistor M6 as feedback resistance; Automatic gain control circuit also as the feedback control loop of main amplifier unit, is connected with N type field effect transistor M7 as feedback resistance.

Description of drawings

Fig. 1 is the circuit structure according to TIA of the present invention;

Fig. 2 is the schematic diagram of initial gain initialization circuit;

Fig. 3 is the schematic diagram of agc circuit.

Embodiment

Fig. 1 is the circuit structure of the TIA of proposition according to the present invention.This structure also comprises two feedback control loops except the main amplifier unit, one is to set loop as initial gain, and another is as the AGC loop.

Two NMOS (n type field effect transistor) M6 and M7 work in triode region as variable resistor.Resistance value equals

$R_{\mathrm{on}}=\frac{1}{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}(V_{\mathrm{GS}}-V_{\mathrm{TH}})}...\left(1\right)$

V in the formula _GS, V _TH, μ _n, C _Ox, L, W are respectively the gate source voltage of NMOS pipe, cut-in voltage, the activity of charge carrier, the specific capacitance of gate oxide, channel length and channel width.

Like this, the nmos pass transistor that works in triode region can have very big resistance variations scope, as behind the feedback resistance of amplifier, can realize the AGC control of great dynamic range.

The light signal that is converted into behind the signal of telecommunication includes DC component, and the height of the size of its DC component and signal level is proportional.The size of signal level detects via the low pass filter that R1 and C1 form by control loop.

Fig. 2 is the schematic diagram according to initial gain initialization circuit of the present invention.A2 and A1 are common differential amplifiers, as voltage follower.A2, M11, M12, M14, M15, M16, R5 forms biasing circuit.A1, M5, M2, M1 forms the initial gain compensating circuit, and the Vinit voltage that they produce a band compensation is added on the grid of M6.M11 wherein, M12, M14, M15, M16, M2, M1, M5 is field-effect transistor.M5 and M16 play the effect of adjustment pipe, and size suitably gets final product, and constitute voltage follower with A1 and A2 respectively.

Vref is from the band-gap reference reference voltage source and the reference voltage that comes.M1, M11, M12 are designed to same size.M14, M15 also are same sizes.M2 and M6 too.Except M6 worked in triode region, all other metal-oxide-semiconductors all worked in the saturation region.So

I _M14＝I _M15＝I _R5＝I _M2 (2)

V _R5＝Vref＝R ₅I _R5 (3)

V _R3＝Vds _M4＝R ₅I _R5 (4)

Simultaneously $I_{M2}=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})}^2...\left(5\right)$

So $V_{\mathrm{GS}}-V_{\mathrm{TH}}=\sqrt{\frac{{2I}_{M2}}{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}}}=\sqrt{\frac{{2V}_{\mathrm{ref}}}{R_5{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}}}...\left(7\right)$

V in the formula _GS, V _TH, I _M2, μ _n, C _Ox, L, W are respectively the gate source voltage of MOS M2, cut-in voltage, drain current, the activity of charge carrier, the specific capacitance of gate oxide, channel length and channel width.Since M2, the size of M6 is consistent, simultaneously Vgs _M2=Vgs _M6, substitution equation (7), then the equivalent resistance of M6 is

$R_{M6}=\frac{1}{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}(V_{\mathrm{GS}}-V_{\mathrm{TH}})}=\sqrt{\frac{R_5}{{2V}_{\mathrm{ref}}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}}}...\left(8\right)$

R ₅, μ _n, C _Ox, L, W might float along with the variation of technological parameter.But it seems R from equation (8) _M6Equivalent resistance be the subduplicate function of above-mentioned variable.For example, 20% of L variation only can cause R _M610% variation.The influence of changes in process parameters has been weakened widely like this.

Fig. 3 is the schematic diagram according to agc circuit of the present invention.A2, M11, M12, M14, M15, M16, the biasing circuit that R5 forms is identical with biasing circuit shown in Figure 2.M18, M19, M20, R6 constitutes amplifier A3.Voltage on the A3 sampling C1 and obtain initial bias voltage Vagc feeds back to the grid of M7 then.Like this, the gain of TIA is transfused to the size of signal and controls automatically.

In this drawing, TIA0 provides dc offset voltage for A3.TIA0 is identical with TIA, has only used a fixing feedback resistance R7.So no matter how technological parameter changes, when the amplitude of input signal was zero, two inputs of A3 all can keep balance.A2, R5 and M11-M17 form the A3 biasing circuit.Like this, the starting resistor of AGC is just decided by the initial voltage on the M7 grid.

M11, M12, M13 are designed to same size.M14, M15, M17 and M18 also are same sizes.Except M7 worked in triode region, all other metal-oxide-semiconductors all worked in the saturation region.

I _M14＝I _M15＝I _R5＝I _M17＝I _M18＝2I _R6 (9)

AndV _R5＝Vref＝R ₅I _R5 (10)

V _R6＝R ₆I _R6 (11)

So initial voltage on the M7 grid

Vagc＝VDD-R ₆I _R6

$=\mathrm{VDD}-\frac{R_6}{2R_5}\mathrm{Vref}...\left(12\right)$

As seen, Vagc and VDD, the ratio of Vref and R6 and R5 is relevant.If during proportional variations of R6 and R5, the initial bias voltage of AGC will keep stablizing.

Therefore, the initial bias voltage of the initial gain of TIA and AGC less depends on the variation of fabrication process parameters.Such circuit structure can be effectively applied to optical communication TIA.

Claims (9)

1, a kind of integrated transfer resistance amplifier with automatic gain control is characterized in that this amplifier comprises:

The main amplifier unit is used to amplify the signal of input;

The initial gain initialization circuit as the feedback control loop of main amplifier unit, is connected with n type field effect transistor M6 as feedback resistance;

Automatic gain control circuit also as the feedback control loop of main amplifier unit, is connected with N type field effect transistor M7 as feedback resistance.

2. amplifier according to claim 1 is characterized in that: two n type field effect transistor M6 and M7 work in triode region as variable resistor.

3. amplifier according to claim 2 is characterized in that: comprise differential amplifier A1 and A2 in the described initial gain initialization circuit, as voltage follower, A2 wherein, M11, M12, M14, M15, M16, R5 forms biasing circuit, A1, M5, M2, M1 forms the initial gain compensating circuit, is added on the grid of M6 with the voltage that produces a band compensation.

4. according to any one described amplifier of claim 1 to 3, it is characterized in that: field effect transistor M 1, M11, M12 equal and opposite in direction, M14 equate that with M15 M2 equates with M6.

5. amplifier according to claim 4 is characterized in that: the n type field effect transistor except that M6 all works in the saturation region.

6. amplifier according to claim 1, it is characterized in that: described automatic gain control circuit comprises the biasing circuit of amplifier A3 and A3, M18, M19, M20, R6 constitutes amplifier A3, A2, R5 and M11-M17 have formed the A3 biasing circuit, and amplifier A3 is used for the initial bias Voltage Feedback is returned the grid of n type field effect transistor M7.

7. amplifier according to claim 6 is characterized in that: amplifier unit TIA0 is identical with main amplifier unit TIA, but has been to use a fixing feedback resistance R7, and TIA0 provides dc offset voltage for amplifier A3.

8. according to claim 6 or 7 described amplifiers, it is characterized in that: M11, M12, the M13 equal and opposite in direction, M14, M15, M17 and M18 be equal and opposite in direction also.

9. amplifier according to claim 8 is characterized in that: except n type field effect transistor M6 and M7 work in the triode region, all other n type field effect transistors all work in the saturation region.

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