CN1756314A - Signal processing device - Google Patents

Abstract

According to the signal of a plurality of identical color filtering pixels near the border of a divided region, various horizontal lines within a frame calculate a predicative value of a signal of an identical filtering pixel in another divided region according to the signal of two identical filtering pixels in a divided region. According to the comparison, the predicative value of the signal and the actual signal value of the pixel are respectively calculated, thereby calculating the gain.

Description

Signal processing apparatus

Technical field

The present invention relates to: for example the camera watch region of the imaging apparatus in digital camera is split into a plurality of at left and right directions, each cut zone simultaneously sense data, synthesize under the situation of these these processing of data, be used to revise the signal processing apparatus of the output signal level difference between each cut zone.

Background technology

In digital camera, when cartoon photographic or high speed continuous shooting when photography, for improve the reading speed of CCD, developed have CCD is divided into about 2 parts, export the 2chCCD of 2 output type device architectures of signal separately.

In 2chCCD, exist because of about the low precision of the set CDS/AGC circuit of each camera watch region cause the inconsistent problem of left and right sides output signal level.In addition, even the mechanism take to mate regularly left and right sides output signal is set,, also there is the problem that is difficult to make left and right sides output signal level coupling because identical possibility such as the temperature characterisitic of left and right sides CCDS/AGC circuit is little.

As the method for revising the output signal level between passage (channel), developed: before shooting, under the shutter close state, make LED luminous in the inboard of shutter, take smooth image, measure the interchannel signal level difference of CCD, revise the method for the interchannel signal level difference of CCD.But, such shooting at intermittence is effective to this method to still frame, and when such the carrying out of animation taken continuously, rise in the temperature when taking, interchannel output signal level difference changes under such situation the problem that existence can not suitably be revised.

Summary of the invention

The object of the present invention is to provide a kind of not only when still frame is taken but also when animation is taken, also can revise the signal processing apparatus of interchannel output signal level difference.

The 1st signal processing apparatus of the present invention is characterized in that, comprising: be divided into 2 parts about the camera watch region quilt, read the imaging apparatus of the signal of telecommunication by these each cut zone; Synthesize the signal of telecommunication of reading by above-mentioned imaging apparatus, generate the combination mechanism of 1 picture part signal; In the signal according to the 1 picture part that generates by above-mentioned combination mechanism, a plurality of pixel signals of above-mentioned cut zone boundary vicinity, calculate gain calculating mechanism by the relative gain of the predetermined side's cut zone of each horizontal line in 1 picture; The mean value calculation mechanism of the mean value of the gain that calculating is calculated by each horizontal line in 1 width of cloth picture by above-mentioned gain calculating mechanism; And by will multiply by by the gain mean value that above-mentioned mean value calculation mechanism calculates from the signal of 1 picture part of above-mentioned combination mechanism output, signal in an above-mentioned predetermined side's the cut zone, thereby revise the correction mechanism of the signal level between above-mentioned two cut zone;

Above-mentioned gain calculating mechanism is by each horizontal line in 1 picture, signal according to a plurality of whole-colored filtering pixel of above-mentioned cut zone boundary vicinity, calculate the predicted value of an identical filtering pixel signal of the opposing party's cut zone by 2 identical filtering pixel signals of side's cut zone, by the predicted value that relatively calculates and the real signal value of pixel thereof, and calculate gain.

The 2nd signal processing apparatus of the present invention is characterized in that,

Comprise: be divided into 2 parts about the camera watch region quilt, read the imaging apparatus of the signal of telecommunication by these each cut zone; Synthesize the signal of telecommunication of reading by above-mentioned imaging apparatus, generate the combination mechanism of 1 picture part signal; To each pixel signal in the gain calculating zone of the above-mentioned cut zone boundary vicinity in 1 width of cloth picture that generates by above-mentioned combination mechanism, carry out the smoothing mechanism of vertical direction low-pass filtering treatment; According to the signal after the Filtering Processing in the gain calculating zone that obtains by above-mentioned smoothing mechanism,, calculate the gain calculating mechanism of the relative gain of predefined side's cut zone by each horizontal line in the gain calculating zone; Calculate the mean value calculation mechanism of the gain mean value of each horizontal line in the gain calculating zone that is calculated by above-mentioned gain calculating mechanism; And by will multiply by by the gain mean value that above-mentioned mean value calculation mechanism calculates from the signal of 1 picture part of above-mentioned combination mechanism output, signal in an above-mentioned predetermined side's the cut zone, thereby revise the correction mechanism of the signal level between above-mentioned two cut zone;

Above-mentioned gain calculating mechanism each horizontal line in the gain calculating zone, signal according to a plurality of whole-colored filtering pixel of above-mentioned cut zone boundary vicinity, calculate the predicted value of an identical filtering pixel signal of the opposing party's cut zone by 2 identical filtering pixel signals of side's cut zone, by the predicted value that relatively calculates and the real signal value of pixel thereof, and calculate gain.

The 3rd signal processing apparatus of the present invention is characterized in that,

Comprise: be divided into 2 parts about the camera watch region quilt, read the imaging apparatus of the signal of telecommunication by these each cut zone; Synthesize the signal of telecommunication of reading by above-mentioned imaging apparatus, generate the combination mechanism of 1 picture part signal; In the signal according to the 1 picture part that generates by above-mentioned combination mechanism, a plurality of pixel signals of above-mentioned cut zone boundary vicinity, calculate the gain calculating mechanism of the relative gain of the cut zone of the predetermined side of each horizontal line in each 1 width of cloth picture; Calculate the 1st mean value calculation mechanism by the gain mean value that each horizontal line calculated in 1 width of cloth picture by above-mentioned gain calculating mechanism; Calculate by above-mentioned gain calculating mechanism by in the gain that each horizontal line calculated in 1 picture, the signal value of above-mentioned cut zone boundary vicinity pixel is the 2nd mean value calculation mechanism of the mean value of the horizontal line gain below the 1st setting; And in the signal in the above-mentioned predetermined side's cut zone in 1 picture part signal exporting by above-mentioned combination mechanism, signal value is the following gain mean value of signal times to be obtained by above-mentioned the 2nd mean value calculation mechanism of the 2nd setting, to signal value is than the gain mean value of the signal times more than the 3rd big setting of the 2nd setting to be obtained by above-mentioned the 1st mean value calculation mechanism, to signal value is signal between above-mentioned the 2nd setting and above-mentioned the 3rd setting, by the value of the gain mean value that multiply by according to this signal value weighted addition computing the gain mean value that obtains by above-mentioned the 1st mean value calculation mechanism and obtained by above-mentioned the 2nd mean value calculation mechanism, thereby revise the correction mechanism of the signal level difference between above-mentioned 2 cut zone;

Above-mentioned gain calculating mechanism is by each horizontal line in 1 picture, a plurality of according to above-mentioned cut zone boundary vicinity with filtering pixel signal of the same colour, signal by 2 same filtering pixels of side's cut zone, calculate the predicted value of 1 same filtering pixel signal of the opposing party's cut zone, by the predicted value that relatively calculates and the real signal value of its pixel, and calculate gain.

The 4th signal processing apparatus of the present invention is characterized in that,

Comprise: 2 parts about camera watch region is split into, read the imaging apparatus of the signal of telecommunication by these each cut zone; Synthesize the signal of telecommunication of reading by above-mentioned imaging apparatus, the combination mechanism that generates 1 picture part signal; To each pixel signal in the gain calculating zone of the above-mentioned cut zone boundary vicinity in 1 width of cloth picture that generates by above-mentioned combination mechanism, carry out the smoothing mechanism of vertical direction low-pass filtering treatment; According to the signal after the Filtering Processing in the gain calculating zone that is generated by above-mentioned smoothing mechanism, each horizontal line in the gain calculating zone calculates the gain calculating mechanism of the relative gain of predefined side's cut zone; Calculating is by the 1st mean value calculation mechanism of above-mentioned gain calculating mechanism by the gain mean value that each horizontal line calculated in the gain calculating zone; Calculate by above-mentioned gain calculating mechanism by in the gain that each horizontal line calculated in 1 picture, the signal value of above-mentioned cut zone boundary vicinity pixel is the 2nd mean value calculation mechanism of the mean value of the horizontal line gain below the 1st setting; And in the signal in the above-mentioned predetermined side's cut zone in 1 picture part signal of exporting by above-mentioned combination mechanism, to signal value is the gain mean value of signal times to be obtained by above-mentioned the 2nd mean value calculation mechanism below the 2nd setting, to signal value is than the signal more than the 3rd big setting of the 2nd setting, multiply by the gain mean value that obtains by above-mentioned the 1st mean value calculation mechanism, to signal value is signal between above-mentioned the 2nd setting and above-mentioned the 3rd setting, by the value of the gain mean value that multiply by according to this signal value weighted addition computing the gain mean value that obtains by above-mentioned the 1st mean value calculation mechanism and obtained by above-mentioned the 2nd mean value calculation mechanism, thereby revise the correction mechanism of the signal level difference between above-mentioned 2 cut zone;

Above-mentioned gain calculating mechanism, each horizontal line in each gain calculating zone, a plurality of according to above-mentioned cut zone boundary vicinity with filtering pixel signal of the same colour, signal by 2 same filtering pixels of side's cut zone, calculate the predicted value of 1 same filtering pixel signal of the opposing party's cut zone, by the predicted value that relatively calculates and the real signal value of its pixel, and calculate gain.

In above-mentioned the 1st～the 4th signal processing apparatus, as above-mentioned gain calculating mechanism, the parts that have following mechanism have for example been adopted:, select the 1st mechanism of 3 pixel signals of continuous same filtering of the same colour by totally 8 pixels of each per 4 pixel in zone of the above-mentioned cut zone boundary vicinity of 1 horizontal line in 1 picture; In 3 pixel signals selecting by above-mentioned the 1st mechanism, 2 pixel signals belonging to the 1st cut zone calculate the 2nd mechanism of the predicted value of 1 pixel signal that belongs to the opposing party's cut zone; According to the real signal value of the predicted value that calculates by above-mentioned the 2nd mechanism and its pixel, calculate the 3rd mechanism of the relative gain of above-mentioned predetermined side's cut zone; In above-mentioned 8 pixel coverages on above-mentioned horizontal line, other combinations to 3 pixels of continuous same color filter, by carrying out repeatedly and above-mentioned the 1st mechanism, the identical processing of above-mentioned the 2nd mechanism and above-mentioned the 3rd mechanism, and calculate the 4th mechanism of gain respectively; And carry out in all horizontal line in 1 picture and the 5th mechanism from the same processing of above-mentioned the 1st mechanism to above-mentioned the 4th mechanism.

In above-mentioned the 1st～the 4th signal processing apparatus, be provided with the gain that calculates by per 1 picture by above-mentioned gain calculating mechanism time orientation smoothing mechanism in the time orientation smoothing, above-mentioned correction mechanism also can adopt the gain that is obtained by above-mentioned time orientation smoothing mechanism, revises the signal level difference between above-mentioned two cut zone.

The 5th signal processing apparatus of the present invention is characterized in that,

Comprise: camera watch region is split into a plurality of parts at left and right directions, reads the imaging apparatus of the signal of telecommunication by these each cut zone; Synthesize the signal of telecommunication of reading by above-mentioned imaging apparatus, the combination mechanism that generates 1 picture part signal; According to the signal of the 1 picture part that generates by above-mentioned combination mechanism, calculate the 1st gain calculating mechanism that it organizes the relative gain of side's cut zone predetermined in interior 2 cut zone respectively in each group that constitutes by 2 cut zone of adjacency; Each gain according to each group that calculates by above-mentioned the 1st gain calculating mechanism, as the benchmark cut zone, calculate the 2nd gain calculating mechanism of the gain of other relative each cut zone of benchmark cut zone with 1 predetermined in all cut zone cut zone respectively; And according to the gain of other each cut zone that calculate, that the benchmark cut zone is relative by the 2nd gain calculating mechanism, by the signal in the signal by 1 picture part of above-mentioned combination mechanism output, in the corresponding divided areas is revised, thereby revise the correction mechanism of the signal level difference between a plurality of cut zone;

The 1st gain calculating mechanism comprises: the 1st mechanism of the gain of in the signal according to 1 picture part that is generated by above-mentioned combination mechanism in each group, it organizes the signal of interior 2 a plurality of pixels of cut zone boundary vicinity, calculate respectively in 1 picture in each horizontal line in 2 cut zone in its group, a predetermined side's cut zone is relative; And in each group,, obtain the 2nd mechanism of each group gain by calculating the gain mean value of each horizontal line in 1 picture that calculates by above-mentioned the 1st mechanism; Above-mentioned the 1st mechanism, in each group, each horizontal line in 1 picture, organize a plurality of signals of interior 2 cut zone boundary vicinities according to it with filtering pixel of the same colour, go out the predicted value of signal of 1 same filtering pixel of other cut zone by the calculated signals of 2 same filtering pixels of side's cut zone, by the predicted value that relatively calculates and the real signal value of its pixel, and calculate gain.

The 6th signal processing apparatus of the present invention, it is characterized in that, in above-mentioned the 5th signal processing apparatus, the 1st gain calculating mechanism comprises: in each group, in the signal according to 1 picture part that generates by above-mentioned combination mechanism, it organizes the signal of a plurality of pixels of interior 2 cut zone boundary vicinities, calculate each horizontal line in 1 picture respectively, the 1st mechanism of the gain that side's cut zone of being scheduled in 2 cut zone in its group is relative; In each group,, obtain the 2nd mechanism of the 1st gain of each group by calculating the mean value of the gain of each horizontal line in 1 picture that calculates by above-mentioned the 1st mechanism; And in each group, by in the gain that calculates each horizontal line in 1 picture that calculates by above-mentioned the 1st mechanism, its pixel signal value of organizing interior 2 cut zone boundary vicinities is the mean value of the horizontal line gain below the 1st setting, thereby obtains the 3rd mechanism that respectively organizes the 2nd gain;

Above-mentioned the 2nd gain calculating mechanism comprises: according to the 1st gain of each group that is calculated by last the 1st gain calculating mechanism, as the benchmark cut zone, calculate the mechanism of the 3rd gain of other relative each cut zone of benchmark cut zone with 1 predetermined in all cut zone cut zone respectively; And according to the 2nd gain of respectively organizing that calculates by above-mentioned the 1st gain calculating mechanism, as the benchmark cut zone, calculate the mechanism of the 4th gain of other relative each cut zone of benchmark cut zone with 1 predetermined in all cut zone cut zone respectively;

Above-mentioned correction mechanism basis is calculated by the 2nd gain calculating mechanism, the 3rd gain of other each cut zone that reference area is relative and the 4th gain, in signal by 1 picture part of above-mentioned combination mechanism output, signal in the corresponding divided areas is revised, to revising in the signal in the Object Segmentation zone, signal value is the following signal of the 2nd setting, multiply by pairing the 4th gain of its cut zone, to signal value is than the signal more than the 3rd big setting of the 2nd setting, multiply by the 3rd gain corresponding to its cut zone, to signal value is signal between above-mentioned the 2nd setting and above-mentioned the 3rd setting, multiply by according to this signal value weighted addition computing the 3rd gain and the 4th value that gains corresponding to its cut zone.

The 7th signal processing apparatus of the present invention is characterized in that,

Comprise: camera watch region is split into a plurality of parts at left and right directions, reads the imaging apparatus of the signal of telecommunication in these each cut zone; Synthesize the signal of telecommunication of reading by above-mentioned imaging apparatus, generate the combination mechanism of 1 picture part signal; According to the signal of the 1 picture part that generates by above-mentioned combination mechanism,, calculate the 1st gain calculating mechanism of the relative gain of its cut zone of organizing a predetermined side in interior 2 cut zone respectively in each 2 group that cut zone constitutes by adjacency; Gain according to each group that is calculated by above-mentioned the 1st gain calculating mechanism as the benchmark cut zone, calculates the 2nd gain calculating mechanism of the gain of other relative cut zone of benchmark cut zone with 1 predetermined in all cut zone cut zone respectively; And according to the gain of other cut zone that calculate, that the benchmark cut zone is relative by the 2nd gain calculating mechanism, revise by the signal in the signal to 1 picture part of generating by above-mentioned combination mechanism, in the corresponding divided areas, thereby revise the correction mechanism of the signal level between a plurality of cut zone;

The 1st gain calculating mechanism comprises: in each group, in the 1 picture part signal that generates by above-mentioned combination mechanism, it organizes each relative pixel signal of gain calculating zone of interior 2 cut zone boundary vicinities, carries out the 1st mechanism of the low-pass filtering treatment of vertical direction; In each group, according to the signal after the Filtering Processing in this group gain calculating zone that obtains by above-mentioned the 1st mechanism, calculate in each horizontal Xingqi group in this group gain calculating zone the 2nd mechanism of the relative gain of a side's predetermined in 2 cut zone cut zone respectively; And,, organize the 3rd mechanism of gaining thereby obtain each by calculating the mean value of each the horizontal line gain that calculates by above-mentioned the 2nd mechanism in each group;

Above-mentioned the 2nd mechanism is in each group, by each horizontal line in the gain calculating zone of this group, organize a plurality of signals of interior 2 cut zone boundary vicinities according to this with filtering pixel of the same colour, signal by 2 same filtering pixels of side's cut zone, calculate the predicted value of a same filtering pixel signal of the opposing party's cut zone, by the predicted value that relatively calculates and the real signal value of its pixel, and calculate gain.

The 8th signal processing apparatus of the present invention, it is characterized in that, in above-mentioned the 7th signal processing apparatus, the 1st gain calculating mechanism comprises: in each group, in the signal to 1 picture part of generating by above-mentioned combination mechanism, it organizes the signal of each pixel of interior 2 cut zone boundary vicinities, carries out the 1st mechanism of vertical direction low-pass filtering treatment; In each group, according to the signal after the Filtering Processing in the gain calculating zone of this group that obtains by above-mentioned the 1st mechanism, the 2nd mechanism of the gain that the cut zone of calculate respectively in each horizontal line of the gain calculating of this group zone, this organizing a side predetermined in interior 2 cut zone is relative; In each group,, obtain the 3rd mechanism that respectively organizes the 1st gain by calculating the mean value of each the horizontal line gain that calculates by above-mentioned the 2nd mechanism; And in each group, by calculate in each horizontal line gain that calculates by above-mentioned the 2nd mechanism, its signal value of organizing the boundary vicinity pixel of interior 2 cut zone is the mean value of the horizontal line gain below the 1st setting, obtains the 4th mechanism of the 2nd gain of each group;

The 2nd gain calculating mechanism comprises: according to the 1st gain of each group that is calculated by last the 1st gain calculating mechanism, as the benchmark cut zone, calculate the mechanism of the 3rd gain of other relative each cut zone of benchmark cut zone with 1 predetermined in all cut zone cut zone respectively; And according to the 2nd gain of respectively organizing that calculates by above-mentioned the 1st gain calculating mechanism, as the benchmark cut zone, calculate the mechanism of the 4th gain of other relative each cut zone of benchmark cut zone with 1 predetermined in all cut zone cut zone respectively;

Above-mentioned correction mechanism basis is calculated by the 2nd gain calculating mechanism, the 3rd gain of other each cut zone that reference area is relative and the 4th gain, in signal by 1 picture part of above-mentioned combination mechanism output, signal in the corresponding divided areas is revised, to revising in the signal in the Object Segmentation zone, signal value is the following signal of the 2nd setting, multiply by pairing the 4th gain of its cut zone, to signal value is than the signal more than the 3rd big setting of the 2nd setting, multiply by the 3rd gain corresponding to its cut zone, to signal value is signal between above-mentioned the 2nd setting and above-mentioned the 3rd setting, multiply by according to this signal value, the weighted addition computing pairing the 3rd gain of its cut zone and the 4th value that gains.

Description of drawings

Fig. 1 is the block diagram that the part of expression digital camera constitutes.

Fig. 2 is the schematic diagram that is used to illustrate the basic idea of the correction of being undertaken by gain calculating circuit 8 and output level difference correction circuit 9.

Fig. 3 is the figure of the light quantity one output signal level characteristic of expression CCD1.

Fig. 4 is the block diagram of the formation of expression gain calculating circuit 8.

Fig. 5 is the schematic diagram of expression by the table (register option table) of 4 combinations of the 1st selector 30 selections.

Fig. 6 is the curve that is used to illustrate the action of the 3rd selector 37.

Fig. 7 is the curve that is used to illustrate the action of the 5th selector 38.

Fig. 8 is the circuit diagram of an example of expression filter circuit.

Fig. 9 figure is the curve of expression corresponding to the gain of signal level.

Figure 10 is expression: the S/N of image than situation about worsening under, all gray scales become smooth the time than the distribution of (gain), the distribution of the brightness ratio (gain) during noise effect reduction when expression makes gain calculating has the curve of peak value.

Figure 11 is the block diagram that the part of expression digital camera constitutes.

Figure 12 is zone (gain calculating zone) E of vertical LPF processing is implemented in expression by gain calculating segment smoothing circuit 14 a schematic diagram.

Figure 13 is the enlarged drawing in the interior zone of the regional e of Figure 12.

Figure 14 is the circuit diagram of the configuration example of expression gain calculating segment smoothing circuit 14.

Figure 15 is the block diagram that the part of expression digital camera constitutes.

Embodiment

Below, with reference to accompanying drawing, embodiments of the invention are described.

[1] the 1st embodiment

The part that Fig. 1 shows digital camera constitutes.

2 zones (left CCD and right CCD) about CCD1 is divided into its camera watch region.To be made as ch1 by the signal that read in a side zone, the signal of being read by the opposing party zone is made as ch2.At each passage, be provided with CDS/AGC circuit and A/D convertor circuit.

Signal ch1 by read in a side zone delivers to image combiner circuit 6 by CDS/AGC circuit 2 and A/D convertor circuit 3.Signal ch2 by read in the opposing party zone delivers to image combiner circuit 6 by CDS/AGC circuit 4 and A/D convertor circuit 5.

In image combiner circuit 6, two channel signal ch1, ch2 are synthesized, and are converted to the signal of 1 system.By the signal that image combiner circuit 6 obtains,, deliver to gain calculating circuit 8 and output level difference correction circuit 9 by being used to make the constant clamp circuit of black level 7.

Gain calculating circuit 8 is the circuit that are used to be calculated as the gain of the output signal level difference of revising two passages.Output level difference correction circuit 9 is according to the gain that is calculated by gain calculating circuit 8, is used to revise the circuit of the output signal level difference of two passages.

Output signal from output level difference correction circuit 9 is sent to YRGB generative circuit 10.In YRGB generative circuit 10,, generate Y, R, G, B signal according to output signal from output level difference correction circuit 9.Y-signal by YRGB generative circuit 10 generates is sent to encoder 13 by Y treatment circuit 11.R, G, B signal by YRGB generative circuit 10 generates are sent to coding circuit 13 by C treatment circuit 12.In coding circuit 13, carry out the compression of Mpeg4 mode, Jpeg mode etc.

In addition, according to output signal corresponding to the clamp circuit 7 of certain two field picture, when calculating gain by gain calculating circuit 8, both can store this two field picture into memory, adopt the relative gain of this frame, the output signal that is stored in the pairing clamp circuit 7 of this two field picture in the memory was revised, again can be according to the output signal of the pairing clamp circuit 7 of certain two field picture, calculate gain by gain calculating circuit 8, utilize this gain, following two field picture is revised.

With reference to Fig. 2, the basic idea of being revised by gain calculating circuit 8 and output level difference correction circuit 9 is described.

At the upside of Fig. 2, show as the pixel in 1 horizontal line of CCD1, each 4 pixel of the L both sides, border between left CCD and the right CCD amount to 8 pixel P1～P8.In addition, the pixel value of each pixel P1～P8 is represented with p1～p8.But, for convenience of explanation,, pixel value p1, p3, p5, the p7 of P1, P3, P5, P7 group moved to downside represents with respect to pixel value p2, p4, p6, the p8 of P2, P4, P6, P8 group.

(1) at first, select 3 continuous filtering pixels same of the same colour from above-mentioned 8 pixels.If the color filter array is the array that pattra leaves (bayer) is arranged, then P2, P4, P6, P8 group are the pixels with color filter.In addition, pixel P1, P3, P5, P7 group are the pixels with color filter.

Therefore, the combination as selected 3 pixels has (P1, P3, P5), (P2, P4, P6), (P3, P5, P7), (P4, P6, P8) 4 groups.

(2) calculate each group gain.

Gain calculating method to (P2, P4, P6) group describes.By among 3 pixel P2, P4, the P6, belong to pixel value p2, the p4 of 2 pixel P2, the P4 in side zone (being left CCD in this example), prediction belongs to the pixel value of 1 pixel P6 in the opposing party zone (being right CCD in this example).That is, get in the coordinate system of pixel location, the longitudinal axis number of winning the confidence level, by the pixel value of the slope prediction pixel P6 correspondence that connects pixel value p2 and p4 line at transverse axis.In Fig. 2, use the predicted value of p6 ' expression pixel P6.

And, calculate gain g6 by actual pixels value p6 and the predicted value p6 ' of pixel P6.In the present embodiment, establish and know that in advance right ccd output signal level becomes than left ccd output signal level height.Under the situation of the predicted value of the pixel in predicted value is right CCD, go out gain according to actual value ÷ predictor calculation; Under the situation of the predicted value of the pixel in predicted value is left CCD, go out gain according to predicted value ÷ calculated with actual values.Therefore, gain g6 is tried to achieve by p6 ÷ p6 '.

Even to other combinations (P1, P3, P5), (P3, P5, P7) and (P4, P6, P8), equally also when calculating predicted value p5 ', p3 ', p4 ', calculate gain g5, g3, g4.

(3), multiply by the processing of not carrying out above-mentioned (1), (2) repeatedly, resulting all gains according to the number of horizontal lines of pixel.

(4), calculate the mean value of gain by the gain product value that obtains.

(5) by to the signal times of left each pixel of CCD with gain mean value, thereby the output signal level of revising two passages is poor.

But, the characteristic of light quantity-output signal level of CCD1, as shown in Figure 3, for non-linear.For this reason, the gain difference suitable according to different brightness.

Therefore, in the present embodiment, except that above-mentioned gain (the 1st gain), only with the pixel of the brightness value below 5% with dynamic range, calculate gain (the 2nd gain),, change the gain of being taken advantage of according to the pixel value (brightness) of answering modification region (left CCD in this example) pixel.

That is,, utilize the 2nd gain to revise for the pixel of the brightness of dynamic range below 5%.For the pixel of the brightness of dynamic range 5%～10%, the 1st gain and the 2nd gain that gains are revised to have utilized the weighted addition computing.For the pixel of the brightness of dynamic range more than 10%, utilize the 1st gain to revise.

Fig. 4 shows the formation of gain calculating circuit 8.

The the 1st～the 8th register 21～28th is used for keeping: as the pixel in 1 horizontal line of CCD1, each 4 pixel of the side of the border L two between left CCD and the right CCD amount to the register of the pixel value reg1～reg8 of 8 pixels.

Pixel value reg1～the reg8 that remains in each register 21～28 is sent to the 1st selector 30.The 1st selector 30 is selected the pixel value of 3 pixels of continuous same color filter by the pixel value reg1～reg8 that remains on 8 pixels in each register 21～28, as sel1, sel2, sel3 output.

As mentioned above, as the combination of selected 3 pixels, as shown in Figure 2 (P1, P3, P5), (P2, P4, P6), (P3, P5, P7) and (P4, P6, P8) 4 groups are arranged.At this, the 1st selector 30 is selected successively and is exported these 4 groups.

Fig. 5 has shown the table (register option table) of expression by 4 combinations of the 1st selector 30 selections.

At this, be that example describes to select reg4 (the pixel value p4 of the P4 pixel of corresponding diagram 2) as sel1, to select reg2 (the pixel value p2 of the P2 pixel of corresponding diagram 2), select the situation of reg6 (the pixel value p6 of the P4 pixel of corresponding diagram 2) as sel3 as sel2.

Sel1 (p4) is sent to multiplier 31, adder 32, subtracter the 33, the 3rd selector the 37, the 5th selector 38.Sel2 (p2) is sent to subtracter 33.Sel3 (p6) is sent to the 3rd selector 37, divider the 36, the 5th selector 38.

In subtracter 33, carry out sel1-sel2 (=p4-p2) computing.The operation result diff of subtracter 33 (sel1-sel2) when being sent to absolute value circuit (ABS) 34, also is sent to adder 32.

In absolute value circuit 34, obtain the operation result diff of subtracter 33 absolute value (| diff|=|sel1-sel2|), the absolute value that obtains is sent to the 2nd selector 35.In adder 32, for the predicted value that calculates the pixel (P6) corresponding to sel3 (p6 '), (=p4+diff) computing, its operation result prdct (=P6 ') is sent to the 2nd selector 35 to carry out sel1+diff.In multiplier 31, sel1 be multiply by COEFFICIENT K, its multiplication result diff_th (=K*sel1=K*p4) be sent to the 2nd selector 35.K is set at the value in 1/2～1/64 scope.

The 2nd selector 35 is judged the absolute value from absolute value circuit 34 | diff| (=| sel1-sel2|) whether recently from the multiplication result diff_th of multiplier 31 (=K*sel1) big (| diff|＞diff_th).That is, judge sel1 (=p4) (whether the absolute value of=p2) difference bigger than diff_th with sel2.And, if | diff|＞diff_th, judge that then the reliability of predicted value is low, get rid of predicted value prdct.That is, in order to calculate the 1st gain, the predicted value prdct that does not use this to obtain.If | diff|≤diff_th, then the predicted value prdct that this is obtained delivers to divider 36.And, in the 2nd selector 35, judge absolute value | whether diff| is bigger than K*sel1, also can judge absolute value | and whether diff| is bigger than the threshold value (pre-set threshold) of regulation.

In divider 36, in order to calculate gain, carry out the computing of sel3 ÷ prdct (=p6 ÷ p6 '), its operation result is sent to the 3rd selector 37 and the 5th selector 38.In the 3rd selector 37, give threshold value th1 and th2 (th2＞th1).The Calculation of Gain precision is considered to as shown in Figure 6 more than the threshold value th1 and the height of the scope below threshold value th2.That is it is low, to be considered to the gain accuracy that calculates in low-light level portion and high gray scale portion.The 3rd selector 37 judge sel1 (=p4) and sel3 (=p6) whether both satisfy in this condition more than the threshold value th1 and in the scope below th2.Under the situation that does not satisfy this condition, the division arithmetic of eliminating divider 36 is sel3/prdct as a result.Satisfying under the situation of this condition, with the division arithmetic of divider 36 as a result sel3/prdct export as gain.

In the 5th selector 38, give threshold value th5.The 5th selector 38 is in order to calculate the 2nd gain, and as shown in Figure 7, the low-light level portion below threshold value th5 is used to extract the gain that is just calculated.The 5th selector 38, judge sel1 (=p4) and sel3 (=p6) whether both satisfy this condition below threshold value th5.Under the situation that does not satisfy this condition, the division arithmetic of eliminating divider 36 is sel3/prdct as a result.Satisfying under the situation of this condition, with the division arithmetic of divider 36 as a result sel3/prdct export as gain_low.

Gain by 37 outputs of the 3rd selector is sent to H accumulative total circuit 40.H accumulative total circuit 40 is to be used for having: the 4th selector 41, adder 42 and register (Hadd) 43 added up the circuit of computing in 1 horizontal period by the gain of the 3rd selector 37 outputs.

In the 4th selector 41, be endowed threshold value th3 and th4.The 4th selector 41 is used to get rid of the outer gain of prescribed limit.Be specially: the gain in the scope of (th3-th4)≤gain≤(th3+th4) is only selected and exported to the 4th selector 41, gets rid of above-mentioned extraneous gain.In addition, the gain that the 4th selector 41 is imported being judged as under the situation in the scope of (th3-th4)≤gain≤(th3+th4), outputs to counter 61 with clock pulse.61 pairs of clock pulse from the 4th selector 41 of counter are counted.

Gain input summer 42 from 41 outputs of the 4th selector.In adder 42, also input remains on the gain aggregate-value ghadd in the register (Hadd) 43.Adder 42 will be added to from the gain of the 4th selector 41 among the gain aggregate-value ghadd from register (Hadd) 43.The add operation result of adder 42 is stored in the register (Hadd) 43.Like this, in case the gain aggregate-value of 1 horizontal line part is stored in the register 43, then the 1 horizontal line gain aggregate-value partly that will be stored in the register 43 by register 43 is given V accumulative total circuit 50, and simultaneously, the content of register 43 is eliminated.

V accumulative total circuit 50 is the circuit that are used to calculate each gain aggregate-value during vertical, has: adder 51 and register (Vadd) 52.Input to adder 51 by H accumulative total circuit 40 at the gain aggregate-value that each horizontal period calculates.In adder 51, also input is kept at the gain aggregate-value gvadd in the register (Vadd) 52.Adder 51 will be added to from the gain aggregate-value of H accumulative total circuit 40 on the gain aggregate-value gvadd from register (Vadd) 52.The add operation result of adder 51 is stored in the register (Vadd) 52.Like this, in case 1 vertical during part the gain aggregate-value be stored in the register 52, then by register 52 by switch 63 will be stored in 1 in the register 52 vertical during part the gain aggregate-value give divider 65, simultaneously, the content of register 52 is eliminated.At this moment, in divider 65,, give the count value count of counter 61 by switch 64.Divider 65 by carry out 1 vertical during part the computing of gain aggregate-value ÷ cuont, calculate the 1st gain fgain1.

Gain_low by 38 outputs of the 5th selector is sent to H accumulative total circuit 70.H accumulative total circuit 70 is to be used for that accumulative total is had: the 6th selector 71, adder 72 and register (Hadd) 73 by the circuit of the gain of the 5th selector 38 outputs in 1 horizontal period.

The 6th selector 71 carries out the processing same with the 4th selector 41.That is, the gain in the scope of (TH3-TH4)≤gain≤(TH3+TH4) is only selected and exported to the 6th selector 71, gets rid of above-mentioned extraneous gain.In addition, the gain_low that the 6th selector 71 is imported being judged as under the situation in the scope of (TH3-TH4)≤gain_low≤(TH3+TH4), outputs to counter 62 with clock pulse.62 pairs of clock pulse from the 6th selector 71 of counter are counted.

Gain_low input summer 72 from 71 outputs of the 6th selector.In adder 72, also input remains on the gain aggregate-value ghadd_low in the register (Hadd) 73.Adder 72 will be added to from the gain_low of the 6th selector 71 among the gain aggregate-value ghadd_low from register (Hadd) 73.The add operation result of adder 72 is stored in the register.Like this, in case the gain aggregate-value of 1 horizontal line part is stored in the register 73, then the gain aggregate-value that will be stored in 1 horizontal line part in the register 73 by register 73 offers V accumulative total circuit 80, and simultaneously, the content of register 73 is eliminated.

V accumulative total circuit 80 is the circuit that are used to calculate each gain aggregate-value during vertical, has: adder 81 and register (Vadd) 82.Input to adder 81 by H accumulative total circuit 70 at the gain aggregate-value that each horizontal period calculates.In adder 81, also input is kept at the gain aggregate-value gvadd_low in the register (Vadd) 82.Adder 81 will be added to from the gain aggregate-value of H accumulative total circuit 70 on the gain aggregate-value gvadd_low from register (Vadd) 82.The add operation result of adder 81 is stored in the register (Vadd) 82.Like this, in case 1 vertical during part the gain aggregate-value be stored in the register 82, then by register 82 by switch 63 will be stored in 1 in the register 82 vertical during part the gain aggregate-value offer divider 65, simultaneously, the content of register 82 is eliminated.At this moment, by switch 64, the count value count_low of counter 62 is offered divider 65.Divider 65 calculates the 2nd gain fgain2 by carrying out 1 the computing of gain aggregate-value ÷ count_low during vertical.

At each frame, as mentioned above, calculate the 1st gain fgain1 and the 2nd gain fgain2, but, be preferably in the circuit that the filtering of carrying out time orientation is set in the gain calculating circuit 8 in order to prevent the rapid variation of interframe.Fig. 8 shows an example that is used to carry out this filter filtering circuit.

At this, be that example describes with the 1st gain fgain1.Represent from the gain of filter circuit output with a.

The 1st gain fgain1 imports in the 1st multiplier 91.Coefficient (1-K2) is given to the 1st multiplier 91.K2 for example is set at the value in 1/2～1/64 scope.In the 1st multiplier 91, carry out the computing of (1-K) * fgain1.The operation result of multiplier 91 is sent to adder 92.

On the other hand, in the 2nd multiplier 93, be endowed COEFFICIENT K 2.In addition, in the 2nd multiplier 93, also be endowed the output a of preceding frame filter circuit by register 94.In the 2nd multiplier 93, carry out the computing of K2*a.The operation result of the 2nd multiplier 93 is sent to adder 92.In adder 92, carry out the computing of (1-K) * fgain1+K2*a.The operation result of adder 92 is stored in the register 94, simultaneously as this 1st gain a output that calculates.In addition, represent the output of the filter circuit of the 2nd gain fgain2 with b.

Output level difference correction circuit 9 is according to the 1st gain a that is obtained by gain calculating circuit 8 and the 2nd gain b, in the signal to 1 passage part of being imported, revise corresponding to the pixel signal level of left CCD.

If corresponding to the peaked signal level of brightness is L.In this embodiment, L=2 ⁿ(removing middle n=12).Corresponding to the gain of signal level as shown in Figure 9.That is be that the gain gL of the following pixel of L/16 becomes the 2nd gain b, corresponding to signal level.In addition, the gain gH corresponding to the following pixel of signal level L/8 becomes the 1st gain a.Corresponding to the gain gM of pixel in signal level L/16～L/8 scope,, then calculate by following formula (1) if signal level is made as X.

gM＝b+(a-b)×[{X-(L/16)}÷(L/16)]…(1)

Output level difference correction circuit 9 multiply by the pairing gain (g of this signal level to pairing each pixel signal of left CCD _L, g _HOr g _M).Thus, it is poor to revise the output signal level of two passages.

[2] the 2nd embodiment

In above-mentioned the 1st embodiment, modified gain such as following calculating.

(1) as shown in Figure 2, amount to 8 pixel P1～P8, select 3 pixels of continuous filtering pixel same of the same colour from each 4 pixel of both sides as the border L between pixel, left CCD and the right CCD in the horizontal line of CCD1.If the color filter array is the array that pattra leaves is arranged, (P1, P3, P5), (P2, P4, P6), (P3, P5, P7) and (P4, P6, P8) 4 groups then as the combination of selected 3 pixels, are arranged.

(2) in each combination (P1, P3, P5), (P2, P4, P6), (P3, P5, P7) and (P4, P6, P8), pixel value by 2 pixels in the CCD side of a side among left CCD and the right CCD, predict the pixel value of a pixel of the opposing party CCD side, calculate the relative predicted value and the brightness ratio between the measured value (gain g5, g6, g3, g4) of 1 pixel of predicted value and the opposing party CCD side.

(3) according to the number of pixel horizontal line, carry out the processing of above-mentioned (1), (2) repeatedly.

(4), calculate and be used for revising left CCD and by the modified gain of CCD one side's ccd signal by the distribution of resulting all brightness ratios (gain).

But, the S/N of image than situation about worsening under, shown in curve S among Figure 10 1,, become difficult so detect the peak value that distributes because the distribution of all brightness ratios (gain) that obtained by above-mentioned (3) becomes smooth.For this reason, can not calculate correct modified gain.

Therefore, in embodiment 2, as shown in figure 11,,, reduce the noise in the gain calculating zone by gain calculating segment smoothing circuit 14 is set in the prime of gain calculating circuit 8.And adopt the calculated signals of each pixel in the gain calculating zone after noise reduces to go out gain.Like this, shown in dotted line S2 among Figure 10, have peak value, can calculate correct modified gain as the distribution of all brightness ratios (gain) of obtaining by above-mentioned (3).And, in Figure 11, adopt identical symbol with Fig. 1 something in common, omit its explanation.

As gain calculating segment smoothing circuit 14, adopt and carry out the VLPF circuit that vertical LPF handles.Implemented vertical zone (gain calculating zone) E that handles of LPF by gain calculating smoothing circuit 14, as shown in figure 12, for the border L that comprises with left CCD on each horizontal line of CCD1 and right CCD is the zone of 8 pixels at center.Each pixel in this gain calculating zone is implemented vertical LPF to be handled.

For example, serve as to pay close attention to vertical LPF under the situation of pixel to handle and describe to central pixel with 9 pixels of the vertical direction in the regional e that is arranged in Figure 12.

Figure 13 is the enlarged drawing in the zone in the e of Figure 12 zone.With being arranged in 9 pixels of the vertical direction in the regional e, begin to be made as A from downside ₀, A ₁, A ₂..., A ₇, A ₈The concern pixel is A ₄If A ₀～A ₈Pixel value be S ₀～S ₈Pay close attention to pixel A ₄The vertical LPF pixel value S after handling ₄' for example use following formula (2) to represent.V _Km(m=0,1 ..., 8) be the value in 0～7 scope.

${{\mathrm{<figure-callout\; id="4"\; label="S"\; filenames="A200510106876.500341.png"\; state="\{\{state\}\}">S</figure-callout>}}_4}^{\&prime;}=\frac{{\mathrm{<figure-callout\; id="0"\; label="V\; K"\; filenames="A200510106876.500401.png"\; state="\{\{state\}\}">V</figure-callout>}}_K\&CenterDot;{\mathrm{<figure-callout\; id="0"\; label="S"\; filenames="A200510106876.500401.png"\; state="\{\{state\}\}">S</figure-callout>}}_0+{\mathrm{<figure-callout\; id="1"\; label="V\; K"\; filenames="A200510106876.500341.png,A200510106876.500351.png"\; state="\{\{state\}\}">V</figure-callout>}}_K\&CenterDot;{\mathrm{<figure-callout\; id="1"\; label="S"\; filenames="A200510106876.500341.png,A200510106876.500351.png"\; state="\{\{state\}\}">S</figure-callout>}}_1+...+V_{K7}\&CenterDot;S_7+{\mathrm{<figure-callout\; id="8"\; label="V\; K"\; filenames="A200510106876.500351.png"\; state="\{\{state\}\}">V</figure-callout>}}_K\&CenterDot;S_8}{{\mathrm{<figure-callout\; id="0"\; label="V\; K"\; filenames="A200510106876.500401.png"\; state="\{\{state\}\}">V</figure-callout>}}_K+{\mathrm{<figure-callout\; id="1"\; label="V\; K"\; filenames="A200510106876.500341.png,A200510106876.500351.png"\; state="\{\{state\}\}">V</figure-callout>}}_K+...+V_{K7}+V_{K8}}----\left(2\right)$

Figure 14 shows the configuration example of gain calculating segment smoothing circuit 14.

101～108 is the 1st grade～the 8th grade line storage can storing the data of 8 pixel parts respectively.Each line storage 101～108 is made of 8 triggers (FF) that are connected in series.In each FF, can store the data of 1 pixel part.The n level (n=1,2 ..., 7) the FF of rear end of line storage be connected in series in the FF of n+1 level line storage front.But, in these line storages, the data of the pixel in the storage gain zoning only.In gain calculating segment smoothing circuit 14, obtain as signal Out by the pairing pixel of data (concern pixel) the opposing vertical LPF output of the FF output of rear ends in the 4th grade of line storage 104.

The output signal In of clamp circuit 7 is imported into the FF of head end in the 1st grade of line storage 101 when being imported into multiplier 118.In multiplier 118, to signal In (=S _H) multiply by coefficient V _K8The output signal V of multiplier 118 _K8S ₈Be sent to adder 128.

The output signal S of the 1st grade of line storage 101 terminal FF ₇Be sent to multiplier 117, multiply by V _K7The output signal V of multiplier 117 _K7S ₇Be sent to adder 127.The output signal S of the 2nd grade of line storage 102 terminal FF ₆Be sent to multiplier 116, multiply by V _K6The output signal V of multiplier 116 _K6S ₆Be sent to adder 127.In adder 127, to the output signal V of multiplier 117 _K7.S ₇Output signal V with multiplier 116 _K6S ₆Carry out add operation.Output signal (the V of adder 127 _K6S ₆+ V _K7S ₇) be sent to adder 126.

The output signal S of 3rd level line storage 103 terminal FF ₅Be sent to multiplier 115, multiply by V _K5The output signal V of multiplier 115 _K5S ₅Be sent to adder 125.The output signal S of the 4th grade of line storage 104 terminal FF ₄Be sent to multiplier 114, multiply by V _K4The output signal V of multiplier 114 _K4S ₄Be sent to adder 125.In adder 125, to the output signal V of multiplier 115 _K5S ₅Output signal V with multiplier 114 _K4S ₄Carry out add operation.Output signal (the V of adder 125 _K4S ₄+ V _K5S ₅) be sent to adder 126.In adder 126, to the output signal (V of adder 127 _K6S ₆+ V _K7S ₇) and the output signal (V of adder 125 _K4S ₄+ V _K5S ₅) carry out add operation.

The output signal S of the 5th grade of line storage 105 terminal FF ₃Be sent to multiplier 113, multiply by V _K3The output signal V of multiplier 113 _K3S ₃Be sent to adder 124.The output signal S of the 6th grade of line storage 106 terminal FF ₂Be sent to multiplier 112, multiply by V _K2The output signal V of multiplier 112 _K2S ₂Be sent to adder 124.In adder 124, to the output signal V of multiplier 113 _K3S ₃Output signal V with multiplier 112 _K2S ₂Carry out add operation.Output signal (the V of adder 124 _K2S ₂+ V _K3S ₃) be sent to adder 122.

The output signal S of the 7th grade of line storage 107 terminal FF ₁Be sent to multiplier 111, multiply by V _K1The output signal V of multiplier 111 _K1S ₁Be sent to adder 121.The output signal S of the 8th grade of line storage 108 terminal FF ₀Be sent to multiplier 110, multiply by V _K0The output signal V of multiplier 110 _K0S ₀Be sent to adder 121.In adder 121, to the output signal V of multiplier 111 _K1S ₁Output signal V with multiplier 110 _K0S ₀Carry out add operation.

Output signal (the V of adder 121 _K0S ₀+ V _K1S ₁) be sent to adder 122.In adder 122, to the output signal (V of adder 121 _K0S ₀+ V _K1S ₁) and the output signal (V of adder 124 _K2S ₂+ V _K3S ₃) carry out add operation.

Output signal (the V of adder 122 _K0S ₀+ V _K1S ₁+ V _K2S ₂+ V _K3S ₃) be sent to adder 123.In adder 123, to the output signal (V of adder 122 _K0S ₀+ V _K1S ₁+ V _K2S ₂+ V _K3S ₃) and the output signal (V of adder 126 _K4S ₄+ V _K5S ₅+ V _K6S ₆+ V _K7S ₇) carry out add operation

Output signal (the V of adder 123 _K0S ₀+ V _K1S ₁+ V _K2S ₂+ V _K3S ₃+ V _K4S ₄+ V _K5S ₅+ V _K6S ₆+ V _K7S ₇) be sent to adder 128.In adder 128, the output signal (V of adder 123 _K0S ₀+ V _K1S ₁+ V _K2S ₂+ V _K3S ₃+ V _K4S ₄+ V _K5S ₅+ V _K6S ₆+ V _K7S ₇) and the output signal V of multiplier 118 _K8S ₈Carry out add operation.

Output signal (the V of adder 128 _K0S ₀+ V _K1S ₁+ V _K2S ₂+ V _K3S ₃+ V _K4S ₄+ V _K5S ₅+ V _K6S ₆+ V _K7S ₇+ V _K8S ₈) be sent to shift circuit 129.

In this shift circuit 129, the output signal of adder 128 is only moved right according to coefficient V _Km(m=0,1 ..., 8) set point and predefined figure place (0～4).If predefined figure place is 0, then carry out division arithmetic with the output signal of 1 pair of adder 128; If predefined figure place is 1, then carry out division arithmetic with the output signal of 2 pairs of adders 128; If predefined figure place is 3, then carry out division arithmetic with the output signal of 8 pairs of adders 128; If predefined figure place is 4, then carry out division arithmetic with the output signal of 16 pairs of adders 128.

[the 3rd embodiment]

In above-mentioned the 1st embodiment and the 2nd embodiment, 2 parts about the camera watch region of CCD is split into, by each cut zone while sense data, even but be split into left and right directions zone more than 3 at the camera watch region of CCD, under the situation by each cut zone while sense data, also applicable the present invention.

Below, as shown in figure 15, CCD1A is cut apart by left and right directions 4, under the situation of each cut zone Q1～Q4 while sense data ch1～ch4, the method for revising the output level difference of each cut zone Q1～Q4 describes.

Its camera watch region of CCD1A is split into 4 regional Q1～Q4 of left and right directions.If the signal of reading from each regional Q1～Q4 is ch1～ch4.At each passage, establish CDS/AGC circuit and A/D convertor circuit.

Signal ch1～the ch4 that reads from each regional Q1～Q4 delivers to image combiner circuit 6A by CDS/AGC circuit 201～204 and A/D convertor circuit 211～214.

In image combiner circuit 6A, synthetic each channel signal ch1～ch4 also is converted to the signal of 1 system.By the signal that image combiner circuit 6A obtains, be constant clamp circuit 7 by being used to make black level, deliver to gain calculating circuit 8A and output level difference correction circuit 9A.

Gain calculating circuit 8A is the circuit that is used to be calculated as the gain of the output signal level of revising each passage.Output level difference correction circuit 9A is to be used for basis by the gain that gain calculating circuit 8A calculates, and revises the circuit of the output signal level difference of each passage.

Output signal from output level difference correction circuit 9A is sent to YRGB generative circuit 10.In YRGB generative circuit 10,, generate Y, R, G, B signal according to output signal from output level difference correction circuit 9A.Y-signal by YRGB generative circuit 10 generates is sent to encoder 13 by Y treatment circuit 11.R, G, B signal by YRGB generative circuit 10 generates are sent to encoder 13 by C treatment circuit 12.In encoder 13, carry out the compression of Mpeg4 mode, Jpeg mode etc.

Action to gain calculating circuit 8A and output level difference correction circuit 9A describes.At this, be reference area to regional Q2 with CCD1A, the acquiring method that is used to revise the output level gain of other regional Q1, Q3 and Q4 describes.

(1) at first, interregional at regional Q1 and these 2 of regional Q2, use the method same with the 1st embodiment, be benchmark with the output level of regional Q2, obtain the 1st gain fgain1_Q21 and the 2nd gain fgain2_Q21 of the output level that is used for modification region Q1.

(2) secondly, interregional at regional Q2 and these 2 of regional Q3, use the method same with the 1st embodiment, be benchmark with the output level of regional Q2, obtain the 1st gain fgain1_Q23 and the 2nd gain fgain2_Q23 of the output level that is used for modification region Q3.

(3) moreover, interregional at regional Q3 and these 2 of regional Q4, use the method same with the 1st embodiment, be benchmark with the output level of regional Q3, obtain the 1st gain fgain1_Q34 and the 2nd gain fgain2_Q34 of the output level that is used for modification region Q4.

(4) the 1st of output level that obtain, that be used for modification region Q4 the gain fgain1_Q34 and the 2nd gain fgain2_Q34 are the gain of benchmark owing to be to be the gain of benchmark with regional Q3 so should be converted into regional Q2 in above-mentioned (3).

If the 1st gain that will be benchmark with regional Q2, be used for modification region Q4 output level is made as fgain1_Q24, then fgain1_Q24 is: the 1st gain fgain1_Q34 of output level that the 1st gain fgain1_Q23 that the output level with regional Q2 is benchmark, be used for the output level of modification region Q3 is benchmark with output level with regional Q3, be used for modification region Q4 is long-pending.That is fgain1_Q24=fgain1_Q23 * fgain1_Q34.

If will be benchmark with regional Q2, be used for the 2nd gain fgain2_Q24 of modification region Q4 output level, then fgain2_Q24 be: the 2nd gain fgain2_Q34 of output level that the 2nd gain fgain2_Q23 that the output level with regional Q2 is benchmark, be used for the output level of modification region Q3 is benchmark with output level with regional Q3, be used for modification region Q4 is long-pending.That is fgain2_Q24=fgain2_Q23 * fgain2_Q34.

Utilize above that calculated, be that pairing the 1st gain of regional Q1, Q3, Q4 and the 2nd of benchmark gains with regional Q2, identical with the 1st embodiment, the output level of modification region Q1, Q3, Q4.

In addition, as described in the 2nd embodiment,, also can be provided for reducing the gain calculating segment smoothing circuit of the noise in the adjacent cut zone boundary vicinity zone (gain calculating zone) in the prime of gain calculating circuit 8A.

Claims (16)

1. a signal processing apparatus is characterized in that, comprising:

Imaging apparatus is divided into 2 parts about its camera watch region quilt, reads the signal of telecommunication by these each cut zone;

Combination mechanism, its synthetic signal of telecommunication of being read by above-mentioned imaging apparatus generates 1 picture part signal;

Gain calculating mechanism in its signal according to the 1 picture part that is generated by above-mentioned combination mechanism, a plurality of pixel signals of above-mentioned cut zone boundary vicinity, calculates by the predetermined relative gain of side's cut zone of each horizontal line in 1 picture;

Mean value calculation mechanism, it calculates the mean value of the gain that is calculated by each horizontal line in 1 width of cloth picture by above-mentioned gain calculating mechanism; And

Correction mechanism, its by will multiply by by the gain mean value that above-mentioned mean value calculation mechanism calculates from the signal of 1 picture part of above-mentioned combination mechanism output, signal in an above-mentioned predetermined side's the cut zone, thereby revise signal level between above-mentioned two cut zone;

Above-mentioned gain calculating mechanism is by each horizontal line in 1 picture, signal according to a plurality of whole-colored filtering pixel of above-mentioned cut zone boundary vicinity, calculate the predicted value of an identical filtering pixel signal of the opposing party's cut zone by 2 identical filtering pixel signals of side's cut zone, by the predicted value that relatively calculates and the real signal value of pixel thereof, and calculate gain.

2. a signal processing apparatus is characterized in that, comprising:

Imaging apparatus is divided into 2 parts about its camera watch region quilt, reads the signal of telecommunication by these each cut zone;

Combination mechanism, its synthetic signal of telecommunication of being read by above-mentioned imaging apparatus generates 1 picture part signal;

Smoothing mechanism, it carries out the vertical direction low-pass filtering treatment to each pixel signal in the gain calculating zone of the above-mentioned cut zone boundary vicinity in 1 width of cloth picture that is generated by above-mentioned combination mechanism;

Gain calculating mechanism, its signal after according to Filtering Processing in the gain calculating zone that obtains by above-mentioned smoothing mechanism, each horizontal line by in the gain calculating zone calculates the relative gain of predefined side's cut zone;

Mean value calculation mechanism, it calculates the gain mean value of each horizontal line in the gain calculating zone that is calculated by above-mentioned gain calculating mechanism; And

Correction mechanism, its by will multiply by by the gain mean value that above-mentioned mean value calculation mechanism calculates from the signal of 1 picture part of above-mentioned combination mechanism output, signal in an above-mentioned predetermined side's the cut zone, thereby revise signal level between above-mentioned two cut zone;

Above-mentioned gain calculating mechanism each horizontal line in the gain calculating zone, signal according to a plurality of whole-colored filtering pixel of above-mentioned cut zone boundary vicinity, calculate the predicted value of an identical filtering pixel signal of the opposing party's cut zone by 2 identical filtering pixel signals of side's cut zone, by the predicted value that relatively calculates and the real signal value of pixel thereof, and calculate gain.

3. a signal processing apparatus is characterized in that, comprising:

Imaging apparatus is divided into 2 parts about its camera watch region quilt, reads the signal of telecommunication by these each cut zone;

Combination mechanism, its synthetic signal of telecommunication of being read by above-mentioned imaging apparatus generates 1 picture part signal;

Gain calculating mechanism in its signal according to the 1 picture part that is generated by above-mentioned combination mechanism, a plurality of pixel signals of above-mentioned cut zone boundary vicinity, calculates the relative gain of cut zone of the predetermined side of each horizontal line in each 1 width of cloth picture;

The 1st mean value calculation mechanism, it calculates by above-mentioned gain calculating mechanism by each horizontal line calculated in 1 width of cloth picture gain mean value;

The 2nd mean value calculation mechanism, its calculate by above-mentioned gain calculating mechanism by in the gain that each horizontal line calculated in 1 picture, the signal value of above-mentioned cut zone boundary vicinity pixel is the mean value of the horizontal line gain below the 1st setting; And

Correction mechanism, it is in the signal in the above-mentioned predetermined side's cut zone in 1 picture part signal being exported by above-mentioned combination mechanism, signal value is the following gain mean value of signal times to be obtained by above-mentioned the 2nd mean value calculation mechanism of the 2nd setting, to signal value is than the gain mean value of the signal times more than the 3rd big setting of the 2nd setting to be obtained by above-mentioned the 1st mean value calculation mechanism, to signal value is signal between above-mentioned the 2nd setting and above-mentioned the 3rd setting, by the value of the gain mean value that multiply by according to this signal value weighted addition computing the gain mean value that obtains by above-mentioned the 1st mean value calculation mechanism and obtained by above-mentioned the 2nd mean value calculation mechanism, thereby revise signal level difference between above-mentioned 2 cut zone;

Above-mentioned gain calculating mechanism is by each horizontal line in 1 picture, a plurality of according to above-mentioned cut zone boundary vicinity with filtering pixel signal of the same colour, signal by 2 same filtering pixels of side's cut zone, calculate the predicted value of 1 same filtering pixel signal of the opposing party's cut zone, by the predicted value that relatively calculates and the real signal value of its pixel, and calculate gain.

4. a signal processing apparatus is characterized in that, comprising:

Imaging apparatus, 2 parts about its camera watch region is split into are read the signal of telecommunication by these each cut zone;

Combination mechanism, its synthetic signal of telecommunication, generation 1 picture part signal of reading by above-mentioned imaging apparatus;

Smoothing mechanism, it carries out the vertical direction low-pass filtering treatment to each pixel signal in the gain calculating zone of the above-mentioned cut zone boundary vicinity in 1 width of cloth picture that is generated by above-mentioned combination mechanism;

Gain calculating mechanism, its signal after according to Filtering Processing in the gain calculating zone that generates by above-mentioned smoothing mechanism, each horizontal line in the gain calculating zone calculates the relative gain of predefined side's cut zone;

The 1st mean value calculation mechanism, it calculates by above-mentioned gain calculating mechanism by each horizontal line calculated in the gain calculating zone gain mean value;

The 2nd mean value calculation mechanism, calculate by above-mentioned gain calculating mechanism by in the gain that each horizontal line calculated in 1 picture, the signal value of above-mentioned cut zone boundary vicinity pixel is the mean value of the horizontal line gain below the 1st setting; And

Correction mechanism, it is in the signal in the above-mentioned predetermined side's cut zone in 1 picture part signal of being exported by above-mentioned combination mechanism, to signal value is the gain mean value of signal times to be obtained by above-mentioned the 2nd mean value calculation mechanism below the 2nd setting, to signal value is than the signal more than the 3rd big setting of the 2nd setting, multiply by the gain mean value that obtains by above-mentioned the 1st mean value calculation mechanism, to signal value is signal between above-mentioned the 2nd setting and above-mentioned the 3rd setting, by the value of the gain mean value that multiply by according to this signal value weighted addition computing the gain mean value that obtains by above-mentioned the 1st mean value calculation mechanism and obtained by above-mentioned the 2nd mean value calculation mechanism, thereby revise signal level difference between above-mentioned 2 cut zone;

Above-mentioned gain calculating mechanism, each horizontal line in each gain calculating zone, a plurality of according to above-mentioned cut zone boundary vicinity with filtering pixel signal of the same colour, signal by 2 same filtering pixels of side's cut zone, calculate the predicted value of 1 same filtering pixel signal of the opposing party's cut zone, by the predicted value that relatively calculates and the real signal value of its pixel, and calculate gain.

5. signal processing apparatus according to claim 1 is characterized in that, described gain calculating mechanism comprises:

The 1st mechanism, it selects 3 pixel signals of continuous same filtering of the same colour by totally 8 pixels of each per 4 pixel in zone of above-mentioned cut zone boundary vicinity of 1 horizontal line in 1 picture;

The 2nd mechanism is in its 3 pixel signals being selected by above-mentioned the 1st mechanism, 2 pixel signals belonging to the 1st cut zone calculate the predicted value of 1 pixel signal that belongs to the opposing party's cut zone;

The 3rd mechanism, it calculates the above-mentioned predetermined relative gain of side's cut zone according to the real signal value of the predicted value that is calculated by above-mentioned the 2nd mechanism and its pixel;

The 4th mechanism, in its above-mentioned 8 pixel coverages on above-mentioned horizontal line, to other combinations of 3 pixels of continuous same color filter, by carrying out repeatedly and above-mentioned the 1st mechanism, the identical processing of above-mentioned the 2nd mechanism and above-mentioned the 3rd mechanism, and calculate gain respectively; And

The 5th mechanism, carry out in its all horizontal line in 1 picture with from above-mentioned the 1st mechanism to the same processing of above-mentioned the 4th mechanism.

6. signal processing apparatus according to claim 2 is characterized in that, above-mentioned gain calculating mechanism comprises:

The 1st mechanism, it selects 3 pixel signals of continuous same filtering of the same colour by totally 8 pixels of each per 4 pixel in zone of above-mentioned cut zone boundary vicinity of 1 horizontal line in 1 picture;

The 2nd mechanism is in its 3 pixel signals being selected by above-mentioned the 1st mechanism, 2 pixel signals belonging to the 1st cut zone calculate the predicted value of 1 pixel signal that belongs to the opposing party's cut zone;

The 3rd mechanism, it calculates the above-mentioned predetermined relative gain of side's cut zone according to the real signal value of the predicted value that is calculated by above-mentioned the 2nd mechanism and its pixel;

The 4th mechanism, in its above-mentioned 8 pixel coverages on above-mentioned horizontal line, to other combinations of 3 pixels of continuous same color filter, by carrying out repeatedly and above-mentioned the 1st mechanism, the identical processing of above-mentioned the 2nd mechanism and above-mentioned the 3rd mechanism, and calculate gain respectively; And

The 5th mechanism, carry out in its all horizontal line in 1 picture with from above-mentioned the 1st mechanism to the same processing of above-mentioned the 4th mechanism.

7. signal processing apparatus according to claim 3 is characterized in that, above-mentioned gain calculating mechanism comprises:

The 1st mechanism, it selects 3 pixel signals of continuous same filtering of the same colour by totally 8 pixels of each per 4 pixel in zone of above-mentioned cut zone boundary vicinity of 1 horizontal line in 1 picture;

The 2nd mechanism is in its 3 pixel signals being selected by above-mentioned the 1st mechanism, 2 pixel signals belonging to the 1st cut zone calculate the predicted value of 1 pixel signal that belongs to the opposing party's cut zone;

The 3rd mechanism, it calculates the above-mentioned predetermined relative gain of side's cut zone according to the real signal value of the predicted value that is calculated by above-mentioned the 2nd mechanism and its pixel;

The 4th mechanism, in its above-mentioned 8 pixel coverages on above-mentioned horizontal line, to other combinations of 3 pixels of continuous same color filter, by carrying out repeatedly and above-mentioned the 1st mechanism, the identical processing of above-mentioned the 2nd mechanism and above-mentioned the 3rd mechanism, and calculate gain respectively; And

The 5th mechanism, carry out in its all horizontal line in 1 picture with from above-mentioned the 1st mechanism to the same processing of above-mentioned the 4th mechanism.

8. signal processing apparatus according to claim 4 is characterized in that, above-mentioned gain calculating mechanism comprises:

The 1st mechanism, it selects 3 pixel signals of continuous same filtering of the same colour by totally 8 pixels of each per 4 pixel in zone of above-mentioned cut zone boundary vicinity of 1 horizontal line in 1 picture;

The 2nd mechanism is in its 3 pixel signals being selected by above-mentioned the 1st mechanism, 2 pixel signals belonging to the 1st cut zone calculate the predicted value of 1 pixel signal that belongs to the opposing party's cut zone;

The 3rd mechanism, it calculates the above-mentioned predetermined relative gain of side's cut zone according to the real signal value of the predicted value that is calculated by above-mentioned the 2nd mechanism and its pixel;

The 4th mechanism, in its above-mentioned 8 pixel coverages on above-mentioned horizontal line, to other combinations of 3 pixels of continuous same color filter, by carrying out repeatedly and above-mentioned the 1st mechanism, the identical processing of above-mentioned the 2nd mechanism and above-mentioned the 3rd mechanism, and calculate gain respectively; And

The 5th mechanism, carry out in its all horizontal line in 1 picture with from above-mentioned the 1st mechanism to the same processing of above-mentioned the 4th mechanism.

9. signal processing apparatus according to claim 1 is characterized in that, has the gain that calculated by per 1 picture by the above-mentioned gain calculating mechanism time orientation smoothing mechanism in the time orientation smoothing; Above-mentioned correction mechanism adopts the gain that is obtained by above-mentioned time orientation smoothing mechanism, revises the signal level difference between above-mentioned two cut zone.

10. signal processing apparatus according to claim 2 is characterized in that, has the gain that calculated by per 1 picture by the above-mentioned gain calculating mechanism time orientation smoothing mechanism in the time orientation smoothing; Above-mentioned correction mechanism adopts the gain that is obtained by above-mentioned time orientation smoothing mechanism, revises the signal level difference between above-mentioned two cut zone.

11. signal processing apparatus according to claim 3 is characterized in that, has the gain that calculated by per 1 picture by the above-mentioned gain calculating mechanism time orientation smoothing mechanism in the time orientation smoothing; Above-mentioned correction mechanism adopts the gain that is obtained by above-mentioned time orientation smoothing mechanism, revises the signal level difference between above-mentioned two cut zone.

12. signal processing apparatus according to claim 4 is characterized in that, has the gain that calculated by per 1 picture by the above-mentioned gain calculating mechanism time orientation smoothing mechanism in the time orientation smoothing; Above-mentioned correction mechanism adopts the gain that is obtained by above-mentioned time orientation smoothing mechanism, revises the signal level difference between above-mentioned two cut zone.

13. a signal processing apparatus is characterized in that,

Imaging apparatus, its camera watch region is split into a plurality of parts at left and right directions, reads the signal of telecommunication by these each cut zone;

Combination mechanism, its synthetic signal of telecommunication, generation 1 picture part signal of reading by above-mentioned imaging apparatus;

The 1st gain calculating mechanism, it calculates it respectively in each group that is made of 2 cut zone of adjacency and organizes the relative gain of side's cut zone predetermined in interior 2 cut zone according to the signal of the 1 picture part that is generated by above-mentioned combination mechanism;

The 2nd gain calculating mechanism, it is according to each gain of each group that is calculated by above-mentioned the 1st gain calculating mechanism, as the benchmark cut zone, calculate the gain of other relative each cut zone of benchmark cut zone with 1 predetermined in all cut zone cut zone respectively; And

Correction mechanism, it is according to the gain by the 2nd gain calculating mechanism other each cut zone that calculate, that the benchmark cut zone is relative, by the signal in the signal by 1 picture part of above-mentioned combination mechanism output, in the corresponding divided areas is revised, thereby revise signal level difference between a plurality of cut zone;

The 1st gain calculating mechanism comprises:

The 1st mechanism, its in each group in the signal according to 1 picture part that generates by above-mentioned combination mechanism, it organizes the signal of interior 2 a plurality of pixels of cut zone boundary vicinity, calculate respectively in 1 picture in each horizontal line in 2 cut zone in its group, a predetermined side's the relative gain of cut zone; And

The 2nd mechanism, it by calculating the gain mean value of each horizontal line in 1 picture that is calculated by above-mentioned the 1st mechanism, obtains each group gain in each group;

Above-mentioned the 1st mechanism, in each group, each horizontal line in 1 picture, organize a plurality of signals of interior 2 cut zone boundary vicinities according to it with filtering pixel of the same colour, go out the predicted value of signal of 1 same filtering pixel of other cut zone by the calculated signals of 2 same filtering pixels of side's cut zone, by the predicted value that relatively calculates and the real signal value of its pixel, and calculate gain.

14. signal processing apparatus according to claim 13 is characterized in that,

The 1st gain calculating mechanism comprises:

The 1st mechanism, it organizes at each, in the signal according to 1 picture part that generates by above-mentioned combination mechanism, it organizes the signal of a plurality of pixels of interior 2 cut zone boundary vicinities, calculate each horizontal line in 1 picture respectively, the predetermined relative gain of side's cut zone in 2 cut zone in its group;

The 2nd mechanism, it by calculating the mean value of the gain of each horizontal line in 1 picture that is calculated by above-mentioned the 1st mechanism, obtains the 1st gain of each group in each group; And

The 3rd mechanism, it is in each group, by in the gain that calculates each horizontal line in 1 picture that calculates by above-mentioned the 1st mechanism, its pixel signal value of organizing interior 2 cut zone boundary vicinities is the mean value of the horizontal line gain below the 1st setting, respectively organizes the 2nd gain thereby obtain;

The 2nd gain calculating mechanism comprises:

According to the 1st gain of each group that calculates by last the 1st gain calculating mechanism, as the benchmark cut zone, calculate the mechanism of the 3rd gain of other relative each cut zone of benchmark cut zone respectively with 1 predetermined in all cut zone cut zone; And

According to the 2nd gain of each group that calculates by above-mentioned the 1st gain calculating mechanism, as the benchmark cut zone, calculate the mechanism of the 4th gain of other relative each cut zone of benchmark cut zone respectively with 1 predetermined in all cut zone cut zone;

Above-mentioned correction mechanism basis is calculated by the 2nd gain calculating mechanism, the 3rd gain of other each cut zone that reference area is relative and the 4th gain, in signal by 1 picture part of above-mentioned combination mechanism output, signal in the corresponding divided areas is revised, to revising in the signal in the Object Segmentation zone, signal value is the following signal of the 2nd setting, multiply by pairing the 4th gain of its cut zone, to signal value is than the signal more than the 3rd big setting of the 2nd setting, multiply by the 3rd gain corresponding to its cut zone, to signal value is signal between above-mentioned the 2nd setting and above-mentioned the 3rd setting, multiply by according to this signal value weighted addition computing the 3rd gain and the 4th value that gains corresponding to its cut zone.

15. a signal processing apparatus is characterized in that, comprising:

Imaging apparatus, its camera watch region is split into a plurality of parts at left and right directions, reads the signal of telecommunication in these each cut zone;

Combination mechanism, its synthetic signal of telecommunication of being read by above-mentioned imaging apparatus generates 1 picture part signal;

The 1st gain calculating mechanism, it in each 2 group that cut zone constitutes by adjacency, calculates the relative gain of cut zone that it organizes a predetermined side in interior 2 cut zone according to the signal of the 1 picture part that is generated by above-mentioned combination mechanism respectively;

The 2nd gain calculating mechanism, it is according to the gain of each group that is calculated by above-mentioned the 1st gain calculating mechanism, as the benchmark cut zone, calculate the gain of other relative cut zone of benchmark cut zone with 1 predetermined in all cut zone cut zone respectively; And

Correction mechanism, it is according to the gain by the 2nd gain calculating mechanism other cut zone that calculate, that the benchmark cut zone is relative, revise by the signal in the signal to 1 picture part of generating by above-mentioned combination mechanism, in the corresponding divided areas, thereby revise signal level between a plurality of cut zone;

The 1st gain calculating mechanism comprises:

The 1st mechanism, it organizes at each, in the 1 picture part signal that generates by above-mentioned combination mechanism, it organizes each relative pixel signal of gain calculating zone of interior 2 cut zone boundary vicinities, carries out the low-pass filtering treatment of vertical direction;

The 2nd mechanism, it organizes at each, according to the signal after the Filtering Processing in this group gain calculating zone that obtains by above-mentioned the 1st mechanism, calculate a predetermined side's the relative gain of cut zone in interior 2 cut zone of each horizontal Xingqi group in this group gain calculating zone respectively; And

The 3rd mechanism, it organizes at each, by calculating the mean value of each the horizontal line gain that is calculated by above-mentioned the 2nd mechanism, gains thereby obtain each group;

Above-mentioned the 2nd mechanism is in each group, by each horizontal line in the gain calculating zone of this group, organize a plurality of signals of interior 2 cut zone boundary vicinities according to this with filtering pixel of the same colour, signal by 2 same filtering pixels of side's cut zone, calculate the predicted value of a same filtering pixel signal of the opposing party's cut zone, by the predicted value that relatively calculates and the real signal value of its pixel, and calculate gain.

16. signal processing apparatus according to claim 15 is characterized in that,

The 1st gain calculating mechanism comprises:

The 1st mechanism, it organizes at each, in the signal to 1 picture part of being generated by above-mentioned combination mechanism, it organizes the signal of each pixel of interior 2 cut zone boundary vicinities, carries out the vertical direction low-pass filtering treatment;

The 2nd mechanism, it organizes at each, according to the signal after the Filtering Processing in the gain calculating zone of this group that obtains by above-mentioned the 1st mechanism, calculate respectively in each horizontal line of the gain calculating of this group zone, this organizes a side's predetermined in interior 2 cut zone the relative gain of cut zone;

The 3rd mechanism, it organizes at each, respectively organizes the 1st gain by calculating the mean value of each the horizontal line gain that is calculated by above-mentioned the 2nd mechanism, obtaining; And

The 4th mechanism, it organizes at each, by calculate in each horizontal line gain that calculates by above-mentioned the 2nd mechanism, its signal value of organizing the boundary vicinity pixel of interior 2 cut zone is the mean value of the horizontal line gain below the 1st setting, obtains the 2nd gain of each group;

The 2nd gain calculating mechanism comprises:

According to the 1st gain of each group that calculates by last the 1st gain calculating mechanism, as the benchmark cut zone, calculate the mechanism of the 3rd gain of other relative each cut zone of benchmark cut zone respectively with 1 predetermined in all cut zone cut zone; And

According to the 2nd gain of each group that calculates by above-mentioned the 1st gain calculating mechanism, as the benchmark cut zone, calculate the mechanism of the 4th gain of other relative each cut zone of benchmark cut zone respectively with 1 predetermined in all cut zone cut zone;

Above-mentioned correction mechanism basis is calculated by the 2nd gain calculating mechanism, the 3rd gain of other each cut zone that reference area is relative and the 4th gain, in signal by 1 picture part of above-mentioned combination mechanism output, signal in the corresponding divided areas is revised, to revising in the signal in the Object Segmentation zone, signal value is the following signal of the 2nd setting, multiply by pairing the 4th gain of its cut zone, to signal value is than the signal more than the 3rd big setting of the 2nd setting, multiply by the 3rd gain corresponding to its cut zone, to signal value is signal between above-mentioned the 2nd setting and above-mentioned the 3rd setting, multiply by according to this signal value, the weighted addition computing pairing the 3rd gain of its cut zone and the 4th value that gains.

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