CN1749976A - Relay extender for network bus - Google Patents

Relay extender for network bus Download PDF

Info

Publication number
CN1749976A
CN1749976A CN 200410017093 CN200410017093A CN1749976A CN 1749976 A CN1749976 A CN 1749976A CN 200410017093 CN200410017093 CN 200410017093 CN 200410017093 A CN200410017093 A CN 200410017093A CN 1749976 A CN1749976 A CN 1749976A
Authority
CN
China
Prior art keywords
interrupt
main cpu
cpu unit
network
relaying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 200410017093
Other languages
Chinese (zh)
Other versions
CN100394410C (en
Inventor
赵文华
鞠磊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Electrical Apparatus Research Institute Group Co Ltd
Original Assignee
Shanghai Electrical Apparatus Research Institute Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Electrical Apparatus Research Institute Group Co Ltd filed Critical Shanghai Electrical Apparatus Research Institute Group Co Ltd
Priority to CNB2004100170935A priority Critical patent/CN100394410C/en
Publication of CN1749976A publication Critical patent/CN1749976A/en
Application granted granted Critical
Publication of CN100394410C publication Critical patent/CN100394410C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Landscapes

  • Small-Scale Networks (AREA)

Abstract

The extender for prolonging network bus includes main CPU unit, state indication unit, main power source loop, signal processing channel A, signal processing channel B, auxiliary power source and photoelectronic isolating loop. The circuits have the data transmission in the following order: data in the DeviceNet section A is transmitted to DeviceNet section B through port A, signal processing channel A, main CPU unit, signal processing channel B and port B; or vice versa. The present invention realizes the transparent data transmission between different network section. For increased network length and shortened delay time, the CPU has stored automatic baud rate detecting flow chart, signal sending flow chart, signal receiving flow chart and interruption flow chart, and the constituted software and hardware are combined for successful network extending.

Description

Network-bus relaying stretcher
Technical field:
The present invention relates to a kind of DeviceNet bus relaying stretcher, relate to a kind of a kind of device that extends based on the open field bus agreement relaying of CAN bus or rather.
Background technology:
DeviceNet is a kind of based on CAN bus open field bus agreement, baud rate/network distance relation according to the DeviceNet regulation, the transmission longest distance is 500M under minimum baud rate 125kbps, this segment distance is to satisfy general device level control system, but in some special occasions such as water treatment, remote monitoring etc., this 500M distance is not enough, must adopt network to prolong scheme.
At present, the network trunk of DeviceNet bus is extended both at home and abroad, adopts following three kinds of schemes.
1, directly the CAN signal relay is amplified.Install two signal repeaters of being made up of the CAN transponder chip additional at DeviceNet network trunk point exactly, the CAN signal can weaken the interfere information in the transmission through simple " accepting to send " again, guarantees the amplitude of CAN signal simultaneously.Its shortcoming is to play the effect of effective development length.
2, insert third party's bus protocol mode.Be exactly to insert a pair of transceiver, the message conversion third party bus protocol of DeviceNet bus is transmitted at DeviceNet network trunk point, as Ethernet, 485 networks, for example, the DeviceNet stretcher of moving company of U.S. section.Adopt this scheme not only to need paired repeater, and be to be that cost obtains network extension with consistance and the real-time of destroying network.
3, adopt the quick pass-through mode of CAN message.
Be to install the signal repeater of forming by an intelligent chip and two cover CAN controller chips additional at CAN network trunk point, the CAN signal pass through intelligent chip information processing, will need the signaling of relaying to provide again.This way advantage is the integrality that has guaranteed the CAN message, can fundamentally solve distance problem, installs a repeater additional and just can extend network distance at double.But implementing, this kind scheme has certain difficulty, the one, need accurately to obtain the baud rate of network, and the 2nd, CAN message processing speed fast.The REP-DN of external InterlinkBT company, the WRC-CANX that also has WrcakRon company are the DeviceNet relaying stretchers that adopts this scheme.But these products still are in the research test phase abroad, and formal product does not occur in market as yet, is in the blockade on new techniques state at home.
Summary of the invention:
The DeviceNet network extension device that the purpose of this invention is to provide automatic identification of a kind of effective solution network baud rate and CAN message high speed processing mechanism, this stretcher both can extend at double in the situation lower network transmission range of identical baud rate, can realize the bright transmission of message full impregnated of junction network node again, can also realize the bright transmission of message full impregnated at different baud rate networks simultaneously.
In order to achieve the above object, solution of the present invention is: comprise DeviceNet baud rate quick identification, optimize the relay messages receiving and dispatching mechanism.Specifically its circuit a. one-port has independently transceiver network, has guaranteed that network data is transferred to the B passage from A channel, with identical from the signal of complete independence of the data processing of B channel transfer A channel and transmission; Has independently network judgement for A port, B port.
Install a monolithic and two cover CAN control chips composition signal repeaters additional at CAN network trunk point, signal is provided bus signals again through the information processing of intelligent chip.In order to realize above-mentioned operation, solidified following program in the main CPU unit of this stretcher, comprise the automatic testing process figure of baud rate, information transmission flow figure, message pick-up process flow diagram, interrupt response process flow diagram, the software optimization that these flow processs are formed the relay messages receiving and dispatching mechanism.
Effect of the present invention: not only hardware design is simple to adopt the stretcher product that electric wiring of the present invention forms, the function excellence, its software has also been optimized the relay messages receiving and dispatching mechanism, for the field bus device field has increased an excellent product, has tangible economic benefit.
Description of drawings:
Fig. 1 is the electrical principle block diagram of stretcher of the present invention;
Fig. 2 is the electrical principle block diagram schematic circuit of Fig. 1;
Fig. 3 is that baud rate of the present invention is from testing process figure;
Fig. 4, Fig. 5 are for information sends, the message pick-up process flow diagram;
Fig. 6 is the interrupt response process flow diagram.
The invention will be further described below in conjunction with Fig. 1~Fig. 6, but accompanying drawing is not construed as limiting the invention.
Embodiment:
As shown in Figure 1, in this DeviceNet network extension device, comprise a main CPU unit 1, state indicating member 2, main power circuit 3, A channel signal Processing 4, the processing 5 of B channel signal and accessory power supply and photoelectricity isolated loop 6.Data transmission is that carry out at the center with the main CPU unit between the foregoing circuit.
The DeviceNet network successively is transferred to DeviceNet network from the A port by A channel signal Processing 4, main CPU unit 1, B channel signal processing 5, B port with signal; Vice versa.
Described main CPU unit 1, the SST89E554RC2 that selects for use is the frequency division pattern, ISP downloads, and 1K storage RAM is arranged.Because this host CPU has processing speed and big buffer memory faster, and help the upgrading needs.
As shown in Figure 2, it is the concrete schematic circuit of Fig. 1 block diagram.
The network extension device will solve the distance problem of transmission, and this just draws the problem of a relaying.The reason that falls short of owing to the Network Transmission distance is not because the amplitude of CAN signal, but the position time-delay that causes along with the increase of network cable length, along with the lifting of baud rate, transmission line increases for the CAN signal, the position time-delay just increases, so have only relaying just can deal with problems.
As shown in Figure 3, this is auto-baud testing process figure.The reason that this flow scheme is set is: guaranteeing that repeater had added network before network powers on, network node all can have self check and response message, provides than good opportunity to auto-baud.Detect the network baud rate by software mode.When starting.Earlier baud rate is arranged to the 125K pattern, allows simultaneously to receive and wrong the interruption.If produce mistake on the CAN bus, software just is set as baud rate higher baud rate.After continuous 2 information successfully received, SJA1000 had detected correct bit rate, and can turn to normal mode of operation, at this moment, can work as the CAN node of other activation of system on this node.
As shown in Figure 4, this is information transmission flow figure of the present invention.According to CAN agreement stipulations, information sends and is independently finished by CAN controller SJA1000.The information that CPU must will send is sent to transmission buffer, then, and with the transmission request flag set of command register.In order to save the sequential of CPU, in master routine, set up the data fifo buffer zone, be provided with 1 simultaneously and send pointer and reception pointer, two signs: one " sky " and one " not empty " sign, a storage " overflowing " indicate, add the counter of a store data.
Reception pointer is used to indicate the deposit position of first data of reception data, and when depositing frame data, pointer adds 1, and counter adds 1; When sending a frame information, send pointer and subtract 1, deposit counter simultaneously and subtract 1.The value of accepting to receive pointer and send pointer has defencive function.When the saltus step of data pointer value, storage " overflowing " mark position.
In whole information router, data send and adopt inquiry mode.Every transmission one frame information, the situation that at first will inquire about transmission buffer.Have only when the transmission network does not have fault, just send, effectively avoided the network failure state of " isolated node ".
As shown in Figure 5, this is the information flow chart that interruption of the present invention receives.
Because many receptions buffer memory fifo structure characteristics of SJA1000, for effective information, controller can be finished the real-time reception to information.But CPU in order to save sequential, then adopts interrupt mode during to information processing.Whenever receive a frame information, just can produce external interrupt 0 and external interrupt 1.
It is as follows to interrupt receiving flow process:
Is with the A port example: receive as CAN and interrupt? be then to arrive the A buffer, as have living space, just will receive cache contents and copy transmission working area RAM to, refresh the working area parameter, flush buffers pointer and sign again are if just receive buffer area and have living space and enter the detection of other interrupting informations.If CAN can not receive the detection that interruption just enters other interrupting informations; If do not have the space to the A buffer memory, temporary close A mouth interrupt response, the detection that enters other interrupting informations; There is not the space if receive buffer area, just return the A buffer area again.
As shown in Figure 6, this is interrupt response program interrupt responding process figure of the present invention.
SJA1000 has 8 different interrupt sources in the PeliCAN pattern, in case interrupting appears in CAN, SJA1000 can be made as low level with interrupting output pin 16,, takes appropriate measures to interrupting by reading the interrupt register of SJA1000 up to CPU.
Flow process recognition sequence for disconnected responder: receive external interrupt → the read interrupt register of SJA1000 from SJA1000, value in the temporary transient save register → (only listening pattern) Interrupt Process process: bus error is handled baud rate and detected automatically → the Interrupt Process process: reception information → Interrupt Process process: false alarm is handled and is prevented that bus from closing, reset → the Interrupt Process process: if passive processing of mistake sends error count greater than 127 then the current transmission in middle mountain, up to the end of the interruptions → interrupt procedure of reception is arranged.
In sum, it has independently transceiver network to this network extension device from circuit itself, has guaranteed that transmission of holding from A to B and the transmission of holding from B to A are equal to fully; For side a and b, it has independently network judgement.If from software, from the main website direction, see from the top down to resemble like a cable, do not increase node, do not reduce node yet, signal has integrality, does not influence real-time.

Claims (6)

1, a kind of network-bus relaying stretcher is characterized in that:
This stretcher comprises main CPU unit (1), state indicating member (2), main power circuit (3), A channel signal Processing (4), the processing of B channel signal (5) and accessory power supply and photoelectricity isolated loop (6), and data transmission is that carry out at the center with main CPU unit (1) between the foregoing circuit;
The order of its signal transmission is: the DeviceNet network successively is transferred to DeviceNet network from the A port by A channel signal Processing (4), main CPU unit (1), B channel signal processing (5), B port with signal; Vice versa;
For increasing transmission range, shorten time-delay, realize that the transparent transmission of heterogeneous networks has been stored following program in main CPU unit:
Can independent detection to the auto-baud trace routine of the correct bit rate of one-port;
Can inquire about the transmitting buffer state information router;
The message pick-up process program that can accept to interrupt and interrupt response program.
2, relaying stretcher as claimed in claim 1 is characterized in that:
What described main CPU unit (1) was selected for use is that fast, the powerful SST89E554RC of processing speed is 2 frequency division patterns, and ISP downloads, the single-chip microcomputer of 1K storage RAM.
3, as claim 1 or 2 described relaying stretchers, it is characterized in that:
Described stored program main CPU unit (1), storage can detect the auto-baud trace routine of correct bit rate among this CPU, can make to turn to normal mode of operation.
4, relaying stretcher as claimed in claim 1 is characterized in that:
Storage can be inquired about and send the buffer status information router in the described main CPU unit (1), and in whole procedure, inquiry mode is adopted in the transmission of data.
5, relaying stretcher as claimed in claim 1 is characterized in that:
Canned data is accepted program in the described main CPU unit (1), and the interrupt mode of employing is undertaken by the process flow diagram that interrupts receiving.
6, as claim 1 or 5 described relaying stretchers, it is characterized in that:
In the program of described interrupt mode, the identification of one look-at-me is arranged, it is in proper order: receive external interrupt → the read interrupt register of SJA1000 from SJA1000, value in the temporary transient save register → (only listening pattern) Interrupt Process process: bus error is handled baud rate and detected automatically → the Interrupt Process process: reception information → Interrupt Process process: false alarm is handled and is prevented that bus from closing, reset → the Interrupt Process process: if passive processing of mistake sends error count greater than 127 then end current granting, up to the end of the interruptions → interrupt procedure of reception is arranged.
CNB2004100170935A 2004-03-22 2004-03-22 Relay extender for network bus Expired - Lifetime CN100394410C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2004100170935A CN100394410C (en) 2004-03-22 2004-03-22 Relay extender for network bus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2004100170935A CN100394410C (en) 2004-03-22 2004-03-22 Relay extender for network bus

Publications (2)

Publication Number Publication Date
CN1749976A true CN1749976A (en) 2006-03-22
CN100394410C CN100394410C (en) 2008-06-11

Family

ID=36605432

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004100170935A Expired - Lifetime CN100394410C (en) 2004-03-22 2004-03-22 Relay extender for network bus

Country Status (1)

Country Link
CN (1) CN100394410C (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104853400A (en) * 2015-04-16 2015-08-19 电子科技大学 Link selection method based on multi-user buffer auxiliary relay system
CN113820971A (en) * 2021-08-17 2021-12-21 广东智科电子股份有限公司 Isolation repeater and control method thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3648996B2 (en) * 1998-08-31 2005-05-18 オムロン株式会社 FA system
JP4089048B2 (en) * 1998-10-30 2008-05-21 オムロン株式会社 Slave device
US20030065855A1 (en) * 2001-07-12 2003-04-03 Webster Steve R. Imbedded interrupt
CN1187937C (en) * 2003-01-21 2005-02-02 武汉理工大学 Embedded in situ bus gateway

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104853400A (en) * 2015-04-16 2015-08-19 电子科技大学 Link selection method based on multi-user buffer auxiliary relay system
CN113820971A (en) * 2021-08-17 2021-12-21 广东智科电子股份有限公司 Isolation repeater and control method thereof

Also Published As

Publication number Publication date
CN100394410C (en) 2008-06-11

Similar Documents

Publication Publication Date Title
CN102984059B (en) Gigabit Ethernet redundancy network interface card and link switching condition criterion output control method thereof
WO2004097589A3 (en) Bridge apparatus and methods of operation
CN104199795B (en) Data transferring and receiving method of bus framework
CN109799797B (en) Method for hot standby of double machines of plant station electric energy acquisition terminal
KR20080058454A (en) A distributed monitoring method
RU2586580C2 (en) Conflict detection in eia-485 buses
CN203055130U (en) Remote electricity meter reading system and smart electricity meter
CN109828933A (en) A kind of implementation method of the NCSI function of NCSI function network interface card and network interface card
CN103985240A (en) Anti-theft method for street lamp cable based on ZigBee and GSM (Global System for Mobile Communications) network
CN2685978Y (en) Relay stretcher for network bus
CN1749976A (en) Relay extender for network bus
CN101464844B (en) Control method and bus interface of RAM use right
CN115567348A (en) Edge gateway device with multiple adaptive capabilities and electronic equipment
CN109640484A (en) Single-lamp controller
CN214955324U (en) Intelligent data acquisition system
CN201689410U (en) Multiplex switching value bus transmission module
CN202935897U (en) Sudden-stop lock switch position recognition device of belt conveyor
CN204795120U (en) Split type extensible network message storage device
CN104426240A (en) Control protection system of circuit breaker in traction substation and operation method of system
CN205051134U (en) 100G cable module based on CFP2 interface
CN111049815B (en) Micro-grid communication system, communication device and control method thereof
CN205051133U (en) 100G cable module based on CFP4 interface
CN202008658U (en) Optical fiber one-way leading-in equipment
CN208077388U (en) Number adopts instrument
CN204400365U (en) A kind of electric terminal being applicable to elevator

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20080611

CX01 Expiry of patent term