CN1719686A - Steady-state controlling method of current parallel voltage compensator for superconductive energy storage - Google Patents

Abstract

This invention relates to a super-conductive current control technology for the current flows through a super-conduction coil when storing energies characterizing that this invention converts a power supply three phase voltage, a load three-phone voltage to ordered stable control current on the d, q shaft by a DSP chip, then converts the ordered current to six control pulses by a current vector pulse width regulator to send them to the grids of transistors in a current transformer composed of correspondingly serial connected six insulation grating bi-polar transistors and six diodes, the input of the current transformer is three-phase load voltage added on three central points of three arms, the output is the super-conduction current flowing through the super-conduction coil connected between the negatives of the three diodes at the end of the three arms and the source of the bi-polar transistor at the start end.

Description

The superconducting energy storage Steady-State Control method of current parallel voltage device

Technical field

The invention belongs to the superconductor technology field, relate in particular to the Steady-State Control technical field of supercurrent in the superconductor applications.

Background technology

At present, with the same or analogous technology of patent of applying for, the control method that document [1] proposes is not applicable to the current parallel voltage device of based superconductive energy storage yet, but this method calculation of complex is difficult for realization, and is not enough to some extent on control precision yet.The method that document [2] proposes and the patent of application all are to control under synchronous rotating frame, but this method only is applicable to voltage parallel voltage device.[1]Xun?Liu；Xiaoguang?Zhu；Xiaohua?Jiang.A?phasor?controlscheme?for?voltage?sag?compensation?by?SMES.Power?Electronics?and?Motion?ControlConference，2004.Vol?2：p882～885

[2]Takao?Kawabata，Nobuo?Sashida，Yushin?Yamamoto，Kouji?Ogasawara，and?Yuko?Yamasaki.Parallel?processing?inverter?system.IEEE?Transactions?on?Power?Electronics.Vol?6，NO?3，July1991：p442～450

Summary of the invention

The objective of the invention is to seek a kind of simple and reliable high performance of control method for the current parallel voltage device of based superconductive energy storage.

The system configuration of current parallel voltage device is seen accompanying drawing 1, wherein:

Ls: the inductance value of phase-shift reactor;

C: the capacitance of filter capacitor;

Rf: the resistance of load:

Rc: the resistance of damping resistance.

Vsa, Vsb and Vsc: the A of supply voltage, B, C three-phase values;

Isa, Isb and Isc: the A of source current, B, C three-phase values;

Vfa, Vfb and Vfc: the A of load voltage, B, C three-phase values;

Ifa, Ifb and Ifc: the A of load current, B, C three-phase values;

Ipa, Ipb and Ipc: current transformer exchanges A, B, the C three-phase values of end electric current;

Wherein, phase-shift reactor, damping resistance, filter capacitor have three respectively, are divided into the ABC three-phase, and load is the load of pure resistance three-phase three-wire system, and current transformer is made of 6 IGBT and Diode, and 1 IGBT and Diode form brachium pontis half.The interchange end of current transformer links to each other with threephase load, and the dc terminal of current transformer links to each other with superconducting coil.The drive signal of IGBT is provided by DSP.By the drive signal of control IGBT, just can control electric current I pa, Ipb and Ipc that current transformer exchanges end, in faults such as supply voltage generation instantaneous voltage falls, the maintenance load voltage is a rated value, makes it not to be subjected to the influence of power supply.

The Steady-State Control method of present patent application is as the formula (1):

$\left\{\begin{array}{c}{i}_{\mathrm{pwmd}}=\frac{1}{100\mathrm{\π}{L}_s}{V}_{\mathrm{sq}}+\frac{{\left(100\mathrm{\π}\right)}^{2}C{L}_s-1}{100\mathrm{\π}{L}_s}{V}_{\mathrm{fq}}-\frac{1}{R_f}{V}_{\mathrm{fd}}\\ i_{\mathrm{pwmq}}=-\frac{1}{100\mathrm{\π}{L}_s}{V}_{\mathrm{sd}}-\frac{{\left(100\mathrm{\π}\right)}^{2}C{L}_s-1}{100\mathrm{\π}{L}_s}{V}_{\mathrm{fd}}-\frac{1}{R_f}{V}_{\mathrm{fq}}\end{array}\right.---\left(1\right)$

The invention is characterized in that described method contains following steps successively:

Step 1:, be designated as Vsa, Vsb, Vsc and Vfa, Vfb, Vfc respectively by voltage measuring transformer power supply three-phase voltage and load three-phase voltage;

Step 2: the power supply three-phase voltage that step 1 is obtained and the value of load three-phase voltage exist in the internal memory of a DSP;

Step 3:, according to the following steps, obtain the Steady-State Control electric current of representing with ipwmd and ipwmq respectively by described DSP;

The 3-1 step: to the Vsa in the internal memory, Vsb, Vsc and Vfa, Vfb, Vfc, carry out 3/2 conversion by following formula respectively, obtain Vsd, Vsq and Vfd, Vfq, and deposit internal memory in;

In the formula, θ is an angular metric, is provided by phase-locked loop circuit, and together, the input of phase-locked loop circuit is Vsa down;

The 3-2 step: obtain 1/R with the 1st multiplier _f, the 2nd multiplier obtained 1/100 π L _sValue, wherein, L _sReactance value, R for phase-shift reactor _fValue for load resistance;

All obtain ((100 π) separately with the 1st, the 2 two adder and multiplier ²CL _s-1) π L/100 _sValue, wherein C is the filter capacitor value;

Each value that the 3-2 step is obtained deposits in the internal memory;

The 3-3 step: obtain Vsq/100 π L with the 3rd multiplier _sValue;

Obtain ((100 π) with the 4th multiplier ²CL _s-1) Vfq/100 π L _sValue;

Obtain Vfd/R with the 5th multiplier _fValue, obtain with the 1st adder again

$i_{\mathrm{pwmd}}=\frac{1}{100\mathrm{\π}{L}_s}{V}_{\mathrm{sq}}+\frac{{\left(100\mathrm{\π}\right)}^{2}C{L}_s-1}{100\mathrm{\π}{L}_s}{V}_{\mathrm{fq}}-\frac{1}{R_f}{V}_{\mathrm{fd}}$

The 3-4 step: obtain Vsd/100 π L with the 6th multiplier _sValue;

Obtain ((100 π) with the 7th multiplier ²CL _s-1) Vfd/100 π L _sValue;

Obtain Vfq/R with the 8th multiplier _fValue, obtain with the 2nd adder again

$i_{\mathrm{pwmq}}=-\frac{1}{100\mathrm{\π}{L}_s}{V}_{\mathrm{sd}}-\frac{{\left(100\mathrm{\π}\right)}^{2}C{L}_s-1}{100\mathrm{\π}{L}_s}{V}_{\mathrm{fd}}-\frac{1}{R_f}{V}_{\mathrm{fq}}$

The 3-5 step: ipwmd and ipwmq that step 3-4 is obtained carry out 2/3 conversion by following formula, obtain the three-phase Steady-State Control current value ipwma of rectangular coordinate system, ipwmb, and ipwmc:

3-6 step: the three-phase Steady-State Control current i pwma that step 3-5 is obtained, ipwmb, ipwmc are input to a current phasor pulse width modulator, obtain the drive signal of 6 IGBT, described IGBT is that the English of igbt is called for short, and 6 drive signal computational methods of described IGBT are as follows:

When | i _Pwma| 〉=| i _Pwmb|, | i _Pwmc| the time:

If i _Pwma〉=0,1,6,2, No. 4 IGBT conducting, i IGBT ON time is T _i, then

T ₁＝T

$T_6=\frac{\left|i_{\mathrm{pwmb}}\right|}{\mathrm{id}}T$

${\mathrm{<figure-callout\; id="2"\; label="T"\; filenames="A20051001219800111.png"\; state="\{\{state\}\}">T</figure-callout>}}_2=\frac{\left|i_{\mathrm{pwmc}}\right|}{\mathrm{id}}T$

T ₄＝T-T ₂-T ₆

In the formula, T is a control cycle, and id is the superconducting coil current value, measure by current Hall, down together;

If i _Pwma＜0, then 4,3,5, No. 1 IGBT conductings, the ON time of each IGBT is:

T ₄＝T

$T_3=\frac{\left|i_{\mathrm{pwmb}}\right|}{\mathrm{id}}T$

$T_5=\frac{\left|i_{\mathrm{pwmc}}\right|}{\mathrm{id}}T$

T ₁＝T-T ₃-T ₅

When | i _Pwmb| 〉=| i _Pwmc|, | i _Pwma| the time:

If i _Pwmb〉=0, then 3,2,4, No. 6 IGBT conductings;

T ₃＝T

${\mathrm{<figure-callout\; id="2"\; label="T"\; filenames="A20051001219800111.png"\; state="\{\{state\}\}">T</figure-callout>}}_2=\frac{\left|i_{\mathrm{pwmc}}\right|}{\mathrm{id}}T$

$T_4=\frac{\left|i_{\mathrm{pwma}}\right|}{\mathrm{id}}T$

T ₆＝T-T ₂-T ₄

If i _Pwmb＜0, then 6,5,1, No. 3 IGBT conductings;

T ₆＝T

$T_5=\frac{\left|i_{\mathrm{pwmc}}\right|}{\mathrm{id}}T$

$T_1=\frac{\left|i_{\mathrm{pwma}}\right|}{\mathrm{id}}T$

T ₃＝T-T ₁-T ₅

When | i _Pwmc| 〉=| i _Pwma|, | i _Pwmb| the time:

If i _Pwmc〉=0, then 5,4,6, No. 2 IGBT conductings;

T ₅＝T

$T_4=\frac{\left|i_{\mathrm{pwma}}\right|}{\mathrm{id}}T$

$T_6=\frac{\left|i_{\mathrm{pwmb}}\right|}{\mathrm{id}}T$

T ₂＝T-T ₄-T ₆

If i _Pwmc＜0, then 2,1,3, No. 5 IGBT conductings;

T ₂＝T

$T_1=\frac{\left|i_{\mathrm{pwma}}\right|}{\mathrm{id}}T$

$T_3=\frac{\left|i_{\mathrm{pwmb}}\right|}{\mathrm{id}}T$

T ₅＝T-T ₁-T ₃

In ON time, the drive signal of IGBT is high; Outside ON time, the drive signal of IGBT is low, according to the ON time of each IGBT, can conveniently obtain its drive signal;

Step 4: described 6 drive signals of step 3 are delivered to the grid of 6 IGBT respectively, realize Steady-State Control; Form half brachium pontis behind diode of described each IGBT polyphone, 6 IGBT and 6 the corresponding separately series connection of diode backs constitute a current transformer, wherein, the mutual forward serial connection of per two described half brachium pontis, form three brachium pontis, its connection mid point separately links to each other with load three-phase voltage output; One end of described three brachium pontis is the negative pole of three diodes that IGBT was connected in series, the other end is the source electrode of other three IGBT, connect an end of superconducting coil after the negative pole parallel connection of described three diodes that IGBT was connected in series, and connect the other end of described superconducting coil after the source electrode parallel connection of other three IGBT.

The effect of this control method can be proved by simulation result (accompanying drawing 2) and experimental result (accompanying drawing 3).

The supply voltage symmetry is fallen 50% o'clock simulation result shown in the accompanying drawing 2.Wherein, accompanying drawing 2a is a mains voltage waveform, and accompanying drawing 2b is a load voltage waveform.By mains voltage waveform as can be known, between 0.12～0.22s, drop range has taken place supply voltage is that 50% instantaneous voltage falls, but because the effect of control method, during this period of time, load voltage does not almost change, and still remains on rated value, thereby has avoided the influence of power failure to load.

The supply voltage symmetry is fallen 50% o'clock experimental result shown in the accompanying drawing 3.Wherein, accompanying drawing 3a is a mains voltage waveform, and accompanying drawing 3b is a load voltage waveform.By mains voltage waveform as can be known, between 0.15～0.35s, drop range has taken place and has been about 50% instantaneous voltage and falls in supply voltage, but because the effect of control method, during this period of time, load voltage still remains rated value, has avoided the adverse effect of power failure to load.

Description of drawings

Fig. 1: the topology diagram of current parallel type dynamic voltage compensator;

Fig. 2: the supply voltage symmetry is fallen 50% o'clock simulation waveform: 2a. mains voltage waveform, 2b. load voltage waveform;

Fig. 3: the supply voltage symmetry is fallen 50% o'clock experimental waveform: 3a. mains voltage waveform, 3b. load voltage waveform;

Fig. 4: the Steady-State Control electric current of Steady-State Control method calculates action box figure;

Fig. 5: the flow chart of Steady-State Control method.

Embodiment

The course of work of Steady-State Control method is as follows:

1, working voltage sensor measurement power supply three-phase voltage Vsa, Vsb, Vsc and load three-phase voltage Vfa, Vfb, Vfc, and measured voltage sent into DSP;

2, in DSP to Vsa, Vsb, Vsc and Vfa, Vfb, Vfc carries out 3/2 conversion, obtains the supply voltage Vsd under the dq coordinate system, Vsq and load voltage Vfd, Vfq;

3, in DSP, utilize multiplier and adder to ask for ipwmd and ipwmq respectively according to formula (1);

4, in DSP, ipwmd and ipwmq are carried out 2/3 conversion, utilize the result of conversion gained again, take the computational methods of current phasor PWM, try to achieve the drive signal of 6 IGBT;

5, DSP sends the drive signal of 6 IGBT to each IGBT, to realize the Steady-State Control method.

Program flow diagram as shown in Figure 4.

The calculation procedure block diagram as shown in Figure 5, concrete steps are as follows:

1, initialization;

2, use hardware to measure the three-phase voltage value of power supply and the three-phase voltage value of load, and these values are stored in the internal memory of DSP;

3, use the signal processing algorithm of DSP inside that power supply in the DSP internal memory and load three-phase voltage value are carried out 3/2 conversion, try to achieve V _Sd, V _Sq, V _FdAnd V _Fq, and these values are stored in the internal memory of DSP;

4, from the DSP internal memory, extract 1/ ω L _s, (ω ²CL _s-1)/ω L _s, 1/R _f, V _Sd, V _Sq, V _FdAnd V _Fq, deposit in the register of DSP;

5, try to achieve V by the multiplier of DSP _Sq/ ω L _s, (ω ²CL _s-1) V _Fq/ ω L _sAnd V _Fd/ R _f

6, try to achieve i by the adder of DSP _PwmdAnd i _Pwmq

7, finish.

Described DSP is the abbreviation of digital signal processor, and used DSP is floating type DSP.

Claims (1)

1, the superconducting energy storage Steady-State Control method of current parallel voltage device is characterized in that described method contains following steps successively:

Step 1:, be designated as Vsa, Vsb, Vsc and Vfa, Vfb, Vfc respectively by voltage measuring transformer power supply three-phase voltage and load three-phase voltage;

Step 2: the power supply three-phase voltage that step 1 is obtained and the value of load three-phase voltage exist in the internal memory of a DSP;

Step 3:, according to the following steps, obtain the Steady-State Control electric current of representing with ipwmd and ipwmq respectively by described DSP;

The 3-1 step: to the Vsa in the internal memory, Vsb, Vsc and Vfa, Vfb, Vfc, carry out 3/2 conversion by following formula respectively, obtain Vsd, Vsq and Vfd, Vfq, and deposit internal memory in;

In the formula, θ is an angular metric, is provided by phase-locked loop circuit, and together, the input of phase-locked loop circuit is Vsa down;

The 3-2 step: obtain 1/R with the 1st multiplier _f, the 2nd multiplier obtained 1/100 π L _sValue, wherein, L _sReactance value, R for phase-shift reactor _fValue for load resistance;

All obtain ((100 π) separately with the 1st, the 2 two adder and multiplier ²CL _s-1) π L/100 _sValue, wherein C is the filter capacitor value;

Each value that the 3-2 step is obtained deposits in the internal memory;

The 3-3 step: obtain Vsq/100 π L with the 3rd multiplier _sValue;

Obtain ((100 π) with the 4th multiplier ²CL _s-1) Vfq/100 π L _sValue;

Obtain Vfd/R with the 5th multiplier _fValue, obtain with the 1st adder again

$i_{\mathrm{pwmd}}=\frac{1}{100{\mathrm{\&pi;L}}_s}{V}_{\mathrm{sq}}+\frac{{\left(100\mathrm{\&pi;}\right)}^2{\mathrm{CL}}_s-1}{100{\mathrm{\&pi;L}}_s}{V}_{\mathrm{fq}}-\frac{1}{R_f}{V}_{\mathrm{fd}}$

The 3-4 step; Obtain Vsd/100 π L with the 6th multiplier _sValue;

Obtain ((100 π) with the 7th multiplier ²CL _s-1) Vfd/100 π L _sValue;

Obtain Vfq/R with the 8th multiplier _fValue, obtain with the 2nd adder again

$i_{\mathrm{pwmq}}=-\frac{1}{100{\mathrm{\&pi;L}}_s}{V}_{\mathrm{sd}}+\frac{{\left(100\mathrm{\&pi;}\right)}^2{\mathrm{CL}}_s-1}{100{\mathrm{\&pi;L}}_s}{V}_{\mathrm{fd}}-\frac{1}{R_f}{V}_{\mathrm{fq}}$

The 3-5 step: ipwmd and ipwmq that step 3-4 is obtained carry out 2/3 conversion by following formula, obtain the three-phase Steady-State Control current value ipwma of rectangular coordinate system, ipwmb, and ipwmc:

3-6 step: the three-phase Steady-State Control current i pwma that step 3-5 is obtained, ipwmb, ipwmc are input to a current phasor pulse width modulator, obtain the drive signal of 6 IGBT, described IGBT is that the English of igbt is called for short, and 6 drive signal computational methods of described IGBT are as follows:

When | _Ipwma| 〉=| i _Pwmb|, | i _Pwmc| the time:

If i _Pwma〉=0,1,6,2, No. 4 IGBT conducting, i IGBT ON time is T _i, then

T ₁＝T

$T_6=\frac{\left|i_{\mathrm{pwmb}}\right|}{\mathrm{id}}T$

$T_2=\frac{\left|i_{\mathrm{pwmc}}\right|}{\mathrm{id}}T$

T ₄＝T-T ₂-T ₆

In the formula, T is a control cycle, and id is the superconducting coil current value, measure by current Hall, down together;

If i _Pwma＜0, then 4,3,5, No. 1 IGBT conductings, the ON time of each IGBT is:

T ₄＝T

$T_3=\frac{\left|i_{\mathrm{pwmb}}\right|}{\mathrm{id}}T$

$T_5=\frac{\left|i_{\mathrm{pwmc}}\right|}{\mathrm{id}}T$

T ₁＝T-T ₃-T ₅

When | i _Pwmb| 〉=| i _Pwmc|, | i _Pwma| the time:

If i _Pwmb〉=0, then 3,2,4, No. 6 IGBT conductings;

T ₃＝T

$T_2=\frac{\left|i_{\mathrm{pwmc}}\right|}{\mathrm{id}}T$

$T_4=\frac{\left|i_{\mathrm{pwma}}\right|}{\mathrm{id}}T$

T ₆＝T-T ₂-T ₄

If i _Pwmb＜0, then 6,5,1, No. 3 IGBT conductings;

T ₆＝T

$T_5=\frac{\left|i_{\mathrm{pwmc}}\right|}{\mathrm{id}}T$

$T_1=\frac{\left|i_{\mathrm{pwma}}\right|}{\mathrm{id}}T$

T ₃＝T-T ₁-T ₅

When | i _Pwmc| 〉=| i _Pwma|, | i _Pwmb| the time:

If i _Pwmc〉=0, then 5,4,6, No. 2 IGBT conductings;

T ₅＝T

$T_4=\frac{\left|i_{\mathrm{pwma}}\right|}{\mathrm{id}}T$

$T_6=\frac{\left|i_{\mathrm{pwmb}}\right|}{\mathrm{id}}T$

T ₂＝T-T ₄-T ₆

If i _Pwmc＜0, then 2,1,3, No. 5 IGBT conductings;

T ₂＝T

$T_1=\frac{\left|i_{\mathrm{pwma}}\right|}{\mathrm{id}}T$

$T_3=\frac{\left|i_{\mathrm{pwmb}}\right|}{\mathrm{id}}T$

T ₅＝T-T ₁-T ₃

In ON time, the drive signal of IGBT is high; Outside ON time, the drive signal of IGBT is low, according to the ON time of each IGBT, can conveniently obtain its drive signal;

Step 4: described 6 drive signals of step 3 are delivered to the grid of 6 IGBT respectively, realize Steady-State Control; Form half brachium pontis behind diode of described each IGBT polyphone, 6 IGBT and 6 the corresponding separately series connection of diode backs constitute a current transformer, wherein, the mutual forward serial connection of per two described half brachium pontis, form three brachium pontis, its connection mid point separately links to each other with load three-phase voltage output; One end of described three brachium pontis is the negative pole of three diodes that IGBT was connected in series, the other end is the source electrode of other three IGBT, connect an end of superconducting coil after the negative pole parallel connection of described three diodes that IGBT was connected in series, and connect the other end of described superconducting coil after the source electrode parallel connection of other three IGBT.

Images