CN1705233B - Injection locking type frequency dividing circuit and frequency dividing method thereof - Google Patents
Injection locking type frequency dividing circuit and frequency dividing method thereof Download PDFInfo
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- CN1705233B CN1705233B CN 200410045929 CN200410045929A CN1705233B CN 1705233 B CN1705233 B CN 1705233B CN 200410045929 CN200410045929 CN 200410045929 CN 200410045929 A CN200410045929 A CN 200410045929A CN 1705233 B CN1705233 B CN 1705233B
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Abstract
A filling type frequency halving circuit, which contains a selective module for generation control signal, a bias module coupled with selective module for receiving a original signal and generating a bias signal according to control signal, and an oscillation module coupled with bias module for receiving bias signal and generating an destination signal whose frequency has a proportion relation with the frequency of original signal.
Description
Technical field
The present invention relates to a kind of frequency dividing circuit and its dividing method, particularly a kind of injection locking formula frequency dividing circuit and its dividing method that enlarges bandwidth by the control bias current.
Background technology
Frequency dividing circuit (frequency divider) is very important part in the frequency synthesizer (frequency synthesizer), produce a target pulse wave in order to an original pulse wave is carried out frequency division, wherein the frequency of this target pulse wave is a corresponding frequency ratio with the frequency of this original pulse wave.Know as industry, the tradition frequency dividing circuit is to be connected in series (cascade) each other by a plurality of frequency units to form, wherein often adopting trigger (flip-flop) is its main element, but because trigger (flip-flop) itself is a digital element, it is general to be to be driven by a default low-voltage (for example 0V) and a default high voltage (for example 5V), therefore, for each trigger in the frequency dividing circuit, when charging and discharging electric charge, need consume very big power, therefore also when frequency of operation is very high, the power consumption of any convenient divider circuitry also increases thereupon.
Therefore, injection locking formula frequency dividing circuit (injection-locked frequency divider) arises at the historic moment then, as people such as Rategh in " Superharmonic Injection-LockedFrequency Dividers ", IEEE Journal of Solid-State Circuits, Vol.34, No.6, described in the June 1999, injection locking formula frequency dividing circuit is to be analog frequency dividing circuit, it directly handles the original analog that sends, and exports frequency division analog signal later.In general, injection locking formula frequency dividing circuit is made up of an oscillation module and a bias voltage module.This bias voltage module is to be used for receiving the primary signal that is sent, desires to carry out frequency division by front stage circuits (for example voltage controlled oscillator in the frequency synthesizer), and with this oscillation module of it injection.Injection locking formula frequency dividing circuit is after the suitable design of process, echo signal after can in this oscillation module, capturing frequency division, wherein the frequency of oscillation of the frequency of oscillation of this echo signal and this primary signal is to be locked in a specific frequency ratio, and this frequency ratio then depends on circuit characteristic.
Though injection locking formula frequency dividing circuit has can be in the advantage of high frequency running, and directly Analog signals is saved power consumption, but because the circuit design of injection locking formula frequency dividing circuit must suitably be mated the frequency of oscillation of primary signal and the frequency of oscillation of oscillation module (that is its centre frequency) can normally be carried out the frequency division running, so the bandwidth of operation of injection locking formula frequency dividing circuit is all considerably narrow usually.
Summary of the invention
Therefore, main purpose of the present invention is to provide a kind of injection locking formula frequency dividing circuit and its dividing method that enlarges bandwidth by the control bias current.
According to embodiments of the invention, be to disclose a kind of injection locking formula frequency dividing circuit, it includes chooses module, is used for producing a control signal; One bias voltage module is coupled to this and chooses module, is used for receiving a primary signal, to produce a bias voltage signal according to this control signal; And an oscillation module, be coupled to this bias voltage module, be used for receiving this bias voltage signal to produce an echo signal; Wherein be to have a ratio between the frequency of the frequency of this echo signal and this primary signal.
According to embodiments of the invention, also disclose a kind of dividing method, it includes input one primary signal; Import a control signal; Utilize a bias voltage module, produce a bias voltage signal according to this primary signal and this control signal; Utilize an oscillation module, produce an echo signal according to this bias voltage signal; And change this control signal to change the frequency of this echo signal, wherein be to have a ratio between the frequency of the frequency of this echo signal and this primary signal.
Description of drawings
Fig. 1 is the schematic diagram of the injection locking formula frequency dividing circuit of one embodiment of the invention.
Fig. 2 is the schematic diagram of the injection locking formula frequency dividing circuit of another embodiment of the present invention.
Fig. 3 is the schematic diagram of the injection locking formula frequency dividing circuit of further embodiment of this invention.
The reference numeral explanation:
50,50 ', 50 " frequency dividing circuits
60,60 ', 60 " oscillation modules
70,70a, 70b, 70c, 70d, 70e bias voltage module
80 input signal sources
90 choose module
92 bias voltage generators.
Embodiment
See also Fig. 1, Fig. 1 is the schematic diagram divided by three (divided-by-3) injection locking formula frequency dividing circuit (injection-locked frequency divider) 50 according to one embodiment of the invention.In the present embodiment, injection locking formula frequency dividing circuit 50 includes an oscillation module 60, a bias voltage module 70 and is chosen module 90.Bias voltage module 70 is to be used for being received from the primary signal that an input signal source 80 (can be the voltage controlled oscillator of frequency synthesizer or other need carry out the signal source of frequency division action) is transmitted, and according to this primary signal injection current to oscillation module 60, with the echo signal after producing frequency division at oscillation module 60, wherein the frequency of oscillation of the frequency of oscillation of this echo signal and this primary signal is to be locked in a specific frequency ratio, and this frequency ratio then depends on circuit characteristic.In addition, bias voltage module 70 also can be according to choosing the control signal that module 90 is sent, and decision is injected into the bias plasma flow of oscillation module 60.Extensively know as those who familiarize themselves with the technology and to know,, then can adjust the operational frequency bands of injection locking formula frequency dividing circuit 50 by above-described controlling mechanism because the frequency of oscillation of oscillation module 60 is to be decided by the bias plasma flow of being imported.Thus, the injection locking formula frequency dividing circuit 50 of present embodiment can have bigger bandwidth of operation.
In the present embodiment, oscillator 60 is ring oscillators (ring oscillator) of being made up of three reversers for one, and the configuration of ring oscillator and operating principle are to know for those who familiarize themselves with the technology extensively knows, so do not give unnecessary details at this.Then include a plurality of sub-bias voltage module 70a, 70b, 70c, 70d, 70e in the bias voltage module 70, see through electrical chip M12, M13, M14, M15, M16 respectively and be coupled to a bias current generator 92 of being formed by a current source IB and an electrical chip M11, and form a plurality of current mirror configurations (current mirror configuration) respectively, on each sub-bias voltage module 70a, 70b, 70c, 70d, 70e, to copy a bias current respectively.And each sub-bias voltage module 70a, 70b, 70c, 70d, 70e also include a control switch (as shown in Figure 1 electrical chip M17, M18, M19, M20, M21), respectively by choosing the control signal C that module 90 is produced
1, C
2, C
3, C
4, C
5Control its switching, that is to say, when a control switch was in opening, its pairing sub-bias voltage module promptly was in enabled status.Thus, choosing module 90 can be by the control signal C that is produced
1, C
2, C
3, C
4, C
5Various combination control the bias plasma flow that injects oscillation module 60, the operational frequency bands when carrying out that with further control injection locking formula frequency dividing circuit 50 primary signal of being imported from input signal source 80 carried out divide operation.In other words, choose module 90 and promptly can change control signal C
1, C
2, C
3, C
4, C
5Combination changing the frequency of oscillation of this echo signal, and further change the operational frequency bands of injection locking formula frequency dividing circuit 50.
With present embodiment, because oscillation module 60 is a ring oscillator of being made up of three reversers, so the frequency ratio between the frequency of oscillation of the primary signal that is produced by input signal source 80 and the echo signal of being taken out by oscillation module 60 is to be 3: 1, that is to say that the input A among Fig. 1 and the frequency of oscillation of the signal on the output B can have a special ratios and concern 3: 1.As previously mentioned, because the frequency of oscillation of oscillation module 60 is to be decided by the bias plasma flow of being imported, so when the bias plasma flow that injects oscillation module 60 is controlled in different when big or small by choosing module 90, the centre frequency of oscillator 60 promptly can have different numerical value thereupon, and then injection locking formula frequency dividing circuit 50 is applicable to the primary signal of different frequencies of oscillation is carried out frequency division, that is to say that the injection locking formula frequency dividing circuit 50 of present embodiment can have bigger bandwidth of operation via the auxiliary of sub-bias voltage module 70a, 70b, 70c, 70d, 70e.
Electrical chip M12, the M13, M14, M15, the M16 that are used for constituting current mirror among sub-bias voltage module 70a, 70b, 70c, 70d, the 70e can have the components identical characteristic, for example corresponding identical channel width/length is than (W/L ratio, aspect ratio), so choose the purpose that module 90 can reach the control bias current via the unlatching number of the sub-bias voltage module 70a of control, 70b, 70c, 70d, 70e.Yet, electrical chip M12, the M13, M14, M15, the M16 that are used for constituting current mirror among sub-bias voltage module 70a, 70b, 70c, 70d, the 70e also can have different element characteristics, for example corresponding different channel width/length ratio, for instance, the channel width/length ratio of electrical chip M12, M13, M14, M15, M16 can have following ratio: 1: 2: 4: 8: 16, like this then, can reach wider bandwidth of operation by the combination of different control signal.Note that only to show five bias voltage module 70a, 70b, 70c, 70d, 70e among Fig. 1 so that explanation, yet injection locking formula frequency dividing circuit 50 of the present invention is the number of siding stopping bias voltage module not.
See also Fig. 2, show among Fig. 2 one embodiment of the invention divided by four (divided-by-4) injection locking formula frequency dividing circuit 50 ' schematic diagram.Injection locking formula frequency dividing circuit 50 among Fig. 2 ' quite similar with the injection locking formula frequency dividing circuit 50 among Fig. 1, yet the oscillation module 60 among Fig. 2 ' a be to use differential type (differential mode) ring oscillator, the circuit configurations of differential type ring oscillator and mode of operation are to know for those who familiarize themselves with the technology extensively knows, so do not give unnecessary details at this.And the injection locking formula frequency dividing circuit 50 among Fig. 2 ' operating principle be identical with injection locking formula frequency dividing circuit 50 among Fig. 1, so not repeat specification.
See also Fig. 3, show among Fig. 3 one embodiment of the invention divided by two (divided-by-2) injection locking formula frequency dividing circuit, 50 " schematic diagrames.Injection locking formula frequency dividing circuit 50 among Fig. 3 " quite similar with the injection locking formula frequency dividing circuit 50 among Fig. 1; however the oscillation module 60 among Fig. 3 " is to use LC resonance cavate (LC tank) oscillator, the circuit configurations and the mode of operation of LC resonance cavity oscillator are to know for those who familiarize themselves with the technology extensively knows, so do not give unnecessary details at this.And the injection locking formula frequency dividing circuit 50 among Fig. 3 " operating principle be identical with injection locking formula frequency dividing circuit 50 among Fig. 1, so heavily do not cover explanation.
The above only is preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (9)
1. injection locking formula frequency dividing circuit, it includes:
One chooses module, is used for producing a control signal;
One bias voltage module is coupled to this and chooses module, is used for receiving a primary signal, to produce a bias voltage signal according to this control signal; And
One oscillation module is coupled to this bias voltage module, is used for receiving this bias voltage signal to produce an echo signal;
Wherein be to have a ratio between the frequency of the frequency of this echo signal and this primary signal.
2. injection locking formula frequency dividing circuit as claimed in claim 1, wherein this bias voltage module is to control the bias current of this bias voltage signal according to this control signal.
3. injection locking formula frequency dividing circuit as claimed in claim 1, wherein this to choose module be to change this control signal to change the operational frequency bands of this injection locking formula frequency dividing circuit.
4. injection locking formula frequency dividing circuit as claimed in claim 1, wherein this bias voltage module more includes a plurality of sub-bias voltage modules.
5. injection locking formula frequency dividing circuit as claimed in claim 4, wherein each sub-bias voltage module includes:
One current source is used to provide a current signal; And
One switch is coupled to this current source, is used for carrying out on-off action according to this control signal.
6. injection locking formula frequency dividing circuit as claimed in claim 1, wherein this oscillation module is to be a ring oscillator, or a differential type ring oscillator, again or LC resonance cavity oscillator.
7. dividing method, it includes:
Import a primary signal;
Import a control signal;
Utilize a bias voltage module, produce a bias voltage signal according to this primary signal and this control signal;
Utilize an oscillation module, produce an echo signal according to this bias voltage signal; And
Change this control signal changing the frequency of this echo signal,
Wherein be to have a ratio between the frequency of the frequency of this echo signal and this primary signal.
8. dividing method as claimed in claim 7, the step that wherein produces this bias voltage signal is to include: the bias current of controlling this bias voltage signal according to this control signal.
9. dividing method as claimed in claim 7, the step that wherein produces this bias voltage signal is to include: the enabled status of controlling a plurality of sub-bias voltage modules according to this control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410045929 CN1705233B (en) | 2004-05-25 | 2004-05-25 | Injection locking type frequency dividing circuit and frequency dividing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410045929 CN1705233B (en) | 2004-05-25 | 2004-05-25 | Injection locking type frequency dividing circuit and frequency dividing method thereof |
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| Publication Number | Publication Date |
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| CN1705233A CN1705233A (en) | 2005-12-07 |
| CN1705233B true CN1705233B (en) | 2011-05-11 |
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| CN 200410045929 Expired - Lifetime CN1705233B (en) | 2004-05-25 | 2004-05-25 | Injection locking type frequency dividing circuit and frequency dividing method thereof |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104579319B (en) * | 2014-04-22 | 2019-04-09 | 上海华虹宏力半导体制造有限公司 | Multiphase clock generator |
| CN105322961A (en) * | 2015-12-11 | 2016-02-10 | 上海交通大学 | Injection locking type dual-mode prescaler with low power consumption and wide locking range |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4953010A (en) * | 1987-03-09 | 1990-08-28 | Plessey Overseas Limited | FM demodulator including injection locked oscillator/divider |
| CN1081032A (en) * | 1992-01-13 | 1994-01-19 | 日本电气株式会社 | Frequency synthesizer |
| US20030025566A1 (en) * | 2001-08-01 | 2003-02-06 | Ar Card | Automatic gain control for a voltage controlled oscillator |
| US6781471B2 (en) * | 2002-04-10 | 2004-08-24 | Airoha Technology Corp. | Low phase noise voltage controlled oscillator circuit |
-
2004
- 2004-05-25 CN CN 200410045929 patent/CN1705233B/en not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4953010A (en) * | 1987-03-09 | 1990-08-28 | Plessey Overseas Limited | FM demodulator including injection locked oscillator/divider |
| CN1081032A (en) * | 1992-01-13 | 1994-01-19 | 日本电气株式会社 | Frequency synthesizer |
| US20030025566A1 (en) * | 2001-08-01 | 2003-02-06 | Ar Card | Automatic gain control for a voltage controlled oscillator |
| US6781471B2 (en) * | 2002-04-10 | 2004-08-24 | Airoha Technology Corp. | Low phase noise voltage controlled oscillator circuit |
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| CN1705233A (en) | 2005-12-07 |
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Granted publication date: 20110511 |