CN1702716A - Plasma display device - Google Patents
Plasma display device Download PDFInfo
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- CN1702716A CN1702716A CN 200510073926 CN200510073926A CN1702716A CN 1702716 A CN1702716 A CN 1702716A CN 200510073926 CN200510073926 CN 200510073926 CN 200510073926 A CN200510073926 A CN 200510073926A CN 1702716 A CN1702716 A CN 1702716A
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Abstract
A plasma display device having a plasma display panel in which, each display cell contains a magnesium oxide layer including magnesium oxide crystals that are excited by an electron beam to emit cathode luminescence light having a peak in a wavelength range of 200 to 300 nm. In an addressing period, a row electrode driving circuit applies a scanning pulse to one row electrodes of row electrode pairs in turn, while a column electrode driving circuit supplies column electrodes with data pulses corresponding to one row electrode which is applied with the scanning pulse.
Description
Invention field
The present invention relates to a kind of plasma display equipment, wherein use plasma display.
Technical background
For driving plasma display (PDP), single game (one-field) display cycle comprises a plurality of sons (subfield), each son field comprises that an addressing period and one keep the cycle, thereby at many levels level (gradation level) display image.In the level display packing, maybe when the level level for greater number increases sub-number, addressing period increases relatively in the ratio of single game in the display cycle when increasing display line quantity for higher sharpness.If just simply with the increase with the restriction addressing period of the narrowed width of scanning impulse, because the discharge that postpones etc., the selectivity discharge becomes uncertain.For addressing this problem, adopted a kind of like this driving method: the row electrode of PDP is divided into two groups, be the upper area and the lower zone of panel, and allow location scanning simultaneously in the upper area of panel and lower zone, thereby addressing period is reduced to half.Consider such as the such interlaced video signal of NTSC video standard signal, make use here, it is corresponding to a frame in the non-interlaced scanned video signal.
Fig. 1 shows the configuration of the plasma display equipment of using the conventional ADS driving method.This plasma display device comprises: PDP 100; Drive and Control Circuit 101; X column electrode driving circuit 102; Y column electrode driving circuit 103; Top column electrode drive circuit 104; Below column electrode drive circuit 105.PDP 100 comprises: as the row electrode Du of address electrode
1-Du
mAnd Dd
1-Ddm; And the column electrode X that arranges with these row electrode crossing
1-X
nWith column electrode Y
1-Y
nRow electrode Du
1-Du
mBe the row electrode in the panel upper area, with column electrode X
1-X
N/2With column electrode Y
1-Y
N/2Intersect.Row electrode Dd
1-Dd
mBe the row electrode in the panel lower zone, with column electrode X
N/2+1-X
nWith column electrode Y
N/2+1-Y
nIntersect.Column electrode (X
1, Y
1), (X
2, Y
2), (X
3, Y
3) ... (X
n, Y
n) respectively as first display line to the n display line on the PDP 100.At every display line and row electrode Du
1-Du
mWith row electrode Dd
1Place, the point of crossing of each electrode forms a display unit CS, as a pixel among the-Ddm.
According to above-mentioned sub-field method, in response to incoming video signal, Drive and Control Circuit 101 produces control signal to corresponding X column electrode driving circuit 102, Y column electrode driving circuit 103, top column electrode drive circuit 104 and below column electrode drive circuit 105.
Fig. 2 shows the light emitting drive sequence according to this sub-field method.In this light emitting drive sequence, in the display cycle of incoming video signal each (frame), that is, showing a used unit of a screen image in the display cycle, carries out N sub-field SF1-SFN.Each son field among son the SF1-SFN comprises that all an address phase W, maintenance stage I and one wipe stage E.Have only first son SF1 to comprise a reseting stage R.In each, carry out luminance weighted to this a little SF1-SFN with the order that increases progressively.Particularly, first son SF1 has minimum luminance weighted coefficient, and last height field SFN has maximum luminance weighted coefficient.At first the scanning impulse among the address phase W is applied to the column electrode Y in the panel upper area
1On, then according to Y
2, Y
3... Y
N/2Sequence ground it is applied to column electrode Y
2, Y
3... Y
N/2On.When this applies, this scanning impulse is applied to the column electrode Y of panel lower zone
nOn, then according to Y
N-1, Y
N-2... Y
N/2+1Sequence ground it is applied to column electrode Y
N-1, Y
N-2... Y
N/2+1On.
In response to the control signal that Drive and Control Circuit 101 provides, X column electrode driving circuit 102 is applied to multiple driving pulse each column electrode X of PDP 100
1-X
nOn.In response to the control signal that Drive and Control Circuit 101 provides, Y column electrode driving circuit 103 is applied to multiple driving pulse each column electrode Y of PDP 100
1-Y
nOn.In response to the control signal that Drive and Control Circuit 101 provides, top column electrode drive circuit 104 is applied to pixel data pulses the row electrode Du of PDP 100
1-Du
mOn.In response to the control signal that Drive and Control Circuit 101 provides, below column electrode drive circuit 105 is applied to pixel data pulses the row electrode Dd of PDP 100
1-Dd
mOn.
Fig. 3 shows multiple driving pulse is applied to row electrode D, column electrode X among the son SF1 who extracts from son SF1-SFN
1-X
nFigure with sequential on the Y.
At first, in the reseting stage R that has only first son SF1 to carry out, X column electrode driving circuit 102 is with the reset pulse RP of negative polarity shown in Figure 3
XBe applied to column electrode X simultaneously
1-X
nOn.In addition, applying reset pulse RP
XThe time, Y column electrode driving circuit 103 will have the first reset pulse RP of the positive polarity of pulse waveform
Y1Be applied to column electrode Y simultaneously
1-Y
nOn, the described first reset pulse RP
Y1Magnitude of voltage slowly increase until the crest voltage value, as shown in Figure 3 in time.By applying reset pulse RP simultaneously
Y1Reset pulse RP with negative polarity
X, produce first reset discharge between X column electrode in each display unit in all display units and the Y column electrode.After first reset discharge finishes, in the discharge space of each display unit, form the wall electric charge (wall charge) of scheduled volume.Subsequently, Y column electrode driving circuit 103 produces the second reset pulse RP of negative polarity
Y2, its voltage slowly changes at negative edge, and with the second reset pulse RP
Y2Be applied to all column electrode Y simultaneously
1-Y
nOn.In response to applying the second reset pulse RP
Y2, produce second reset discharge between X column electrode in all display units in each display unit and the Y column electrode.Second reset discharge disappears the wall electric charge that forms in each display unit in all display units.
Then, in the address phase W of each son field, top column electrode drive circuit 104 and below column electrode drive circuit 105 respectively produce pixel data pulses, are used for being provided with whether should drive each discharge cell with luminous in this child field according to incoming video signal.Top column electrode drive circuit 104 sequentially with the pixel data pulses (m) of a display line as one group of pixel data pulses DP
1, DP
2... DP
N/2, be applied to row electrode Du
1-Du
mOn.Below column electrode drive circuit 105 sequentially with the pixel data pulses of a display line as one group of pixel data pulses DP
n, DP
N-1... DP
N/2+1, be applied to row electrode Dd
1-Dd
mOn.Meanwhile, with pixel data pulses DP
1-DP
N/2In each sequential synchronous, Y column electrode driving circuit 103 sequentially is applied to column electrode Y with the negative polarity scanning impulse
1-Y
N/2On, and, with pixel data pulses DP
n-DP
N/2+1In each sequential synchronous, sequentially this negative polarity scanning impulse SP is applied to column electrode Y
n-Y
N/2+1On.In this case, only applied this scanning impulse SP and applied in the display unit of pixel data pulses of high pressure and produced discharge (selectivity discharge), caused the wall electric charge of formation scheduled volume in the discharge space of each display unit in these display units at those.By carrying out address phase W, each discharge cell is set to illuminates location mode and one of do not illuminate in the location mode, wherein illuminating under the location mode, there is the wall electric charge of scheduled volume, and do not illuminating under the state, there is not the wall electric charge.
Next, in maintenance stage I of each son, each keeps pulse IP with positive polarity X column electrode driving circuit 102 and Y column electrode driving circuit 103
X, IP
YBe applied to column electrode X
1-X
n, Y
1-Y
nOn many times, its number of times (duration) is luminance weighted corresponding to this child field.In the maintenance stage I of each son SF1-SFN, keep pulse IP applying at every turn
XOr IP
YThe time, have only those to be in the above-mentioned discharge cell that illuminates under the location mode and discharge for keeping this light.
Then, wiping in the stage E of each son field, Y column electrode driving circuit 103 sequentially is applied to column electrode Y with negative polarity erasing pulse EP shown in Figure 3
1-Y
nOn.In response to applying erasing pulse EP, produce in the discharge cell of keeping discharge among those maintenance stage I formerly and produce erasure discharge.Erasure discharge disappears the wall electric charge that forms in these display units, do not illuminate location mode thereby discharge cell is transformed into.
But, in traditional plasma display equipment, from a display line of panel upper end and a display line of lower end, towards in abutting connection with that display line that divides the border of drawing up electrode executive address scanning sequentially.In this address scan technology, each the row electrode group that is divided into upper section and below part all needs a column electrode drive circuit, thereby causes higher cost.In addition, the problem of the stability of address discharge does not change yet, and this is because compare with the display line of at first scanning, more difficult generation address discharge in Sao Miao the display line afterwards.
Summary of the invention
An object of the present invention is to provide a kind of plasma display equipment and driving method, it can accelerate address scan, and can not damage the stability of address scan.
According to a kind of plasma display equipment of the present invention, comprise: a plasma display, comprise a plurality of column electrodes of constituting display line to, with described a plurality of column electrodes to a plurality of row electrodes of intersecting and at described column electrode pair each display unit with each place, point of crossing formation of described row electrode, each described display unit has magnesium oxide layer, it comprises the magnesia crystal that is subjected to electron beam excitation and sends cathode luminescence, and wherein said cathode luminescence has a peak value in 200 to 300nm wavelength coverages; A column electrode driving circuit, each that is used to drive described a plurality of column electrode centerings is right; And column electrode drive circuit, be used for driving each electrode of described a plurality of row electrodes, thereby show a half tone image in the display cycle a single game, this single game display cycle is divided into a plurality of sons field, each son field comprises that an addressing period and one keep the cycle, wherein, in described addressing period, described column electrode driving circuit is applied to a scanning impulse on the right column electrode of described column electrode successively, and described column electrode drive circuit will be applied on the described row electrode with the corresponding data pulse of the display line that described scanning impulse is applied to.
According to the present invention, a kind of method that drives plasma display is provided, this plasma display panel comprises: a plurality of column electrodes that constitute display line are right, with described a plurality of column electrodes to a plurality of row electrodes of intersecting and at described column electrode pair each display unit with each place, point of crossing formation of described row electrode, each described display unit has magnesium oxide layer, it comprises the magnesia crystal that is subjected to electron beam excitation and sends cathode luminescence, described cathode luminescence has a peak value in 200 to 300nm wavelength coverages, thereby show a half tone image in the display cycle a single game, this single game display cycle is divided into a plurality of son, and each son field comprises that an addressing period and one keep the cycle; Said method comprising the steps of: in described addressing period, a scanning impulse is applied on the right column electrode of described column electrode successively, will be applied on the described row electrode with the corresponding data pulse of the display line that described scanning impulse is applied to.
The accompanying drawing summary
Fig. 1 summarizes the structural representation that the traditional plasma display device is shown;
Fig. 2 is the synoptic diagram that the typical light emitting drive sequence of using in the plasma display equipment shown in Figure 1 is shown;
Fig. 3 is illustrated in to apply multiple driving pulse that applies according to light emitting drive sequence shown in Figure 2 and the synoptic diagram that applies the sequential of these pulses on the PDP;
Fig. 4 summarizes the structural representation that illustrates according to plasma display equipment of the present invention;
Fig. 5 is the front view that the inner structure of this PDP when equipment display screen one side from Fig. 4 is watched schematically is shown;
Fig. 6 is the sectional view along V3-V3 line intercepting shown in Figure 5;
Fig. 7 is the sectional view along W2-W2 line intercepting shown in Figure 5;
Fig. 8 illustrates to have cube synoptic diagram of the magnesium oxide monocrystal of polycrystal structure;
Fig. 9 illustrates to have cube synoptic diagram of the magnesium oxide monocrystal of polycrystal structure;
Thereby Figure 10 illustrates the synoptic diagram how the magnesium oxide monocrystal powder adheres to the surface formation magnesium oxide layer of the dielectric layer and the dielectric layer of projection;
Figure 11 is the synoptic diagram that the typical light emitting drive sequence of using in the plasma display equipment shown in Figure 4 is shown;
Figure 12 is illustrated in PDP to go up multiple driving pulse that applies according to this light emission drive sequences and the synoptic diagram that applies the sequential of pulse;
Figure 13 illustrates the crystal grain diameter of magnesium oxide monocrystal powder and the curve map of the relation between the CL emission wavelength;
Figure 14 is the curve map that the relation between the CL luminous intensity of the crystal grain diameter of magnesium oxide monocrystal powder and 235nm is shown;
Figure 15 is the curve map that discharge probability, the discharge probability when forming magnesium oxide layer according to the conventional gas-phase deposition process and the discharge probability when forming magnesium oxide layer in a plurality of crystal structures when not forming magnesium oxide layer in display unit PC are shown;
Figure 16 is the curve map that the corresponding relation of CL luminous intensity that peak value is 235nm and discharge delay time is shown; And
Figure 17 summarizes the synoptic diagram of the structure of plasma display equipment according to another embodiment of the present invention is shown.
Embodiment
Describe embodiments of the invention in detail below with reference to accompanying drawing.
Fig. 4 summarizes the synoptic diagram that illustrates according to the structure of plasma display equipment of the present invention.
As shown in Figure 4, this plasma display device comprises: PDP 50, as plasma display; X column electrode driving circuit 51; Y column electrode driving circuit 53; Column electrode drive circuit 55; And Drive and Control Circuit 56.
PDP 50 is with the row electrode D that extends on the vertical direction of two-dimensional display respectively
1-D
mAnd the column electrode X that on the horizontal direction of this two-dimensional display, extends respectively
1-X
nWith column electrode Y
1-Y
nForm.In this case, be in the column electrode that adjoins (Y
1, X
1), (Y
2, X
2), (Y
3, X
3) ... (Y
n, X
n) formation first display line to the n display line on PDP 50.At each display line and each row electrode D
1-D
mPoint of crossing place (single-point chain line area surrounded among Fig. 4), form a display unit PC, as a pixel.In other words, on PDP 50, belong to the display unit PC of first display line
1,1-PC
1, m, belong to the display unit PC of second display line
2,1-PC
2, m... the display unit PC that belongs to the n display line
N, 1-PC
N, mArrange with matrix form.
Row electrode D
1-D
m, column electrode X
1-X
nWith column electrode Y
1-Y
nIn each electrode all be to form with terminal t, thereby row electrode D
1-D
mIn each electrode all be connected to column electrode drive circuit 55 by its terminal t; Column electrode X
1-X
nIn each electrode all be connected to X column electrode driving circuit 51 by its terminal t; And column electrode Y
1-Y
nIn each electrode all be connected to Y column electrode driving circuit 53 by its terminal t.
Fig. 5 is the front view that schematically illustrates when the inner structure of PDP 50 when the display surface side is watched.In Fig. 5, extract the electrode D that falls out
1-D
3In each electrode and the first display line (Y
1, X
1) and the second display line (Y
2, X
2) the point of crossing describe.Fig. 6 is the sectional view of the PDP 50 of V3-V3 line intercepting in Fig. 5, and Fig. 7 is the sectional view of the PDP 50 of W2-W2 line intercepting in Fig. 5.
As shown in Figure 5, each column electrode X comprises: bus electrode Xb, extend on the horizontal direction of two-dimensional display; And T shape transparency electrode Xa, be arranged to contact with the position of going up each display unit PC corresponding to bus electrode Xb.Each column electrode Y comprises: bus electrode Yb, extend on the horizontal direction of two-dimensional display; T shape transparency electrode Ya is arranged to contact with the position of going up each display unit PC corresponding to bus electrode Yb.Transparency electrode Xa, Ya make with the transparent membrane of conduction, and as ITO etc., and bus electrode Xb, Yb make with for example metallic film.Comprise the column electrode X of transparency electrode Xa and bus electrode Xb and comprise transparency electrode Ya and the column electrode Y of bus electrode Yb is formed at the back side one side of positive transparent substrates, its front one side is the display screen of PDP 50, as shown in Figure 6.In this structure, each column electrode to (X, Y) the transparency electrode Xa in, Ya extend to column electrode, and a pair of with its formation, the lightening gap g1 of the peak side of their wider portion by preset width is toward each other.In addition, in the back side of positive transparent substrates 10 side, form black or dark-coloured light absorbing zone (light shielding layer) 11, thereby be expert at electrode pair (X
1, Y
1) and be adjacent to the right column electrode of this column electrode to (X
2, Y
2) between the horizontal direction of two-dimensional display on extend.In addition,, form dielectric layer 12 in the back side of positive transparent substrates 10 side, thus cover column electrode to (X, Y).The back side of dielectric layer 12 side (with the surperficial facing surfaces of this column electrode to contacting), in part, form the dielectric layer 12A of a projection corresponding to the zone that forms with light absorbing zone 11 and bus electrode Xb, the Yb adjacent with this light absorbing zone 11.Form magnesium oxide layer 13 on the surface of dielectric layer 12 and protruding dielectric layer 12A, it comprises the monocrystal powder of gas phase process magnesia crystal (MgO).
On the back side substrate 14 that is arranged in parallel with positive transparent substrates 10, form each row electrode D, its perpendicular to column electrode to (X extends on direction Y), and present position and each column electrode are to (X, Y) the transparency electrode Xa in, Ya are relative.On the substrate 14, also form the row electrode protecting layer 15 of white overleaf, be used to cover row electrode D.On row electrode protecting layer 15, form spacer 16.Spacer 16 is trapezoidal, its horizontal wall 16A extends on the horizontal direction of two-dimensional display, residing position corresponding to each column electrode to (X, Y) each bus electrode Xb, Yb, its vertical wall 16B extends on the vertical direction of two-dimensional display, is in each centre position between the row electrode D adjacent one another are.For every display line, spacer 16 forms shown in Figure 5 trapezoidal, has gap SL shown in Figure 5 between spacer adjacent one another are 16.In addition, trapezoidal spacer 16 definition display unit PC, display unit PC respectively comprises independently discharge space S and transparency electrode Xa, a Ya.Be full of the discharge gas that comprises xenon in the discharge space.On the surface of the side surface of the horizontal wall 16A in each display unit PC, the side surface of vertical wall 16B, row electrode protecting layer 15, form fluorescent material layer 17, to cover these surfaces, as shown in Figure 6.In fact, fluorescent material layer 17 comprises three types material, is used to produce ruddiness, green glow and blue light.In the centre of discharge space S and the gap SL of each display unit PC, horizontal wall 16A and magnesium oxide layer 13 adjoin each other, as shown in Figure 6.On the other hand, as shown in Figure 7, magnesium oxide layer 13 connects with vertical wall 16B is non-conterminous, thereby has space r1 in the middle of them.In other words, the discharge space S of the display unit PC of mutual vicinity is interconnected by space r1 on the horizontal direction on the two-dimensional display.
Here, form the magnesia crystal of magnesium oxide layer 13, thereby comprise by heating magnesium and produce magnesium steam and magnesium oxide steam under gas phase, for example, gas phase process magnesium crystal, and the magnesia crystal that produces, the electron beam excitation of wherein said gas phase process magnesium crystal exposure on it, thereby carry out the cathode luminescence emission, this cathode luminescence has a peak value in the scope of wavelength coverage 200 to 300nm (particularly, the 235nm in 230-250nm) near.The gas phase process magnesia crystal comprises the magnesium monocrystal, and its diameter is 2000 dusts or bigger, has the polycrystal structure that solid crystals wherein cooperatively interacts, and for example, shown in the SEM photo of Fig. 8, perhaps, has the solid phase single crystal structure shown in the SEM photo of Fig. 9.Compare with the magnesium oxide that additive method produces, this magnesium monocrystal has advantages such as purity height, particle is meticulousr, the crystal grain concentration class is lower, helps improving discharge characteristic, for example discharge time-delay, and the back also will be explained.In this embodiment, the average crystal grain diameter of gaseous oxidation magnesium monocrystal used herein is 500 dusts or bigger, and 2000 dusts or bigger preferably are as the BET method is measured.Then, as shown in figure 10, magnesium oxide monocrystal is acted on the surface of dielectric layer 12, to form magnesium oxide layer 13 by injection method, electrostatic coating method etc.Perhaps, also can on the surface of dielectric layer 12, form film oxidation magnesium layer, the gas phase process magnesium oxide monocrystal can be affacted on this film oxidation magnesium layer, thereby form magnesium oxide layer 13 by vapour deposition or sputtering method.
Drive and Control Circuit 56 is according to the light emitting drive sequence of using sub-field method (subframe method) as shown in figure 11, in X column electrode driving circuit 51, Y column electrode driving circuit 53 and column electrode drive circuit 55 each provides the various control signal, is used to drive the PDP 50 with aforementioned structure.X column electrode driving circuit 51, Y column electrode driving circuit 53 and column electrode drive circuit 55 bases light emitting drive sequence as shown in figure 11 produce the multiple driving pulse (back explanation) that is used to drive PDP 50, and the pulse that produces are offered PDP 50.
In light emitting drive sequence shown in Figure 11, carry out an address phase W and maintenance stage I in each the height field among the son SF1-SFN in the display cycle of a field.In addition, only in first a son SF1, before address phase, carry out a reseting stage R.
Figure 12 is the synoptic diagram that is illustrated in the sequential of the row electrode D that among the son SF1 who extracts a plurality of driving pulses is applied to PDP 50 from son SF1-SFN and column electrode X, Y.
Only carried out a reseting stage R before address phase W in first a son SF1, in reseting stage R, X column electrode driving circuit 51 applies the reset pulse PR of negative polarity simultaneously to column electrode X1-Xn
X, as shown in figure 12.In addition, applying reset pulse PR
XThe time, Y column electrode driving circuit 53 is to column electrode Y
1-Y
nApply the first reset pulse PR of positive polarity simultaneously with pulse waveform
Y1, its voltage slowly rises along with the time and reaches the crest voltage value, as shown in figure 12.The first reset pulse PR
Y1The crest voltage value greater than keeping pulse IP
X, IP
YThe crest voltage value.Applying reset pulse PR
Y1Reset pulse PR with negative polarity
XThe time, at all display unit PC
1,1-PC
N, mIn each display unit in column electrode X, Y between produce first reset discharge.After first reset discharge finishes, form the wall electric charge of scheduled volume on the surface of the magnesium oxide layer 13 in the discharge space S of each display unit PC.Particularly, form so-called wall electric charge, wherein, near the lip-deep column electrode X of magnesium oxide layer 13, form positive charge, and near column electrode Y, form negative charge.Then, Y column electrode driving circuit 53 produces the second reset pulse RP of negative polarity
Y2, its voltage slowly changes at rising edge, and this pulse is applied to all column electrode Y simultaneously
1-Y
nOn.The second reset pulse RP
Y2The set voltage range of crest voltage value be: go up magnitude of voltage when among address phase W, not applying scanning impulse SP from column electrode Y, to the crest voltage value of scanning impulse SP.In response to applying the second reset pulse RP
Y2, at all display unit PC
1,1-PC
N, mIn each display unit in column electrode X, Y between produce second reset discharge.Second reset discharge makes at all display unit PC
1,1-PC
N, mIn each display unit in the wall electric charge that forms disappear.In other words, adopt reseting stage R, with all display unit PC
1,1-PC
N, mBe initialized as the location mode that do not illuminate that does not have the wall electric charge.In first and second reset discharges, in each display unit PC, produce discharge, and owing to form magnesium oxide layer 13 in display unit PC, the main effect that this reset discharge provides can continue the long time, thereby realizes addressing faster.
In reseting stage R, on column electrode Y, applied the first reset pulse RP
Y1, its voltage slowly changes at rising edge, thereby produces the first faint reset discharge between T shape transparency electrode Ya, Xa, plans to improve contrast.
Because in the panel that is provided with as the gas phase process magnesium oxide layer 13 of protective seam, discharge probability is quite high, so stably produce the first faint reset discharge.Particularly, the combination with the T shape electrode of broad front end and projected electrode is localised in first reset discharge near the lightening gap, thereby further the probability of first strong, the fragmentary reset discharge of whole column electrode is passed in restriction.Therefore, strong discharge taking place hardly between row electrode and column electrode, makes thus to produce the stable first faint reset discharge in the very short duration.
Then, in address phase W of each son, column electrode drive circuit 55 produces pixel data pulses, and whether to drive each display unit PC based on vision signal luminous in this child field thereby be used for being provided with.For example, column electrode drive circuit 55 produces these pixel data pulses, and when driving display unit PC when luminous, this pulse is in high pressure, and when not driving each display unit PC when luminous, this pulse is in low pressure.Then, column electrode drive circuit 55 with the pixel data pulses (m pulse) of each display line as pixel data pulses DP
1, DP
2... DP
n, sequentially be applied to row electrode D
1-D
mOn.Meanwhile, with each pixel data pulses group DP
1-DP
nSequential synchronous, Y column electrode driving circuit 53 sequentially is applied to column electrode Y with the scanning impulse SP of negative polarity
1-Y
nOn.In this case, only in the display unit PC of the pixel data pulses that has applied this scanning impulse SP and high pressure, produce discharge (selectivity discharge), cause the wall electric charge of formation scheduled volume on magnesium oxide layer 13 in the discharge space S of this display unit PC and the fluorescent material layer 17.In the display unit PC of the pixel data pulses that has applied this scanning impulse SP and low pressure, do not produce aforesaid selectivity discharge, therefore, before applying these pulses, form the wall electric charge immediately.
In other words, by carrying out address phase W, according to incoming video signal, each display unit PC is set to illuminate location mode and one of does not illuminate in the location mode, wherein, is illuminating under the location mode, the wall electric charge that has scheduled volume is not illuminating under the state, does not have the wall electric charge of scheduled volume.
Then, in maintenance stage I of each son, each in X column electrode driving circuit 51 and the Y column electrode driving circuit 53 is alternately repeatedly kept pulse IP with positive polarity
X, IP
YBe applied to X respectively
1-X
n, Y
1-Y
nOn.Apply and keep pulse IP
X, IP
YNumber of times depend on luminance weighted in each height field.In this case, apply these at every turn keep pulse IP
X, IP
YThe time, only produce in the display unit under illuminating location mode and keep discharge, keep discharge all is to use the wall electric charge of scheduled volume to form at every turn, and is associated with this discharge, fluorescence coating 17 is luminous, thereby forms image on panel surface.
As mentioned above, the gaseous oxidation magnesium monocrystal exposure that is comprised in the magnesium oxide layer 13 that in each display unit PC, forms on to it electron beam excitation and send CL light, this CL light at 200-300nm (especially, near the 235nm among the 230-250nm) wavelength coverage in have a peak value, as shown in figure 13.In this case, as shown in figure 14, because gas phase base magnesium oxide monocrystal has bigger crystal grain diameter, so the CL light that has peak value at the 235nm place that sends shows higher peak strength.Specifically; when producing gaseous oxidation magnesium monocrystal; because the temperature of heating magnesium is than usually high, the monocrystal with 2000 dusts or bigger big crystal grain diameter shown in Fig. 8 or 9 is that the gaseous oxidation magnesium monocrystal of 500 dusts forms with average crystal grain diameter.In this case, because the temperature of heating magnesium is than usually high, so also become longer with flame that magnesium and oxygen react relevant.Therefore, between flame and surrounding environment, produce bigger temperature contrast, comprise the monocrystal that more shows with the corresponding high-energy level of 200-300nm (especially 235nm) so estimate to have larger-diameter magnesium oxide monocrystal.
Figure 15 is discharge probability, the discharge probability when forming magnesium oxide layer according to the conventional gas-phase deposition process in display unit PC and the discharge probability when forming the magnesium oxide layer that comprises magnesium oxide monocrystal in display unit PC that illustrates when not forming magnesium oxide layer among the display unit PC, wherein said magnesium oxide monocrystal follows the electron beam irradiation to send CL light, it has a peak value near 200-300nm (especially, the 235nm among the 230-250nm) scope.In Figure 15, transverse axis is represented discharge at interval, promptly once discharges into the time interval that generation is discharged next time from producing.
As shown in the figure, when each display unit PC comprises in discharge space S when comprising the magnesium oxide layer of magnesium oxide monocrystal, wherein said magnesium oxide monocrystal follows the electron beam irradiation to send CL light, it at 200-300nm (especially, near the 235nm among the 230-250nm) peak value is arranged in the scope, compare with the display unit PC with the magnesium oxide layer that forms by the conventional gas-phase deposition process, its discharge probability increases.As shown in figure 16, gaseous oxidation magnesium monocrystal can be reduced in the time-delay of the discharge that produces among the discharge space S, and this is that especially, when shining with electron beam, the CL light that sends has peak value at 235nm because the CL light that it sends has higher intensity.
Therefore, even produce the first reset pulse RP that is applied on the column electrode Y
Y1Thereby its voltage slowly change as shown in figure 11 plan to produce the first faint reset discharge to limit relevant with reset discharge luminous to improve contrast, in display image, do not relate to described reset discharge, can in the very short duration, stably produce the first faint reset discharge yet.Specifically, because the structure that each display unit PC adopts makes discharge result from partly near the lightening gap between T shape transparency electrode Xa, the Ya, so this structure helps preventing the first fragmentary reset discharge and produces discharge to passing whole column electrode strongly, also prevents the strong erroneous discharge between column electrode and row electrode.
In addition, because higher discharge probability (short discharge time-delay) allows the main influence of the reset discharge among the reseting stage R to continue the longer time, thus the address that in address phase W, produces discharge and in maintenance stage I, produce keep to discharge and become faster.This can reduce each the pulse width among pixel pulse DP shown in Figure 12 and the scanning impulse SP, pixel pulse DP and scanning impulse SP are applied to respectively on row electrode D and the column electrode Y, to produce the address discharge, allow the employed processing time of address phase W correspondingly to reduce thus.In addition, address discharge faster and keep discharge and can reduce the pulse IP that keeps shown in Figure 12
YPulse width, keep pulse IP
YBe applied on the column electrode, keep discharge, allow the employed processing time of maintenance stage I correspondingly to reduce thus with generation.
Then,, can provide the son field of greater number in the display cycle, thereby increase the quantity of level level at single game (single frames) by reducing address phase W and employed processing time of maintenance stage I.
Although the PDP in the previous embodiment 50 adopts such structure: display unit PC is formed between paired the column electrode X and column electrode Y, and for example, column electrode is to (X
1, Y
1), (X
2, Y
2), (X
3, Y
3) ... (X
n, Y
n), but PDP 50 also can adopt display unit PC to be formed at structure between all column electrodes adjacent one another are.Particularly, in this possible structure, display unit PC can be formed at column electrode X respectively
1, Y
1Between, column electrode Y
1, X
2Between, column electrode X
2, Y
2Between ... column electrode Y
N-1, X
nBetween and column electrode X
n, Y
nBetween.
In addition, although the PDP in the previous embodiment 50 adopts in such structure: column electrode X, Y are formed on the positive transparent substrates 10, and row electrode D and fluorescence coating 17 are formed on the back side substrate 14, but PDP 50 also can adopt row electrode D and column electrode X, Y to be formed on the positive transparent substrates 10, and fluorescence coating 17 is formed at the structure on the back side substrate 14.
Wiping in the stage E of each son field, Y column electrode driving circuit 53 is applied to column electrode Y with negative polarity erasing pulse EP shown in Figure 12
1-Y
nOn.In response to applying erasing pulse EP, produce in the display unit of keeping discharge among the maintenance stage I in front and produce erasure discharge.This erasure discharge disappears the wall electric charge that forms in these display units, make these cell translation to not illuminating location mode.
In conjunction with so-called selection write address method previous embodiment is illustrated above, this method is lower than predetermined value (reseting stage R) and forms the wall electric charge (address phase W) that is equal to or greater than predetermined value selectively based on incoming video signal in each display unit by the display unit initialization being made remaining wall electric charge is reduced in all display units, shows half tone images thereby drive PDP 50.Yet, also can adopt so-called selective erasing address approach, be lower than predetermined value (address phase W) by forming in all display units each to be equal to or greater than the wall electric charge (reseting stage R) of predetermined value and to be reduced in each display unit, show half tone image thereby drive PDP50 according to the wall electric charge that pixel data will form selectively.Adopt this selective erasing address approach, also can stably produce first reset discharge of low discharge intensity in reseting stage R, this is the same with the situation that adopts the selective write address method.
In addition, previous embodiment shows an example, wherein, and with the first reset pulse RP
Y1When being applied on the column electrode Y, also with reset pulse RP
XBe applied on the column electrode X.Yet, also can be set to earth potential and omit reset pulse RP by column electrode X
XIn addition, can apply the first such reset pulse RP to column electrode Y
Y1: in its first, the first reset pulse RP
Y1Be elevated to the scheduled voltage that is lower than discharge inception voltage suddenly; In part subsequently, the first reset pulse RP
Y1Magnitude of voltage slowly change up to the crest voltage value in time.In essence, the first reset pulse RP used herein
Y1Only need in the part that produces reset discharge, change and change voltage slowly and get final product.
In addition, in the aforementioned embodiment, the row electrode stretches out the top that terminal t is positioned at panel 50 (back side substrate), but in order to prevent the dissipation of heat, the row electrode can be stretched out the below that terminal t is arranged on panel 50 (back side substrate), thereby makes row electrode D
1-D
mIn each be connected to column electrode drive circuit 55 by terminal t.Under latter event, because column electrode drive circuit 55 is positioned at the below of panel 50, the address driver IC that can prevent to form a column electrode drive circuit part is by the heat heating from panel, and this is for preventing that the dissipation of heat from being very favourable.
As mentioned above, according to the present invention, each display unit of plasma display used herein all has magnesium oxide layer, it comprises the magnesia crystal that is subjected to electron beam excitation and produces cathode luminescence, wherein said cathode luminescence has a peak value in the wavelength coverage of 200nm to 300nm, scanning impulse is applied on the column electrode of the column electrode centering that constitutes all display lines in the addressing period successively, and column electrode drive circuit will be applied on the row electrode with the corresponding data pulse of the display line that this scanning impulse is applied to.Thus, can accelerate address scan, and can not destroy the stability of address scan.
Claims (12)
1, a kind of plasma display equipment comprises:
Plasma display, comprise a plurality of column electrodes of constituting display line to, with described a plurality of column electrodes to a plurality of row electrodes of intersecting and at described column electrode pair each display unit with each place, point of crossing formation of described row electrode, each described display unit has magnesium oxide layer, it comprises the magnesia crystal that is subjected to electron beam excitation and sends cathode luminescence, and described cathode luminescence has a peak value in 200 to 300nm wavelength coverage;
The column electrode driving circuit, each that is used to drive described a plurality of column electrode centerings is right; And
Column electrode drive circuit is used for driving each electrode of described a plurality of row electrodes, thereby shows half tone image a single game in the display cycle, and this single game display cycle is divided into a plurality of son, and each son field comprises that an addressing period and one keep the cycle,
Wherein, in described addressing period, described column electrode driving circuit is applied to scanning impulse on the right column electrode of described column electrode successively, and described column electrode drive circuit will be applied on the described row electrode with the corresponding data pulse of the display line that described scanning impulse is applied to.
2, plasma display equipment as claimed in claim 1, wherein, each right column electrode of described column electrode comprises: the main body of on line direction, extending, and on column direction from described main body outstanding so that by lightening gap projection respect to one another.
3, plasma display equipment as claimed in claim 2, wherein, the described projection of described column electrode comprises the wider portion and the narrower part that is used for described wider portion is connected to described main body near described lightening gap.
4, plasma display equipment as claimed in claim 1, wherein, described magnesium oxide layer comprises the magnesium monocrystal, thus described magnesium monocrystal produces magnesium steam by heating magnesium and under gas phase described magnesium steam oxidation is produced.
5, plasma display equipment as claimed in claim 4, wherein, described magnesium oxide layer comprises magnesium oxide monocrystal, its diameter is 2000 dusts or bigger.
6, plasma display equipment as claimed in claim 1, wherein, described magnesium oxide monocrystal sends cathode luminescence, and described cathode luminescence has a peak value in 230 to 250nm wavelength coverage.
7, plasma display equipment as claimed in claim 1 wherein, is covering the described magnesium oxide layer of formation on the right dielectric layer of described column electrode.
8, plasma display equipment as claimed in claim 1, wherein, described panel is formed with the extraction electrode terminal that the end on column direction only is associated with each row electrode, and described column electrode drive circuit is applied to described data pulse on the described row electrode by described terminal.
9, plasma display equipment as claimed in claim 8, wherein, described terminal is formed at the lower end of described panel.
10, a kind of method that drives plasma display, this panel comprises: a plurality of column electrodes that constitute display line are right, with the crossing a plurality of row electrodes of described a plurality of column electrodes, and each display unit that forms at each place, point of crossing of described column electrode pair and described row electrode, each described display unit has magnesium oxide layer, it comprises the magnesia crystal that is subjected to electron beam excitation and sends cathode luminescence, described cathode luminescence has a peak value in 200 to 300nm wavelength coverage, thereby show half tone image in the display cycle in single game, this single game display cycle is divided into a plurality of sons field, each son field comprises that an addressing period and one keep the cycle, said method comprising the steps of:
In described addressing period, scanning impulse is applied on the right column electrode of described column electrode successively, and will be applied on the described row electrode with the corresponding data pulse of the display line that described scanning impulse is applied to.
11, the method for driving plasma display equipment as claimed in claim 10, wherein, described magnesium oxide layer comprises the magnesium monocrystal, thus described magnesium monocrystal produces magnesium steam by heating magnesium and under gas phase described magnesium steam oxidation is produced.
12, the method for driving plasma display equipment as claimed in claim 10, wherein, described magnesium oxide layer comprises magnesium oxide monocrystal, its diameter is 2000 dusts or bigger.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP154397/2004 | 2004-05-25 | ||
| JP2004154397 | 2004-05-25 | ||
| JP204156/2004 | 2004-07-12 | ||
| JP289791/2004 | 2004-10-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1702716A true CN1702716A (en) | 2005-11-30 |
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ID=35632433
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200510073926 Pending CN1702716A (en) | 2004-05-25 | 2005-05-25 | Plasma display device |
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|---|---|
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101665257A (en) * | 2008-09-05 | 2010-03-10 | 三星Sdi株式会社 | Material for forming protective layer, protective layer and pdp |
| CN101563748B (en) * | 2006-10-20 | 2011-05-04 | 松下电器产业株式会社 | Plasma display panel and method for manufacture thereof |
-
2005
- 2005-05-25 CN CN 200510073926 patent/CN1702716A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101563748B (en) * | 2006-10-20 | 2011-05-04 | 松下电器产业株式会社 | Plasma display panel and method for manufacture thereof |
| CN101665257A (en) * | 2008-09-05 | 2010-03-10 | 三星Sdi株式会社 | Material for forming protective layer, protective layer and pdp |
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