CN1688024A - Chip with built-in electromagnetic protection capacitance and related method - Google Patents
Chip with built-in electromagnetic protection capacitance and related method Download PDFInfo
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- CN1688024A CN1688024A CN 200510074757 CN200510074757A CN1688024A CN 1688024 A CN1688024 A CN 1688024A CN 200510074757 CN200510074757 CN 200510074757 CN 200510074757 A CN200510074757 A CN 200510074757A CN 1688024 A CN1688024 A CN 1688024A
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Abstract
This invention provides a chip with a built-in electro-magnetic protection capacitor and a relative method. Electric power mutation often happens between power supply circuits transmitting DC offset power to make the chip to generate high frequency magnetic interference. This invention sets a magnet protection capacitor directly in the chip, that is to say to build-in an inserted capacitor between two supply lines of the chip to absorb the mutation between the supply circuits to reduce the magnetic interference.
Description
The invention provides a kind of chip and correlation technique, especially refer to a kind of chip and correlation technique that built-in electromagnetic protection capacitance directly is set between the bias supply circuit (power circuit) in chip with built-in electromagnetic protection capacitance.
Background technology
Along with the progress of semiconductor technology, various electronic systems as computer system etc., have become one of most important hardware foundation of advanced information society.In general, in electronic system, can be provided with one or more chip; The function of integrated each chip just can realize the allomeric function of electronic system.In order to promote usefulness, modern chip is according to high clock signal work, to handle more information in the unit interval, more substantial data of management/transmission and signal.Yet, at a high speed, a large amount of information processing/transmission just means that also the electrical characteristic of the signal of telecommunication can change very continually; For instance, in digital circuit,, the power level (as electric current, voltage) of this signal of telecommunication will be changed more continually if will make a signal of telecommunication in the unit interval, carry more numerical data.And when chip will be handled/transmit these and changes the frequent signal of telecommunication, often will produce the electrical interference and the electromagnetic interference of high frequency by way of parenthesis.These disturb the normal operation that not only can influence chip itself, form noise, also are radiated to easily outside the electronic system, influence other electronic systems, or or even user.Therefore, when keeping the high speed of chip (high clock signal) operational effectiveness, how to reduce the electromagnetic interference that chip produces, also just become the emphasis of present information manufacturer research and development.
As is known to the person skilled in the art, regular meeting set has the circuit unit (for example be transistor, amplifier, or basic circuit unit such as the gate in the digital circuit, trigger) of ten hundreds of (or more) in the modern chip.Each circuit unit all will be connected in bias supply, the power level that drives in the signal of telecommunication with the electrical power (as electric current) of quoting bias supply and being provided changes, make the signal of telecommunication can carry information, represent different data/information with power levels different in the signal.For instance, in digital circuit, each circuit unit (gate/trigger etc.) in the chip can be offset between a positive bias power supply (it has a positive voltage Vcc) and the ground bias supply (having a ground terminal voltage Vss); When a certain circuit unit A in the chip will be sent to another circuit unit B with a signal of telecommunication, circuit unit A can be considered as circuit unit B one load (as a capacity load), the electrical power that circuit unit A draws the positive bias power supply to be provided is injected into circuit unit B, set up sufficiently high power level at circuit unit B, just can send a numeral " 1 " to circuit unit B; Relatively, if circuit unit A draws the power level that the ground electrical power that bias supply provided is taken circuit unit B away, just can make the power level of circuit unit B be reduced to a certain degree, to send a digital " 0 " to circuit unit B.
Owing to have many circuit units in the chip, introversive at one time each bias supply of each circuit unit draws electrical power, will cause great supply load to bias supply; When the running of the chip of high speed/high clock signal, each circuit unit more can change electrical power that it drew continually with transmission/processing high-frequency signal.So, the supply load that will further make bias supply is acute variation continually, and this has also just caused electrical power sudden change (as power supply ripple/ground end pulsation, power bounce/groundbounce), cause bias voltage and electric current instability, form electrical interference.This kind electrical interference not only can influence the normal operation of each circuit unit, forms the noise in the signal of telecommunication, also can be coupled to the outer holding wire that connects of chip, this electrical interference is transmitted to other chip, even can causes the electromagnetic radiation of high frequency, forms electromagnetic interference.
In order to suppress above-mentioned electrical power/electromagnetic interference, known technology can and connect electric capacity outside chip, with the absorption electrical interference, and then suppresses electromagnetic interference.As is known to the person skilled in the art, each chip in the electronic system all can integratedly be installed on a circuit board (as printed circuit board (PCB) or motherboard), makes each chip be connected in each bias supply via the wiring of the electrical power on the circuit board.For instance, a certain chip can be connected to a positive bias power supply and a ground bias supply via the wiring of two groups of electrical power on the circuit board, and known technology will be between these two groups of electrical power wirings external electromagnetic protection capacitance.When the electrical power sudden change took place, electromagnetic protection capacitance just can utilize the electric charge that stores in it to compensate the electrical power sudden change, relaxes the situation of electrical power sudden change, suppresses relevant electrical power/electromagnetic interference.In order to compensate the electrical power sudden change of high frequency, this electromagnetic protection capacitance should have good high frequency characteristics (just having response fast), could respond apace/compensate/electrical power of filtering acute variation suddenlys change.
But, the known technology of the external electromagnetic protection capacitance of this kind also has shortcoming.External electromagnetic protection capacitance is to connect up via the electrical power on the circuit board to suppress electrical interference, and equivalent resistance and inductance that the electrical power wiring upward distributes can link together with electromagnetic protection capacitance, influence the whole high frequency characteristics of electromagnetic protection mechanism, slow down its response speed, make its electrical power that can not respond acute variation fast fully sudden change.In addition, external electromagnetic protection capacitance needs processing/welding separately just can be connected on the circuit board, can increase the time and the cost of electronic system production/manufacturing like this, and the intensity of solder joint/tie point also can influence the mechanical reliability of whole electronic system.
Summary of the invention
Therefore, main purpose of the present invention, promptly be to provide a kind of in chip the technology of built-in electromagnetic protection capacitance, built-in nearby Embedded electromagnetic protection capacitance in chip is to overcome in the known technology because of the external various shortcoming that is caused of electric capacity.
In order to transmit the electrical power of bias supply, chip internal can be provided with the layout of power circuit; And the present invention to be exactly power circuit cloth interoffice at chip be provided with built-in electromagnetic protection capacitance, directly respond/compensate/relax the electrical power sudden change, and then suppress electrical interference and electromagnetic interference at chip internal.Because the present invention directly is arranged at electromagnetic protection capacitance in the chip, can reduce the equivalent resistance/inductance that links to each other with electric capacity on the power circuit significantly, high frequency characteristics/the response speed that makes electromagnetic protection capacitance can deterioration, can compensate the electrical power sudden change of high frequency apace.So also just can more effectively suppress electrical interference/electromagnetic interference.On the other hand, the present invention also can reduce the process time and the cost of external capacitor as far as possible, increases the reliability of electronic system.
In preferred embodiment of the present invention, can be when chip design stage the frequency domain of its electrical power sudden change/electromagnetic interference of estimation/simulation earlier, estimate electromagnetic protection capacitance the capacitance that should possess; Then, just can in the circuit layout of chip, realize this electromagnetic protection capacitance.For instance, the present invention can be provided with a plurality of electric capacity that respectively have predetermined capacitance earlier by two groups of power circuit cloth interoffices in chip, after estimating the capacitance of electromagnetic protection, from these electric capacity, select some electric capacity again and be combined into required electromagnetic protection capacitance value; After these electric capacity layouts that are selected are connected in two power circuits, just can realize built-in electromagnetic protection capacitance (as for the electric capacity that is not selected, then can be ready just in case, needn't be connected between power circuit).When realizing electric capacity, the present invention can utilize the metal oxide semiconductor transistor with different area to realize the electric capacity of various different capacitances, the grid of each metal oxide semiconductor transistor becomes an end of electric capacity, the then common other end as electric capacity of source/drain.In the chip fabrication techniques in modern times, should reasonably in chip, realize out tens of built-in electromagnetic protection capacitances to hundreds of pF (1pF is million minutes one farad), suitably suppress the electrical power/electromagnetic interference of chip.
Description of drawings
Fig. 1 is the configuration schematic diagram of typical circumscribed electromagnetic protection capacitance in the electronic system.
Fig. 2 is provided with the configuration schematic diagram of built-in electromagnetic protection capacitance in the chip of electronic system for the present invention.
Fig. 3 realizes the schematic diagram of built-in electromagnetic protection capacitance in the chip of Fig. 2 for the present invention.
The main element symbol description
10,20 electronic systems
12,22 circuit boards
14,24 chips
16A-16B, 26A-26B circuit module
18A-18C, 28A-28C power circuit
The wiring of 19A-19C electrical power
The 30A-30C condenser network
Vss, Vcc1-Vcc2 bias supply
Ce1-Ce2, C1-C2 electric capacity
The Lc-Ls inductance
Rc-Rs resistance
Q (.) transistor
The D drain electrode
The S source electrode
The G grid
Embodiment
Please refer to Fig. 1; Fig. 1 is a configuration schematic diagram of implementing typical case's circumscribed electromagnetic protection capacitance in an electronic system 10.Can have one or more chip in the electronic system 10, among Fig. 1 then with chip 14 as representative; Each chip of electronic system 10 can be unified to be installed on the circuit board 12, makes each chip can come switching signal, data via the wiring on the circuit board, and is connected in each direct current biasing power supply.As discussed earlier, each circuit in the chip all needs suitably to setover and could correctly operate, and in the example of Fig. 1, just has two circuit module 16A and 16B that are offset to the different DC biased power supply in the chip 14.Wherein, circuit module 16A is offset between direct current biasing power Vcc 1 and the Vss (end) with can be considered, and circuit module 16B then is offset between direct current biasing power Vcc 2 and the Vss.Can be respectively equipped with many circuit units (gate etc.) in these two circuit modules; Make that all circuit units draw electrical power and switching signal among each circuit module 16A, the 16B, just can make the integrated running of each circuit module 16A, 16B, and further realize chip 14 the allomeric function that should possess, as signal processing, data transfer management or data operation etc.
In order to make the electrical power that circuit module 16A, 16B can draw each corresponding bias supply to be provided (electric current), layout has each power circuit 18A, 18B and 18C in the chip 14, these power circuits can (be gone into solder joint/pin or ball as output via the I/O port on the chip 14 respectively, I/O pad/pin or ball) is external in electrical power wiring 19A, 19B and 19C on the circuit board 12, is connected in extraneous direct current biasing power Vcc 1, Vcc2 and Vss to connect up via these electrical power.But, just as previously mentioned, during the chip high speed running, because the variation that the electrical power of bias supply load can be violent will cause the electrical power sudden change, and develop into electrical power/electromagnetic interference.In order to relax these electrical power sudden changes, typical technology is an external separately electromagnetic protection capacitance between the electrical power wiring of circuit board.As in Fig. 1, promptly be connected with capacitor C e1 between electrical power wiring 19A, 19C and be used as electromagnetic protection capacitance, then be connected with capacitor C e2 between electrical power wiring 19B, 19C and be used as electromagnetic protection capacitance.When the electrical power sudden change of quick/high frequency took place on each power circuit, these capacitor C e1, Ce2 should want to utilize apace the electric charge that stores in it to compensate the electrical power sudden change, and the degree that electrical power is suddenlyd change eases up; In the equivalence, these electromagnetic compensation electric capacity should have minimum equiva lent impedance at the high frequency frequency domain, make electrical power sudden change meeting preferentially by passing through on these electric capacity.For instance, when the electrical power sudden change has taken place high frequency is arranged on power circuit 18A, when violent current/voltage changes, capacitor C e1 will be compensated with the electric charge that stores in it, these fast-changing high-frequency electrical are failed to be convened for lack of a quorum be inclined to the bias supply Vss that holds by capacitor C e1 with being directly conducted to, and then minimizing is to the interference of circuit module 16A.
Yet the typical technology of Fig. 1 still has shortcoming.Because it is outer that its electromagnetic protection capacitance is external in chip, the interference that the source arises from the chip will could be absorbed by electromagnetic protection capacitance/compensate via the outer electrical power wiring of chip, and the equivalent inductance in the electrical power wiring, the high-frequency resistance that resistance will increase electromagnetic protection capacitance, its reaction speed is reduced, can't respond quick, violent electrical power sudden change.As in the example of Fig. 1, the equivalent resistance Rs/ inductance L s on equivalent resistance Rc on the electrical power wiring 19B and equivalent inductance Lc and the electrical power wiring 19C can be chained together with capacitor C e2, makes capacitor C e2 be difficult to bring into play fully the function of electromagnetic protection.In addition, external electromagnetic protection capacitance can increase extra process time and cost, and the Joint Strength between each electric capacity and circuit board also can influence the mechanical reliability of whole electronic installation.
Please refer to Fig. 2 and Fig. 3; Fig. 2 is the present invention realizes built-in chip type formula electromagnetic protection capacitance in an electronic system 20 configuration schematic diagram, and Fig. 3 has then illustrated several embodiment of built-in electromagnetic protection capacitance of the present invention.At first, as shown in Figure 2, can utilize a circuit board 22 (as a printed circuit board (PCB) or a motherboard) in the electronic system 20 and one or more chip (is representative with chip 24) is integrated, make each chip can be via the signal on the circuit board and electrical power wiring and swap data draws electrical power.Can be provided with the circuit module of different biasings in each chip; As in chip 24, just be provided with circuit module 26A and 26B, circuit module 26A is offset between direct current biasing power Vcc 1 and the Vss, and circuit module 26B then is offset between direct current biasing power Vcc 2 and the Vss.Can be respectively equipped with a plurality of circuit units (as gate, trigger, amplifier etc.) among each circuit module 26A, the 26B; Make each circuit module suitably draw electrical power and integrated running, just can realize the allomeric function of chip 22.For instance, circuit module 26A can be a logical process core, be used for carrying out data processing/data operation, and the overall operation of main control chip 24, its bias supply Vcc1 can be the bias supply of low voltage; Circuit module 26B can be an interface circuit then, is offset to the higher bias supply Vcc2 of voltage, comes chip for driving 24 external signal is launched and reception to draw stronger electrical power.
For with the electric power transmission of bias supply to each circuit module 26A and 26B, in the chip 24 also layout power circuit 28A, 28B and 28C are arranged, these power circuits can be power grid (power grid) circuits of net distribution, or the power plane (power plane) that realizes with the metal level in the stacking structure of semiconductor.These power circuits 28A to 28C can be respectively be connected in the wiring on the circuit board via the I/O port on the chip 24 (each I/O port can comprise one or more export pad/pin or ball seat), and then is connected to extraneous bias supply Vcc1, Vcc2 and Vss.
When realizing electromagnetic protection structure of the present invention, the present invention just can be directly be built in the condenser network of electromagnetic protection in each chip of electronic system.As in chip 24, the present invention just can directly be provided with condenser network 30A and realize built-in electromagnetic protection capacitance between power circuit 28A, 28C, available condenser network 30B realizes electromagnetic protection capacitance between power circuit 28B, 28C, and also the function that condenser network 30C brings into play electromagnetic protection can be set between power circuit 28A, the 28B.These condenser networks 30A to 30C can provide capacitive impedance; When the electrical power sudden change had taken place during circuit module 26A, 26B are operating for each, these condenser networks just can absorb/compensate the electrical power sudden change of these acute variation nearby, and then the electrical power/electromagnetic interference of inhibition chip 24.For instance, when the electrical power sudden change has taken place on power circuit 28A when, condenser network 30A (and 30B) just can compensate the electrical power sudden change with the electric charge that stores in it apace, with these high-frequency electric power sudden change bypasses, make it can directly not have influence on the running of circuit module 30A, 30B, also further suppressed possible electrical interference and electromagnetic interference.
Typical technology in Fig. 1, the built-in electromagnetic protection capacitance that the present invention is realized in Fig. 2 has following advantage.Built-in electromagnetic protection capacitance can avoid the resistance/inductance in the external electrical power wiring to reduce usefulness and the reaction speed that electric capacity protects electromagnetism in chip, make built-in electromagnetic protection capacitance have preferable high frequency response, can respond the electrical power sudden change of high frequency apace.In fact, just as shown in Figure 2, condenser network 30B of the present invention even can be built among the circuit module 28B is so that can absorb nearby quickly/the contingent electrical power sudden change of compensating circuit module 28B institute.In addition, built-in electromagnetic protection capacitance can reduce the process time and the cost of electronic system in chip, also has higher mechanical reliability.
In Fig. 3, then illustrated the present invention in each condenser network, to realize the various embodiment of built-in electromagnetic protection capacitance.For instance, can comprise one or more electric capacity in each condenser network, as in Fig. 3, the condenser network 30B between power circuit 28B and 28C is just formed by two capacitor C 1 and C2.In design during chip of the present invention, can be earlier sunykatuib analysis (or survey with the chip of trial-production) be carried out in the running of chip, understand electrical power sudden change/electrical interference/electromagnetism height and disturb and be easier to betide that frequency (or frequency band).So, just can estimate the required capacitance of electromagnetic protection at this frequency (frequency band).Then, just can in each condenser network, actual realization the out have the electric capacity of electromagnetic protection capacitance value.
In addition, when design chip of the present invention, can in each condenser network of chip, design a plurality of electric capacity in advance earlier, make each electric capacity respectively have default capacitance.Then, again to the running of chip carry out sunykatuib analysis (or with trial-production chip survey), understand the frequency spectrum of electrical power sudden change/electrical interference/electromagnetic interference, analyze electrical power sudden change/electrical interference/electromagnetic interference and be easier to betide that frequency (or frequency band), to estimate the required capacitance of electromagnetic protection at this frequency (frequency band).Next, just can in a plurality of electric capacity that each condenser network had, select specific electric capacity and be combined into the required capacitance of electromagnetic protection, design the line layout and make these electric capacity that are selected to be connected to corresponding power circuit; Other electric capacity that are not selected then can be ready just in case.So, just can finish chip design and manufacturing/realization with built-in electromagnetic protection capacitance.
As in the embodiments of figure 3, condenser network 30A has just adopted a plurality of electric capacity that metal oxide semiconductor transistor constituted; In condenser network 30A, can have a plurality of metal oxide semiconductor transistor Q (1) to Q (M), each transistorized grid G is as an end of electric capacity, and drain D and source S (with base stage, base) then are connected to the other end of electric capacity.So, each transistor Q (1) just forms the electric capacity that each has predetermined capacitance to Q (M).When selecting specific transistor (electric capacity), just can design specific layout these transistorized grid G are connected to power circuit 28A according to the required capacitance of electromagnetic protection; Drain D and source S then are connected to power circuit 28C.Other non-selected transistors (electric capacity) just needn't be physically connected to each power circuit.By this way, just can realize out having the condenser network of certain electric magnetic protection capacitance value, with the function of performance electromagnetic protection.In the chip fabrication techniques in modern times, should reasonably in chip, realize out tens of built-in electromagnetic protection capacitances to hundreds of pF (1pF is the part per trillion farad), suitably suppress the electrical power/electromagnetic interference of chip.
In summary, compared to known or typical circumscribed electromagnetic protection capacitance configuration, the present invention is direct built-in electromagnetic protection capacitance in chip.Because the running of chip circuit is the main cause of electrical power/electromagnetic interference, directly built-in electromagnetic protection capacitance is set in chip, just can respond the electrical power sudden change apace nearby, suppress electrical power/electromagnetic interference.Because electromagnetic protection capacitance has been built in chip, the present invention also can significantly reduce external electromagnetic protection capacitance required additional processing time and cost, also can promote the mechanical durable degree of electronic system.
The above only is the preferred embodiments of the present invention, and all equivalences of carrying out according to claim of the present invention change and revise, and all should belong to covering scope of the present invention.
Claims (7)
1. chip with built-in electromagnetic protection capacitance, it includes:
A plurality of power circuits, each power circuit are used for being connected in an outer bias supply of this chip, to transmit the electrical power that this bias supply provides between this chip and this bias supply; And
At least one condenser network, each condenser network is connected between the power circuit of two correspondences, each condenser network can provide a capacitive impedance between the power circuit of two correspondences, be used for absorbing the electrical power sudden change between this two power circuit, so that the function of electromagnetic protection to be provided.
2. chip as claimed in claim 1, wherein each condenser network includes one or more electric capacity, and the two ends of each electric capacity are connected to the power circuit of a correspondence.
3. chip as claimed in claim 2, wherein, each electric capacity is formed by the metal oxide semiconductor transistor of a correspondence, and the grid of this metal oxide semiconductor transistor is electrically connected in the power circuit of a correspondence, and its drain electrode then is electrically connected in another corresponding power circuit with source electrode.
4. a realization has the method for built-in electromagnetic protection capacitance chip, and it includes:
In this chip, realize a plurality of power circuits, make each power circuit can be connected in an outer bias supply of this chip, between this chip and this bias supply, to transmit the electrical power that this bias supply provides; And
Realize at least one condenser network, each condenser network is connected between the power circuit of two correspondences, so that each condenser network can provide a capacitive impedance between the power circuit of two correspondences, be used for absorbing the electrical power sudden change between this two power circuit, the function of electromagnetic protection is provided.
5. method as claimed in claim 4 wherein, when realizing this condenser network, includes:
On this chip, realize a plurality of electric capacity, make each electric capacity have default corresponding capacitance;
Analyze the issuable electromagnetic interference of this chip, and according to the frequency spectrum of this electromagnetic interference, to determine an electromagnetic protection capacitance value;
In these a plurality of electric capacity, select at least one electric capacity so that the total capacitance value of each electric capacity that is selected conforms to this electromagnetic protection capacitance value; And
Each electric capacity that is selected is connected between the two corresponding power circuits.
6. method as claimed in claim 5 wherein, when realizing this a plurality of electric capacity, realizes a plurality of metal oxide semiconductor transistors, so that each metal oxide semiconductor transistor can be as an electric capacity in this chip.
7. method as claimed in claim 6, wherein, when making a metal oxide semiconductor transistor as an electric capacity, make the end of the grid of this metal oxide semiconductor transistor as electric capacity, and the source electrode of this metal oxide semiconductor transistor and the common other end that forms electric capacity of drain electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510074757 CN1688024A (en) | 2005-06-02 | 2005-06-02 | Chip with built-in electromagnetic protection capacitance and related method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510074757 CN1688024A (en) | 2005-06-02 | 2005-06-02 | Chip with built-in electromagnetic protection capacitance and related method |
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| CN1688024A true CN1688024A (en) | 2005-10-26 |
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| CN 200510074757 Pending CN1688024A (en) | 2005-06-02 | 2005-06-02 | Chip with built-in electromagnetic protection capacitance and related method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107942154A (en) * | 2017-10-16 | 2018-04-20 | 北京中电华大电子设计有限责任公司 | A kind of protection structures and methods suitable for the protection of chip EMP attack N |
| CN114023720A (en) * | 2021-10-12 | 2022-02-08 | 广芯微电子（广州）股份有限公司 | Chain type mesh capacitor structure and construction method and layout method thereof |
-
2005
- 2005-06-02 CN CN 200510074757 patent/CN1688024A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107942154A (en) * | 2017-10-16 | 2018-04-20 | 北京中电华大电子设计有限责任公司 | A kind of protection structures and methods suitable for the protection of chip EMP attack N |
| CN114023720A (en) * | 2021-10-12 | 2022-02-08 | 广芯微电子（广州）股份有限公司 | Chain type mesh capacitor structure and construction method and layout method thereof |
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