CN1652454A - Low energy consumption oscillating circuit and delay stage - Google Patents
Low energy consumption oscillating circuit and delay stage Download PDFInfo
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- CN1652454A CN1652454A CN 200410001095 CN200410001095A CN1652454A CN 1652454 A CN1652454 A CN 1652454A CN 200410001095 CN200410001095 CN 200410001095 CN 200410001095 A CN200410001095 A CN 200410001095A CN 1652454 A CN1652454 A CN 1652454A
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Abstract
The disclosed circuit includes enable circuit, oscillation and delay circuit, and feedback control network. First, the enable circuit receives an enable signal. After starting first oscillation operation, a starting oscillation signal is output based on a feedback control signal. The oscillation and delay circuit is connected to the enable circuit. Based on interaction with oscillation signal, an oscillation signal in high level and an oscillation signal in low level are generated. Finally, the feedback control network connected to the oscillation and delay circuit integrates an oscillation signal in high level and an oscillation signal in low level as a feedback control signal, which is fed back to the enable circuit to trigger next oscillation.
Description
Technical field
The invention relates to a kind of oscillating circuit, and particularly relevant for a kind of oscillating circuit and delay-level thereof of low power consuming.
Background technology
General ring-type oscillator (Ring Oscillator) is if when needing long cycle of oscillation, known a kind of practice is the purpose that the grid delay (Gate Delay) of series multistage serial connection reaches long cycle of oscillation, and another kind is to utilize the long principle of the time that discharges and recharges of bulk loads as rule, by adding that bulk loads increases time of delay, the grid delay (Gate Delay) of for example taking to accumulate multi-stage serial connection reaches the purpose that increases cycle of oscillation, between inverter and another inverter, add the mode of large-scale passivity load (Passive Loading), reach required carryover effects.But above-mentioned two kinds of practices are quite power consumption all.
Please refer to Fig. 1, it illustrates the block diagram of known ring-type oscillator, and this known technology has been exposed in the patent case of No. the 6188293rd, United States Patent (USP).This known oscillating circuit comprises, decides 102,104 and one of negative circuits (Invert Circuit) of voltage generation circuit (Constant Voltage Generating Circuit) for one and decides current element (Constant CurrentElement) 106.In this oscillating circuit, negative circuit is with inverter and load elements is staggered combines.In this known technology, use and decide voltage generation circuit and control voltage, and use decides current element and come current limit, utilize step-down and current limliting to reach the purpose of low power consuming.
Summary of the invention
In view of this, purpose of the present invention is providing a kind of low power consuming oscillating circuit and employed delay-level thereof exactly, with the problem of improving known employing multi-stage serial connection mode and using bulk loads power consumption that element is caused.
In order to achieve the above object, the present invention proposes a kind of low power consuming oscillating circuit and comprises, an enable circuit (Enable Circuit), a vibration delay circuit (Oscillator Delay Circuit) and a feedback Control Network (Feedback Control Network).At first, enable circuit receives one and activates oscillating operation first by after the input of the enable signal of external control, next just according to feedbacking control signal, exports initial oscillator signal.Be electrically connected to the vibration delay circuit of enable circuit, after enable circuit receives above-mentioned initial oscillator signal, produce a high levels oscillator signal and a low level oscillator signal that vibrates in the electronegative potential zone that vibrates in areas of high potential alternately.Wherein, areas of high potential is meant between the high workload current potential of oscillating circuit and is higher than zone between the low operating potential of oscillating circuit, and the electronegative potential zone then is meant between low operating potential and is lower than zone between the high workload current potential.At last, the feedback Control Network is electrically connected to the output of vibration delay circuit, high levels oscillator signal and low level oscillator signal are carried out exporting after waveform is integrated a back coupling control signal, and feedback control signal feedback with this and input in the enable circuit, so as to triggering vibration next time, make this oscillating circuit form a cyclic path.
In addition, the delay-level of the oscillating circuit of low power consuming is to operate according to a high workload current potential and a low operating potential.This delay-level comprises draws element, a drop down element, a load elements, first output and one second output on one.Draw element to be electrically connected to the high workload current potential wherein, be used for receiving first signal.Drop down element is electrically connected to low operating potential, is used for receiving secondary signal.Load elements then is to be electrically connected to draw between element and the drop down element.First output is electrically connected at and draws between element and the load elements, and it is output as one and carries out oscillatory signal in areas of high potential.Second output is electrically connected between drop down element and the load elements, and it is output as one and carries out oscillatory signal in the electronegative potential zone.Drawing element on above-mentioned can be P type semiconductor, and above-mentioned drop down element then can be a N type semiconductor.If from another viewpoint, draw element and drop down element also can be used for receiving an oscillator signal in this delay-level.
Use is treated to the high levels oscillator signal that vibrates in areas of high potential respectively with oscillator signal, transmits with the mode that the low level oscillator signal that vibrates in the electronegative potential zone vibrates, and reaches purpose of power saving.In addition, the effect of feedback Control Network mainly is the action that the vibration delay circuit is reseted (Reset), and triggering is vibrated once more.The input of vibration delay circuit is if reset without the position standard of feedback Control Network, can be along with under the multi-stage serial connection, the accumulation step by step of phase deviation, cause vibrating in the delay circuit, on draw the overlapped of element and drop down element by the service area, make oscillator signal can't continue to transmit and can't keep vibration.
Description of drawings
Fig. 1 is the block diagram that illustrates the ring-type oscillator of known technology.
Fig. 2 is the block diagram that illustrates according to the low power consuming oscillating circuit of a preferred embodiment of the present invention.
Fig. 3 is the device block diagram that illustrates according to a preferred embodiment of the enable circuit of Fig. 2.
Fig. 4 is the device block diagram that illustrates according to a preferred embodiment of the vibration delay circuit of Fig. 2.
Fig. 5 is the device block diagram that illustrates according to a preferred embodiment of the feedback Control Network of Fig. 2.
Fig. 6 A is the oscillogram of 523 simulate signal illustrating among Fig. 5 to be indicated.
Fig. 6 B is the oscillogram of 221 simulate signal illustrating among Fig. 5 to be indicated.
Fig. 6 C is the oscillogram of 224 simulate signal illustrating among Fig. 5 to be indicated.
Fig. 6 D is the oscillogram of 526 simulate signal illustrating among Fig. 5 to be indicated.
102: decide voltage generation circuit
104: negative circuit
106: decide current element
205: enable circuit
207: the vibration delay circuit
209: the feedback Control Network
211: buffer element
213: enable signal
215: the back coupling control signal
217,221,427: the high levels oscillator signal
219,224,425: the low level oscillator signal
302,308,503,507,509:P N-type semiconductor N element
304,310,505,511,513:N N-type semiconductor N element
306: load elements
The combination of 315:P N-type semiconductor N
The combination of 317:N N-type semiconductor N
Draw element on 403: the first
406: the first load elements
409: the first drop down element
Draw element on 412: the second
415: the second load elements
418: the second drop down element
421: the first outputs
423: the second outputs
429: the first outputs
431: the second outputs
Embodiment
Please refer to Fig. 2, it illustrates the block diagram according to the low power consuming oscillating circuit of a preferred embodiment of the present invention.Present embodiment comprises, enable circuit 205, vibration delay circuit 207, with feedback Control Network 209.At first, enable circuit 205 is received by the external world and carries out behind the enable signal 213 first promptly feedbacking control signal 215 outputs an initial oscillator signal according to one after the oscillating operation.Next, after the vibration delay circuit 207 that is connected to the output 217,219 of enable circuit 205 receives above-mentioned initial oscillator signal from enable circuit 205, produce a high levels oscillator signal 221 that vibrates in areas of high potential alternately according to this initial oscillator signal, and the low level oscillator signal 224 back outputs of vibrating in the electronegative potential zone.Wherein, the areas of high potential here is meant between the high workload current potential of oscillating circuit and is higher than zone between the low operating potential of oscillating circuit, and the electronegative potential zone then is meant between low operating potential and is lower than zone between the high workload current potential.Last feedback Control Network 209 is electrically connected to the output of vibration delay circuit 207, high levels oscillator signal 221 and low level oscillator signal 224 are integrated into one feedback and export in the enable circuit 205 after the control signal 215, it is anti-phase each other with initial oscillator signal that this feedbacks control signal 215.Input in the enable circuit 205 by feedbacking control signal 215 feedbacks, can make this oscillating circuit keep vibration.
Please refer to Fig. 3, it illustrates is device block diagram according to a preferred embodiment of the enable circuit of Fig. 2.The enable circuit 205 of present embodiment comprises 317 and load elements 306 of 315, N type semiconductor combinations of a P type semiconductor combination.Wherein P type semiconductor combination 315 for P type semiconductor element 302 with P type semiconductor element 308 and connect and form, 317 of N type semiconductor combinations are that N type semiconductor element 310 is connected in series with N type semiconductor element 304 and forms, and load elements 306 then is connected between P type semiconductor element 308 and the N type semiconductor element 310.Mainly the acting as of this activation circuit 205 receives the enable signal 213 by external control vibrate first after, next just trigger vibration next time by the back coupling control signal 215 that is received.Person skilled in the art scholar's present embodiment as can be known it seems to be a NAND gate (NAND) with the viewpoint of logical level, but also need not be as limit in practical application.For example, can in P type semiconductor combination, use two P type semiconductor elements of serial connection, add in the N type semiconductor combination, to use and connect two N type semiconductor elements and form a NOR gate (NOR) and use.In the present embodiment, P type semiconductor combination 315 can or be feedback control signal 215 both one of them according to enable signal 213, export a high levels oscillator signal 217, N type semiconductor combination 317 then is or to feedback control signal 215 both one of them according to enable signal 213, exports a low level oscillator signal 219.When load elements did not have high resistance, the current potential zone that high levels oscillator signal and low level oscillator signal vibrate will have overlapping interval to produce.After mainly the acting as of enable circuit 205 accepted outside enable signal 213 and come circuits for triggering to carry out first oscillating operation, accept to feedback control signal 215, make whole oscillating circuit can be maintained at oscillatory regime.
Next, please refer to Fig. 4, it illustrates the device block diagram according to a preferred embodiment of the vibration delay circuit of Fig. 2.The vibration delay circuit 207 of present embodiment need include a delay-level (Delay) at least, realize but also can be connected in series with a plurality of delay-level, include in the present embodiment to be connected in and draw first delay-level of being formed between the element 403 and first drop down element 409 on first, and be connected in by second load elements 415 and draw second delay-level of being formed between the element 412 and second drop down element 418 on second by first load elements 406.In first delay-level, more include one first output 421 and one second output 423, in second delay-level, then more include first output 429 and second output 431.When the current potential of low level oscillator signal 219 rises, this moment first delay-level on draw element 403 to be closed condition, 409 conductings rapidly of drop down element, this makes the input signal of drop down element 418 of second delay-level, and promptly the current potential of low level oscillator signal 425 descends and this drop down element 418 is closed.But the low level oscillator signal 425 of input drop down element 418 can see through first load elements 406 and will draw the input signal of element 412 on second delay-level, be that the current potential of high levels oscillator signal 427 pulls down lentamente and falls, when this high levels oscillator signal 427 is reduced to a certain specific potential, then second delay-level on draw element 412 to be switched on, and, be sent in the follow-up functional circuit the high levels oscillator signal of exporting 221.
By that analogy, draw element and drop down element to transmit high levels oscillator signal and low level oscillator signal alternately in the utilization, because the high resistance that employed load elements itself has can reach the function of current limliting, and with its high capacitance that is had, can make high levels oscillator signal and low level oscillator signal that one phase difference is arranged, avoid drawing element and drop down element when the while conducting, between high workload current potential and low operating potential, produce a temporary short circuit electric current.Use the bulk loads element to limit electric current and avoid short circuit current, make this oscillating circuit reach purpose of power saving.Though but it is noted that high resistance that load elements has and high capacitance for contributing to some extent long cycle of oscillation, and more helpful with high resistance for power saving, if the combination of high capacitance and low resistive then has no to benefit for power saving on the contrary.The high levels oscillator signal of each delay-level and low level oscillator signal are not fully all to be enable circuit 205 inputs in oscillating circuit, for example, high levels oscillator signal 427 and low level oscillator signal 425 that second delay-level is imported are exported and are got by first delay-level, and every grade of its input is anti-phase each other with output signal.Vibration delay circuit 207 mainly utilizes load elements to produce the high levels and the low level oscillator signal of non-homophase, controls the action that discharges and recharges of drawing element and drop down element respectively.This load elements can limit the size of electric current in the feedback Control Network 209 simultaneously by the signal that different potentials is provided except the whether power saving of the length that can determine cycle of oscillation and circuit.
Next, please refer to Fig. 5, it illustrates the device block diagram according to a preferred embodiment of the feedback Control Network of Fig. 2.In a preferred embodiment of the present invention, feedback Control Network 209 can also or with a plurality of inverters be realized by single inverter.Wherein each inverter by a P type semiconductor element be connected in series with a N shape semiconductor element institute form.For example, the inverter that P type semiconductor element 503 and the N type semiconductor element 505 that is illustrated among the figure formed.After receiving the high levels oscillator signal of being exported by vibration delay circuit 207 221 and low level oscillator signal 224, repair the waveform of above-mentioned signal and export a back coupling control signal 215, whereby the phase place of oscillator signal is reseted action to enable circuit 205.
In another preferred embodiment of the present invention, be arranged in twos the external control inverter of inverter can one of capable again serial connection add P type semiconductor element 507 again on P type semiconductor element 509, and on N type semiconductor element 511 again one of row serial connection add N type semiconductor element 513, promptly finish the inverter formed as the P type semiconductor element 509 that illustrated among the figure and N type semiconductor element 511 again row add and add P type semiconductor element 507 and the combination that adds N type semiconductor element 513.Add P type semiconductor element 507 and be connected between high workload current potential and the P type semiconductor element 509, adding 513 of N type semiconductor elements is to be connected between low operating potential and the N type semiconductor element 511.
The adding P type semiconductor element 507 and add N type semiconductor element 513 accepts respectively to vibrate the synchronous high levels that the delay-level that pushes away even level in the delay circuit 207 back to front exports and the input of low level oscillator signal of this affix.In this embodiment, be the input that receives first delay-level is exported in the oscillating circuit high levels oscillator signal 427 and low level oscillator signal 425.
At last, please refer to Fig. 6 A, Fig. 6 B, Fig. 6 C, Fig. 6 D, the oscillogram of the simulate signal of 523,221,224,526 each points that it is illustrated among Fig. 5 respectively to be indicated wherein is expressed as for two/one-period in the employed symbol t of time shaft.Wherein Fig. 6 A illustrates 523 signals between inverter and next stage inverter, is an oscillator signal that presents the complete amplitude of oscillation.Fig. 6 B is the high levels oscillator signal 221 that illustrates before the self-dalay level input feedback Control Network 209, thus figure as can be known the amplitude of this signal be about the complete amplitude of oscillation oscillator signal 1/2nd.Fig. 6 C is the low level oscillator signal 224 that illustrates before the self-dalay level input feedback Control Network 209, thus figure as can be known the amplitude of this signal be about the complete amplitude of oscillation oscillator signal 1/2nd.Merging is accepted the element of high levels signal and low level signal with reference to Fig. 6 B and Fig. 6 C as can be known, and its service area can not overlap.Fig. 6 D has illustrated back coupling control signal that the external control inverter exported 526 itself and simulate signal at 523, and it almost presents same waveform and amplitude, but phase place is anti-phase each other.
Since last draw and drop down element between add the load elements of high resistance, guarantee to vibrate in the delay circuit 207, on the situation of drawing element and drop down element not to have to be switched on simultaneously take place, therefore avoid the generation of short circuit current, make vibration delay circuit 207 under normal working voltage, also can reach purpose of power saving.Wherein the load elements of high resistance can use active member to realize.In addition,, need not carry out the action that discharges and recharges of the complete amplitude of oscillation, also can reach the purpose of saving electric energy owing to oscillator signal being produced alternately high levels and low level oscillator signal respectively at vibrating in areas of high potential and the electronegative potential zone.This is because the electric energy that consumes and current potential square proportional, that is to say that working as current potential becomes originally two/for the moment, and the electric energy that is consumed can reduce to original 1/4th ideally.Be familiar with this operator and fixed the oscillating circuit of present embodiment in fact be a kind of circular oscillatory circuit as can be known,, in practical application, also need not exceed with this embodiment though be to realize in this way at this.
Claims (26)
1. low power consuming oscillating circuit, this oscillating circuit be according to an activation signal activation one initial oscillating operation, and hang down operating potential according to a high workload current potential and and operate, and it is characterized in that this circuit comprises:
One activation circuit behind this initial oscillating operation, is exported an initial oscillator signal according to a back coupling control signal;
One vibration delay circuit, be coupled to this enable circuit, receive this initial oscillator signal from this enable circuit, and produce for a high levels oscillator signal that vibrates between the areas of high potential and the low level oscillator signal that between an electronegative potential zone, vibrates according to this initial oscillator signal is mutual, wherein, this areas of high potential is between this high workload current potential and be higher than between a lower bound current potential of this low operating potential, and this electronegative potential zone is between this low operating potential and be lower than between a upper limit current potential of this high workload current potential; And
One feedback Control Network is coupled to this vibration delay circuit, integrates this high levels oscillator signal and this low level oscillator signal and is this back coupling control signal, and export this back coupling and control signal to this enable circuit.
2. low power consuming oscillating circuit as claimed in claim 1 is characterized in that, the initial oscillator signal of this that this enable circuit produced comprises two part signals that vibrate respectively in this areas of high potential and this electronegative potential zone.
3. low power consuming oscillating circuit as claimed in claim 2 is characterized in that, this enable circuit comprises:
One P type semiconductor elements combination is electrically coupled to this high workload current potential, according to this back coupling control signal, exports this high levels oscillator signal;
One N type semiconductor elements combination is electrically coupled to this low operating potential, according to this back coupling control signal, exports this low level oscillator signal; And
One load elements is electrically coupled between this P type semiconductor elements combination and this N type semiconductor elements combination.
4. low power consuming oscillating circuit as claimed in claim 2 is characterized in that, this vibration delay circuit comprises a delay-level.
5. low power consuming oscillating circuit as claimed in claim 4 is characterized in that, this delay-level comprises:
Draw element on one, be electrically coupled to this high workload current potential, receive by this enable circuit produced at this high levels oscillator signal;
One drop-down element is electrically coupled to this low operating potential, receives by this enable circuit produced at this low level oscillator signal;
One load elements is coupled to and draws on this between element and this drop down element;
One first output is electrically coupled to and draws on this between element and this load elements, to export this high levels oscillator signal to this feedback Control Network; And
One second output is electrically coupled between this drop down element and this load elements, to export this low level oscillator signal to this feedback Control Network.
6. low power consuming oscillating circuit as claimed in claim 2 is characterized in that, this vibration delay circuit comprises a plurality of delay-level.
7. low power consuming oscillating circuit as claimed in claim 6 is characterized in that, those delay-level comprise:
One first delay-level is electrically coupled to this enable circuit; And
A plurality of backs level delay-level, those back level delay-level are made up of each delay-level serial connection, and wherein, one second delay-level is electrically coupled to this first delay-level, and an output delay level is electrically coupled to this feedback Control Network.
8. low power consuming oscillating circuit as claimed in claim 7 is characterized in that, this first delay-level comprises:
Draw element on one, be electrically coupled to this high workload current potential, receive this high levels oscillator signal by this enable circuit produced;
One drop-down element is electrically coupled to this low operating potential, receives this low level oscillator signal by this enable circuit produced;
One load elements is coupled to and draws on this between element and this drop down element;
One first output is electrically coupled to and draws on this between element and this load elements, to export this high levels oscillator signal to this second delay-level; And
One second output is electrically coupled between this drop down element and this load elements, to export this low level oscillator signal to this second delay-level.
9. low power consuming oscillating circuit as claimed in claim 7 is characterized in that, those back level delay-level comprise:
Draw element on one, be electrically coupled to this high workload current potential, receive by this high levels oscillator signal that prime produced that draws element on this;
One drop-down element is electrically coupled to this low operating potential, receives the low level oscillator signal that prime produced by this drop down element;
One load elements is coupled to and draws on this between element and this drop down element;
One first output is electrically coupled to and draws on this between element and this load elements, to export this high levels oscillator signal to being somebody's turn to do the back level of drawing element; And
One second output is electrically coupled between this drop down element and this load elements, to export the back level of this low level oscillator signal to this drop down element.
10. low power consuming oscillating circuit as claimed in claim 6 is characterized in that, this feedback Control Network is formed by a plurality of inverters, and those inverters comprise:
A plurality of inverters, those inverters are respectively formed by a P type semiconductor element and a N type semiconductor element; And
A plurality of external control inverters, those external control inverters comprise this P type semiconductor element and this N type semiconductor element, and one adds P type semiconductor element and and adds the N type semiconductor element.
Wherein, this feedback Control Network is made up of the staggered institute that is connected in series of those inverters and those external control inverters.
11. low power consuming oscillating circuit as claimed in claim 10 is characterized in that, those external control inverters comprise:
One adds the P type semiconductor element, and this adds the P type semiconductor element and is coupled between this high workload current potential and this P type semiconductor element, in order to receive this high levels oscillator signal of exporting for a delay-level of even level back to front; And
One adds the N type semiconductor element, and this adds the N type semiconductor element and is coupled between this low operating potential and this N type semiconductor element, in order to receive this low level oscillator signal of exporting for this delay-level of even level back to front.
12. low power consuming oscillating circuit as claimed in claim 1 is characterized in that, this vibration delay circuit comprises a delay-level.
13. low power consuming oscillating circuit as claimed in claim 12 is characterized in that, this delay-level comprises:
Draw element on one, be electrically coupled to this high workload current potential, receive this initial oscillator signal;
One drop-down element is electrically coupled to this low operating potential, receives this initial oscillator signal;
One load elements is coupled to and draws on this between element and this drop down element;
One first output is electrically coupled to and draws on this between element and this load elements, to export this high levels oscillator signal; And
One second output is electrically coupled between this drop down element and this load elements, to export this low level oscillator signal.
14. low power consuming oscillating circuit as claimed in claim 1 is characterized in that, this vibration delay circuit comprises a plurality of delay-level.
15. low power consuming oscillating circuit as claimed in claim 14 is characterized in that, those delay-level comprise:
One first delay-level is electrically coupled to this enable circuit; And
A plurality of backs level delay-level, those back level delay-level are made up of each delay-level serial connection, and wherein, one second delay-level is electrically coupled to this first delay-level, and an output delay level is electrically coupled to this feedback Control Network.
16. low power consuming oscillating circuit as claimed in claim 15 is characterized in that, this first delay-level comprises:
Draw element on one, be electrically coupled to this high workload current potential, receive this initial oscillator signal;
One drop-down element is electrically coupled to this low operating potential, receives this initial oscillator signal;
One load elements is coupled to and draws on this between element and this drop down element;
One first output is electrically coupled to and draws on this between element and this load elements, to export this high levels oscillator signal to this second delay-level; And
One second output is electrically coupled between this drop down element and this load elements, to export this low level oscillator signal to this second delay-level.
17. low power consuming oscillating circuit as claimed in claim 15 is characterized in that, those back level delay-level comprise:
Draw element on one, be electrically coupled to this high workload current potential, receive the high levels oscillator signal that prime produced that draws element on this;
One drop-down element is electrically coupled to this low operating potential, receives the low level oscillator signal that prime produced of this drop down element;
One load elements is coupled to and draws on this between element and this drop down element;
One first output is electrically coupled to and draws on this between element and this load elements, to export this high levels oscillator signal; And
One second output is electrically coupled between this drop down element and this load elements, to export this low level oscillator signal.
18. low power consuming oscillating circuit as claimed in claim 14 is characterized in that, this feedback Control Network is formed by staggered serial connection of a plurality of inverters and a plurality of external control inverters.
19. low power consuming oscillating circuit as claimed in claim 18 is characterized in that, those external control inverters comprise:
One inverter, this inverter system is composed in series by a P type semiconductor element and a N type semiconductor element;
One adds the P type semiconductor element, and this adds the P type semiconductor element and is coupled between this high workload current potential and this P type semiconductor element, in order to receive this high levels oscillator signal of exporting for a delay-level of even level back to front; And
One adds the N type semiconductor element, and this adds the N type semiconductor element and is coupled between this low operating potential and this N type semiconductor element, in order to receive this low level oscillator signal of exporting for this delay-level of even level back to front.
20. oscillating circuit as claimed in claim 1 is characterized in that, this feedback Control Network is an inverter.
21. oscillating circuit as claimed in claim 20 is characterized in that, this inverter is connected in series institute by a P type semiconductor element and forms with a N type semiconductor element.
22. the delay-level of a low power consuming oscillating circuit is operated according to a high workload current potential and a low operating potential, it is characterized in that this delay-level comprises:
Draw element on one, be electrically coupled to this high workload current potential, receive one first signal;
One drop-down element is electrically coupled to this low operating potential, receives a secondary signal;
One load elements is coupled to and draws on this between element and this drop down element;
One first output is electrically coupled to and draws on this between element and this load elements, is output in oscillatory signal between the areas of high potential; And
One second output is electrically coupled between this drop down element and this load elements, is output in oscillatory signal between the electronegative potential zone;
Wherein, this areas of high potential is between this high workload current potential and be higher than between a lower bound current potential of this low operating potential, and this electronegative potential zone is between this low operating potential and be lower than between a upper limit current potential of this high workload current potential.
23. the delay-level of low power consuming oscillating circuit as claimed in claim 22 is characterized in that, this first signal and this secondary signal are same signal.
24. the delay-level of low power consuming oscillating circuit as claimed in claim 22 is characterized in that, draws element to comprise P type semiconductor on this.
25. the delay-level of low power consuming oscillating circuit as claimed in claim 22 is characterized in that, this drop down element comprises N type semiconductor.
26. the delay-level of low power consuming oscillating circuit as claimed in claim 22 is characterized in that, this load elements comprises active element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410001095 CN1652454A (en) | 2004-02-03 | 2004-02-03 | Low energy consumption oscillating circuit and delay stage |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200410001095 CN1652454A (en) | 2004-02-03 | 2004-02-03 | Low energy consumption oscillating circuit and delay stage |
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| CN1652454A true CN1652454A (en) | 2005-08-10 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105811931A (en) * | 2015-01-20 | 2016-07-27 | 联发科技（新加坡）私人有限公司 | Tunable delay circuit and operating method thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105811931A (en) * | 2015-01-20 | 2016-07-27 | 联发科技（新加坡）私人有限公司 | Tunable delay circuit and operating method thereof |
| CN105811931B (en) * | 2015-01-20 | 2018-08-10 | 联发科技（新加坡）私人有限公司 | Tunable delay circuit and its operating method |
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