CN1651924A

CN1651924A - Capacitor capacitance measurement apparatus

Info

Publication number: CN1651924A
Application number: CN 200510009081
Authority: CN
Inventors: J·M·伦德; 小B·恩
Original assignee: Fluke Corp
Current assignee: Fluke Corp
Priority date: 2001-02-07
Filing date: 2002-02-07
Publication date: 2005-08-10
Anticipated expiration: 2022-02-07
Also published as: CN100383538C; TWI242648B

Abstract

An apparatus and method of measuring capacitances are provided in which charge packets of known value are delivered to a capacitor of unknown value until a final voltage is determined, and the capacitance is calculated based on the known total charge and measured voltage.

Description

The device that is used for Measurement of capacitor electric capacity

Technical field

The present invention relates generally to capacitance measurement, relate in particular to a kind of like this capacitance measurement, the charge packet of given value wherein is provided by the capacitor to unknown-value, up to definite final voltage, the voltage according to known total electrical charge and measurement calculates electric capacity then.

Technical background

Capacitance measurement is a for example key character of digital multimeter of surveying instrument.The United States Patent (USP) 5073757 and 5136251 that is transferred to Fluke company has disclosed a kind of method of measuring little electric capacity and big electric capacity, wherein make the capacitor of unknown-value under its RC speed, be charged to a reference voltage fully, meanwhile, accumulation and the proportional electric current of charging current on the holding capacitor of dual slope integrating analog to digital converter (ADC).Little electric capacity can charge in the integration period of ADC fully, and big electric capacity then needs several integration periods to charge fully.In both cases, be removed during the cycle " removing integration " in the time interval at proportional electric charge of storing on the holding capacitor of integration ADC, and measure the described time, thereby provide the indication of capacitance by the quantitaes of charge stored.

Technical background

The capacitance measurement technology of these prior aries is unsatisfied, this is because its long Measuring Time, because must wait for that the capacitor of unknown-value is charged fully, thereby cause having proposed a kind of 1999,3, the sequence numbers of 12 applications are a kind of capacitance measurement system that discloses in 09/267504 the United States Patent (USP) that awaits the reply, and wherein use constant current source to produce linear gradient voltage on the measured capacitance device.This makes it possible to measure differential voltage (Δ V) and derivative time (Δ T), and calculates electric capacity by the two ratio.Though measuring speed and precision have had improvement in a wide measurement range, being to use the required parameter of analog to digital converter collection of complicated many slopes is quite slow processes.

The problem of the method for all these prior aries is, because capacitance is unknown, so pay the scope that considerable effort search can be measured.In addition, especially, may make the capacitance distortion because of resolution compression in the lower end of given range.

Summary of the invention

According to the present invention, a kind of apparatus and method that are used to measure electric capacity are provided, wherein to the charge packet of the capacitor of unknown-value supply given value, up to definite final voltage, and according to the voltage calculating electric capacity of known total electrical charge and measurement.

Explanation below reading in conjunction with the drawings, those skilled in the art can clearly be seen that other purpose characteristics and advantage of the present invention.

Description of drawings

Fig. 1 represents to be used to help to understand the electric current relevant with capacitor of the present invention and the relation curve of voltage;

Fig. 2 is the schematic diagram according to capacitance measurement system of the present invention;

Fig. 3 is the synoptic diagram that is applicable to the programmable constant current source in the system of Fig. 2; And

Fig. 4 is the process flow diagram of operation of the system of presentation graphs 2.

Detailed description of the present invention

Fig. 1 is used for helping to understand principle of the present invention, the wherein electric current that expression is relevant with capacitor and the relation of voltage.The definition of the electric capacity that provides on the textbook be a kind of electric current and voltage concern i=C de/dt, thus, condenser voltage can be defined as

e (t) = \frac{1}{C} &Integral; idt .

This provides the understanding for a conception of species of knowing, that is, be constant if offer the electric current of capacitor, then the voltage of capacitor along with capacitor to described steady current integration and changing linearly in time.This can be found out that the steady current i that wherein provides produces a ramp voltage Δ V by Fig. 1 in time interval Δ T.In addition, the interior at interval at any time integration of electric current is the charge Q that accumulates on capacitor, perhaps Q=∫ idt.Thereby, we can say that the area that is surrounded by the current waveform of Fig. 1 just equals charge Q.At last, because Q=CV as can be seen, if the voltage Δ V at the charge Q of accumulation and capacitor two ends is known, then can calculate capacitance C.

Fig. 2 is the schematic diagram according to the capacitance measurement system of the capacitance that is used to measure the capacitor that is connected input end 12 of the present invention.What link to each other with input end 12 also has programmable constant current source 14, discharge switch 16, comparer 18, and analog to digital converter (ADC) 20.Microprocessor (μ P) 24 links to each other with all these devices in operation, and microprocessor comprises relevant storer 26 and display device 28.

Though all circuit components of Fig. 2 are known for those skilled in the art, describe the details of constant current source 14 below in detail, so that fully understand its purposes.About a kind of mode that realizes programmable constant current source be, in fact, it is a charge packet generator, and this is because it offers capacitor 10 a certain amount of steady currents (i) in (dt) at interval at an official hour.The details of suitable programmable constant current source as shown in Figure 3.Wherein show a plurality of

constant0current generator

30A, 30B, 30C ..., 30n, each produce a different or predetermined value steady current.These values can increase according to any required order, for example, and with scale-of-two (binary) sequence, as, 1 microampere (μ A), 2 μ A, 4 μ A, 8 μ A, or the like, perhaps with any other order, as 1 μ A, 2 μ A, 5 μ A, 10 μ A or the like decide according to the operable concrete system and the available suitable time interval.Each and

door

32A, 32B, 32C ..., 32n and corresponding constant

current source generator

30A, 30B, 30C ..., 30n links to each other.Each selects a selector switch 34 with the input of door 32A-32n from n, and it can be a suitable address counter, is used for selecting a constant current source from constant current source generator 30A-30N.Each with the door 32A-32n another the input from selectable pulse width generator 36, when described pulse width generator is activated, pulse selection or preset width then is provided, thereby at a selecteed constant current source generator of accurate known interval internal gating.N selects the input of a selector switch 34 and pulse width generator 36 to be provided by microprocessor 24.Thereby as can be seen, in order to send a charge packet q0 to capacitor 10, microprocessor 24 is selected an output of wanting the time interval of the current feedback circuit of gating and the value q0=∫ idt that is used to provide required as constant current source 14 able to programme.

Be used for determining the operation of system shown in Figure 2 of the capacitance of capacitor 10 below with reference to program description shown in Figure 4.

In the

step

40,24 pairs of systems of microprocessor carry out initialization.The positive input terminal of comparer 8 is by means of applying a V _{REF (0)}Be set to a little more than 0V, and make discharge switch 16 closures.Any voltage on capacitor 10 is bled off by switch 16.

In the step 42, whether microprocessor 24 is discharged by the outgoing inspection capacitor 10 that monitors comparer 18.If condenser voltage is lower than the threshold value that is provided with in the step 40, then comparer 18 is output as height, thereby to microprocessor 24 signalling expressions, condenser voltage is less than V _{REF (0)}Then, discharge switch 16 is disconnected.

Should be pointed out that and use comparer 18 herein as the monitoring voltage device, by with the comparison of threshold voltage, be used to monitor condenser voltage.It will be appreciated by those skilled in the art that comparer can replace with high-speed ADC, and voltage threshold can be set in the firmware or software relevant with microprocessor 24.

In the step 44, by the voltage V on ADC 20 Measurement of capacitor 10 _{C (0)}, and be stored in the storer 26.Consider the dielectric absorption effect, can adjust actual readout time, described absorption can cause the slight increase of condenser voltage, and this is because electric charge in a small amount redistributes in the physics of capacitor.In this case, switch 16 is the time interval of a closed weak point once more, so that remove residual charge, and then opens, and makes and reads new V _{C (0)}

In addition, if comparer 18 is replaced by high-speed ADC, then described high-speed ADC can have double action, and promptly comparer 18 and ADC 20 are replaced by a high-speed ADC.Program can represent that thresholding is satisfied, and has stored the ADC reading.

In the step 46, microprocessor 24 is by selecting suitable current level and minimum available charge packet value q0 of the combination selection in the time interval of a programmable constant current source 14, and comparer 18 is set at half the voltage V a little less than the whole process input of the ADC 20 of regulation _REFThe place cuts off.

In the step 48, microprocessor 24 makes the electric current from programmable current source 14 flow into capacitor 10 in a known time interval, thereby charge packet q0 is placed on the capacitor, simultaneously the output of monitor voltage comparer 18.

In the step 50,, mean that then the charge packet that offers capacitor 10 is not enough to produce the voltage that reaches the cut-out value that is provided with in the step 46 if voltage comparator 18 does not cut off.If voltage comparator cuts off, the voltage that is equal to or greater than the cut-out level that are provided with in the step 46 that then meaned the charge generation that is placed on the capacitor 10.

In the step 52, if voltage comparator 18 does not cut off, then repeat to go on foot 48 after electric charge q0 is placed thereon, make capacitor have to be placed the electric charge of Q=q0+q0 thereon.Still be not enough to produce the voltage that reaches the cut-out level if offer the new charge packet of capacitor 10, then microprocessor 24 is selected the combination in a current value/time interval, so that a new charge packet q1=2q0 is provided, and this charge packet is delivered to capacitor 10.

Step

48,50 and 52 is repeated, and produces the voltage that comparer 18 is cut off up to the total electrical charge Q on capacitor 10, and the voltage that this expression is produced by capacitor 10 is on certain point between the half-sum whole process of whole process of action pane of regulation of ADC 20.Microprocessor 24 keeps following the tracks of the charge packet that offers capacitor 10, and total electrical charge Q is stored in the storer 26.

If comparer 18 one can carry out that several times are attempted in case the preset time that finds the combination that generation is enough to make current level/time interval that comparer 18 cuts off at interval after not cut-out, then described trial finishes, because this means that this capacitor is owing to certain reason does not receive electric charge.

In the step 54, after comparer 18 cut off, 24 of microprocessors started the final voltage V that ADC 20 measures on capacitor 10 _{C (F)}After the time of a weak point, can carry out the reading second time, so that confirm final voltage V _{C (F)}Identical with first, because if lower slightly, then represent leaky condenser, wherein a spot of electric charge has been missed.

In the step 56, microprocessor 24 according to following formula for q _n=q ₁+ q ₂+ ...+q _N-1Situation calculate electric capacity:

C = \frac{Q_{T}}{ΔV} = \frac{Σ_{n = 0}^{N} q_{n}}{V_{Cfinal} - V_{Cstart}},

In addition, for scale-of-two (binary) sequence, can be expressed as following Q _T=q ₀2 ^(n-1), q wherein ₀Be minimum charge packet, N is for making comparer 18 expressions surpass the required charge cycle number of cut-out level that is provided with in the step 46.

From following table as can be seen, the total electrical charge Q on capacitor 10 increases with scale-of-two (binary) sequence:

Charge cycle 123456, etc.

Electric weight q ₀q ₀2q ₀4q ₀8q ₀16q ₀...

Total electrical charge Q q ₀2q ₀4q ₀8q ₀16q ₀32q ₀...

This electric charge sequence makes has a wide capacitance scope, and for example the capacitor of the value of 8 decimal systems (decade) can be determined soon, and need not search for suitable capacitance range.In addition because capacitor with series of steps near 0 voltage that is charged in the first half of ADC action pane, i.e. a voltage between half way and whole process is so in measurement range, resolution is constant.Two ends in measurement range do not have resolution compression.The dynamic range of technology described herein is only limited by the current value that uses when producing charge packet and the time interval, thereby depends on the ability of programmable current feedback circuit 14.For example, suppose the Δ V=1.00V of the initial and final voltage measurement calculating that obtains by ADC 20, for Q _Min=q ₀=0.5 μ A * 200 μ sec=100 skin coulombs (pCoulomb) can measure the electric capacity of 100pF.On the other hand, utilize the current source of 1mA in about 5 seconds, can measure the electric capacity of 10000 μ F.This expression can cover the capacitance scope (from 100pF to 10000 μ F) of 8 decimal systems (decade), and perhaps three-figure if desired resolution then need cover the scope of 6 decimal systems (decade).

Thereby as can be seen, the scope of regulation capacitance measurement automatically becomes the part of method described herein automatically, and the program and the technology that do not need to search range.Because capacitor is charged to a final magnitude of voltage from an initial voltage value, and determine capacitance by the total electrical charge on the capacitor, so avoided the resolution compression of the capacitance that has at the two ends of capacitance range, with respect to prior art, this is significant an improvement.Equally, also avoided compression in the high-end value that has of RC time constant curve.In addition, can detect the defective capacitor that causes owing to dielectric absorption and the capacitor of electric leakage.

Though the preferred embodiments of the present invention have been described above,, obviously, for those skilled in the art, do not depart from the scope of the present invention and conceive, can make various changes and remodeling.For example, voltage comparator 18 can utilize high-speed ADC to replace, and is used for determining beginning and final voltage.Therefore, estimate that appended claim can cover these changes and remodeling within the scope of the invention.

Claims

1. device that is used for the electric capacity of Measurement of capacitor comprises:

Be suitable for being coupled to the input terminal of described capacitor;

Discharge circuit is coupled to described input terminal so that discharge described capacitor and measure the voltage on it so that obtain initial voltage;

Charging circuit, be coupled to described input terminal so that transmit certain charge packet, total electric charge of accumulation on described capacitor, thereby produce the final voltage that surpasses a predetermined minimum voltage at the capacitor two ends, wherein said charging circuit comprises one or more constant current sources and one or more pulse width generator, and this constant current source can combine with pulse width generator and select to provide the charge packet with different predetermined values;

A comparer, be coupled to described capacitor, be used for the charge packet of response pass to described capacitor, condenser voltage that relatively produces and the predetermined minimum voltage that provides by a processor repeatedly at described capacitor two ends, transmit each charge packet after, described processor judges whether to reach final voltage, and, if described predetermined minimum voltage surpasses condenser voltage, promptly select a combination of constant current source and pulse width generator, so that the value of next charge packet to be provided; With

Be used to store the storer of the charge value on the described capacitor;

Wherein said processor obtains a difference voltage by deducting described initial voltage from described final voltage, and the described total stored charge that removes on the described capacitor with described difference voltage calculates described electric capacity.

2. device as claimed in claim 1, wherein said charging circuit further comprises:

The first optional constant current generator is used for providing to described capacitor the steady current of first predetermined level; With

The first optional pulse width generator is used to produce first pulse width, at the very first time interval internal gating described first optional constant current generator, so that produce first described predetermined charge bag.

3. device as claimed in claim 1, wherein said charging circuit further comprises:

The second optional constant current generator is used for providing to described capacitor the steady current of second predetermined level; With

The second optional pulse width generator, be used to produce second pulse width, at the second time interval internal gating described second optional constant current generator, so that produce second described predetermined charge bag, described processor makes up the described first and second predetermined charge bags, total electric charge to be provided and to produce described final voltage.