CN1647466A - A method for providing redundancy for channel adapter failure - Google Patents
A method for providing redundancy for channel adapter failure Download PDFInfo
- Publication number
- CN1647466A CN1647466A CNA03808578XA CN03808578A CN1647466A CN 1647466 A CN1647466 A CN 1647466A CN A03808578X A CNA03808578X A CN A03808578XA CN 03808578 A CN03808578 A CN 03808578A CN 1647466 A CN1647466 A CN 1647466A
- Authority
- CN
- China
- Prior art keywords
- channel adapter
- port
- adapter
- control information
- caching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/28—Routing or path finding of packets in data switching networks using route fault recovery
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/22—Alternate routing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/58—Association of routers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/35—Switches specially adapted for specific applications
- H04L49/356—Switches specially adapted for specific applications for storage area networks
- H04L49/358—Infiniband Switches
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/55—Prevention, detection or correction of errors
- H04L49/557—Error correction, e.g. fault recovery or fault tolerance
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
The invention relates to a method for providing improved reliability of any node attaching to an InfiniBand fabric, the method comprising the steps of: a) providing a first and a second physical Channel Adapter having a first and a second number of ports, b) providing program means for registering the first and second physical Channel Adapters as one logical Channel Adapter having a number of first and second ports, c) providing first and second caching means for storing first and second control information for the first and second Channel Adapter, d) providing system memory means for storing first and second control information, and e) providing means for copying the first control information from the system memory to the second caching means in case of a failure of the first Channel Adapter and for initiating an Automatic Path Migration from the first number of ports to the second number of ports.
Description
Technical field
The present invention relates to digital network communication, more particularly, relate to computer system is provided or be connected the InfiniBand subnet or framework (fabric) on the improvement reliability of any other node.
Background technology
Towards quick, packetizing, the development of serial I/O (I/O) interconnection architecture, wherein computation host and ancillary equipment are linked by switching network (being commonly referred to architecture for exchanging) computer industry.Proposed many such architectures, finally caused (comprising Intel, Sun Microsystems by one group of industry person of taking the lead, Hewlett Packard, IBM, Compaq, Dell and Microsoft) InfiniBand (IB) architecture that proposes of leader's federation.Can
Www.infinibandta.orgObtain from InfiniBand Finance House Association, and be contained in this InfiniBand Architecture Specifcation as a reference, describe the IB architecture among the Release 1.0.a in detail.
By connecting host channel adapters (HCA) and other HCA, perhaps connect host channel adapters (HCA) and target channel adapter (TCA), the InfiniBand technology plays a role.HCA often is positioned near the CPU and memory of server, and TCA often is positioned near the magnetic disc store and other peripheral hardware of system.Switch or router according to the information that is included in the packet itself, are guided packet into correct TCA destination between HCA and TCA.
Being connected or the InfiniBand point-to-point link between HCA and the TCA (perhaps other HCA), or switch or router, this allows to produce unified InfiniBand subnet or architecture environment respectively.A key takeaway of this switch is that its allows according to variable, for example service class (SL) and destination identifier (DLID/DGID), the grouping of management information (or data).
Replace traditional store transformed I/O interface bus, utilize serial, switched fabric approach to develop the InfiniBand architecture.This exchange is in the nature the low latency of InfiniBand architecture, and high-bandwidth characteristics creates conditions.The system of trooping and network need be convenient to realize the standard that is connected of fault-tolerant interconnection.
This requirement is by comprising advanced fault detect and correcting machine-processed InfiniBand architecture and satisfy.An example that meets the product of InfiniBand is the IBMPCI-X-InfiniBand host channel adapters, and it allows the PCI-X bus of main frame and the connectedness between the InfiniBand network.Two InfiniBand ports provide support automated path migration and the ability that is connected with the list or the plurality of subnets of single HCA device.
Automated path migration (APM) is broken down in host channel adapters (HCA) or target channel adapter (TCA) port, perhaps exists in subnet or the framework under the situation of fault, continues a kind of means of handling.In other words, APM is provided at the port failure of HCA or TCA or link, perhaps the redundancy scheme under the situation of switch in subnet or the framework or router failure.But InfiniBand has only defined the redundancy scheme under the situation that one or more ports of HCA just break down, and defines the redundancy scheme in the absence that whole HCA breaks down.
Summary of the invention
The invention provides under the situation that whole channel adapter (channel adapter) breaks down channel adapter (CA), for example redundant unit of host channel adapters (HCA) or target channel adapter (TCA).A special benefits of the present invention is that redundant unit cooperates with the InfiniBand architecture is seamless, and depends on trouble shooting and the correcting method of stipulating in the InfiniBand architecture.
A special benefits of the present invention is can comply with the InfiniBand architecture fully according to the device of principle design of the present invention, can also provide redundant unit under the situation that whole channel adapter breaks down.
According to a preferred embodiment of the present invention, provide at least two physical host channel adapter.From the viewpoint of InfiniBand architecture, these two physical host channel adapter are registered as a logical host channel adapter.These two host channel adapters all have with system storage cooperates, so that preserve with formation the formation of controll block (QPCB) the expression private cache device to (QP) control information.Under the whole situation about breaking down of one of physical host channel adapter, to the remaining copy that corresponding QPCB still is provided in the physical host channel adapter of work.
According to another preferred embodiment of the invention, utilize write through cache.In this case, the QPCB that preserves in the system storage is the copy of the private cache of each physical host channel adapter.
According to another preferred embodiment of the invention, write-back cache is used to host channel adapters.In this case, in some time, make system storage and high-speed cache synchronous, system storage not reflection is always specified constantly the actual content of high-speed cache arbitrarily.
Under the whole situation about breaking down of physical host channel adapter, the content that belongs to the high-speed cache of the host channel adapters that breaks down is also lost.The system storage copy of QPCB is provided for the high-speed cache of remaining physical host channel adapter.
This copy comprises outmoded data.In order to make communication synchronization again, and make QPCB information up-to-date, utilize the trouble shooting that the InfiniBand architecture provides and correct mechanism.
Though that preferred embodiment described herein relates to is host channel adapters (HCA), covers channel adapter but the present invention totally contains, described channel adapter comprises according to the HCA of InfiniBand architecture and TCA.
Description of drawings
Below with reference to accompanying drawing, illustrate in greater detail the preferred embodiments of the present invention, wherein:
Fig. 1 is the block diagram of the operation of the single host channel adapters of graphic extension with special-purpose cache,
Fig. 2 is about write through cache, and expression has the block diagram of the computer system of redundancy logic host channel adapters,
Fig. 3 is illustrated in after the host channel adapters that replaces breaking down with redundant unit, the block diagram of Fig. 2,
Fig. 4 is about write-back cache, the difference that graphic extension can take place between the state of high-speed cache and system storage,
Fig. 5-7 is illustrated under the situation of using write-back cache, and the trouble shooting and the correcting method that utilize the InfiniBand architecture to provide are realized redundancy scheme of the present invention.
Embodiment
Fig. 1 represents to have the computer system of host channel adapters 1, and host channel adapters 1 comprises high-speed cache 2 and cache directory 3.In addition, computer system also has system storage 4.
By system storage 4, cache directory 3 and high-speed cache 2, formation is virtualized controll block (QPCB).Under the situation that has more than one host channel adapters 1, the formation between the different host channel adapters must be non-intersect to (QP) numbering.
All formations reside in the system storage 4 controll block, when being used, are written in the host channel adapters high-speed cache 2, when not being used, from 2 unloadings of host channel adapters high-speed cache.The fault of host channel adapters 1 can not stop from the different host channel adapters of physics visits this data.
Fig. 2 has represented the block diagram of the preferred embodiments of the present invention, and it illustrates redundant unit.The unify same parts of computer system of Fig. 1 of the department of computer science of Fig. 2 is represented with identical Reference numeral.
Computer system has physical host channel adapter 1 that has one or more ports 6 and the physical host channel adapter 7 that has one or more ports 8.Port 6 is connected with InfiniBand subnet or framework 9 with 8.
Two physical host channel adapter 1 and 7 are counted as and the corresponding single host channel adapters of InfiniBand architecture.Thereby, constitute logical host channel adapter 10.Logical host channel adapter 10 has the port 6 and 8 of physical host channel adapter 1 and 7.
Physical host channel adapter 1 has high-speed cache 2, and physical host channel adapter 7 has high-speed cache 11.Two high- speed caches 2 and 11 are organized into write through cache.
In addition, computer system has and is used to store the system storage 4 of the formation of physical host channel adapter 1 and 7 to the controll block data.Different physical host channel adapter 1 and 7 queue pair numbers are non-intersect.
There is not other restriction in queue pair numbers.For convenience of explanation, supposition physical host channel adapter 1 has one group of 12 formation to controll block QPCB_2~QPCB_m below, and physical host channel adapter 7 has one group of 13 formation to controll block QPCB_m+1~QPCB_n.QPCB_0 and QPCB_1 are used for the subnet management purpose, no longer further discuss here.
Because high- speed cache 2 and 11 is write through caches, so the QPCB data in the system storage 4 are identical with data in high- speed cache 2 and 11.
Fig. 3 graphic extension is used to handle the redundant unit of complete failure of the physical host channel adapter 1 of Fig. 2.
At first, the complete hardware fault that has the physical host channel adapter 1 that comprises port 6.This hardware fault is called the automated path migration of InfiniBand architectural definition.Like this, the one or more communication paths that relate to the port 6 of host channel adapters 1 are moved to remaining physical host channel adapter 7.
This program automated path migration (APM) mechanism that InfiniBand provides that places one's entire reliance upon, because with regard to the InfiniBand architecture, host channel adapters 1 and 7 is not as two independently (physics) host channel adapters existence, but only conduct provides single (logic) host channel adapters 10 of port 6 and 8 to exist.
As required, the copy of the QPCB in the group 12 is saved in the high-speed cache 11.Because group 12 comprises the copy of the content of high-speed cache 2, therefore do not need other Restoration Mechanism.
The situation of Fig. 4 graphic extension with regard to write-back cache.If use write-back cache, rather than write through cache are kept at the last state that QPCB in the system storage 4 does not always reflect the QPCB data in the high-speed cache 14 so.Here it is why under the situation of using write-back cache, need call the other trouble shooting of InfiniBand architecture and the reason of correcting method.
Fig. 5 illustrates fault restoration (failover) situation before in one of physical host channel adapter.
Transmitter one side, pending packet sequence number (PSN) sequence 15 is kept in the system storage 4.One of pending PSN with sequence number Sm is according to the information that is kept in the system storage 4, next grouping that will transmit.
In addition, the sequence 16 of pending PSN is kept in the local cache, and described local cache is a write-back cache.The up-to-date sequence of the grouping that sequence 16 representatives transmit.Thereby sequence number Sn is up-to-date in the series 16.
Receiver one side, there is PSN sequence 17.Next grouping of receiver expection is the grouping with sequence number Rn.After the fault restoration of one of physical host channel adapter, sequence 15 is still unaffected, because it is kept in the system storage 4.
The copy of sequence 15 is provided for remaining physical host channel adapter of still working.The sequence 16 of the high-speed cache of the host channel adapters that breaks down like this, is replaced by the remaining still sequence in the high-speed cache of the physical host channel adapter of working 15.
Next grouping that Here it is sends from host channel adapters is the reason with grouping of the stale sequence number Sm that sends before fault restoration.Receiver returns affirmation (ACK) to sending host channel adapters, and abandons this grouping.
In response, host channel adapters is sent in next grouping of identification in the sequence 15.Like this, sequence 15 is processed, reaches sequence 16 till the initial condition before the fault restoration up to sequence 15.After reaching this state, normally continue normal system operation.
Fig. 6 has represented to have sent from host channel adapters the situation of the grouping of next the sequence number Sn with sequence 16.After sending this grouping, there is the hardware fault of host channel adapters.However, receiver receives the expection grouping with sequence number Rn=Sn.
In response, receiver sends the affirmation of having received the grouping with sequence number Sn to logical host channel adapter.Logical host channel adapter, promptly remaining still in the physical host channel adapter of work this affirmation being construed to false confirmed (ghost acknowledgement), and ignores this affirmation.Subsequently, in the situation shown in Fig. 5, transmitter sends the grouping of the sequence number Sm with sequence 15.
Fig. 7 has represented that host channel adapters serves as the situation of receiver.PSN sequence 18 is kept in the system storage, and up-to-date sequence 19 is kept in the cache.In addition, the sequence 20 of the existence pending PSN that will send by transmitter.This is the situation before the fault reparation.
After fault restoration, sequence 19 is replaced by sequence 18,, from system storage the copy of sequence 18 is offered the remaining still at the physical host channel adapter of working high-speed cache partly of logical host channel adapter that is.Sequence 20 remains unchanged.
When host channel adapters when transmitter is received the grouping of next the sequence number Sn with sequence 20, this expected sequence number Rm with sequence 18 does not conform to.In response, host channel adapters is returned Negative Acknowledgement (NAK) to transmitter.This transmitter to grouping is pointed out packet drop in subnet or framework, and transmitter must be retransmitted these groupings.
It is the parameter of the last grouping that successfully receives that negative acknowledgement response has which grouping of indication.Like this, sequence 20 is returned is changed to sequence number Sn=Rm, and Rm is the expected sequence number of sequence 18 here.
Reference numerals list
Physical host channel adapter 11
HCA1 high-speed cache 2
HCA1 port 6
Physical host channel adapter 27
InfiniBand framework 9
Logical host channel adapter 10
HCA2 high-speed cache 11
Allocation is given the PQCB piece 12 of HCA1
Allocation is given the PQCB piece 13 of HCA2
HCA1 or 2 high-speed caches 14
PSN sequence 18
PSN sequence 19
PSN sequence 20
Claims (9)
1, a kind of for the channel adapter fault provides redundant method, described method comprises the steps:
The first physical channel adapter of the port with first quantity is provided and has the second physical channel adapter of the port of second quantity,
Be provided for the first and second physical channel adapters are registered as the timer of a logical channel adapter of port with many first and second quantity,
First caching device and being used to that is provided for preserving first control information of first passage adapter is preserved second caching device of second control information of second channel adapter,
Be provided for preserving first and second control informations system memory device and
Be provided under the situation that the first passage adapter breaks down, first control information is copied to second caching device from system storage, and be used for starting device from the port of first quantity to the automated path migration of one or more ports of the port of second quantity.
2, in accordance with the method for claim 1, wherein first and second caching devices play write through cache.
3, in accordance with the method for claim 1, wherein first and second caching devices play back to deposit the formula high-speed cache.
4, in accordance with the method for claim 3, also comprise providing and use InfiniBand type trouble shooting and correcting method, make the synchronous device of communicating by letter again between one of second port and another InfiniBand channel adapter.
5, a kind of computer program of realizing according to the arbitrary described method of claim 1-4.
6, a kind of computer system comprises:
Have first quantity port (6) the first physical channel adapter (1) and have the second physical channel adapter (7) of the port (8) of second quantity,
The first and second physical channel adapters are registered as device according to a logical channel adapter (10) of InfiniBand type architecture, and described logical channel adapter has many first and second ports,
Second caching device (11) of second control information of first caching device (2) of first control information of preservation first passage adapter and preservation second channel adapter,
Preserve first control information (12) and second control information (13) system memory device (4) and
Under the situation that the first passage adapter breaks down, first control information is copied to second caching device (11) from system memory device (12), and the device of the InfiniBand type automated path migration of the one or more ports starting from the port (6) of first quantity to the port (8) of second quantity.
7, according to the described computer system of claim 6, first and second caching devices have been suitable for the effect of write through cache.
8, according to the described computer system of claim 6, first and second caching devices have been suitable for back depositing the effect of formula high-speed cache.
9, according to claim 6,7 or 8 described computer systems, also comprise and use InfiniBand type trouble shooting and correcting method, make in the port of second quantity one with another InfiniBand channel adapter between the synchronous device of communicating by letter again.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02008692.2 | 2002-04-18 | ||
EP02008692 | 2002-04-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN1647466A true CN1647466A (en) | 2005-07-27 |
Family
ID=29225590
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNA03808578XA Pending CN1647466A (en) | 2002-04-18 | 2003-04-04 | A method for providing redundancy for channel adapter failure |
Country Status (5)
Country | Link |
---|---|
JP (1) | JP2005527898A (en) |
KR (1) | KR20050002865A (en) |
CN (1) | CN1647466A (en) |
AU (1) | AU2003226784A1 (en) |
WO (1) | WO2003088594A1 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101360005B (en) * | 2007-05-18 | 2011-05-18 | 辉达公司 | Intelligent failover in a load-balanced network environment |
CN101510142B (en) * | 2008-02-15 | 2011-12-21 | 环旭电子股份有限公司 | Multiple output and input interface system of storage apparatus and communication method |
CN103312564A (en) * | 2013-06-24 | 2013-09-18 | 曙光信息产业(北京)有限公司 | InfiniBand network detection method |
CN107547260A (en) * | 2017-07-24 | 2018-01-05 | 杭州沃趣科技股份有限公司 | A kind of method that length is repaired away from the switching of infiniband link detectings |
CN107592361A (en) * | 2017-09-20 | 2018-01-16 | 郑州云海信息技术有限公司 | A kind of data transmission method based on double IB networks, device, equipment |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006343822A (en) * | 2005-06-07 | 2006-12-21 | Fujitsu Ltd | Library device |
CN102566944B (en) * | 2011-12-31 | 2015-09-02 | 曙光信息产业股份有限公司 | Store path redundancy approach |
US10230794B2 (en) | 2013-03-15 | 2019-03-12 | Oracle International Corporation | System and method for efficient virtualization in lossless interconnection networks |
US9990221B2 (en) | 2013-03-15 | 2018-06-05 | Oracle International Corporation | System and method for providing an infiniband SR-IOV vSwitch architecture for a high performance cloud computing environment |
US10397105B2 (en) | 2014-03-26 | 2019-08-27 | Oracle International Corporation | System and method for scalable multi-homed routing for vSwitch based HCA virtualization |
CN107451092A (en) * | 2017-08-09 | 2017-12-08 | 郑州云海信息技术有限公司 | A kind of data transmission system based on IB networks |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5835696A (en) * | 1995-11-22 | 1998-11-10 | Lucent Technologies Inc. | Data router backup feature |
US5963540A (en) * | 1997-12-19 | 1999-10-05 | Holontech Corporation | Router pooling in a network flowswitch |
US6195705B1 (en) * | 1998-06-30 | 2001-02-27 | Cisco Technology, Inc. | Mobile IP mobility agent standby protocol |
US6295276B1 (en) * | 1999-12-31 | 2001-09-25 | Ragula Systems | Combining routers to increase concurrency and redundancy in external network access |
US20010048661A1 (en) * | 2000-05-24 | 2001-12-06 | David Clear | Method and apparatus for multi-protocol redundant router protocol support |
-
2003
- 2003-04-04 WO PCT/EP2003/003530 patent/WO2003088594A1/en not_active Application Discontinuation
- 2003-04-04 AU AU2003226784A patent/AU2003226784A1/en not_active Abandoned
- 2003-04-04 JP JP2003585378A patent/JP2005527898A/en not_active Withdrawn
- 2003-04-04 KR KR10-2004-7014653A patent/KR20050002865A/en not_active Application Discontinuation
- 2003-04-04 CN CNA03808578XA patent/CN1647466A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101360005B (en) * | 2007-05-18 | 2011-05-18 | 辉达公司 | Intelligent failover in a load-balanced network environment |
CN101510142B (en) * | 2008-02-15 | 2011-12-21 | 环旭电子股份有限公司 | Multiple output and input interface system of storage apparatus and communication method |
CN103312564A (en) * | 2013-06-24 | 2013-09-18 | 曙光信息产业(北京)有限公司 | InfiniBand network detection method |
CN103312564B (en) * | 2013-06-24 | 2016-07-06 | 曙光信息产业(北京)有限公司 | InfiniBand network detecting method |
CN107547260A (en) * | 2017-07-24 | 2018-01-05 | 杭州沃趣科技股份有限公司 | A kind of method that length is repaired away from the switching of infiniband link detectings |
CN107547260B (en) * | 2017-07-24 | 2020-12-22 | 杭州沃趣科技股份有限公司 | Long-distance infiniband link detection, switching and repair method |
CN107592361A (en) * | 2017-09-20 | 2018-01-16 | 郑州云海信息技术有限公司 | A kind of data transmission method based on double IB networks, device, equipment |
CN107592361B (en) * | 2017-09-20 | 2020-05-29 | 郑州云海信息技术有限公司 | Data transmission method, device and equipment based on dual IB network |
Also Published As
Publication number | Publication date |
---|---|
KR20050002865A (en) | 2005-01-10 |
WO2003088594A1 (en) | 2003-10-23 |
AU2003226784A1 (en) | 2003-10-27 |
JP2005527898A (en) | 2005-09-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11855881B2 (en) | System and method for facilitating efficient packet forwarding using a message state table in a network interface controller (NIC) | |
US6493343B1 (en) | System and method for implementing multi-pathing data transfers in a system area network | |
US6941396B1 (en) | Storage controller redundancy using bi-directional reflective memory channel | |
US8099521B2 (en) | Network interface card for use in parallel computing systems | |
US6545981B1 (en) | System and method for implementing error detection and recovery in a system area network | |
US8537828B2 (en) | Scalable interface for connecting multiple computer systems which performs parallel MPI header matching | |
CN109936510A (en) | Multipath RDMA transmission | |
CN1195813A (en) | System of reporting errors by hardward element of distributed computer system | |
CN1881945A (en) | Improved distributed kernel operating system | |
CN1647466A (en) | A method for providing redundancy for channel adapter failure | |
CN103618673A (en) | NoC routing method guaranteeing service quality | |
CN108631947B (en) | RDMA (remote direct memory Access) network data transmission method based on erasure codes | |
CN1881944A (en) | Improved distributed kernel operating system | |
US6898638B2 (en) | Method and apparatus for grouping data for transfer according to recipient buffer size | |
US7814182B2 (en) | Ethernet virtualization using automatic self-configuration of logic | |
US20230385138A1 (en) | Chip-to-chip interconnect with a layered communication architecture | |
CN1801769A (en) | Data transmitting method | |
JPH01194547A (en) | Multiplex communication control device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |