CN1647398B - System and method for symbol clock recovery - Google Patents

System and method for symbol clock recovery Download PDF

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Publication number
CN1647398B
CN1647398B CN038076292A CN03807629A CN1647398B CN 1647398 B CN1647398 B CN 1647398B CN 038076292 A CN038076292 A CN 038076292A CN 03807629 A CN03807629 A CN 03807629A CN 1647398 B CN1647398 B CN 1647398B
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China
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sequence
intermediate sequence
intermediate
obtain
frequency
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CN038076292A
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Chinese (zh)
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CN1647398A (en
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J·夏
R·W·茨塔
S·M·罗普雷斯托
W·张
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麦克罗纳斯半导体公司
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Priority to US37032602P priority Critical
Priority to US60/370,326 priority
Priority to US10/407,634 priority patent/US20030235259A1/en
Priority to US10/407,634 priority
Application filed by 麦克罗纳斯半导体公司 filed Critical 麦克罗纳斯半导体公司
Priority to PCT/US2003/010587 priority patent/WO2003088512A1/en
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Publication of CN1647398B publication Critical patent/CN1647398B/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry
    • H04N5/455Demodulation-circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H04L7/0278Band edge detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry
    • H04N5/4401Receiver circuitry for the reception of a digital modulated video signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/02Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
    • H04L27/06Demodulator circuits; Receiver circuits
    • H04L27/063Superheterodyne receivers

Abstract

A system (300) and method for symbol clock recovery independent of segment location recovery uses the frequency and phase information in the upper and lower band edges of a signal to generate a signal(399) for correcting the symbol clock. A particular combination of raised-root cosine filters (320, 330), low-pass filters (348, 368, 397), multipliers (302, 304, 322, 324, 332, 334, 380, 390), and adders (340, 350, 360, 370, 395) effectively uses the tails (d) of a received signal (200) in the frequency domain to correct phase errors.

Description

用于符号时钟恢复的系统和方法 System and method for symbol clock recovery

[0001] 对相关申请的参考 [0001] REFERENCE TO RELATED APPLICATIONS

[0002] 要求提交于2002年4月5日的共同未决的US临时专利申请60/370, 326以及专利号未知的提交于2003年4月4日的US实用新型专利申请的优先权。 [0002] US provisional patent claims priority to co-pending April 5, 2002 Application 60/370, 326, and an unknown number of patents filed April 4, 2003 of US utility patent application priority.

技术领域 FIELD

[0003] 本发明涉及用于解调接收的信号的方法和用于处理接收的信号的系统。 [0003] The present invention relates to a system for demodulating a received signal and a method for processing a received signal. 背景技术 Background technique

[0004] 在传统上,本地通信是通过线路进行的,因为这提供了一种确保对信息的可靠传 [0004] Traditionally, local communication is performed by line, as this provides a reliable transfer of information to ensure

递的成本有效的方式。 Delivery of cost-effective manner. 对于长距离通信,需要通过无线电波传输信息。 For long distance communication, it is necessary to transmit information via radio waves. 尽管从硬件的立场 Although from a hardware standpoint

来看这是方便的,但射频(RF)传输给其带来了涉及损坏信息的问题,并且常常依赖于高功 View, it is convenient, but a radio frequency (RF) transmission to which brought the issue relates to the damage information, and often rely on a high work

率发射器来克服天气条件、大的建筑物以及来自其它电磁辐射源的干扰。 Emissivity is to overcome weather conditions, large buildings and other interference from electromagnetic radiation source.

[0005] 所开发的各种调制技术提供了有关成本效力和所接收信号的质量的不同解决方 [0005] Various modulation techniques are developed to provide a cost effective and relevant solutions of different quality of the received signal

案,但直到近期,它们仍主要是模拟的。 Case, but until recently, they are still mostly analog. 频率调制和相位调制提供了对噪声的某种免疫力, Frequency and phase modulation provides some immunity to noise,

而振幅调制较为容易被解调。 And amplitude modulation is easier to be demodulated. 然而,更近些时候,随着低成本微控制器的出现和国内移动电 However, more recently, with the advent of low-cost microcontroller and domestic mobile

话和卫星通信的引入,数字调制已在普及性上取得进展。 And then the introduction of satellite communications, digital modulation has been progress on popularity. 借助数字调制技术,出现了传统微 By means of digital modulation techniques, there has been a conventional micro

处理器电路具有的优于其模拟对等形式的全部优点。 A processor circuit having all of its advantages over other forms of simulation. 通信链路上的问题可通过使用软件来 Problems on a communication link may be used by software

克服。 get over. 信息可被加密,误差校正可确保所接收的数据中较多的置信度,并且数字信号处理的 Information may be encrypted, to ensure that the error correction data received in more confidence, and the digital signal processing

使用可减小被分配给每个服务的有限带宽。 Can be reduced using the limited bandwidth is allocated to each service.

[0006] 与传统模拟系统一样,数字调制可使用具有不同优点的振幅、频率或相位调制。 [0006] As with the traditional analog systems, digital modulation using amplitude, frequency or phase modulation having different advantages. 由于频率和相位调制技术提供了对噪声的更多的免疫力,它们对于现今使用中的大多数服务是优选的。 Since the frequency and phase modulation techniques provide more immunity to noise, which are used today for most services are preferred.

[0007] 传统模拟频率调制的简单变化可通过将数字信号施加于调制输入来实施。 [0007] simple change in the conventional analog frequency modulation may be digital modulation input signal is applied to be implemented by. 这样, 其输出采取两个不同频率的正弦波的形式。 Thus, the output of which takes the form of two sine waves of different frequencies. 为解调该波形,仅仅需要将信号传递经过两个滤波器并将结果变换回逻辑电平。 The demodulation waveform is only necessary to transmit signals through the two filters and the result is transformed back to a logic level. 在传统上,数字频率调制的这种形式被称为频移键控。 Traditionally, this form is called a digital frequency modulated frequency shift keying. [0008] 数字相位调制或相位调制键控在频谱上与频率调制很相似。 [0008] The digital phase shift keying or phase modulation in the frequency modulation spectrum is very similar. 它包含改变所发送的波形的相位而不是频率,这些有限相位变化表示数字数据。 It contains the transmitted phase changes rather than frequency of the waveform, the digital data representing the limited phase changes. 以其最简单的形式,相位调制的波形可通过使用数字数据在等频率但相反相位的两个信号之间切换而产生。 In its simplest form, phase modulation waveform may be generated by using digital data signals and the like between the two switching frequencies but opposite phases. 如果结果波形被乘以等频率的正弦波,则两个分量被产生:一个加倍所接收频率的余弦波形和一个振幅与相移的余弦成比例的频率无关项。 If the result is multiplied by the sine wave frequency and the like, the two components are produced: a cosine waveform of the received frequency doubled amplitude and a frequency independent term and a phase shift proportional to the cosine. 这样,滤出较高频率项得到了原始的数字数据。 Thus, the higher frequency terms filtered off to give the original digital data. [0009] 使相移键控的以上概念更进一步,可能相位的数量可被扩大到二以上。 [0009] The above phase shift keying concept further, the number of possible phases may be extended to two or more. 所发送的"载波"可经历任何数量的相位中的变化,并且将所接收的信号乘以等频率的正弦波将把相移解调成频率无关的电压电平。 Transmitted "carrier" may undergo a phase change in any number, and the like sine wave frequency signal by the received phase shift will be demodulated into a voltage level of the frequency-independent.

[0010] 该技术的实例是四相移键控(QPSK)。 [0010] Examples of this technique is quadrature phase shift keying (QPSK). 借助四相移键控,载波在四个相位中变化,并且可由此表示每个相位变化的四个值的任何一个。 By quadrature phase shift keying, changes in the four phase carrier, and can thus represent any one of four values ​​for each phase change. 尽管这可能看起来最初是无意义的,但它提供了这样一种调制方案:使载波能每符号发送二位信息而不是一位,由此有效地加倍载波的数据带宽。 While this may initially seem insignificant, but it provides a modulation scheme: that the carrier can be sent per symbol, rather than one two information, thereby effectively doubling the data bandwidth carrier.

[OO11] 相位调制的信号如何被解调并因此QPSK如何被解调的数学证明在以下被示出欧拉关系式如下表征正弦和余弦波: [OO11] how the phase-modulated signal is demodulated and the demodulated QPSK therefore how mathematical proofs are shown in the following relational expression of Euler sine and cosine waves characterized as follows:

[0012][0013][0014] [0012] [0013] [0014]

[0015]<formula>formula see original document page 4</formula> [0015] <formula> formula see original document page 4 </ formula>

其中j-Vry。 Wherein the j-Vry. 这样,对相同频率和相位的两个正弦波的乘法由以下给出<formula>formula see original document page 4</formula>[oo16] 数字接收器通过混合进入的正弦曲线信号与振荡器输出来实施该运算。 Thus, the multiplication of two sine waves of the same frequency and phase is given by <formula> formula see original document page 4 </ formula> [oo16] mixed into the digital receiver and the sinusoidal signal outputted by the oscillator embodiment the operations. 如以上方程所示,其结果是一个正弦曲线输出,具有输入的二倍的频率和输入的一半的振幅,被叠加 As shown in the above equation, the result is a sinusoidal output having a frequency of one half and twice the amplitude of the input of the input that is added

于输入振幅的一半的DC偏差上。 Half of the input DC offset amplitude.

[0017] 类似地,将sin("t)乘以cos("t)得到: [0017] Similarly, the sin ( "t) is multiplied by cos (" t) to give:

[0018] sin必fx cos Of = [0018] sin will fx cos Of =

勺' Spoon'

[0019][0020][0021] [0019] [0020] [0021]

频率的」 Frequency "

其结果是具有输入的二倍的频率的输出正弦曲线,而没有DC偏差。 As a result, a sinusoidal output having twice the frequency of the input curve without DC offset. 可以看出,将余弦波乘以任何经相移的正弦波得到"经解调的"波形,其具有输入:倍的输出频率,其DC偏差根据相移小来变化: As can be seen, any multiplied by the cosine wave phase shifted sinusoidal wave obtained "demodulated" waveform, which has an input: output frequency times, which vary according to a small DC offset phase shift:

[0022]<formula>formula see original document page 4</formula>[0027] 这样,被施加了变化的相移的载波可通过将载波乘以来自本地振荡器的正弦曲线输出并滤出高频分量而解调成变化的输出电压。 [0022] <formula> formula see original document page 4 </ formula> [0027] Thus, the change is applied to the carrier phase shift can be obtained by multiplying the carrier wave from the local oscillator and the output of the sinusoidal high frequency component filtered off demodulated into a change in output voltage. 不幸的是,相移检测被局限于两个象限;的相移不能被区分于-Ji/2的相移。 Unfortunately, the phase shift detector is limited to two quadrants; phase shift can not be distinguished in the phase -Ji / 2 shift. 因此,为精确地解码存在于所有四个象限中的相移,输入信号需要被乘以正弦曲线和余弦曲线波形两者,高频被滤出,并且数据被重构。 Thus, relative to accurately decode present in all four quadrants of the shift, the input signal needs to be multiplied by both the sine curve and a cosine curve waveform, the high frequency is filtered out, and the data is reconstructed. 将以上方程展开: The above equation with:

[0028] <formula>formula see original document page 4</formula>[0030] <formula>formula see original document page 5</formula> [0028] <formula> formula see original document page 4 </ formula> [0030] <formula> formula see original document page 5 </ formula>

[0031] 然而,从载波中去除数据并不是对混合器的输出进行低通过滤并将四个电压反馈重构成逻辑电平的简单过程。 [0031] However, from the data carrier is not removed by low-pass filtering the output of the mixer and four simple feedback voltage during reconstitution logic level. 在实际中,使接收器处的本地振荡器与进入的信号完全同步是不容易的。 In practice the local oscillator and the incoming signal at the receiver is not easy to completely synchronized. 如果本地振荡器在相位上与进入的信号不同,相矢量图上的信号将经历等于相位差的大小的相位旋转。 If the local oscillator is in phase with the incoming signal different from the phasor signals will experience a phase rotation equal to the phase difference magnitude. 而且,如果本地振荡器的相位和频率相对于进入的信号不是固定的,则将有相矢量图上的连续旋转。 Further, if the phase and frequency of the local oscillator with respect to the incoming signal is not fixed, there will be a continuous rotation of the phasor. 因此,前端解调器的输出一般被馈送到模-数(A/D) 转换器中,并且从本地振荡器的相位或频率上的误差而导致的任何旋转在数字信号处理中被去除。 Thus, the output of the demodulator front end is generally fed to the analog - digital (A / D) converter, and the rotation from any phase or frequency error in the local oscillator are removed resulting in a digital signal processing.

[0032] 高级电视系统委员会("ATSC")已选择残留边带("VSB")作为用于数字电视("DTV")的传输标准。 [0032] Advanced Television Systems Committee ( "ATSC") has been selected vestigial sideband ( "VSB") as the transmission standard for digital television ( "DTV") of. 在ATSC标准中,8VSB是用于地面广播的标准,而16VSB被用于线缆传输。 In the ATSC standard, a standard for the 8VSB terrestrial broadcast, cable transmission and 16VSB is used. (国际电信联盟("ITU")标准限定五个VSB模式:2、4、8、16和8T)。 (International Telecommunication Union ( "ITU") standard defines five VSB mode: 2,4,8,16 and 8T). [0033] 典型地,8VSB将三个补充信号用于同步化。 [0033] Typically, 8VSB signals for the three supplementary synchronization. 首先,它将低电平RF导频用于载波采集。 First, it pilots for low-level RF carrier acquisition. 第二,如图1中所示,四符号数据段同步每832个符号被使用一次——就是说,每段一次——用于使数据时钟在频率和相位两者上同步。 Second, as shown in Figure 1, each four-symbol data segment sync symbols are used once 832 - that is, each time - for clock synchronization data over both frequency and phase. (典型地,四个符号是被规格化的[l,-l,-l, l])。 (Typically, four symbols is normalized [l, -l, -l, l]). 最后,832符号数据帧同步每313个段被使用一次,用于数据成帧和均衡器训练。 Finally, each 832 symbol data frame synchronization section 313 is used once, and data framing for equalizer training. 数据帧同步亦包括将信号识别为8VSB、16VSB或者其它适当的ITU模式之一的信息。 Data frame synchronization identification signal also includes information as 8VSB, one 16VSB ITU or other suitable mode. [0034] 导频信号具有0. 3dB的功率。 [0034] The pilot signal having 0. 3dB power. 尽管导频恢复典型地是可靠的,它可在某些情况下失败,如强的、近处的、缓慢移动的多路情况。 While the pilot is typically a reliable recovery, it fails in certain circumstances, such as strong, near, multiplex case of slow movement.

[0035] 从段同步信号进行符号时钟恢复是相对慢的,并且依赖于成功的载波恢复和段位置恢复。 [0035] The symbol clock recovery is performed relatively slow segment sync signal, and depends on the success of carrier recovery segment and a recovery position. 此外,尽管一旦载波恢复和段位置恢复被成功地进行,则段同步信号典型地是可靠的,它仍可能在某些情况下失败,包括可能破坏导频信号的多路的种类(或甚至在导频信号尚未受多路的影响的特定实例中)。 Further, although once the carrier recovery and the segment position recovery is performed successfully, the segment sync signal is typically reliable, it may still fail under certain circumstances, including possible damage Multiplexer pilot signal (or even specific examples of the influence of the pilot signal multiplexed by the yet). 由于这种多路在广播数字传输可能理想的城市环境中是相对普通的,解决该问题对数字电视的商业发展和其它数字传输系统的改进是重要的。 Since this is a relatively common multi-channel broadcasting in the digital transmission may be desirable urban environment, improvement of the business development of digital television and other digital transmission systems it is important to solve the problem.

[0036] 因此,需要一种用于符号甚至恢复的新系统和方法,其可从8VSB信号进行符号时钟恢复,即使当段同步信号被完全去除或被严重地改变时,并且独立于载波恢复和段位置恢复。 [0036] Accordingly, novel systems and methods to restore even the need for a symbol for which the symbol clock recovery may be from the 8VSB signal, even when the segment synchronizing signal is completely removed or severely changed, and independent of the carrier recovery and segment recovery position. 本发明尤其被指向满足这些需要。 In particular, the present invention is directed to meeting these needs.

发明内容 SUMMARY

[0037] 为此,本发明提供一种解调接收的信号的方法,包括:接收数字数据流,其包括表示依照符号时钟采样的接收的信号的数据元素St的序列;选择本地频率f ;确定at = [0037] To this end, the present invention provides a method of demodulating a received signal, comprising: receiving a digital data stream, a sequence of data elements comprising St represents the sampling clock signal in accordance with a received symbol; selecting the local frequency F; determining at =

sin (Ji t/4) RRC (stcos (2 ji t/f));确定bt = cos ( ji t/4) RRC (stcos (2 ji t/f));确定ct = cos(Jit/4)RRC(stsin(2Jit/f));确定dt = sin ( ji t/4) RRC(stsin (2 ji t/f));提供第一输出信号vt = bt+dt ;以及提供等于L3 (k (at-ct) (sign (1^ (b「dt))) - (at+ct) (sign (L2 (bt+dt)))) 的第二输出信号;其中RRC是根升余弦滤波器;并且1^丄2和1^是具有预定通带的无限脉冲响应低通滤波器。 sin (Ji t / 4) RRC (stcos (2 ji t / f)); determining bt = cos (ji t / 4) RRC (stcos (2 ji t / f)); determining ct = cos (Jit / 4) RRC (stsin (2Jit / f)); determining dt = sin (ji t / 4) RRC (stsin (2 ji t / f)); providing a first output signal vt = bt + dt; and providing equal L3 (k ( at-ct) (sign (1 ^ (b "dt))) - (at + ct) (sign (L2 (bt + dt)))) a second output signal; wherein the RRC is a root raised cosine filter; and Shang 1 ^ 1 ^ 2 and having a predetermined passband infinite impulse response low pass filter.

[0038] 本发明还提供一种用于处理接收的信号的系统,所述接收的信号具有在0处的期望中心频率、0dB的带宽b。 [0038] The present invention further provides a system for processing a received signal, said received signal having the desired center frequency of 0, the bandwidth of b 0dB. 和-3dB的带宽b3,该系统包括:模-数转换器,其被配置成采样接收的信号;以及数字信号处理装置,用于产生作为具有频率&和fh的接收的信号的频域分量的函数的时钟调节信号,以使(b。/2)_b3 < f丄< _(b。/2),并且(b。/2) < fh < b3_(b。/2)。 And bandwidth b3 -3dB, the system comprising: an analog - digital converter, which is configured to receive signal samples; and a digital signal processing means for generating frequency domain components & fh and the received signal having a frequency clock function adjustment signal, so that (b./2)_b3 <f Shang <_ (b./2), and (b./2) <fh <b3_ (b./2). [0039] 本发明又提供一种解调接收的信号的方法,包括:接收数字数据流,其包括表示依照时钟来采样的接收的信号的数据元素的序列,其中通过时钟调节信号对所述时钟进行频率和/或相位调节;将数据元素的序列乘以目标频率的数字余弦波,并且将结果传递经过第一升根余弦滤波器,以得到第一中间序列;将数据元素的序列乘以目标频率的数字正弦波,并且将结果传递经过第一升根余弦滤波器,以得到第二中间序列;将第一中间序列乘以目标频率四分之一的数字正弦波,以得到第三中间序列;将第一中间序列乘以目标频率四分之一的数字余弦波,以得到第四中间序列;将第二中间序列乘以目标频率四分之一的数字余弦波,以得到第五中间序列;将第二中间序列乘以目标频率四分之一的数字正弦波,以得到第六中间序列;从第三中间序列减去第五 [0039] The present invention further provides a method of demodulating a received signal, comprising: receiving a digital data stream comprising data elements representing a sequence of received signal samples in accordance with the clock, wherein the clock signal to the clock adjustment frequency and / or phase adjustment; the sequence data element multiplied by the cosine wave digital target frequency, and the results are passed through the first liter root cosine filter, to obtain a first intermediate sequence; sequence data element multiplied by the target digital sine wave frequency, and the results are passed through the first liter root cosine filter, to obtain a second intermediate sequence; a first intermediate frequency of one quarter of the target sequence by digital sine wave to obtain a third intermediate sequence ; a first intermediate frequency of one quarter of the target sequence by the digital cosine wave to obtain a fourth intermediate sequence; target sequence by the second intermediate frequency is one quarter of the digital cosine wave to obtain a fifth intermediate sequence ; target sequence by the second intermediate frequency is a quarter of the digital sine wave to obtain sixth intermediate sequence; fifth subtracted from the third intermediate sequence 间序列,以得到第七中间序列;从第四中间序列减去第六中间序列,以得到第八中间序列;作为以下各项的乘积,获得第九中间序列:预定常数k;第七中间序列;和将第八中间序列传递经过无限脉冲响应低通滤波器的结果的符号;相加第三中间序列和第五中间序列,以得到第十中间序列;相加第四中间序列和第六中间序列,以得到第十一中间序列;作为以下各项的乘积,获得第十二中间序列:第十中间序列;和将第十一中间序列传递经过无限脉冲响应低通滤波器的结果的符号;相减第九中间序列和第十二中间序列,以得到第十三中间序列;和作为将第十三中间序列传递经过无限脉冲响应低通滤波器的结果的函数,调节时钟。 Between sequences, to obtain a seventh intermediate sequence; the fourth intermediate sequence minus sixth intermediate sequence to obtain a eighth intermediate sequence; as the product of the following, a ninth intermediate sequence to obtain: a predetermined constant K; seventh intermediate sequence ; and the symbol sequence is transmitted through the eighth intermediate infinite impulse response low pass filter results; intermediate sequence summing third and fifth intermediate sequence to obtain a tenth intermediate sequence; and adding the fourth intermediate sequence sixth intermediate sequence to obtain a sequence of intermediate XI; as the product of the following, a twelfth intermediate sequence to obtain: a tenth intermediate sequence; and a transmission symbol sequence through eleventh intermediate infinite impulse response low pass filter results; subtraction intermediate sequence ninth and twelfth intermediate sequence to obtain a sequence of intermediate XIII; and as a result of passing through the intermediate sequence thirteenth infinite impulse response low pass filter function to adjust the clock.

附图说明 BRIEF DESCRIPTION

[0040] 图1是8VSB数据段的某些特征的图。 [0040] FIG. 1 is a diagram illustrating certain features of an 8VSB data segment.

[0041] 图2是示出典型VSB信号的某些特征的频域图。 [0041] FIG. 2 is a frequency domain diagram illustrating certain features of a typical VSB signal.

[0042] 图3是依照本发明用于载波恢复的电路的方块图。 [0042] FIG. 3 is a block diagram of a circuit for carrier recovery in accordance with the present invention.

具体实施方式 Detailed ways

[0043] 为了促进理解本发明的原理,现在将参照在附图中说明的实施例,并且特定的语言将被用于描述它们。 [0043] In order to facilitate understanding of the principles of the present invention will now be described with reference to the embodiment in the drawings, and specific language will be used to describe the same. 尽管如此,将理解没有由此旨在对本发明范围的限制。 Nevertheless, it will be understood that not intended to thereby limit the scope of the invention. 所说明的设备上的变更和修改以及如在此所说明的本发明原理的进一步应用被预期对本发明所涉及的领域中的技术人员来说将是正常发生的。 Changes and modifications in the illustrated device, and such further applications of the principles of the present invention described herein are expected FIELD The present invention relates to the person skilled in the art would normally occur.

[0044] 依照本发明的符号时钟恢复系统提供了强有力的恢复,即使是在由于多路干扰而造成的幻象常见的城市环境中。 [0044] provides a strong recovery in accordance with the symbol clock recovery system of the present invention, even in phantom common urban environment due to multipath interference caused by the. 现有技术系统通常已使用了用于时钟恢复的段同步信号。 Prior art systems have typically been used for the segment synchronization signal clock recovery. 本发明的符号时钟恢复使用信号的带边缘,因此它独立于段同步,从而使它比从现有技术系统的时钟段同步进行的恢复快且强有力。 Symbol clock recovery according to the present invention used with an edge signal, so that it is independent of the synchronization segment, so that it is faster than the recovery from the clock synchronization section prior art systems and strong. 此外,由于符号时钟恢复独立于段同步,它可在解调过程中的较早时被完成,这又可提高调制其它部分的性能。 Further, since the symbol synchronization with the independent clock recovery section, which can be completed earlier in the demodulation process, which may enhance the properties of other parts of the modulation.

[0045] 图2示出了以100概括示出的VSB信号的谱的某些特征。 [0045] Figure 2 illustrates certain features of the spectrum shown generally at 100 VSB signal. 在该实例中,信号200 的主要部分210是5. 38MHz宽,包括3dB衰减的部分210内的未衰减的部分205。 In this example, the signal 200 is the main portion 210 5. 38MHz wide, including the non-attenuated 3dB attenuation in portion 210 portion 205. 然而,振幅在主频域以外不被完全抑制。 However, the amplitude is not suppressed completely outside the frequency domain. 在该实例中,一个基本信号存在于信号的主要部分210以上和以下另外的O. 31MHz处,该满带以215来指示。 Main 210 above and below at the further O. 31MHz in this example, a base signal is present in the signal section, the belt 215 is full is indicated. 这些"带边缘"可被用于载波恢复,如以下所讨论的。 These "band edge" may be used for carrier recovery, as discussed below. [0046] 图3是以300概括示出的依照本发明的电路的方块图。 [0046] FIG. 3 is a block diagram 300 summarizes the circuit according to the invention is illustrated. 信号从优选地以符号速率的两倍来运行的A/D转换器(未示出)在301处被输入给电路300。 Preferably the signal at twice the symbol rate to run the A / D converter (not shown) is input to the circuit 300 at 301. 将理解,以符号速率的两倍来采样足以满足Nyquist条件。 It will be appreciated, at twice the symbol rate to satisfy the Nyquist sampling condition is sufficient. 该上游A/D转换器可以以符号速率的大于两倍来 The upstream A / D converter may be greater than twice the symbol rate

采样其输入信号,但在该点以上硬件频率的增加导致硬件成本的增加而没有性能的对应增加。 Sampling the input signal, but increases above this frequency increases the hardware point hardware cost without a corresponding increase in performance. 电路300包括数控振荡器("DC0")310,其产生两个信号:sin("n)和cos("n),其中"n"是符号计数并且"=2Ji/f。第一乘法器302将输入信号乘以cos("n)信号,并且第二乘法器304将输入信号乘以sin("n)信号。来自第一和第二乘法器302和304的输出然后被分别传递经过第一和第二根升余弦("RRC")滤波器320和330。第一RRC滤波器320的输出在第三乘法器322处被乘以sin( Ji n/4),并且在第四乘法器324处被乘以cos( Ji n/4)。第二RRC滤波器330的输出类似地在第五乘法器332处被乘以sin( ji n/4), 并且在第六乘法器334处被乘以cos (Ji n/4)。 Circuit 300 includes a numerically controlled oscillator ( "DC0") 310, which generates two signals:. Sin ( "n) and cos (" n), where "n" is counted and the symbol "= 2Ji / f first multiplier 302 the input signal by cos ( "n) signal, and a second multiplier 304 multiplying the input signal sin (" n) signal output from the first and second multipliers 302 and 304, respectively, are then passed through a first and a second root raised cosine ( "RRC") filters 320 and 330. the output of the first RRC filter 320 is multiplied in a third multiplier 322 sin (Ji n / 4), and a fourth multiplier 324 is multiplied by the cos (Ji n / 4). the second output of the RRC filter 330 similarly to the fifth multiplier 332 is multiplied by sin (ji n / 4), and is multiplied at a sixth multiplier 334 in cos (Ji n / 4).

[0047] 第六乘法器334的输出由第一累加器340从第三乘法器322的输出减去并且由第三累加器360加给第三乘法器322的输出。 [0047] The output of the sixth multiplier 334 by the first accumulator 340 is subtracted from the output of the third multiplier 322 and the third accumulator 360 is output to the third multiplier 322 is added. 第五乘法器332的输出由第二累加器350从来自第四乘法器324的输出并且由第四累加器370加给第四乘法器324的输出。 Fifth multiplier 332 by the output of the second accumulator 350 from the output from the fourth multiplier 324 by the fourth accumulator 370 and added to the output of the fourth multiplier 324. 第二累加器350的输出被传递经过第一低通无限脉冲响应("IIR")滤波器348,其优选地在大约70kHz 处具有_3dB的衰减以滤出带边缘以上的高频分量。 The output of the second accumulator 350 is transmitted through the first low-pass infinite impulse response ( "IIR") filter 348, which is preferably at about 70kHz _3dB attenuation in high frequency component to filter out at least the belt edge.

[0048] IIR滤波器348的输出经过第一限制器346。 Output [0048] IIR filter 348 through the first restrictor 346. 第一限制器346指定值1给任何正输入,并且指定值-l给任何负输入。 Limiter 346 first predetermined value to a positive input of any, and any specified value to a negative input -l. (本领域的技术人员将认识到这是作为sign()函数)。 (Those skilled in the art will recognize that this is a sign () function). 第一限制器346的输出使用第七乘法器380来乘以第一累加器340的输出。 Using the output of the first limiter 346 seventh multiplier 380 by the output of the first accumulator 340. 本领域的技术人员将理解,第七乘法器380的输出已被乘以两个RCC滤波器,因此信号在整体上已被有效地乘以平升余弦滤波器。 Those skilled in the art will appreciate that the output of the seventh multiplier 380 is multiplied by two has RCC filters, the signal on the whole has been effectively multiplied by a flat raised cosine filter. 这样,第七乘法器380的输出表示从下带边缘获得的频率和相位校正信息。 Thus, the output of the seventh multiplier 380 represents the frequency and the phase obtained from the lower band edge correction information.

[0049] 第四累加器370的输出被传递经过第二低通IIR滤波器368,其优选地在70kHz处具有_3dB的衰减以滤出带边缘以上的高频分量。 [0049] The output of the fourth accumulator 370 is transmitted through the second low-pass IIR filter 368, which preferably has an attenuation of at 70kHz _3dB to filter out high frequency components above the band edge. 第二低通IIR滤波器368的输出经过第二限制器366。 Output of the second low-pass IIR filter 368 passes through the second restrictor 366. 象第一限制器346那样,第二限制器366指定值1给任何正输入,并且指定值-1给任何负输入。 Like the first restrictor 346 as the specified value of the second limiter 366 to any of n-1 input, and a value of -1 to specify any negative input. 第二限制器的输出使用第八乘法器390来乘以第三累加器360的输出。 The second output of the limiter using the eighth multiplier 390 by the output of the third accumulator 360. 将理解,来自第八乘法器390的输出表示从上带边缘获得的频率和相位校正信息。 It will be appreciated, the output from the eighth multiplier 390 represents the frequency and phase correction information obtained from the band edge. [0050] 第七乘法器380的输出然后使用第九乘法器385来乘以加权因子"r"。 Output [0050] The seventh multiplier 380, ninth multiplier 385 is then used by a weighting factor "r". 第八乘法器390的输出使用第五累加器395从第九乘法器385的输出中减去。 Eighth multiplier 390 using the output of the accumulator 395 is subtracted from the output of the fifth multiplier 385 in the ninth. 第五累加器395的输出然后被传递经过第三低通IIR滤波器397以产生符号时钟调节信号399,其然后被返回到符号时钟以完成反馈回路。 The output of the fifth accumulator 395 is then passed through the third low-pass IIR filter 397 to generate a symbol clock adjusting signal 399, which is then returned to the symbol clock to complete the feedback loop.

[0051] 本领域的技术人员将认识到,VSB信号的下带边缘包含导频信号。 [0051] Those skilled in the art will recognize, with the edges of the VSB signal contains the pilot signal. 这是加权因子由第九乘法器385来施加的原因。 This is why the ninth multiplier 385 by a weighting factor to be applied. 典型地,当k是大约0. 3时,上和下带边缘贡献将被适当地平衡。 Typically, when k is about 0.3, it will be properly balanced contribution to the upper and lower band edges.

[0052] 将进一步理解,由于来自低带边缘的频率和相位信息被包含在第九乘法器385的输出中,并且来自上带边缘的频率和相位信息被包含在第八乘法器390的输出中,因此当上和下带边缘被平衡时,第五累加器的输出被驱动到零,从而使第三低通1IR滤波器397的输出可被用于完成提供符号时钟恢复的反馈环路。 [0052] will be further appreciated that, since the frequency and phase information from the low band edge is included in the output of the ninth multiplier 385, and the frequency and phase information from the upper band edge is included in the output of the eighth multiplier 390 Therefore, when the upper and lower band edges are balanced, fifth accumulator output is driven to zero, so that the third low-pass filter output 1IR 397 may be used to complete the feedback loop to provide the recovered symbol clock.

[0053] 本发明实施上的变化将被本领域的技术人员想起。 [0053] The change in the embodiment of the present invention will be remembered skilled in the art. 例如,信号的产生和计算的一些或全部可由特定用途或通用集成电路,或由离散部件,或者以软件来进行。 For example, some or all of the integrated circuit by a special purpose or general purpose computing and generating a signal, or, in software or by discrete components.

[0054] 尽管本发明已被详细说明和描述于附图和以上描述中,它们应被理解成在性质上 [0054] While the invention has been illustrated and described in detail in the drawings and foregoing description, they should be understood to be in the nature

是说明性的而不是局限性的,应理解仅优选实施例已被示出和描述,并且属于本发明精神 Is illustrative and not limitation, it should be understood that only the preferred embodiments have been shown and embodiments described, within the spirit of the present invention, and

范围内的所有变化和修改需要受到保护。 All changes and modifications within the scope needs to be protected.

Claims (3)

  1. 一种解调接收的信号的方法,包括:接收数字数据流,其包括表示依照符号时钟采样的接收的信号的数据元素st的序列;选择本地频率f;确定at=sin(πt/4)RRC(stcos(2πt/f));确定bt=cos(πt/4)RRC(stcos(2πt/f));确定ct=cos(πt/4)RRC(stsin(2πt/f));确定dt=sin(πt/4)RRC(stsin(2πt/f));提供第一输出信号vt=bt+dt;以及提供等于L3(k(at-ct)(sign(L1(bt-dt)))-(at+ct)(sign(L2(bt+dt))))的第二输出信号;其中RRC是根升余弦滤波器;并且L1、L2和L3是具有自己的通带的无限脉冲响应低通滤波器。 A signal receiving method of demodulation, comprising: receiving a digital data stream comprising a sequence of data elements st signal received in accordance with the symbol clock sample; selected local frequency F; determining at = sin (πt / 4) RRC (stcos (2πt / f)); determining bt = cos (πt / 4) RRC (stcos (2πt / f)); determining ct = cos (πt / 4) RRC (stsin (2πt / f)); determining dt = sin (πt / 4) RRC (stsin (2πt / f)); providing a first output signal vt = bt + dt; and providing equal L3 (k (at-ct) (sign (L1 (bt-dt))) - (at + ct) (sign (L2 (bt + dt)))) a second output signal; wherein the RRC is a root raised cosine filter; and L1, L2 and L3 are having their infinite impulse response low pass passband filter.
  2. 2. 权利要求l的方法,进一步包括响应第二输出信号而调节符号时钟。 L 2. The method of claim, further comprising adjusting the second output signal in response to a symbol clock.
  3. 3. —种解调接收的信号的方法,包括:接收数字数据流,其包括表示依照时钟来采样的接收的信号的数据元素的序列,其中通过时钟调节信号对所述时钟进行频率和/或相位调节;将数据元素的序列乘以目标频率的数字余弦波,并且将结果传递经过第一升根余弦滤波器,以得到第一中间序列;将数据元素的序列乘以目标频率的数字正弦波,并且将结果传递经过第一升根余弦滤波器,以得到第二中间序列;将第一中间序列乘以目标频率四分之一的数字正弦波,以得到第三中间序列将第一中间序列乘以目标频率四分之一的数字余弦波,以得到第四中间序列将第二中间序列乘以目标频率四分之一的数字余弦波,以得到第五中间序列将第二中间序列乘以目标频率四分之一的数字正弦波,以得到第六中间序列从第三中间序列减去第五中间序列,以得到第七中间 3. - The method of demodulating the received signal species, comprising: receiving a digital data stream comprising data elements representing a sequence of received signal samples in accordance with the clock, wherein the clock signal for adjusting the clock frequency and / or phase adjustment; sequence data element multiplied by the cosine wave digital target frequency, and the results are passed through the first liter root cosine filter, to obtain a first intermediate sequence; the target sequence data element multiplied by the digital sine wave frequency , and the results are passed through the first liter root cosine filter, to obtain a second intermediate sequence; a first intermediate frequency of one quarter of the target sequence by digital sine wave, a third intermediate sequence to obtain a first intermediate sequence target frequency by multiplying a quarter of the digital cosine wave, the fourth intermediate sequence to obtain a second intermediate frequency of the target sequence by one quarter of a digital cosine wave, the fifth intermediate sequence to obtain a second intermediate sequence by digital sine wave frequency of one quarter of the target, to give the sixth intermediate sequence from the third intermediate sequence minus fifth intermediate sequence to obtain a seventh intermediate 序列;从第四中间序列减去第六中间序列,以得到第八中间序列;作为以下各项的乘积,获得第九中间序列:预定常数k ;第七中间序列;禾口将第八中间序列传递经过无限脉冲响应低通滤波器的结果的符号;相加第三中间序列和第五中间序列,以得到第十中间序列;相加第四中间序列和第六中间序列,以得到第十一中间序列;作为以下各项的乘积,获得第十二中间序列:第十中间序列;禾口将第十一中间序列传递经过无限脉冲响应低通滤波器的结果的符号;获得所述第九中间序列和所述第十二中间序列的差以得到第十三中间序列;禾口作为将第十三中间序列传递经过无限脉冲响应低通滤波器的结果的函数,调节时钟: Sequence; the fourth intermediate sequence minus sixth intermediate sequence to obtain a eighth intermediate sequence; as the product of the following, a ninth intermediate sequence to obtain: a predetermined constant K; seventh intermediate sequence; Wo port eighth intermediate sequence results after transmission symbol infinite impulse response low pass filter; adding the third and fifth intermediate sequence intermediate sequence to obtain a tenth intermediate sequence; and adding the fourth intermediate sequence sixth intermediate sequence to obtain an eleventh intermediate sequence; as the product of the following, a twelfth intermediate sequence to obtain: a tenth intermediate sequence; Wo port through the eleventh intermediate sequence transmitted symbol results infinite impulse response low pass filter; obtaining the ninth intermediate a difference sequence and the twelfth intermediate sequence to obtain an intermediate sequence thirteenth; Wo port as a function of the thirteenth pass through the intermediate sequence infinite impulse response lowpass filter result, adjust the clock:
CN038076292A 2002-04-04 2003-04-07 System and method for symbol clock recovery CN1647398B (en)

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US60/370,326 2002-04-05
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US10/407,634 2003-04-04
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KR100611205B1 (en) * 2004-08-26 2006-08-10 삼성전자주식회사 Symbol timing recovery apparatus for vsb type receiver and methods thereof
KR100577703B1 (en) 2004-08-27 2006-05-10 삼성전자주식회사 Carrier recovery apparatus for vsb type receiver and methods thereof

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US6005640A (en) 1996-09-27 1999-12-21 Sarnoff Corporation Multiple modulation format television signal receiver system
US6044083A (en) 1995-10-20 2000-03-28 Zenith Electronics Corporation Synchronous code division multiple access communication system

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US6044083A (en) 1995-10-20 2000-03-28 Zenith Electronics Corporation Synchronous code division multiple access communication system
US6005640A (en) 1996-09-27 1999-12-21 Sarnoff Corporation Multiple modulation format television signal receiver system

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AU2003262124A1 (en) 2003-10-27

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