CN1647398B - System and method for symbol clock recovery - Google Patents

Abstract

A system (300) and method for symbol clock recovery independent of segment location recovery uses the frequency and phase information in the upper and lower band edges of a signal to generate a signal (399) for correcting the symbol clock. A particular combination of raised-root cosine filters (320, 330), low-pass filters (348, 368, 397), multipliers (302, 304, 322, 324, 332, 334, 380, 390), and adders (340, 350, 360, 370, 395) effectively uses the tails (d) of a received signal (200) in the frequency domain to correct phase errors.

Description

The system and method that is used for symbol clock recovery

Reference to related application

Requirement is filed in the priority of the U.S. utility application that is filed on April 4th, 2003 of the common unsettled U.S. temporary patent application 60/370,326 on April 5th, 2002 and patent No. the unknown.

Technical field

The method and being used to that the present invention relates to be used for the signal of demodulate reception is handled the system of the signal of reception.

Background technology

Traditionally, local communication is undertaken by circuit, because this provides a kind of cost effective and efficient manner of guaranteeing the reliable delivery of information.For long haul communication, need by radio wave transmissions information.Although this is easily from the position of hardware, radio frequency (RF) is transferred to it and has brought the problem that relates to damage information, and usually depends on that the high power transmission device overcomes weather condition, big building and from the interference of other electromagnetic radiation source.

The various modulation techniques of being developed provide the different solutions of the quality of relevant cost effectiveness and received signal, but up in the recent period, they are still mainly simulated.Frequency modulation(FM) and phase modulated provide certain immunity to noise, and Modulation and Amplitude Modulation is more or less freely by demodulation.Yet in the time of closer, along with the appearance of low cost microcontroller and the introducing of domestic mobile phone and satellite communication, digital modulation makes progress on popularization.By digital modulation technique, the whole advantages that it simulates reciprocity form of being better than that the conventional microprocessor circuit has have appearred.Problem on the communication link can overcome by using software.Information can be encrypted, more confidence level in the data that error correction can be guaranteed to be received, and the use of Digital Signal Processing can reduce to be assigned to the finite bandwidth of each service.

The same with conventional analog systems, digital modulation can be used amplitude, frequency or the phase modulated with different advantages.Because frequency and phase modulation technique provide the more immunity to noise, they are preferred for the most of services in using now.

The warbled simple change of traditional analog can be implemented by digital signal being put on the modulation input.Like this, the form of the sine wave of two different frequencies is taked in its output.Be this waveform of demodulation, only need the signal transmission is returned logic level through two filters and with conversion as a result.Traditionally, this form of digital frequency modulation is called as frequency shift keying.

Digital phase modulation or phase modulated keying are very similar to frequency modulation(FM) on frequency spectrum.It comprises the phase place rather than the frequency of the waveform that change sends, and these limited phase change are represented numerical data.With its simplest form, the waveform of phase modulated can be by using numerical data in equifrequent but switch between two signals of opposite phase and produce.If waveform is multiplied by equifrequent sine wave as a result, then two components are produced: the proportional frequency-independent item of cosine of cosine waveform that doubles institute's receive frequency and amplitude and phase shift.Like this, leach higher-frequency term and obtained original numerical data.

The above notion that makes phase shift keying further, the quantity of possible phase place can be extended to more than two." carrier wave " that is sent can experience the variation in any amount of phase place, and the signal times that is received will be demodulated the phase shifts into the voltage level of frequency-independent with equifrequent sine wave.

The example of this technology is quadriphase PSK (QPSK).By quadriphase PSK, carrier wave changes in four phase places, and can represent any one of four values of each phase change thus.Although this may seem it is insignificant at first, it provides a kind of like this modulation scheme: make carrier wave can be every symbol send two information rather than one, double the data bandwidth of carrier wave thus effectively.

The signal of phase modulated how by demodulation and therefore QPSK how to be illustrated following by the mathematical proof of demodulation.

Following sign sine of Euler's relational expression and cosine wave:

$\sin \mathrm{\ωt}=\frac{e^{\mathrm{j\ωt}}-e^{-\mathrm{jt}}}{2j}$ $\cos \mathrm{\ωt}=\frac{e^{\mathrm{j\ωt}}+e^{-\mathrm{j\ωt}}}{2}$

Wherein Like this, the multiplication to two sine waves of same frequency and phase place is provided by following:

${\sin }^2\mathrm{\ωt}=\frac{e^{\mathrm{j\ωt}}-e^{-\mathrm{j\ωt}}}{2j}\×\frac{e^{\mathrm{j\ωt}}-e^{-\mathrm{j\ωt}}}{2j}=\frac{e^{2\mathrm{j\ωt}}-{2e}^0+e^{-2\mathrm{j\ωt}}}{-4}=\frac{1}{2}\left(\frac{e^{j\left(2\mathrm{\ω}\right)t}+e^{-j\left(2\mathrm{\ω}\right)t}}{2}\right)+\frac{1}{2}.$

Digit receiver is exported by the sinusoidal signal that is mixed into and oscillator and is implemented this computing.Shown in above equation, consequently sine curve output has half amplitude of two times frequency of input and input, is superimposed on half the DC deviation of input amplitude.

Similarly, sin (ω t) being multiply by cos (ω t) obtains:

$\sin \mathrm{\ωt}\×\cos \mathrm{\ωt}=\frac{e^{2\mathrm{j\ωt}}-e^{-2\mathrm{j\ωt}}}{4j}$

$=\sin 2\mathrm{\ωt}.$

Consequently have the output sine curve of two times frequency of input, and do not have the DC deviation.

As can be seen, cosine wave be multiply by any sine wave through phase shift obtain " through demodulation " waveform, it has two times output frequency of incoming frequency, and its DC deviation changes according to phase shift φ:

$\sin \mathrm{\ωt}\×\sin (\mathrm{\ωt}+\mathrm{\φ})=\frac{e^{\mathrm{j\ωt}}-e^{-\mathrm{j\ωt}}}{2j}\×\frac{e^{j(\mathrm{\ωt}+\mathrm{\φ})}-e^{-j(\mathrm{\ωt}+\mathrm{\φ})}}{2j}$

$=\frac{e^{j(2\mathrm{\ωt}+\mathrm{\φ})}-e^{j(\mathrm{\ωt}-\mathrm{\ωt}-\mathrm{\φ})}{-e}^{j(\mathrm{\ωt}+\mathrm{\φ}-\mathrm{\ωt})}+e^{-j(2\mathrm{\ωt}+\mathrm{\φ})}}{-4}$

$=\frac{\cos (2\mathrm{\ωt}+\mathrm{\φ})}{-2}-\frac{e^{\mathrm{j\φ}}+e^{-\mathrm{j\φ}}}{-4}$

$=\frac{\cos (2\mathrm{\ωt}+\mathrm{\φ})}{-2}+\frac{\cos \mathrm{\φ}}{2}$

$=\frac{\cos \mathrm{\φ}}{2}-\frac{\cos (2\mathrm{\ωt}+\mathrm{\φ})}{2}$

Like this, the output voltage that high fdrequency component is demodulated to variation be exported and be leached to the carrier wave that has been applied in the phase shift that changes can by carrier wave being multiply by from the sine curve of local oscillator.Unfortunately, phase shift detection is limited to two quadrants; The phase shift of pi/2 can not be distinguished over-phase shift of pi/2.Therefore, for decoding accurately is present in phase shift in all four quadrants, input signal need be multiplied by sine curve and cosine curve waveform, and high frequency is filtered off, and data are by reconstruct.Above equation is launched:

$\cos \left(\mathrm{\ωt}\right)\×\sin (\mathrm{\ωt}+\mathrm{\φ})=\frac{e^{\mathrm{j\ωt}}+e^{-\mathrm{j\ωt}}}{2}\×\frac{e^{j(\mathrm{\ωt}+\mathrm{\φ})}+e^{-j(\mathrm{\ωt}+\mathrm{\φ})}}{2j}$

$=\frac{e^{j(2\mathrm{\ωt}+\mathrm{\φ})}-e^{j(-\mathrm{\φ})}+e^{j\left(\mathrm{\φ}\right)}-e^{-j(2\mathrm{\ωt}+\mathrm{\φ})}}{4j}$

$=\frac{\sin (2\mathrm{\ωt}+\mathrm{\φ})}{2}+\frac{\sin \mathrm{\φ}}{2}$

Yet, from carrier wave, remove data and be not the output of blender is carried out low-pass filter and four Voltage Feedback reconstituted the simple procedure of logic level.In practice, making the local oscillator at receiver place and the signal that enters is very difficult fully synchronously.If local oscillator is different with the signal that enters on phase place, the signal on the phasor diagram equals experience the phase place rotation of phase place extent.And, if the phase place of local oscillator and frequency are not fixed with respect to the signal that enters, the continuous rotation on the phasor diagram will be arranged then.Therefore, the output of front end demodulator generally is fed in mould-number (A/D) transducer, and from the phase place of local oscillator or the error on the frequency and any being rotated in the Digital Signal Processing that causes be removed.

Advanced Television Systems Committee (" ATSC ") has selected residual sideband (" VSB ") as the transmission standard that is used for Digital Television (" DTV ").In the ATSC standard, 8VSB is the standard that is used for terrestrial broadcasting, and 16VSB is used to cable transmission.(International Telecommunications Union (" ITU ") standard limits five VSB patterns: 2,4,8,16 and 8T).

Typically, 8VSB is used for synchronization with three supplementary signal.At first, it is used for carrier acquisition with low level RF pilot tone.The second, as shown in fig. 1, synchronous per 832 symbols of four symbol data sections are used once---in other words, every section once---and are used to make data clock synchronous on frequency and phase place.(typically, four symbols are by normalized [1 ,-1 ,-1,1]).At last, per 313 sections of 832 symbol data frame synchronization are used once, are used for data framing and equalizer training.Data-frame sync also comprises the information that signal is identified as one of 8VSB, 16VSB or other suitable ITU pattern.

Pilot signal has the power of 0.3dB.Although it is reliable typically that pilot tone is recovered, it can be failed in some cases, as multichannel situation strong, nearby, that slowly move.

It is slow relatively carrying out symbol clock recovery from segment sync signal, and depends on the carrier wave recovery and the fragment position recovery of success.In addition, although in case carrier wave recovers and fragment position is recovered successfully to be carried out, then segment sync signal is reliable typically, and it still may be failed in some cases, comprises the kind (or even as yet be not subjected in the particular instance of influence of multichannel in pilot signal) of the multichannel that may destroy pilot signal.Because this multichannel is common relatively in the desirable urban environment of broadcast figure transmission possibility, it is important addressing this problem the business development of Digital Television and the improvement of other digital transmission system.

Therefore, need a kind of new system and method that is used for symbol even recovery, it can carry out symbol clock recovery from the 8VSB signal, even when segment sync signal is removed fully or seriously changed, and is independent of carrier wave recovery and fragment position recovery.The present invention is especially directed to satisfy these needs.

Summary of the invention

For this reason, the invention provides a kind of method of signal of demodulate reception, comprising: received digital data stream, it comprises the data element s of expression according to the signal of the reception of symbol clock sampling _tSequence; Select local frequency f; Determine a _t=sin (π t/4) RRC (s _tCos (2 π t/f)); Determine b _t=cos (π t/4) RRC (s _tCos (2 π t/f)); Determine c _t=cos (π t/4) RRC (s _tSin (2 π t/f)); Determine d _t=sin (π t/4) RRC (s _tSin (2 π t/f)); The first output signal v is provided _t=b _t+ d _tAnd provide and equal L ₃(k (a _t-c _t) (sign (L ₁(b _t-d _t)))-(a _t+ c _t) (sign (L ₂(b _t+ d _t)))) second output signal; Wherein RRC is a root raised cosine filter; And L ₁, L ₂And L ₃It is infinite impulse response low pass filter with predetermined pass band.

The present invention also provides a kind of system that is used to handle the signal of reception, and the signal of described reception has the expectation centre frequency at 0 place, the bandwidth b of 0dB ₀Bandwidth b with-3dB ₃, this system comprises: analog-digital converter, the signal that it is configured to sample and receives; And digital signal processing device, be used for producing as having frequency f _lAnd f _hThe clock conditioning signal of function of signal frequency-domain component of reception so that (b ₀/ 2)-b ₃＜f _l＜-(b ₀/ 2), and (b ₀/ 2)＜f _h＜b ₃-(b ₀/ 2).

The present invention provides a kind of method of signal of demodulate reception again, comprise: received digital data stream, it comprises the sequence of data element of the signal of the reception that expression is sampled according to clock, wherein by the clock conditioning signal described clock is carried out frequency and/or phase adjusted; The sequence of data element be multiply by the digital cosine wave of target frequency, and with transmission as a result through first liter of root cosine filter, to obtain first intermediate sequence; The sequence of data element be multiply by the digitized sine wave of target frequency, and with transmission as a result through first liter of root cosine filter, to obtain second intermediate sequence; First intermediate sequence be multiply by the digitized sine wave of target frequency 1/4th, to obtain the 3rd intermediate sequence; First intermediate sequence be multiply by the digital cosine wave of target frequency 1/4th, to obtain the 4th intermediate sequence; Second intermediate sequence be multiply by the digital cosine wave of target frequency 1/4th, to obtain the 5th intermediate sequence; Second intermediate sequence be multiply by the digitized sine wave of target frequency 1/4th, to obtain the 6th intermediate sequence; Deduct the 5th intermediate sequence from the 3rd intermediate sequence, to obtain the 7th intermediate sequence; Deduct the 6th intermediate sequence from the 4th intermediate sequence, to obtain the 8th intermediate sequence; As the product of the following, obtain the 9th intermediate sequence: predetermined constant k; The 7th intermediate sequence; With the symbol that the 8th intermediate sequence transmission is passed through the result of infinite impulse response low pass filter; Addition the 3rd intermediate sequence and the 5th intermediate sequence are to obtain the tenth intermediate sequence; Addition the 4th intermediate sequence and the 6th intermediate sequence are to obtain the 11 intermediate sequence; Product as the following obtains the 12 intermediate sequence: the tenth intermediate sequence; With the symbol that the 11 intermediate sequence transmission is passed through the result of infinite impulse response low pass filter; Subtract each other the 9th intermediate sequence and the 12 intermediate sequence, to obtain the 13 intermediate sequence; With the function of conduct, regulate clock with the result of the 13 intermediate sequence transmission process infinite impulse response low pass filter.

Description of drawings

Fig. 1 is the figure of some feature of 8VSB data segment.

Fig. 2 is the frequency domain figure that some feature of typical VSB signal is shown.

Fig. 3 is the calcspar that is used for the circuit of carrier wave recovery according to the present invention.

Embodiment

In order to promote to understand principle of the present invention, now with reference to the embodiment that illustrates in the accompanying drawings, and specific language will be used to describe them.However, will understand and not be intended to limitation of the scope of the invention thus.Change on the illustrated equipment and modification and as described herein the principle of the invention further to use by the technical staff of expection in field involved in the present invention will be normal the generation.

Provide strong recovery according to symbol clock recovery of the present invention system, even in disturb the common urban environment of the mirage that causes owing to multichannel.Prior art systems has been used the segment sync signal that is used for clock recovery usually.Symbol clock recovery of the present invention uses the belt edge of signal, so its section of being independent of is synchronous, thereby makes it faster and strong than the recovery of carrying out synchronously from the clock section of prior art systems.In addition, because the symbol clock recovery section of being independent of is synchronous, it can be in demodulating process is done early the time, and this can improve the performance of modulating other parts again.

Fig. 2 shows some feature with the spectrum of the VSB signal shown in 100 summaries.In this example, the major part 210 of signal 200 is that 5.38MHz is wide, comprises the unbated part 205 in the part 210 of 3dB decay.Yet amplitude is not suppressed in addition fully in the dominant frequency territory.In this example, a baseband signal is present in major part and following other 0.31MHz place more than 210 of signal, and this filled band is indicated with 215.These " belt edge " can be used to carrier wave and recover, as discussed below.

Fig. 3 is with the calcspar according to circuit of the present invention shown in 300 summaries.Signal is transfused to circuit 300 301 from the A/D converter (not shown) that preferably moves with the twice of character rate.To understand, sampling with the twice of character rate is enough to satisfy the Nyquist condition.This upstream A/D converter can with character rate greater than twice its input signal of sampling, but cause the increase of hardware cost and do not have the correspondence of performance to increase in this increase of putting above hardware frequency.Circuit 300 comprises digital controlled oscillator (" DCO ") 310, and it produces two signal: sin (ω n) and cos (ω n), wherein " n " is-symbol counting and ω=2 π/f.First multiplier 302 multiply by cos (ω n) signal with input signal, and second multiplier 304 multiply by sin (ω n) signal with input signal.Transmitted respectively then through first and second root raised cosines (" RRC ") filter 320 and 330 from the output of first and second multipliers 302 and 304.The output of the one RRC filter 320 is multiplied by sin (π n/4) at the 3rd multiplier 322 places, and is multiplied by cos (π n/4) at the 4th multiplier 324 places.Be multiplied by sin (π n/4) at the 5th multiplier 332 places like the output class of the 2nd RRC filter 330, and be multiplied by cos (π n/4) at the 6th multiplier 334 places.

The output of the 6th multiplier 334 is deducted and is added to by the 3rd accumulator 360 output of the 3rd multiplier 322 from the output of the 3rd multiplier 322 by first accumulator 340.The output of the 5th multiplier 332 by second accumulator 350 from from the output of the 4th multiplier 324 and add to the output of the 4th multiplier 324 by the 4th accumulator 370.The output of second accumulator 350 is transmitted through first low-pass infinite impulse response (" IIR ") filter 348, and it preferably has at about 70kHz place-and the decay of 3dB to be to leach the high fdrequency component more than the belt edge.

The output of iir filter 348 is through first limiter 346.First limiter, 346 designated values 1 are given any positive input, and designated value-1 is given any negative input.(person of skill in the art will appreciate that this is as sign () function).The output that the output of first limiter 346 uses the 7th multiplier 380 to multiply by first accumulator 340.The output that it will be apparent to one skilled in the art that the 7th multiplier 380 has been multiplied by two RCC filters, so signal be multiply by flat raised cosine filter on the whole effectively.Like this, the output of the 7th multiplier 380 is represented from the frequency and the phase correction information of belt edge acquisition down.

The output of the 4th accumulator 370 is transmitted through the second low pass iir filter 368, and it preferably has at the 70kHz place-and the decay of 3dB to be to leach the high fdrequency component more than the belt edge.The output of the second low pass iir filter 368 is through second limiter 366.Give any positive input as first limiter, 346, the second limiters, 366 designated values 1, and designated value-1 is given any negative input.The output that the output of second limiter uses the 8th multiplier 390 to multiply by the 3rd accumulator 360.To understand, represent the frequency and the phase correction information that obtain from last belt edge from the output of the 8th multiplier 390.

The output of the 7th multiplier 380 uses the 9th multiplier 385 to multiply by weighted factor " r " then.The output of the 8th multiplier 390 uses the 5th accumulator 395 to deduct from the output of the 9th multiplier 385.The output of the 5th accumulator 395 is transmitted through the 3rd low pass iir filter 397 then to produce symbol clock conditioning signal 399, and it is returned to symbol clock then to finish feedback loop.

Person of skill in the art will appreciate that the following belt edge of VSB signal comprises pilot signal.This is the reason that weighted factor is applied by the 9th multiplier 385.Typically, when k is about 0.3 the time, upper and lower belt edge contribution will be by balance suitably.

Will be further understood that, because frequency and phase information from low belt edge are comprised in the output of the 9th multiplier 385, and frequency and phase information from last belt edge are comprised in the output of the 8th multiplier 390, therefore when upper and lower belt edge is balanced, the output of the 5th accumulator is driven to zero, thereby makes the output of the 3rd low pass iir filter 397 can be used to finish the feedback control loop that symbol clock recovery is provided.

Variation on the invention process will be remembered by those skilled in the art.For example, the generation of signal and some or all of calculating can be by special-purpose or universal integrated circuits, or by discreet component, perhaps carry out with software.

Although the present invention has been described in detail and has been described in accompanying drawing and the above description; they should be understood to be in is illustrative rather than circumscribed in nature; only should understand that preferred embodiment is shown and described, and belong to all changes in the present invention's spirit scope and revise and to be protected.

Claims (3)

1. the method for the signal of a demodulate reception comprises:

Received digital data stream, it comprises the data element s of expression according to the signal of the reception of symbol clock sampling _tSequence;

Select local frequency f;

Determine a _t=sin (π t/4) RRC (s _tCos (2 π t/f));

Determine b _t=cos (π t/4) RRC (s _tCos (2 π t/f));

Determine c _t=cos (π t/4) RRC (s _tSin (2 π t/f));

Determine d _t=sin (π t/4) RRC (s _tSin (2 π t/f));

The first output signal v is provided _t=b _t+ d _tAnd

Provide and equal L ₃(k (a _t-c _t) (sign (L ₁(b _t-d _t)))-(a _t+ c _t) (sign (L ₂(b _t+ d _t)))) second output signal;

Wherein

RRC is a root raised cosine filter; And

L ₁, L ₂And L ₃It is infinite impulse response low pass filter with the passband of oneself.

2. the method for claim 1 further comprises response second output signal and regulates symbol clock.

3. the method for the signal of a demodulate reception comprises:

Received digital data stream, it comprises the sequence of data element of the signal of the reception that expression is sampled according to clock, wherein by the clock conditioning signal described clock is carried out frequency and/or phase adjusted;

The sequence of data element be multiply by the digital cosine wave of target frequency, and with transmission as a result through first liter of root cosine filter, to obtain first intermediate sequence;

The sequence of data element be multiply by the digitized sine wave of target frequency, and with transmission as a result through first liter of root cosine filter, to obtain second intermediate sequence;

First intermediate sequence be multiply by the digitized sine wave of target frequency 1/4th, to obtain the 3rd intermediate sequence;

First intermediate sequence be multiply by the digital cosine wave of target frequency 1/4th, to obtain the 4th intermediate sequence;

Second intermediate sequence be multiply by the digital cosine wave of target frequency 1/4th, to obtain the 5th intermediate sequence;

Second intermediate sequence be multiply by the digitized sine wave of target frequency 1/4th, to obtain the 6th intermediate sequence;

Deduct the 5th intermediate sequence from the 3rd intermediate sequence, to obtain the 7th intermediate sequence;

Deduct the 6th intermediate sequence from the 4th intermediate sequence, to obtain the 8th intermediate sequence;

As the product of the following, obtain the 9th intermediate sequence:

Predetermined constant k;

The 7th intermediate sequence; With

With the symbol of the 8th intermediate sequence transmission through the result of infinite impulse response low pass filter;

Addition the 3rd intermediate sequence and the 5th intermediate sequence are to obtain the tenth intermediate sequence;

Addition the 4th intermediate sequence and the 6th intermediate sequence are to obtain the 11 intermediate sequence;

Product as the following obtains the 12 intermediate sequence:

The tenth intermediate sequence; With

With the symbol of the 11 intermediate sequence transmission through the result of infinite impulse response low pass filter;

The difference that obtains described the 9th intermediate sequence and described the 12 intermediate sequence is to obtain the 13 intermediate sequence; With

As with the function of the 13 intermediate sequence transmission, regulate clock through the result of infinite impulse response low pass filter.

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