CN1641840A - Chip protection device - Google Patents
Chip protection device Download PDFInfo
- Publication number
- CN1641840A CN1641840A CN 200510004464 CN200510004464A CN1641840A CN 1641840 A CN1641840 A CN 1641840A CN 200510004464 CN200510004464 CN 200510004464 CN 200510004464 A CN200510004464 A CN 200510004464A CN 1641840 A CN1641840 A CN 1641840A
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- protection device
- chip protection
- etching solution
- pressure
- wafer
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Abstract
The invention relates to a wafer protection device. It used to prevent the given area of the second surface of the wafer from etching by the etching solution when it is used to etch the first surface. The device comprises that a main body, which is used to pack the given area and prevent it from contacting with the etching solution, and generate a insulation space between the main body and the given area; a pressure adjustment component, which is set in the main body, connected to the insulation space, and used to adjust its pressure; the pressure adjustment component includes that a pipe, which is connected to the etching solution, when the pressure in the insulation space is higher than a given range, the space in it is discharged into the etching solution; when the pressure is lower than a given range, the pipe is imbibed the etching solution; so that the pressure in the insulation space is adjusted.
Description
The application is dividing an application to No. 02102365.4 application for a patent for invention of China.
Technical field
The present invention relates to a kind of chip protection device, and particularly relate to a kind of chip protection device that is applied to MEMS (micro electro mechanical system) (MEMS) etching process.
Background technology
In recent years, semiconductor technology and micro-electromechanical technology have entered the flourish stage.In the micro-electromechanical technology,, be main method usually with the etching mode for the body microfabrication (Bulk micro-machining) of silicon crystal slate; Because etching step is subject to the thickness of substrate, therefore often need for a long time wafer to be placed etching solution.Be the circuit design of protection front wafer surface, avoid circuit to be subjected to etch effects and produce defective, so just carry out etching step at the beginning the time at manufacturing process mostly.Yet, the new problem of related so also initiation.
At first, because etching step needs for a long time wafer to be placed etching solution, after the wafer long body etching of process (Bulk etching), the metallic atom that is comprised in the etching solution will diffuse in the wafer, cause when carrying out the high temperature manufacture craft in the future and will produce the boiler tube pollution problems, on the other hand, because long-time body etching process is perforation or a dark canal of making certain degree on wafer, therefore the etching borehole will cause the reduction of wafer bulk strength unavoidablely, and the related yield that is caused when carrying out follow-up manufacture craft that has influence on reduces.
Employed etching solution in the existing chip body etching process is generally strong basicity etching solutions such as KOH or TMAH.This etching solution all has quite high rate of etch for the silicon nitride that generally is used as the front wafer surface passivation layer, silica; Therefore if apply in the chip body etching of above-mentioned micro electronmechanical manufacture craft,, then certainly will can't use general semiconductor fabrication process passivation layer commonly used with as completely cutting off if front wafer surface has circuit.For addressing this problem, the simplest mode is exactly with the zone of institute's desire protection in the wafer and etching solution is isolated opens, and makes etching solution can directly not touch the zone of institute's desire protection.
In existing micro electronmechanical manufacture craft; usually use the anti-corrosion protection device of physical property; utilize the compression property of the corrosion-resistant and elastomeric material of the material of protective device own, and then the contacting of a certain fixed area of isolated wafer and etching solution, reach the function of wafer protection.
Yet, even prior art wafer application protective device still has following point.Generally speaking, existing chip protection device is to lean on the compression of elastomeric material to reach airtight function merely, really can effectively protect the fixed area of wafer under the room temperature situation; Yet; when if etch temperature rises; because the protective device inner chamber partly has air; because of the rising of temperature is expanded; estimate according to equation for ideal gases formula (Ideal GasEquation) PV=nRT; for example when ambient temperature T is increased to 85 ℃ of the operating temperatures of etching solution, because the isolated area constancy of volume, so its internal pressure P will rise to 1.2atm by atmospheric pressure 1atm originally.If the pressure that the protective device inner chamber increases in the temperature rise process can't discharge, then when wafer causes structure to heal the shape fragility because of etching, cause breaking of wafer because of pressure is excessive with being easy to.In addition, temperature can be reduced after etching finishes, also can cause the pressure of protective device inner chamber to descend, the pressure that produces during as if temperature rise is discharged in etching, and this moment, formed low pressure also may cause breaking of wafer.
Summary of the invention
In view of this; purpose of the present invention promptly is to provide a kind of chip protection device; be applied in the etching process of MEMS (micro electro mechanical system) (MEMS) etc.; not only can the zone and the etching solution of institute's desire protection in the wafer is isolated; and regulate at the pressure change that causes that rises or descend because of etch temperature; make the pressure of chip protection device inner chamber and the gap of external environment condition pressure can be maintained at certain limit, wafer can not produced because of the change of pressure break.
According to the present invention, a kind of chip protection device is provided, be used for when a first surface of a wafer carries out etching with etching solution, protect a specific region of a second surface of this wafer not to be subjected to this etching solution institute etching, this chip protection device comprises: a body, in order to coating the specific region of this wafer, and block contacting of this specific region and this etching solution, and between this body and this specific region, produce an insulating space; An and pressure adjusting part, be arranged at this body, and interlink, in order to regulate the pressure of this insulating space with this insulating space, wherein this pressure adjusting part comprises: a conduit, be communicated in this etching solution, when the pressure of this insulating space was higher than a particular range, the gas of this insulating space entered in this etching solution via this conduit, and when the pressure of this insulating space is lower than a particular range, this conduit sucks this etching solution, by this, and to regulate the pressure in this insulating space.
The present invention discloses a kind of chip protection device, is used for when a first surface of a wafer carries out etching with etching solution, and a specific region of a second surface of protection wafer is not subjected to the etching of etching solution institute.Chip protection device of the present invention comprises a body and a pressure adjusting part.Wherein, body is the specific region in order to coating wafer, and blocks contacting of specific region and etching solution, and produces an insulating space between body and specific region; The pressure adjusting part is to be arranged at body, and interlink with insulating space, in order to regulate the pressure of insulating space, wherein this pressure adjusting part is a sealed tube, and has an elastic membrane, in order to extension and the pressure that shrinks in this insulating space of adjustment by this elastic membrane.
In the above-mentioned chip protection device, body also can comprise: a pedestal; One strain portion is between pedestal and wafer; An and fixation kit, be arranged at pedestal,, be out of shape and strain portion is produced in order to strain portion is applied a positive force towards wafer, block contacting of specific region and etching solution, and between pedestal, strain portion and specific region, form insulating space.
In addition, the present invention discloses a kind of method of etched wafer, and its step comprises: a chip protection device is provided; Place a wafer in this chip protection device; Place this chip protection device in an etching solution, to carry out this wafer of etching, wherein this chip protection device is not to be subjected to this etching solution institute etching in order to the specific region of protecting this wafer; And regulate pressure in this chip protection device.
For above-mentioned and other purpose of the present invention, feature and advantage can be become apparent, several concrete preferred embodiments cited below particularly, and conjunction with figs. elaborates.
Description of drawings
Fig. 1 shows the schematic diagram of the chip protection device of one embodiment of the invention.
Fig. 2 A shows in another embodiment of the present invention with the schematic diagram of screw as the chip protection device of fixation kit.
Fig. 2 B shows in another embodiment of the present invention with the schematic diagram of U-shaped compressing tablet as the chip protection device of fixation kit.
Fig. 2 C shows in another embodiment of the present invention with the schematic diagram of clasp as the chip protection device of fixation kit.
Fig. 3 shows in another embodiment of the present invention with sealed tube with elastic membrane schematic diagram as the chip protection device of pressure adjusting part.
Fig. 4 A shows in another embodiment of the present invention to have rebound valve and the shrinking valve schematic diagram as the chip protection device of pressure adjusting part.
The schematic diagram of rebound valve one embodiment among Fig. 4 B displayed map 4A.
The schematic diagram of shrinking valve one embodiment among Fig. 4 C displayed map 4A.
Fig. 5 shows in another embodiment of the present invention with conduit with storage area schematic diagram as the chip protection device of pressure adjusting part.
The reference numeral explanation
10～wafer; 110～first surface; 120～second surface;
22～pedestal; 24～strain portion; 26～fixation kit;
262～screw; 264～U-shaped compressing tablet; 266～clasp;
30～communicating pipe; 32～sealed tube; 322～elastic membrane;
34～rebound valve; 36～shrinking valve;
342～spring; 344～extension valve; 362～spring; 364～contraction valve;
38～conduit; 382～storage area; 50～insulating space; 60～etching solution.
Embodiment
See also Fig. 1, the chip protection device of one embodiment of the invention is described.Chip protection device of the present invention is when the first surface 110 when wafer 10 carries out etching with etching solution 60, is not subjected to 60 etchings of etching solution in order to the specific region of second surface 120 of protection wafer 10.
Among Fig. 1, chip protection device comprises a body and a pressure adjusting part.Body is the specific region in order to the second surface 120 of coating wafer 10, and blocks contacting of specific region and etching solution 60, and produces an insulating space 50 between body and specific region.Wherein, the specific region of wafer 10 can include layouts such as circuit design, but in order to prevent to suffer the etching of etching solution 60, so must this specific region of protection.In the present embodiment, body comprises a pedestal 22, a strain portion 24 and fixation kit 26.Pedestal 22 is the flat board by resistant material constituted; Strain portion 24 is elastic rings that are made of resistant material, between pedestal 22 and wafer 10; Fixation kit 26 is arranged at pedestal 22, apply a positive force in order to elastic ring towards wafer 10 to strain portion 24, and make strain portion 24 produce distortion, blocking contacting of specific region and etching solution 60, and formation is enclosed within the insulating space 50 of etching solution 60.Wherein, for example the material of Teflon (Teflon) series is all applicable for resistant material.
In this mandatory declaration, in the present embodiment, the function of fixation kit 26 is to be strain portion 24 is applied positive force towards wafer 10, and makes strain portion 24 produce distortion, blocks contacting of specific region and etching solution 60.Therefore, fixation kit 26 can adopt various form.
See also Fig. 2 A to Fig. 2 C, disclose three kinds of different embodiment of chip protection device of the present invention respectively, wherein fixation kit 26 adopts different shape respectively.Among Fig. 2 A, be to use screw 262 as fixation kit 26; Be to use U-shaped compressing tablet 264 as fixation kit 26 among Fig. 2 B; And be to use clasp 266 among Fig. 2 C as fixation kit 26.In addition, the present invention also can use other multi-form fixation kit 26 to reach identical purpose.
In addition, the pressure adjusting part in the present embodiment for a connecting pipe 30, is arranged at body as shown in Figure 1, and is communicated with insulating space 50 and external environment condition, in order to regulate the pressure of insulating space 50.Yet chip protection device of the present invention also can be used the pressure adjusting part of various different shapes, and reaches the function of regulating insulating space 50 internal pressures.And for example shown in Fig. 2 A～2C, wherein the end of communicating pipe 30 also has a bend 302, in order to when chip protection device so that mode is arranged side by side, can save the volume behind the storehouse.
See also Fig. 3, the chip protection device of another embodiment of the present invention is described.In the chip protection device of present embodiment; the pressure adjusting part is a sealed tube 32; sealing pipe 32 has an elastic membrane 322, makes insulating space 50 and sealed tube 32 constitute a confined space, the extension by elastic membrane 322 with shrink to adjust the pressure in the insulating space 50.All the other structures of present embodiment are all similar with Fig. 1, so NES.
In addition, see also Fig. 4 A, the chip protection device of another embodiment of the present invention is described.In the chip protection device of present embodiment, the pressure adjusting part is a rebound valve 34 and a shrinking valve 36.All the other structures of present embodiment are all similar with Fig. 1, so NES.
Wherein, rebound valve 34 can have the extension valve 344 of a spring 342 and outside unidirectional extension shown in Fig. 4 B, therefore only can be by 50 unidirectional leading to external environment condition of insulating space; When the pressure of insulating space 50 was higher than external environment condition pressure, rebound valve 34 can be with the gas of insulating space 50 to the external environment condition pressure release.In addition, shrinking valve 36 can have the contraction valve 364 of a spring 362 and inside unidirectional contraction shown in Fig. 4 C, therefore only can lead to insulating space 50 by external environment condition is unidirectional; When the pressure of insulating space 50 was lower than external environment condition pressure, shrinking valve 36 can suck air by external environment condition, to insulating space 50 superchargings.Therefore, by the action of rebound valve 34 with shrinking valve 36, the pressure in the scalable insulating space 50, and reach pressure controlled purpose; In addition, above-mentioned rebound valve 34 also can reach the function that makes insulating space 50 keep a fixed positive pressure by the spring power of adjusting spring 342.
In addition, the pressure adjusting part can not lead to external environment yet, and leads to etching solution 60.See also Fig. 5, the chip protection device of another embodiment of the present invention is described.In the chip protection device of present embodiment, the pressure adjusting part is a conduit 38 that is communicated in etching solution 60, and the opening of conduit 38 is imbedded depth H in the etching solution 60, uses the pressure of regulating in the insulating space 50.All the other structures of present embodiment are all similar with Fig. 1, so NES.
Wherein, conduit 38 has a storage area 382, in order to store the etching solution 60 that conduit 38 sucks, avoids etching solution 60 directly to suck in the insulating space 50.In the present embodiment, when the pressure of insulating space 50 raises and when surpassing particular range, the gases in the insulating space 50 can enter in the etching solution 60 via conduit 38; And reduce and when being lower than particular range, conduit 38 can suck etching solution 60, is stored in the storage area 382, makes that the gas volumes in the insulating space 50 reduce, and keeps pressure in certain limit when the pressure of insulating space 50.So, the gas volume by conduit 38 sucks etching solution 60 in the control insulating space 50 can reach the purpose of regulating the pressure in the insulating space 50 equally.
In the method for chip protection device of the present invention applicable to etched wafer.At first, provide a chip protection device, for example arbitrary chip protection device in the various embodiments described above; Then wafer 10 is positioned in this chip protection device, makes the specific region of wafer 10, the specific region on the second surface 120 of for example above-mentioned wafer 10 is subjected to the protection of chip protection device.Then, chip protection device is positioned in the etching solution 60, so that wafer 10 is carried out etching, this moment, chip protection device was not to be subjected to 60 etchings of etching solution in order to the specific region of protecting wafer 10; Simultaneously, because chip protection device has the pressure adjusting part, the inside of this chip protection device of connection for example shown in Figure 1 and the communicating pipe 30 of external environment condition etc., therefore can in etching process, regulate the pressure in this chip protection device.
Must specify that at this feature of the various embodiments described above that chip protection device of the present invention disclosed is combination in any in addition.For example; chip protection device of the present invention can be arranged to fixation kit arbitrary form in the clasp 266 of the U-shaped compressing tablet 264 of screw 262, Fig. 2 B as Fig. 2 A or Fig. 2 C, and the pressure adjusting part also can adopt the combination of the arbitrary form among Fig. 1, Fig. 3, Fig. 4 A or Fig. 5.
Though the present invention discloses as above with several concrete preferred embodiments; yet it is not in order to limit the present invention; those skilled in the art without departing from the spirit and scope of the present invention; can make various changes and retouching, so protection scope of the present invention is as the criterion as the scope person of defining that look accompanying Claim.
Claims (10)
1. a chip protection device is used for when a first surface of a wafer carries out etching with etching solution, protects a specific region of a second surface of this wafer not to be subjected to this etching solution institute etching, and this chip protection device comprises:
One body in order to coating the specific region of this wafer, and blocks contacting of this specific region and this etching solution, and produce an insulating space between this body and this specific region; And
One pressure adjusting part is arranged at this body, and interlinks with this insulating space, in order to regulating the pressure of this insulating space,
Wherein this pressure adjusting part comprises: a conduit, be communicated in this etching solution, when the pressure of this insulating space is higher than a particular range, the gas of this insulating space enters in this etching solution via this conduit, and when the pressure of this insulating space is lower than a particular range, this conduit sucks this etching solution, by this, and to regulate the pressure in this insulating space.
2. chip protection device as claimed in claim 1, wherein this body also comprises:
One pedestal;
One strain portion is between this pedestal and this wafer; And
One fixation kit, be arranged at this pedestal,, be out of shape and this strain portion is produced in order to this strain portion is applied a positive force towards this wafer, block contacting of this specific region and this etching solution, and between this pedestal, this strain portion and this specific region, form this insulating space.
3. chip protection device as claimed in claim 2, wherein this pedestal is made of resistant material.
4. chip protection device as claimed in claim 2, wherein this strain portion is made of resistant material.
5. chip protection device as claimed in claim 2, wherein this strain portion is an elastic ring.
6. chip protection device as claimed in claim 2, wherein this fixation kit is an elastic parts.
7. chip protection device as claimed in claim 2, wherein this fixation kit is a screw.
8. chip protection device as claimed in claim 2, wherein this fixation kit is the U-shaped compressing tablet.
9. chip protection device as claimed in claim 2, wherein this fixation kit is a clasp.
10. chip protection device as claimed in claim 1, wherein this conduit comprises a storage area, to store this etching solution that this conduit sucks.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02102365 CN1206707C (en) | 2002-01-23 | 2002-01-23 | Chip protector |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02102365 Division CN1206707C (en) | 2002-01-23 | 2002-01-23 | Chip protector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1641840A true CN1641840A (en) | 2005-07-20 |
| CN1323424C CN1323424C (en) | 2007-06-27 |
Family
ID=27627536
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100044636A Expired - Fee Related CN1323423C (en) | 2002-01-23 | 2002-01-23 | Chip protection device |
| CN 02102365 Expired - Fee Related CN1206707C (en) | 2002-01-23 | 2002-01-23 | Chip protector |
| CN 200510004464 Expired - Fee Related CN1323424C (en) | 2002-01-23 | 2002-01-23 | Chip protection device |
Family Applications Before (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100044636A Expired - Fee Related CN1323423C (en) | 2002-01-23 | 2002-01-23 | Chip protection device |
| CN 02102365 Expired - Fee Related CN1206707C (en) | 2002-01-23 | 2002-01-23 | Chip protector |
Country Status (1)
| Country | Link |
|---|---|
| CN (3) | CN1323423C (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101728224B (en) * | 2008-10-10 | 2012-05-23 | 鼎岳科技股份有限公司 | Equipment and method for manufacturing semiconductor |
| CN103058130A (en) * | 2013-01-11 | 2013-04-24 | 无锡华润上华半导体有限公司 | Fixture and method for preventing corrosion of back face of wafer |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19703059A1 (en) * | 1997-01-28 | 1998-09-17 | Siemens Ag | Device and method for holding and protecting semiconductor wafers |
-
2002
- 2002-01-23 CN CNB2005100044636A patent/CN1323423C/en not_active Expired - Fee Related
- 2002-01-23 CN CN 02102365 patent/CN1206707C/en not_active Expired - Fee Related
- 2002-01-23 CN CN 200510004464 patent/CN1323424C/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101728224B (en) * | 2008-10-10 | 2012-05-23 | 鼎岳科技股份有限公司 | Equipment and method for manufacturing semiconductor |
| CN103058130A (en) * | 2013-01-11 | 2013-04-24 | 无锡华润上华半导体有限公司 | Fixture and method for preventing corrosion of back face of wafer |
| CN103058130B (en) * | 2013-01-11 | 2016-03-02 | 无锡华润上华半导体有限公司 | A kind of fixture and method preventing corrosion of back face of wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1206707C (en) | 2005-06-15 |
| CN1323423C (en) | 2007-06-27 |
| CN1434488A (en) | 2003-08-06 |
| CN1641839A (en) | 2005-07-20 |
| CN1323424C (en) | 2007-06-27 |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070627 Termination date: 20110123 |