CN1641830A - Method for manufacturing display panel - Google Patents
Method for manufacturing display panel Download PDFInfo
- Publication number
- CN1641830A CN1641830A CN 200410002821 CN200410002821A CN1641830A CN 1641830 A CN1641830 A CN 1641830A CN 200410002821 CN200410002821 CN 200410002821 CN 200410002821 A CN200410002821 A CN 200410002821A CN 1641830 A CN1641830 A CN 1641830A
- Authority
- CN
- China
- Prior art keywords
- layer
- contact hole
- flatness
- protective layer
- display floater
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 46
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 238000005530 etching Methods 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 88
- 239000011241 protective layer Substances 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 18
- 229920002120 photoresistant polymer Polymers 0.000 claims description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 238000005401 electroluminescence Methods 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 claims 2
- 239000000377 silicon dioxide Substances 0.000 claims 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims 1
- 208000034699 Vitreous floaters Diseases 0.000 description 37
- 239000010409 thin film Substances 0.000 description 17
- 238000005516 engineering process Methods 0.000 description 8
- 230000001681 protective effect Effects 0.000 description 6
- 230000003071 parasitic effect Effects 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The invention relates to a manufacture method of display panel. It includes that the first is to offer a base plate, and at least one film transistor is set at its surface; then a protection layer and one flat layer are orderly formed at the base plate; the flat layer is picturized to respectively form a opening on the upper of every film transistor; and it is used as the mask to do etching procedure to the bottom protection layer; the first contact hole reached to the film transistor is respectively formed in the protection; part of the flat layer on the round of the opening is selectively removed to enlarge every opening; and the second contact hole is form at the upper of the first one; then a transparent conducting layer is deposited on the surface of the flat layer; the transparent conducting layer is connected to each of the film transistor by the first connect hole and the second one.
Description
Technical field
The invention provides a kind of manufacture method of display floater, refer to a kind of method of in a display floater, making contact hole especially.
Background technology
Along with making rapid progress of science and technology, the intelligent information products of frivolous, power saving, portable have been full of our living space, display has then been played the part of considerable role betwixt, no matter be mobile phone, personal digital assistant or mobile computer, all need the interface of display as man-machine communication.Display is at high image quality, big picture, existing very much progress under the demand cheaply in recent years, and in various display, thin-film transistor (thin film transistor, TFT) escope is because therefore each pixel electrode on available many prescriptions formula active drive display floater especially is subjected to the attention of all circles.
At thin-film transistor (thin film transistor now; TFT) in the operation; be provided with internal layer dielectric (inter-layer dielectric between the conductive layer of transistor AND gate on it; ILD) layer; be used for isolating and protect circuit unit on the panel of LCD; and be provided with contact hole (contact hole) in the ILD layer, make conductive layer can insert contact hole and be electrically connected to the below transistor.Therefore, data signals can be sent to transistorized source/drain electrode via the conductive layer in this contact hole, with the operation of each pixel electrode in the further control display pannel.
With reference to figure 1, Fig. 1 is the generalized section of a known display panel 10.As shown in Figure 1, display floater 10 includes a substrate 12, which is provided with a drive circuit 14 and that includes a plurality of thin-film transistors and cover thereon dielectric layer 16, for convenience of description, only represent among Fig. 1, yet in fact drive circuit 14 includes a plurality of thin-film transistors with a thin-film transistor.In addition, display floater 10 includes a flatness layer 18 that is formed on the dielectric layer 16 in addition, in the flatness layer 18 and be provided with a contact hole 22, so that the conductive layer 24 that is formed on the flatness layer 18 can be electrically connected to the drive circuit 14 that is positioned at substrate 12 surfaces via contact hole 22, to finish electrical connection therebetween.
Generally speaking, flatness layer 18 is made of macromolecular material, for example can be a photoresist layer, therefore only need utilize the exposure imaging operation and deluster and cause resist technology (descum) and can form contact hole 22, its function is beneficial to the making of follow-up display module at the flattening surface with display floater 10.Though yet this structure manufacture method is easy; but often also have the excessive phenomenon of parasitic capacitance and to the not good shortcoming of drive circuit 14 protective capabilities of below; therefore; in the present film transistor display panel technology; some improved methods have also been proposed; for example set up a protective layer, to improve its protective capability at dielectric layer 16 and 18 of flatness layers.
With reference to figure 2, Fig. 2 is the generalized section of another known display panel 50.As shown in Figure 2; the framework of display floater 50 is similar to aforesaid display floater 10; have substrate 52, drive circuit 54 and dielectric layer 56 equally and cover thereon, institute's difference is to set up a protective layer 58 on dielectric layer 56, just forms flatness layer 62 and conductive layer 68 afterwards.Though this kind structure can significantly be strengthened the protective capability to the below drive circuit; and improve the excessive phenomenon of parasitic capacitance; yet owing to increase the relation of protective layer 58; also can be complicated relatively on operation; compare with the structure (display floater 10) of Fig. 1; display floater 50 must limit first contact hole 64 in the protective layer 58 by one extra gold-tinted and etching work procedure; can utilize above-mentioned exposure imaging operation afterwards and deluster and cause the resist technology and remove to be formed on second contact hole 66 in the flatness layer; so that conductive layer 68 must be electrically connected to the drive circuit 54 on substrate 52 surfaces via first contact hole 64 and second contact hole 66; therefore; though this structure has the advantage on the effect, can significantly promote the complexity of operation and the productivity ratio that reduces product.In addition, when making first contact hole 64 and second contact hole 66, have the problem of contraposition difficulty again, easily cause follow-up electrical ties failure, cause the decline of production reliability because of contraposition is inaccurate.
Therefore, how to develop and a kind of new display floater manufacture method,, just become current important topic to solve the problem in the known technology.
Summary of the invention
Main purpose of the present invention is to provide a kind of manufacture method of display floater, refers to a kind of method for manufacturing contact hole that reduces by one gold-tinted operation especially, to overcome the shortcoming of known technology.
In most preferred embodiment of the present invention; a kind of manufacture method of display floater is provided; one substrate at first is provided; substrate surface is provided with at least one thin-film transistor; then on substrate, form a protective layer and a flatness layer in regular turn; and it is flatness layer is graphical; to form an opening above each thin-film transistor in flatness layer respectively; utilize flatness layer to come the protective layer of below is carried out an etching work procedure again for mask; to form sensible first contact hole in the protective layer below each opening respectively to thin-film transistor; selective removal is positioned at each parameatal part flatness layer subsequently; to enlarge each opening; and above each first contact hole, form one second contact hole; then again at this flatness layer surface deposition one transparency conducting layer, wherein transparency conducting layer is electrically connected to each thin-film transistor via each first contact hole and each second contact hole respectively.
Display floater manufacture method of the present invention is used as etching mask by patterned flatness layer; with below protective layer in form contact hole; therefore under the situation that can reduce by one gold-tinted operation; effectively improve the protective capacities of display floater and reduce parasitic capacitance, and be unlikely to derive extra contraposition problem because of multiple tracks gold-tinted operation.
Description of drawings
Fig. 1 is the generalized section of a known display floater.
Fig. 2 is the generalized section of a known display floater.
Fig. 3 to Fig. 8 is the manufacture method schematic diagram of a display floater in the preferred embodiment of the present invention.
The reference numeral explanation:
10 display floaters, 12 substrates
14 drive circuits, 16 dielectric layers
18 flatness layers, 22 contact holes
24 conductive layers, 50 display floaters
52 substrates, 54 drive circuits
56 dielectric layers, 58 protective layers
62 flatness layers, 64 first contact holes
66 second contact holes, 68 conductive layers
110 display floaters, 112 substrates
114 gates, 115 contact plungers
116 dielectric layers, 118 thin-film transistors
122 protective layers, 124 flatness layers
128 first contact holes, 132 second contact holes
134 conductive layers
Embodiment
To Fig. 8, Fig. 3 to Fig. 8 is the manufacture method schematic diagram of display floater in the preferred embodiment of the present invention with reference to figure 3.As shown in Figure 3, display floater 110 includes substrate 112, and substrate 112 surfaces have conductive region, in the preferred embodiment of the present invention, display floater 110 is an organic electroluminescence display panel, and substrate 112 is provided with one drive circuit 118 and a dielectric layer 116 covers on the drive circuit 118, and conductive region is the exposed parts of drive circuit 118 then.For convenience of description, only represent drive circuit 118 among Fig. 3 with a thin-film transistor, but in fact drive circuit 118 includes a plurality of thin-film transistors, carry out the image demonstration to be used for driving display floater 110, and each thin-film transistor includes a control utmost point 114, and a source, drain electrode lay respectively at the both sides of the control utmost point 114, and externally connect by a contact plunger 115 respectively.
As shown in Figure 4; then cover on dielectric layer 116 and the contact plunger 115 forming protective layer 122 and flatness layer 124 on the display floater 110 in regular turn; in a preferred embodiment of the present invention; protective layer 122 includes silicon nitride layer or the silicon oxide layer that thickness is 500 dust to 5000 dusts; to strengthen resistivity to aqueous vapor and oxygen; improvement is to the protective capability of below circuit unit; flatness layer 124 then is the photoresist layer that is made of high-molecular organic material; its thickness is about 500 dust to 50000 dusts; be used for keeping having an even surface, in order to the making of follow-up display module.As shown in Figure 5, then that flatness layer 124 is graphical, to form opening 126 above each thin-film transistor in flatness layer 124 respectively, in a preferred embodiment of the invention, utilize exposure process to limit the figure of flatness layer 124 flatness layer 124 patterned methods, remove the part flatness layer 124 of contact plunger 115 tops again by developing procedure, to form an opening 126.
As shown in Figure 6; then carry out etching work procedure again, utilize patterned flatness layer 124 to be mask, along opening 126 downward etch protection layer 122; with formation first contact hole 128 in protective layer 122, and the conductive region (contact plunger 115) on substrate 112 surfaces is exposed.It should be noted that in this etching work procedure, will strengthen the openings of sizes of first contact hole 128 because of the phenomenon of undercutting (undercut), make the average diameter of the average diameter at first contact hole, 128 tops, to improve the reliability of follow-up electrical connection operation greater than top opening 126 bottoms.
As shown in Figure 7, then remove the flatness layer 124 that partly is positioned at around the opening 126 at least, enlarging each opening 126, and above first contact hole 128, form one second contact hole 132.In a preferred embodiment of the invention, delustering by one causes resist (descum) operation and comes enlarged openings 126, and to form second contact hole 132, wherein the average diameter of this second contact hole 132 is greater than the average diameter of first contact hole 128.Yet the method for selective removal flatness layer 124 is not limited to this among the present invention, and can take other suitable operation according to the material of flatness layer 124, for example the wet etching operation.
As shown in Figure 8, then at flatness layer 124 surface depositions one conductive layer 134, and conductive layer 134 is electrically connected to respectively this thin-film transistor (drive circuit 118) of below respectively via first contact hole 128 and second contact hole 132, can further above conductive layer 134, make each display module in the display floater 110 afterwards again, to finish the making of display floater 110.Know because the making of follow-up display module should be those skilled in the art, and do not have direct relation, so do not repeat them here with the present invention.
What deserves to be mentioned is, in aforesaid preferred embodiment, though be that example illustrates display floater manufacture method of the present invention with an organic electroluminescence display panel, the present invention is not limited to this, and can be applicable to the display floater of other type, a display panels for example.In addition, display floater manufacture method provided by the present invention also can be applicable to the making of contact hole in the various film transistor display panel, not only can be applied to the display floater of active matrix (active matrix), also can be applied to the display floater of passive matrix (passivematrix).
Compare with known technology; display floater manufacture method of the present invention is to utilize patterned flatness layer to come the protective layer of etching below for mask; with below protective layer in form contact hole; therefore can under the situation that dispenses one gold-tinted operation, operation be simplified, and effectively improve the protective capacities of display floater and reduce parasitic capacitance.In addition, owing to be to utilize patterned flatness layer to carry out etching work procedure for mask, therefore will can be because of the inaccurate problem of institute's contraposition takes place multiple tracks gold-tinted operation, so can effectively improve the reliability of display floater.
The above only is the preferred embodiments of the present invention, and all equivalent variations and modifications of being done according to the present patent application claim all should belong to the covering scope of patent of the present invention.
Claims (10)
1. the manufacture method of a display floater comprises at least:
One substrate is provided, has at least one transistor on it;
On this substrate, form a protective layer;
On this protective layer, form a flatness layer;
Graphical this flatness layer is to form an opening;
With this flatness layer is mask, carries out an etching work procedure, to form first contact hole that can be electrically connected with this transistor in this protective layer below this opening; And
At least remove part and be positioned at this parameatal this flatness layer, to form one second contact hole, wherein the average diameter of this second contact hole is greater than the average diameter of this first contact hole.
2. method as claimed in claim 1 is characterized in that: this flatness layer comprises a photoresist layer.
3. method as claimed in claim 2 is characterized in that: this method utilizes an exposure process and a developing procedure that this flatness layer is graphical.
4. method as claimed in claim 2 is characterized in that: this method utilizes one to deluster and cause the resist operation and remove and partly be positioned at this parameatal this flatness layer.
5. method as claimed in claim 1 is characterized in that: this protective layer comprises a silicon nitride layer or one silica layer.
6. method as claimed in claim 1 is characterized in that: also be included in this flatness layer surface deposition one conductive layer, and this conductive layer is electrically connected to this transistor via this first contact hole and this second contact hole; Wherein this conductive layer comprises tin indium oxide (ITO) or indium zinc oxide (IZO).
7. method as claimed in claim 1 is characterized in that: this display floater is an organic electroluminescence display panel or a display panels.
8. the manufacture method of a display floater comprises at least:
One substrate is provided, wherein has a conductive region;
Form a protective layer on this substrate;
Form a patterned photoresist layer on this protective layer, this photoresist layer has an opening, is formed on the top of this conductive region;
With this photoresist layer is mask, carries out an etching work procedure, to form first contact hole that can be electrically connected with this conductive region in this protective layer;
At least remove part and be positioned at this parameatal this photoresist layer, to form one second contact hole; And
Form a conductive layer at this photoresist laminar surface, and this conductive layer is electrically connected to this conductive region via this first contact hole and this second contact hole.
9. method as claimed in claim 8 is characterized in that: form this patterned photoresist layer and include the following step on this protective layer:
On this protective layer, form a photoresist layer;
Carry out an exposure process, to limit the figure of this photoresist layer;
Carry out a developing procedure, in this photoresist layer, to form this opening;
10. method as claimed in claim 8 is characterized in that: this method utilizes one to deluster and cause the resist operation and remove at least and partly be positioned at this parameatal this photoresist layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100028215A CN1331190C (en) | 2004-01-17 | 2004-01-17 | Method for manufacturing display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100028215A CN1331190C (en) | 2004-01-17 | 2004-01-17 | Method for manufacturing display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1641830A true CN1641830A (en) | 2005-07-20 |
| CN1331190C CN1331190C (en) | 2007-08-08 |
Family
ID=34867469
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100028215A Expired - Lifetime CN1331190C (en) | 2004-01-17 | 2004-01-17 | Method for manufacturing display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1331190C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111221191A (en) * | 2015-08-28 | 2020-06-02 | 群创光电股份有限公司 | Liquid crystal display panel |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5229644A (en) * | 1987-09-09 | 1993-07-20 | Casio Computer Co., Ltd. | Thin film transistor having a transparent electrode and substrate |
| EP0845812B1 (en) * | 1996-11-28 | 2009-10-28 | Casio Computer Co., Ltd. | Display apparatus |
| JP3288637B2 (en) * | 1998-08-28 | 2002-06-04 | 富士通株式会社 | ITO film connection structure, TFT substrate and method of manufacturing the same |
-
2004
- 2004-01-17 CN CNB2004100028215A patent/CN1331190C/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111221191A (en) * | 2015-08-28 | 2020-06-02 | 群创光电股份有限公司 | Liquid crystal display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1331190C (en) | 2007-08-08 |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20070808 |