CN1637430A - User's terminal machine of Big Dipper navigation and location system - Google Patents
User's terminal machine of Big Dipper navigation and location system Download PDFInfo
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Abstract
The user's terminal machine of Big Dipper navigation and location system in ASIC technology includes antenna, RF processor part and IC chip, which integrates CPU and base band processing module and includes internal bus and CPU, external interface unit and base band processor module as well as interface memory capable of being connected to outer processor and low power consumption circuit to lower the dynamic power consumption of the base band processor module. The CPU and the base band processor module exchange data via receiving memory and emitting memory. The highly integrated user's terminal machine has lowered volume, weight, power consumption and cost, and its modular structure simplifies the complexity of developing advanced satellite location system and low power consumption scheme prolongs the stand-by time of the terminal.
Description
Technical field
The present invention relates to satellite navigation and location system in the satellite communication field, be specifically related to Big Dipper navigation positioning system end-user machine, more particularly, relate to base band signal process part and control and interface unit single-chip integrating device partly in the described end-user machine.
Background technology
Big Dipper navigation positioning system is called for short dipper system, is the satellite navigation and location system that China independently builds up.Satellite navigation location is meant and utilizes satellite navigation and location system to provide information such as position, speed and time to finish location, navigation, monitoring and management to all types of target.Utilize some transit satellites to form satellite navigation system, can be at any time and any place, for the user determines the geographical longitude and latitude and the sea level elevation at its place, at present, have only a few countries to produce this satellite navigation system by independent development in the world.In May, 2003, the 3rd Big Dipper transit satellite of China enters space smoothly, divides four parts to briefly introduce the dipper system of China below.
(1) ultimate principle: adopt CDMA bandspread communication, when the spread-spectrum signal of launching after testee reflects, demodulate spread spectrum code sequence at receiving end; Relatively receive and dispatch the poor of two sign indicating number sequence phases then, just can accurately measure the mistiming that spread-spectrum signal comes and goes, thereby calculate the distance between the two.If spread-spectrum is very wide in spread spectrum communication, mean that then the spread-spectrum code rate that is adopted is very high, the time that each chip takies is just very short.
(2) technical system: dipper system adopts double star that source location is arranged at present, form by two work satellites and a backup satellite, and the mode of adopt inquiry between the end-user machine, replying is found range, energy is round-the-clock, round-the-clock provides region satellite navigation information, also can provide the two-way communication service in addition; It is when satisfying China's national defense construction needs, also can be used for economic construction, for China's communications and transportation, meteorology, oil, ocean, forest fire protection, hazard forecasting, communication, public security and other special industries provide navigator fix service efficiently, have a extensive future.
(3) use.Mainly show: 1. field of traffic.Dipper system provides navigator fix information in the time of can only reaching for ocean-going vessel, and it is navigated by water along favourable ocean current, and for frequent course line provides real-time maritime traffic commander, the guiding ship accesses to the ports safely, and is used for the mensuration of ship manoeuverability energy; Highway communication and transportation by railroad can be by moving vehicle the providing of real-time positioning information, carry out the monitoring of railway and highway transport vehicle, to improve transport power, guarantee safety, realize effective management of land transportation transportation systems such as highway and railway.2. survey field.Dipper system can be used for setting up high-precision nationwide geodetic surveying control net, measures global earth dynamic parameter; Be used to set up land marine geodetic surveying benchmark, carry out translocation of land, island and marine charting; Be used to monitor earth plate movement state and crustal deformation; Be used for engineering survey, set up city and engineering control network; Realize a small amount of Ground Control only being arranged or not having the fast hasty map of ground control aerial survey etc.3. field work such as geologic prospecting.Dipper system can realize that meagrely-populated area, particularly grassland, desert, ice sheet, virgin forest etc. lack geologic prospecting party, exploring party, operation team, the terrestrial navigation of herding team, field study and research party and the location survey in object of reference area; 4. data provides.For industries such as the hydrology observes and predicts, forest fire protection, fish production, prospective design, environmental monitorings, provide accurate satellite data; 5. integrated service.In the assessment and the search of disaster, speedily carry out rescue work and numerous industries such as rescue, and other have the unit of special dispatch control requirement that cheap, efficient, integrated services such as location, communication and time service reliably are provided.
(4) present practical situation.Based on the types of applications system of Big Dipper navigator fix, particularly civilian aspect, progressively foundation and perfect.1. Shenzhou-Tianhong Science-Technology Co., Ltd., Beijing has set up a series of civil applications system, such as railway mobile communication platform, hydrology measuring and reporting system, ship dispatch supervisory system, Forest Fire Prevention Direction system, civilian enterprise operation center, the civilian system of the Big Dipper.2. in June, 2003, " dipper system civilian vehicle (ship) carries space in a newspaper equipment and technology condition in danger and request for utilization ", " civilian data acquisition terminal equipment technical conditions of dipper system and request for utilization ", " dipper system civilian vehicle (ship) mounted terminal equipment and technology condition and request for utilization " three also drafts for deliberation of the civilian terminal standard of the Big Dipper, and report and submit national departments concerned examining.These series standards will play positive guiding and standardization role to the research and development and the manufacturing of the civilian terminal of China's Big Dipper, further promote the healthy and orderly development in phase in Big Dipper commercial market.
Further, dipper system comprises satellite, center processing station, ground and subscriber equipment, and the dipper system end-user machine belongs to the dipper system subscriber equipment, is called for short end-user machine, is an indispensable ingredient of dipper system; According to the application difference of dipper system, the kind of its end-user machine is also different, comprises handheld subscriber computer, sea rescue type subscriber computer, vehicle-mounted type subscriber computer, boat-carrying type subscriber computer, commander's type subscriber computer or the like.Above-mentioned all end-user machines all comprise four essential parts, are respectively Radio frequency Processing Unit, RF Processing Unit, digital baseband signal processing section, control and interface section and display part.
(1) Radio frequency Processing Unit, RF Processing Unit.Comprise receiving cable and transmission channel.Wherein receiving cable is finished being converted to baseband signal after the radiofrequency signal that will receive is passed through filtering, amplification, down coversion, and is provided digital baseband signal through after the analog to digital conversion to base band; Transmission channel carries out digital-to-analog conversion, BPSK modulation, upconverts to radiofrequency signal the digitally transmitted signals from the Base-Band Processing part, and gets on through being transmitted into satellite after the processing and amplifying.
(2) digital baseband processing section.Comprise receiver module and transmitter module.Dipper system adopts the CDMA bandspread communication system.Its ultimate principle is: if spread-spectrum is very wide in spread spectrum communication, mean that then the spread-spectrum code rate that is adopted is very high, the time that each chip takies is just very short.When the spread-spectrum signal of launching after testee reflects, demodulate spread spectrum code sequence at receiving end, relatively receive and dispatch the poor of two sign indicating number sequence phases then, just can accurately measure the mistiming that spread-spectrum signal comes and goes, thereby calculate the distance between the two.The precision of measuring depends on the width of chip, the width of spread-spectrum just, and chip is narrow more, and the frequency spectrum of expansion is wide more, and precision is high more.For receiving element is input with the digital baseband signal, need finish spreading code synchronously and processing such as despreading, carrier synchronization and demodulation, frame synchronization, decoding verification, the information that receives is delivered to interface unit further handle; The emission information that transmitter module is sent here with interface module is input, encodes, spread spectrum, and launches through delivering to Radio frequency Processing Unit, RF Processing Unit after the filtering.
(3) control and interface section.Mainly finish to received signal and further handle, recover the communication information, give display unit and show; The operation of response man-machine interface is handled accordingly.
(4) display part: show navigator, location, the communication information.
End-user machine as shown in Figure 1, adopt integrated system on the plate, mainly comprise PDA (10), CPU (11), DSP (12), Radio frequency Processing Unit, RF Processing Unit (6), D/A (13), A/D (14), FPGA (15), CPU (11) can connect peripheral hardware (7), can carry out mutual communication according to end-user machine agreement regulation.Annotate: scale programmable logic device, be called for short FPGA; Digital signal processor is called for short DSP; Central processing unit is called for short CPU; Personal digital assistant is called for short PDA; External unit is called for short peripheral hardware.
In Fig. 1, FPGA (16) mainly finishes the base band data work of treatment; The auxiliary FPGA (16) of DSP (13) finishes the digital signal processing of some relative complex in the base band data work of treatment; The initialization of CPU (11) control FPGA (16) is carried out the data protocol layer with the data after the Base-Band Processing and is handled, and sends data for FPGA (16) tissue; Data presentation on PDA (10), is received the input of PDA (10), and the communication of realization and peripheral hardware.At present, there are tens families in the manufacturer or the research institution that are engaged in the production of dipper system end-user machine, mainly adopt integrated morphology on this plate.In addition, some manufacturer also adopts FPGA (16) directly to finish the function of DSP (13), and PDA (10) finishes CPU (11) function, thereby the circuit structure of Fig. 1 is developed into integrated system on the high step of RF processing unit+FPGA+CPU/PDA.
The dipper system application is extensive, and every kind of field all may be included in the use under the particular surroundings, and therefore, no matter be which kind of type terminals subscriber computer, people require: 1. volume is little, in light weight, so that carry; 2. power consumption is little, and stand-by time is long; 3. reliability height; 4. low price is beneficial to and produces in batches and popularize.But, integrated system end-user machine on the above-mentioned present plate, the deficiency that ubiquity is corresponding with above-mentioned requirements: 1. volume is inadequately little, weight is heavier, is unfavorable for carrying; 2. power consumption is big, and stand-by time has only 4～5 hours mostly, and battery needs frequent charge; 3. the device integrated level is not high, is difficult to produce in batches, and price height and reliability are lower; 4. since plate on integrated various chips, the interface disunity, dirigibility is low, is unfavorable for adding new function.In addition, from user's angle, miniaturization, low-power consumption, low cost and high reliability and modularization are end-user machine development in future trend, this trend requires the integrated level of end-user machine to want high, preferably monolithic system integrated, realize the function of end-user machine fully.
Special integrated chip Application-specific integrated circuit, being called for short ASIC, is a kind of chip that is specifically designed to certain application, and it is different from general chip, it generally can only be used for a kind of application-specific, but it is than general chip is fast than speed, integrated level is high.The asic chip of making a kind of new special-purpose comprises design, analysis, comprehensive, simulation, model and test or the like.
Summary of the invention
The technical problem to be solved in the present invention is, how integrated based on the single-chip of baseband processing unit circuit and control and interface unit circuit in the asic technology realization end-user machine, reduce volume, weight, power consumption and the cost of end-user machine, thereby be convenient to realize portable, adapt to field environment; Further, realize the modularization of high integrated terminal subscriber computer, interface flexibly is provided, thereby make more most advanced and sophisticated global position system exploitation become possibility; Further, reduce the dynamic power consumption of high integrated terminal subscriber computer, but prolong the battery stand-by time of end-user machine.
The above-mentioned technical matters of the present invention solves like this, constructs a kind of end-user machine of Big Dipper navigation positioning system, comprises antenna and Radio frequency Processing Unit, RF Processing Unit, it is characterized in that, also comprises the integrated chip of built-in CPU and baseband processing module; The such auxiliary positioning of this subscriber computer is handled: the high frequency satellite-signal that is entered by antenna enters described chip through described Radio frequency Processing Unit, RF Processing Unit, by described baseband processing module and CPU a response is handled and selected to the satellite-signal of this station address again, and then by described baseband processing module and Radio frequency Processing Unit, RF Processing Unit answer signal is pressed preset requirement and launch back satellite, main localization process is positioned at center processing station, Big Dipper navigation positioning system ground (along with Big Dipper navigation positioning system perfect, integrated chip also can realized autonomous positioning in the future).Like this, need not high FPGA of price and CPU, do not need special PDA yet, improved level of integrated system, reduce power consumption and cost, its technical characterstic is: utilize asic technology to realize that the monolithic of dipper system end-user machine is integrated, the functional circuit that the CPU on the present end-user machine system board and FPGA are realized is integrated in the integrated circuit (IC) chip; Further, can also select RF processing unit is integrated in the chip according to Technology Need.
According to subscriber computer provided by the invention, it is characterized in that described signal Processing is that spread-spectrum signal is handled, and has increased spread spectrum demodulation and band spectrum modulation than common communication system signal Processing, at least also comprise the synchronous and demodulates information of receiving end, the information of making a start modulation.
According to subscriber computer provided by the invention, it is characterized in that, also comprise and be integrated in the described chip or separate independently A/D and D/A converter, be connected electrically between described Radio frequency Processing Unit, RF Processing Unit and the baseband processing module: described Radio frequency Processing Unit, RF Processing Unit carries out up-conversion or down coversion, and described A/D and D/A converter carry out analog to digital conversion and digital-to-analog conversion.
According to subscriber computer provided by the invention, it is characterized in that described chip also comprises internal bus and interface circuit, described interface circuit, CPU and baseband processing module are connected on the described internal bus; Described CPU adopts central processing unit, digital signal processor DSP or both combinations, and when comprising digital signal processor DSP, digital signal processor can be assisted baseband processing module to carry out (receive or send) data-signal and be handled.
During reception, this chip is handled like this: described base band data processing module is carried out spreading code synchronously and despreading, carrier synchronization and demodulation, frame synchronization, decoding verification with described data after A, obtain data result, send into described CPU by described bus and carry out data assembly unit and calculating, and can further described data result be delivered to peripheral hardware and handle by described interface circuit;
During transmission, this chip is handled like this: the data message tissue transmission data that described CPU is provided with according to the user or interface circuit comes are given described base band data processing module, send into described D/A converter after encoded, spread spectrum and the filtering.
This chip groundwork also comprises: after powering on, the interior integrated CPU of chip obtains the base band data processing unit by peripheral interface initial value carries out initialization to the base band data processing module.
According to subscriber computer provided by the invention, it is characterized in that described interface circuit can be the peripheral interface units that is used to finish CPU and peripherals Communication Control, also can be the memory controller that can produce the external memory interface sequential; Smart card and peripheral hardware that described peripheral interface units can be external be observed end-user machine agreement regulation also can connect LCD and touch-screen, and the information of finishing end-user machine shows and function such as input; Described memory controller can external external data memory.
According to subscriber computer provided by the invention, it is characterized in that described peripheral interface units includes but not limited to wherein any one or more of following peripheral interface: UART Universal Asynchronous Receiver Transmitter UART, general-purpose serial bus USB, synchronous serial peripheral interface SPI, internal integrate circuit bus (I2C) or parallel interface.
According to subscriber computer provided by the invention, it is characterized in that described chip also comprises the interface memory with plug-in processor interface that is connected on the described bus, described interface memory is a double port memory; Described interface memory can be used as the data interaction storer, also can be separately as the internal data memory of described CPU.CPU can the read-write interface storer by internal bus, and plug-in processor can pass through plug-in processor interface read-write interface storer.CPU and plug-in processor be the access interface storer simultaneously, and both sides can realize parallel data communication by predefined software protocol.Interface memory has two advantages: 1) realized the parallel communication between CPU and the plug-in processor, made things convenient for this device expansion coprocessor; 2) making things convenient for the processor of higher level that this device is used as coprocessor equally uses, utilize interface memory to transmit initial value (both the initial value that baseband processing unit is relevant can not obtain from peripheral interface units or memory controller) or other control signal to this device, this device cooperates the reception of finishing baseband signal to handle with transmission with the processor of higher level.
According to subscriber computer provided by the invention, it is characterized in that, described chip also comprises and is connected base band register between described baseband processing module and the internal bus, that be used between baseband processing module and the CPU mutual state of a control, and is connected reception memorizer between described baseband processing module and the internal bus, that be used for interaction data between baseband processing module and the CPU and sends storer.
According to subscriber computer provided by the invention, it is characterized in that, the described internal bus of the two-way connection of described base band register, this base band register is the mutual intermediary of state of a control between CPU and the baseband processing module, the initial value (such as first phase, generator polynomial etc.) of CPU by base band register configuration baseband processing module, CPU are also by functions such as the closing of base band register controlled baseband processing module, startups.Status informations such as whether baseband processing module has data to receive by base band register notice CPU, and whether reception data CRC check result is wrong, whether the transmission data are finished;
According to subscriber computer provided by the invention, it is characterized in that described transmission storer is to send data interaction intermediary between CPU and the baseband processing module.Transmission data after CPU will organize write and send in the storer, start baseband processing module by the base band register and send data, baseband processing module can go out to send data from sending memory read then, encodes, spread spectrum, and launches through delivering to Radio frequency Processing Unit, RF Processing Unit after the filtering.
According to subscriber computer provided by the invention, it is characterized in that described reception memorizer is to receive data interaction intermediary between CPU and the baseband processing module.Data result after baseband processing module will be handled writes in the reception memorizer, has data to be ready to by base band register notice CPU, and CPU can read data result after baseband processing module is handled from reception memorizer then.
According to subscriber computer provided by the invention, it is characterized in that described reception memorizer and transmission storer can be dual-port or one-port memory.When being one-port memory, there is arbitration mechanism between CPU and the baseband processing module.
The end-user machine dynamic power consumption mainly is because the upset of circuit node level produces, as long as reduce the circuit node upset, just can reduce dynamic power consumption.Because baseband signal from a plurality of beam signals, under many application scenarios, does not need all wave beams all to work, can allow the clock enable register of corresponding wave beam invalid this moment, closes the clock of corresponding wave beam treatment circuit; Or make the work enable register of corresponding wave beam invalid, and allow corresponding wave beam treatment circuit node not overturn, reduce dynamic power consumption.In some application scenario, baseband processing module is intermittent work, and also can reduce dynamic power consumption by intermittently closing the baseband processing module clock or stopping the baseband processing module working method this moment.According to the characteristics of baseband signal, the present invention is directed to baseband processing unit and proposed to adopt clock to close the scheme that mode and the work mode of enabling reduce dynamic power consumption:
According to subscriber computer provided by the invention, it is characterized in that, described chip also comprises the reducing power consumption circuit that contains clock enable register, work enable register, mode of operation selected cell, clock gating unit and work register, and described clock enable register and work enable register are included in the described base band register; Described reducing power consumption circuit is worked like this: described CPU changes the value of described clock enable register and work enable register according to actual application background, produce the data input and the clock input of described work register through described mode of operation selected cell and clock gating unit again, and then control described baseband processing module by described work register and whether work.
Work register is the trigger (being made up of numerous triggers of realizing correlation function) in the baseband processing module.Work register is under normal mode of operation, and baseband processing module just can be finished the base band signal process function.
According to subscriber computer provided by the invention, it is characterized in that because described clock gating circuit and mode of operation are selected the concrete course of work of circuit: 1. the mode of operation selected cell produces the data input DINX of work register.When work enable register output EnableX was effective, mode of operation register output DINX selected normal input; If the work clock CLKX of work register enables, work register can operate as normal.When work enable register output EnableX was invalid, mode of operation register output DINX selected constant initial value input; No matter whether the work clock CLKX of work register enables, and work register keeps normal value, has reduced the dynamic change power consumption.2. clock gating unit produces gated clock CLKX according to clock enable register output CLKXEN.CLKX is the work clock of work register.When CLKXEN is invalid, gated clock CLKX constant output high level or low level, the clock of work register does not overturn, and the output of work register can not change yet, and has reached the purpose that reduces dynamic power consumption.When CLKXEN was effective, the phase place of gated clock CLKX changed with SCLK, and enable register output EnableX is effective if work this moment, and work register is with operate as normal.
According to subscriber computer provided by the invention, it is characterized in that, described reducing power consumption circuit can because of baseband processing module handle number of beams and exist a plurality of clock gating circuits and mode of operation to select circuit.
According to subscriber computer provided by the invention, it is characterized in that described base band register comprises the clock enable register and the work enable register of appointment, connects described clock gating unit and mode of operation selected cell respectively.1. the clock enable register is operated under the clock sclk, is the part of base band register.The clock enable register is controlled by CPU, and CPU can change the value of clock enable register.The output CLKX of the output CLKXEN signal controlling clock gating unit of clock enable register.2. the enable register of working is operated under the clock sclk, is the part of base band register.The work enable register is controlled by CPU, and CPU can change the value of work enable register.The selection output DINX of the output EnableX signal controlling mode of operation selected cell of work enable register.
The Big Dipper end-user machine that the present invention proposes, compare with integrated system on the present plate: 1. adopt single-chip integrated, no longer need supporting scale programmable logic device (FPGA) and processor (DSP or CPU), reduce volume, weight, power consumption and the cost of end-user machine greatly, help realizing adapting to the portable machine of field environment, and improved confidentiality; 2. peripheral interface and plug-in processor interface flexibly are provided, have realized the modularization of end-user machine, reduced the complexity of developing more most advanced and sophisticated global position system.3. gated clock of Cai Yonging and work enable dual mode, have further reduced the power consumption of end-user machine, have realized the purpose of prolongs standby time.
Description of drawings
Fig. 1 is the general hardware block diagram of integrated terminal machine on the present plate.
Fig. 2 is the hardware block diagram of the end-user machine based on asic technology provided by the invention.
Fig. 3 is the structural drawing of " end-user machine integrated chip U " in the end-user machine shown in Figure 2.
Fig. 4 is an electrical schematic diagram of realizing reducing the dynamic power consumption part in the structural drawing shown in Figure 3
Embodiment
At first, basic point of the present invention is described:
(1) apparatus of the present invention are based on Big Dipper navigator fix principle.The terminal user is confidential can to carry out initial configuration according to dipper system smart card information or the next information of peripheral hardware; End-user machine need receive the satellite-signal of northern system, and can be to satellite transmission data and signal; The terminal user is confidential during reception goes out real information from receiving the satellite RF signal resolution, and real information can be delivered to peripheral hardware (such as personal digital assistant PDA or LCDs) and show, and input requires relevant information is done necessary calculating (such as coordinate conversion) according to peripheral hardware.During emission, terminal user's function is accepted the instruction of peripheral hardware, and tissue sends data, and finally converts data to radiofrequency signal to satellites transmits; The terminal user is confidential to finish the function that the communications protocol with peripheral hardware and smart card requires.
(2) this end-user machine, compare with integrated system on the plate, its maximum characteristics are that baseband processing unit, processor are integrated in the single integrated circuit chip, peripheral interface and plug-in processor interface more flexibly are provided, and adopted the strategy that reduces dynamic power consumption according to the characteristics of baseband processing unit, specifically: 1. integrated baseband processing unit carries out spreading code synchronously and processing such as despreading, carrier synchronization and demodulation, frame synchronization, decoding verification to the radiofrequency signal that receives, signal rows is encoded to sending, spread spectrum, and through processing such as filtering; 2. integrated processor can be central processor CPU or digital signal processor DSP or both combinations.Processor can the run user program, controls the normal operation of this device; Finish the data after the baseband processing unit processing are further handled, prepare the transmission data of baseband processing unit; By the run user program, realize the client layer agreement.3. integrated a plurality of storeies are realized the exchanges data between baseband processing unit and the processor, and utilize special function register to realize the control and the state information exchange of processor and baseband processing unit.4. integrated interface memory, realized easily processor and and plug-in processor between exchanges data.5. integrated peripheral interface units provides the hardware interface of this device and peripherals communication, for User Agreement realizes providing the physical channel.6. reduce the circuit structure of dynamic power consumption, be to propose at the characteristics of end-user machine baseband processing unit, to the beam signal that does not need to handle, can close the work clock of corresponding circuits or not enable the flip-flop data input of corresponding circuits, thereby the upset of halt circuit internal node, realization reduces the purpose of dynamic power consumption.
Further, in conjunction with the accompanying drawings.
(1) as shown in Figure 2, this end-user machine comprises end-user machine integrated chip 3, display part 5 and the Ke Lian peripheral hardware 7 thereon of antenna 8, Radio frequency Processing Unit, RF Processing Unit, integrated Base-Band Processing part and control and interface section.
(2) end-user machine integrated chip 3 among Fig. 2, its structure as shown in Figure 3, comprise peripheral interface units mouth 30, processor 31, memory controller 32, interface memory 33, base band register 34, reception memorizer 35, send storer 36, digital to analog converter 37, baseband processing unit 38, analog to digital converter 39 and internal bus 300, specific as follows:
(1) described processor 31 adopts central processor CPUs, and its effect is: 1. run user program, control the normal operation of whole device; 2. the result after according to the Big Dipper end-user machine agreement baseband processing unit 38 being handled carries out the data assembly unit; 3. send Frame according to Big Dipper end-user machine agreement organizations; According to Big Dipper end-user machine agreement and smart card and special-purpose peripheral hardware communication; 4. carry out communication according to User Defined agreement and plug-in processor; 5. finish the User Defined function.User program is positioned at plug-in storer, and processor 31 is by memory controller 32 visit external program and external data field; The user can realize the function that requirement is finished in the user communication agreement in the program area.Processor 31 is controlled the normal operation of whole device by the mode of run user program, so this device is not subjected to the influence of Big Dipper end-user machine agreement upgrading, is convenient to the upgrading of consumer products.
(2) described peripheral interface units 30 is hardware interfaces that this device is realized end-user machine and peripheral hardware communication.This peripheral interface units comprises a plurality of UART Universal Asynchronous Receiver Transmitter UART, and wherein: UART finishes the communication with the dipper system special intelligent card; UART finishes the communication with the special-purpose peripheral hardware of end-user machine; A UART can connect GPS (GPS) locating module, finishes the data fusion of GPS location and Big Dipper location; Other UART can connect relevant peripheral hardware according to user's needs.When UART received, UART was the datagram sending processor 31 that receives, and processor 31 is made associative operation according to communications protocol; When UART sent, processor 31 was organized the transmission data of UART and is sent form according to communications protocol, finishes the function of end-user machine communications protocol and other User Agreement requirement.Peripheral interface units 30 also comprises a plurality of interruption inputs; Different interruption inputs can be finished relevant operation by wake up process device 31.Peripheral interface units 30 is also drawn together a plurality of general parallel ports, and processor 31 can be caught input state or output control information from general parallel port.Peripheral interface units 30 comprises the general-purpose serial bus USB interface, and this device utilizes USB interface to carry out the quick communication of big data quantity with external USB equipment, such as from external USB device downloads numerical map etc.Peripheral interface units 30 comprises synchronous serial peripheral interface SPI, and this device utilizes the SPI interface to realize and the synchronous serial communication of peripherals that synchronous serial communication is compared with UART, has improved the fiduciary level of this device serial communication.Peripheral interface units 30 also comprises internal integrate circuit bus (I2C) interface, can with the microcontroller (MCU) of the equipment of supporting I2C, A/D, D/A converter, reservoir, lcd controller, led driver, peripheral hardwares such as I/O port expander and real-time clock carry out data communication.
(3) baseband processing unit 38 is finished the information decoding to different satellite beams signals.After powering on, processor 31 from smart card or outside if plug-in processor obtains the initial configuration value, base band register 34 is carried out parameter initialization, thereby finishes initialization baseband processing unit 38.When receiving data, analog to digital converter 39 will convert the digital signal that baseband processing unit 38 can be discerned from the radiofrequency signal of RF processing unit to, baseband processing unit 38 carries out spreading code synchronously and processing such as despreading, carrier synchronization and demodulation, frame synchronization, decoding verification according to the parameter configuration of base band register to the digital signal of analog to digital converter 39 outputs, and data preparation and data check state are delivered in the base band register 34; Base band register 34 is handled data in the reception memorizer 35 by interrupt mode notification processor 31, and (processor 31 also can be judged the data preparation and the data check state of baseband processing unit 38 by the mode of inquiry, goes to handle data in the reception memorizer 35 according to state then.) when launching, the transmission data that processor 31 will be organized write and send in the storer 36, start the sending function of baseband processing units 38 then by base band register 34.After baseband processing unit 38 sending functions were activated, baseband processing unit 38 was read data to be sent from send storer 36, to its encode, spread spectrum, and through obtaining the digital signal of many bits after the filtering; Baseband processing unit 38 is given digital to analog converter 37 with filtered digital signal, and digital to analog converter 37 converts this digital signal to simulating signal; Simulating signal after digital to analog converter 37 conversions is delivered to RF processing unit, and RF processing unit is launched last signal.
(4) interface memory 33 has been realized the packet communication between this device and the plug-in processor.Interface memory 33 is double port memories.This device can a plug-in processor by the plug-in processor interface of interface memory 13.Processor 31 and plug-in processor be access interface storer 33 simultaneously, and the visit of plug-in processor docking port storer 33 is the same convenient with the visit normal memory.When plug-in processor during to this device Data transmission, a kind of common operator scheme is: plug-in processor writes packet to be passed to interface memory 33 earlier, writes the input state indication to the address of storer 33 agreements then; The processor 31 of this device from agreed address inquire the input state designation data assure get ready after, packet is read away from storer 33, and is obtained the real data of plug-in processor input from packet.When processor 31 during to plug-in processor Data transmission, a kind of common operator scheme is: processor 31 writes packet to be passed to interface memory 33 earlier, writes the output state indication to the address of storer 33 agreements then; Plug-in processor from agreed address inquire the output state designation data assure get ready after, packet is read away from storer 33, and is obtained the real data of processor 31 output from packet.Also can be between processor 31 and the plug-in processor without inquiry mode, and notify the other side whether DSR is arranged by the look-at-me of peripheral interface units 30.Interface memory 33 has two advantages: 1) realized the parallel communication between the processor, made things convenient for this device expansion coprocessor; 2) making things convenient for the processor of higher level that this device is used as coprocessor equally uses, utilize interface memory 33 to transmit initial value (being that the relevant initial value of baseband processing unit can not obtain from peripheral interface units 30 or memory controller 32) or out of Memory to this device, this device cooperates the reception of finishing baseband signal to handle with transmission with the processor of higher level.
(3) function that circuit such as processor, field programmable gate function FPGA are finished is integrated in the one chip, reduced system power dissipation significantly, and adopted the circuit of the reduction dynamic power consumption of this device, to further reduce system power dissipation, this circuit as shown in Figure 4, comprise clock enable register 40, work enable register 41, mode of operation selected cell 42, clock gating unit 43, work register 44, specific as follows:
(1) clock enable register 40 is operated under the clock sclk, is the part of base band register 34.Clock enable register 40 is subject to processing device 31 controls, and processor 31 can change the value of clock enable register 40.The output CLKX of the output CLKXEN control clock gating unit of clock enable register 40.In example, clock enable register 40 output CLKXEN effective values are " 0 ", and promptly " 0 " will open the clock of baseband processing unit 38 internal triggers; " 1 " will close the clock of baseband processing unit 38 internal triggers.
(2) work enable register 41 is operated under the clock sclk, is the part of base band register 34.Work enable register 41 is subject to processing device 31 controls, and processor 31 can change the value of work enable register 41.The selection output DINX of the output EnableX Control work mode selecting unit 42 of work enable register 41.In example, work enable register 41 output EnableX effective values are " 1 ", and promptly " 1 " will select baseband processing unit 38 normal function patterns; " 0 " will select reset mode, and work register 44 will stop upset.
(3) mode of operation selected cell 42 produces the data input DINX of work register 44.When work enable register 41 output EnableX were effective, mode of operation selected cell 42 output DINX selected normal input; If the work clock CLKX of work register 44 enables, work register 44 can operate as normal.When work enable register 41 output EnableX were invalid, mode of operation selected cell 42 output DINX selected constant initial value input; No matter whether the work clock CLKX of work register 44 enables, and work register 44 keeps normal value, has reduced the dynamic change power consumption.In example, DX is the initial value input that resets of work register 44, and DY is the normal value input of work register 44, and the output DINX of mode of operation selected cell 42 is: when EnableX is " 0 ", select DX to export as DINX; When EnableX is " 1 ", select DY to export as DINX.As follows during the logical expression of DINX:
if(EnableX＝0)
DINX＝DX；
else
DINX＝DY；
When EnableX is " 0 ", select DX to export as DINX, because DX is a constant, DINX will not change.
(4) clock gating unit 43 produces gated clock CLKX according to clock enable register 40 output CLKXEN.CLKX is the work clock of work register 44.When CLKXEN is invalid, gated clock CLKX constant output high level or low level, the clock of work register 44 does not overturn, and the output of work register 44 can not change yet, and has reached the purpose that reduces dynamic power consumption.When CLKXEN was effective, the phase place of gated clock CLKX changed with SCLK, and enable register 41 output EnableX are effective if work this moment, and work register 44 is with operate as normal.In example, when CLKXEN is " 0 ", select SCLK to export as CLKX; When CLKXEN is " 1 ", select " 1 " to export as CLKX.As follows during the logical expression of CLKX:
if(CLKXEN＝0)
CLKX＝SCLK；
else
CLKX＝1；
When CLKXEN is " 1 ", select " 1 " to export as CLKX, be that gated clock CLKX is constant " 1 ", can not overturn, realized reducing the purpose of dynamic power consumption this moment, and the dynamic power consumption of clock is the main dynamic power consumption of chip, reduces the clock dynamic power consumption, will reduce the dynamic power consumption of entire chip greatly.
(5) work register 44 is the triggers in the baseband processing unit 38.Under the normal mode of operation of work register 44, baseband processing unit 38 just can be finished the base band signal process function.The characteristics of trigger are: only in the clock edge (rising edge or negative edge), sampled signal is imported, and input signal is remained in the output.In example, when the output of clock enable register 40 was " 1 ", it was constant " 1 " that clock gating unit 43 is exported to work register 44, did not overturn, and did not promptly have the clock edge, and work register 44 just can not change yet.Therefore reduced the dynamic power consumption of circuit.When work enable register 41 output EnableX are " 0 ", the signal input DINX that mode of operation selected cell 42 is given work register 44 is constant DX, this moment, no matter whether CLKX overturns the output of work register 44 can not overturn, and had therefore reduced the dynamic power consumption of circuit.
In addition, in example, this device can be handled the signal of a plurality of wave beams.Each wave beam all has clock enable signal CLKXEN and the work enable signal EnableX of oneself.Under many application scenarios, baseband processing unit 38 does not need to handle the signal of all wave beams, and can allow the clock enable register of corresponding wave beam invalid this moment, closes the clock of corresponding wave beam treatment circuit; Or make the work enable register of corresponding wave beam invalid, and allow corresponding wave beam treatment circuit node not overturn, reduce dynamic power consumption.In some application scenario, baseband processing unit 38 is just intermittently worked, and also can reduce dynamic power consumption by intermittently closing the mode that clock or mode of operation do not enable this moment.
(1) it is effective that the output of described enable register 41 also can be set to " 0 ", this moment DINX logical expression the time as follows:
if(EnableX＝1)
DINX＝DX；
else
DINX＝DY；
When EnableX is " 1 ", select DX to export as DINX, because DX is a constant, DINX will not change.
(2) it is effective that the output of described clock enable register 40 also can be set to " 1 ", this moment CLKX logical expression the time as follows:
if(CLKXEN＝1)
CLKX＝SCLK；
else
CLKX＝0；
When CLKXEN is " 0 ", select " 0 " as CLKX output, promptly gated clock CLKX is constant " 0 ", can not overturn.
Claims (9)
1, a kind of end-user machine of Big Dipper navigation positioning system comprises antenna (8) and Radio frequency Processing Unit, RF Processing Unit (6), it is characterized in that, built-in CPU (31) and baseband processing module (38) are integrated in the one chip (3); The such auxiliary positioning of this subscriber computer is handled: the high frequency satellite-signal that is entered by antenna (8) enters described chip through described Radio frequency Processing Unit, RF Processing Unit (6), by described baseband processing module (38) and CPU (31) response is handled and selected to the satellite-signal of this station address again, and then answer signal is launched back satellite by preset requirement by described baseband processing module (38) and Radio frequency Processing Unit, RF Processing Unit (6); Described Radio frequency Processing Unit, RF Processing Unit also can be integrated in the described chip (3).
2, according to the described subscriber computer of claim 1, it is characterized in that, also comprise and be integrated in the described chip (3) or separate independently A/D (37) and D/A (39) converter, be connected electrically between described Radio frequency Processing Unit, RF Processing Unit (6) and the baseband processing module (38): described Radio frequency Processing Unit, RF Processing Unit (6) carries out up-conversion or down coversion, and described A/D (37) and D/A (39) converter carry out analog to digital conversion and digital-to-analog conversion.
3, according to claim 1 or 2 described subscriber computers, it is characterized in that, described chip (3) also comprises internal bus (300) and interface circuit, described interface circuit, CPU (31) and baseband processing module (38) are connected on the described internal bus (300), and described CPU (31) adopts central processing unit, digital signal processor DSP or both combinations;
During reception, this chip (3) is handled like this: described base band data processing module (38) is carried out spreading code synchronously and despreading, carrier synchronization and demodulation, frame synchronization, decoding verification with described data after A, obtain data result, send into described CPU (31) by described bus (300) and carry out data assembly unit and calculating, and can further described data result be delivered to peripheral hardware and handle by described interface circuit;
During transmission, this chip (3) is handled like this: described CPU (31) gives described base band data processing module (38) according to the data message tissue transmission data that the user is provided with or interface circuit comes, and sends into described D/A converter (39) after encoded, spread spectrum and the filtering.
4, according to the described subscriber computer of claim 3, it is characterized in that, described interface circuit can be the peripheral interface units (30) that is used to finish CPU (31) and peripherals Communication Control, also can be the memory controller (32) that can produce the external memory interface sequential; Described peripheral interface units (30) can externally be observed smart card and the peripheral hardware that the end-user machine agreement is stipulated, also can connect LCD and touch-screen; Described memory controller can external external data memory.
5, according to the described subscriber computer of claim 4, it is characterized in that described peripheral interface units (30) comprises wherein any one or more of UART Universal Asynchronous Receiver Transmitter UART, general-purpose serial bus USB, synchronous serial peripheral interface SPI, internal integrate circuit bus (I2C) or parallel interface.
According to the described subscriber computer of claim 3, it is characterized in that 6, described chip (3) also comprises the interface memory with plug-in processor interface (33) that is connected on the described bus (300), described interface memory (33) is a double port memory; Described interface memory (33) can be used as the data interaction storer, also can be separately as the internal data memory of described CPU (31); Described chip (3) and plug-in processor are realized packet exchange by described interface memory (33).
7, according to the described subscriber computer of claim 3, it is characterized in that, described chip (3) also comprises and is connected base band register (34) between described baseband processing module (38) and the internal bus (300), that be used between baseband processing module (38) and the CPU (31) mutual state of a control, and is connected reception memorizer (35) and transmission storer (36) between described baseband processing module (38) and the internal bus (300), that be used to realize interaction data between baseband processing module (38) and the CPU (31).
According to the described subscriber computer of claim 7, it is characterized in that 8, described reception memorizer (35) and transmission storer (36) can be dual-port or one-port memory.
9, according to claim 3 or 7 described subscriber computers, it is characterized in that described chip (3) also comprises the reducing power consumption circuit that contains clock enable register (40), work enable register (41), mode of operation selected cell (42), clock gating unit (43) and work register (44); Described clock enable register (40) and work enable register (41) are included in the described base band register (34); Described reducing power consumption circuit is worked like this: described CPU (31) changes the value of described clock enable register (40) and work enable register (41) according to actual application background, produce the data input and the clock input of described work register (44) through described mode of operation selected cell (42) and clock gating unit (43) again, and then control the work of described baseband processing module (38) by described work register (44).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2003101238714A CN1637430A (en) | 2003-12-22 | 2003-12-31 | User's terminal machine of Big Dipper navigation and location system |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200310121754.4 | 2003-12-22 | ||
| CN200310121754 | 2003-12-22 | ||
| CNA2003101238714A CN1637430A (en) | 2003-12-22 | 2003-12-31 | User's terminal machine of Big Dipper navigation and location system |
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| Publication Number | Publication Date |
|---|---|
| CN1637430A true CN1637430A (en) | 2005-07-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2003101238714A Pending CN1637430A (en) | 2003-12-22 | 2003-12-31 | User's terminal machine of Big Dipper navigation and location system |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102314732A (en) * | 2010-07-07 | 2012-01-11 | 航天信息股份有限公司 | Portable terminal equipment |
| CN102520416A (en) * | 2011-12-27 | 2012-06-27 | 中国地质调查局发展研究中心 | Field mobile positioning device based on backward diode (BD) communication |
| CN102722739A (en) * | 2012-06-01 | 2012-10-10 | 镇江中安通信科技有限公司 | Label management information method based on handset processing and BeiDou mode transmission |
| CN103700271A (en) * | 2013-12-23 | 2014-04-02 | 天津七六四通信导航技术有限公司 | Beidou user machine system applied to vehicle allocation |
| CN103713295A (en) * | 2013-12-27 | 2014-04-09 | 北京苍穹数码测绘有限公司 | Single-board three-antenna high-precision positioning and orientation receiver |
| CN103840847A (en) * | 2012-11-26 | 2014-06-04 | 特拉博斯股份有限公司 | Satellite receiver module for telecommunication equipment |
| CN103885068A (en) * | 2014-04-08 | 2014-06-25 | 北京北斗星通导航技术股份有限公司 | Dispatching management type user receiver |
| CN105676242A (en) * | 2016-04-14 | 2016-06-15 | 和芯星通科技(北京)有限公司 | Satellite navigation device and low-power-consumption processing method thereof |
| CN106802709A (en) * | 2016-11-28 | 2017-06-06 | 珠海格力电器股份有限公司 | Low-power consumption circuit and control method thereof |
| CN111175793A (en) * | 2020-01-03 | 2020-05-19 | 中国船舶重工集团公司第七0七研究所 | Marine Beidou third positioning module and positioning method |
| CN113612519A (en) * | 2021-08-05 | 2021-11-05 | 成都市精准时空科技有限公司 | Communication control method, system, device and medium for commander and subordinate machine |
| CN114554269A (en) * | 2022-02-25 | 2022-05-27 | 深圳Tcl新技术有限公司 | Data processing method, electronic device and computer readable storage medium |
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- 2003-12-31 CN CNA2003101238714A patent/CN1637430A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102314732A (en) * | 2010-07-07 | 2012-01-11 | 航天信息股份有限公司 | Portable terminal equipment |
| CN102520416A (en) * | 2011-12-27 | 2012-06-27 | 中国地质调查局发展研究中心 | Field mobile positioning device based on backward diode (BD) communication |
| CN102722739A (en) * | 2012-06-01 | 2012-10-10 | 镇江中安通信科技有限公司 | Label management information method based on handset processing and BeiDou mode transmission |
| US9618623B2 (en) | 2012-11-26 | 2017-04-11 | Coriant Oy | Satellite receiver module for telecommunication equipment |
| CN103840847A (en) * | 2012-11-26 | 2014-06-04 | 特拉博斯股份有限公司 | Satellite receiver module for telecommunication equipment |
| CN103840847B (en) * | 2012-11-26 | 2017-08-29 | 特拉博斯股份有限公司 | Satellite receiver module for telecommunication apparatus |
| CN103700271A (en) * | 2013-12-23 | 2014-04-02 | 天津七六四通信导航技术有限公司 | Beidou user machine system applied to vehicle allocation |
| CN103713295A (en) * | 2013-12-27 | 2014-04-09 | 北京苍穹数码测绘有限公司 | Single-board three-antenna high-precision positioning and orientation receiver |
| CN103713295B (en) * | 2013-12-27 | 2017-06-30 | 苍穹数码技术股份有限公司 | Veneer triantennary high accuracy positioning direction-finding receiver |
| CN103885068B (en) * | 2014-04-08 | 2017-01-18 | 北京北斗星通导航技术股份有限公司 | Dispatching management type user receiver |
| CN103885068A (en) * | 2014-04-08 | 2014-06-25 | 北京北斗星通导航技术股份有限公司 | Dispatching management type user receiver |
| CN105676242A (en) * | 2016-04-14 | 2016-06-15 | 和芯星通科技(北京)有限公司 | Satellite navigation device and low-power-consumption processing method thereof |
| CN106802709A (en) * | 2016-11-28 | 2017-06-06 | 珠海格力电器股份有限公司 | Low-power consumption circuit and control method thereof |
| CN106802709B (en) * | 2016-11-28 | 2019-08-16 | 珠海格力电器股份有限公司 | Low-power consumption circuit and control method thereof |
| CN111175793A (en) * | 2020-01-03 | 2020-05-19 | 中国船舶重工集团公司第七0七研究所 | Marine Beidou third positioning module and positioning method |
| CN111175793B (en) * | 2020-01-03 | 2022-12-09 | 中国船舶重工集团公司第七0七研究所 | Marine Beidou third-order positioning module and positioning method |
| CN113612519A (en) * | 2021-08-05 | 2021-11-05 | 成都市精准时空科技有限公司 | Communication control method, system, device and medium for commander and subordinate machine |
| CN114554269A (en) * | 2022-02-25 | 2022-05-27 | 深圳Tcl新技术有限公司 | Data processing method, electronic device and computer readable storage medium |
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